[thirdparty/gcc.git] / gcc / config / arm / aout.h

/* Definitions of target machine for GNU compiler, for ARM with a.out
   Copyright (C) 1995-2017 Free Software Foundation, Inc.
   Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
   
   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published
   by the Free Software Foundation; either version 3, or (at your
   option) any later version.

   GCC is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   Under Section 7 of GPL version 3, you are granted additional
   permissions described in the GCC Runtime Library Exception, version
   3.1, as published by the Free Software Foundation.

   You should have received a copy of the GNU General Public License and
   a copy of the GCC Runtime Library Exception along with this program;
   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
   <http://www.gnu.org/licenses/>.  */

#ifndef ASM_APP_ON
#define ASM_APP_ON  		""
#endif
#ifndef ASM_APP_OFF
#define ASM_APP_OFF  		""
#endif

/* Switch to the text or data segment.  */
#define TEXT_SECTION_ASM_OP  	"\t.text"
#define DATA_SECTION_ASM_OP  	"\t.data"
#define BSS_SECTION_ASM_OP   	"\t.bss"

/* Note: If USER_LABEL_PREFIX or LOCAL_LABEL_PREFIX are changed,
   make sure that this change is reflected in the function
   coff_arm_is_local_label_name() in bfd/coff-arm.c.  */
#ifndef REGISTER_PREFIX
#define REGISTER_PREFIX 	""
#endif

#ifndef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX 	"_"
#endif

#ifndef LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX 	""
#endif

/* The assembler's names for the registers.  Note that the ?xx registers are
   there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
   (each of which is overlaid on two S registers), although there are no
   actual single-precision registers which correspond to D16-D31.  */
#ifndef REGISTER_NAMES
#define REGISTER_NAMES						\
{								\
  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",		\
  "r8", "r9", "r10", "fp", "ip", "sp", "lr", "pc",		\
  "s0",  "s1",  "s2",  "s3",  "s4",  "s5",  "s6",  "s7",	\
  "s8",  "s9",  "s10", "s11", "s12", "s13", "s14", "s15",	\
  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",	\
  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",	\
  "d16", "?16", "d17", "?17", "d18", "?18", "d19", "?19",	\
  "d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23",	\
  "d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27",	\
  "d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31",	\
  "wr0",   "wr1",   "wr2",   "wr3",				\
  "wr4",   "wr5",   "wr6",   "wr7",				\
  "wr8",   "wr9",   "wr10",  "wr11",				\
  "wr12",  "wr13",  "wr14",  "wr15",				\
  "wcgr0", "wcgr1", "wcgr2", "wcgr3",				\
  "cc", "vfpcc", "sfp", "afp"					\
}
#endif

#ifndef ADDITIONAL_REGISTER_NAMES
#define ADDITIONAL_REGISTER_NAMES		\
{						\
  {"a1", 0},					\
  {"a2", 1},					\
  {"a3", 2},					\
  {"a4", 3},					\
  {"v1", 4},					\
  {"v2", 5},					\
  {"v3", 6},					\
  {"v4", 7},					\
  {"v5", 8},					\
  {"v6", 9},					\
  {"rfp", 9}, /* Historical.  */		\
  {"sb", 9}, /* Historical.  */			\
  {"v7", 10},					\
  {"sl", 10},	/* Historical.  */		\
  {"r11", 11},	/* fp */			\
  {"r12", 12},	/* ip */			\
  {"r13", 13},	/* sp */			\
  {"r14", 14},	/* lr */			\
  {"r15", 15}	/* pc */			\
}
#endif

#ifndef OVERLAPPING_REGISTER_NAMES
#define OVERLAPPING_REGISTER_NAMES		\
{						\
  {"d0",  FIRST_VFP_REGNUM + 0,  2},		\
  {"d1",  FIRST_VFP_REGNUM + 2,  2},		\
  {"d2",  FIRST_VFP_REGNUM + 4,  2},		\
  {"d3",  FIRST_VFP_REGNUM + 6,  2},		\
  {"d4",  FIRST_VFP_REGNUM + 8,  2},		\
  {"d5",  FIRST_VFP_REGNUM + 10, 2},		\
  {"d6",  FIRST_VFP_REGNUM + 12, 2},		\
  {"d7",  FIRST_VFP_REGNUM + 14, 2},		\
  {"d8",  FIRST_VFP_REGNUM + 16, 2},		\
  {"d9",  FIRST_VFP_REGNUM + 18, 2},		\
  {"d10", FIRST_VFP_REGNUM + 20, 2},		\
  {"d11", FIRST_VFP_REGNUM + 22, 2},		\
  {"d12", FIRST_VFP_REGNUM + 24, 2},		\
  {"d13", FIRST_VFP_REGNUM + 26, 2},		\
  {"d14", FIRST_VFP_REGNUM + 28, 2},		\
  {"d15", FIRST_VFP_REGNUM + 30, 2},		\
  {"q0",  FIRST_VFP_REGNUM + 0,  4},		\
  {"q1",  FIRST_VFP_REGNUM + 4,  4},		\
  {"q2",  FIRST_VFP_REGNUM + 8,  4},		\
  {"q3",  FIRST_VFP_REGNUM + 12, 4},		\
  {"q4",  FIRST_VFP_REGNUM + 16, 4},		\
  {"q5",  FIRST_VFP_REGNUM + 20, 4},		\
  {"q6",  FIRST_VFP_REGNUM + 24, 4},		\
  {"q7",  FIRST_VFP_REGNUM + 28, 4},		\
  {"q8",  FIRST_VFP_REGNUM + 32, 4},		\
  {"q9",  FIRST_VFP_REGNUM + 36, 4},		\
  {"q10", FIRST_VFP_REGNUM + 40, 4},		\
  {"q11", FIRST_VFP_REGNUM + 44, 4},		\
  {"q12", FIRST_VFP_REGNUM + 48, 4},		\
  {"q13", FIRST_VFP_REGNUM + 52, 4},		\
  {"q14", FIRST_VFP_REGNUM + 56, 4},		\
  {"q15", FIRST_VFP_REGNUM + 60, 4}		\
}
#endif

#ifndef NO_DOLLAR_IN_LABEL
#define NO_DOLLAR_IN_LABEL 1
#endif

/* Generate DBX debugging information.  riscix.h will undefine this because
   the native assembler does not support stabs.  */
#define DBX_DEBUGGING_INFO 1

/* Acorn dbx moans about continuation chars, so don't use any.  */
#ifndef DBX_CONTIN_LENGTH
#define DBX_CONTIN_LENGTH  0
#endif

/* Output a function label definition.  */
#ifndef ASM_DECLARE_FUNCTION_NAME
#define ASM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL)	\
  do							\
    {							\
      ARM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL);   \
      ASM_OUTPUT_LABEL (STREAM, NAME);			\
    }							\
  while (0)
#endif

/* Globalizing directive for a label.  */
#define GLOBAL_ASM_OP "\t.global\t"

/* Make an internal label into a string.  */
#ifndef ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM)  \
  sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM))
#endif
     
/* Output an element of a dispatch table.  */
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)			\
  do								\
    {								\
      gcc_assert (!TARGET_THUMB2);				\
      asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE);		\
    }								\
  while (0)
	  

/* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions
   can be used.  For non-pic code where the offsets do not suitable for
   TBB/TBH the elements are output as absolute labels.  */
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)		\
  do									\
    {									\
      if (TARGET_ARM)							\
	asm_fprintf (STREAM, "\tb\t%LL%d\n", VALUE);			\
      else if (TARGET_THUMB1)						\
	{								\
	  if (flag_pic || optimize_size)				\
	    {								\
	      switch (GET_MODE(body))					\
		{							\
		case QImode:						\
		  asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n",	\
			       VALUE, REL);				\
		  break;						\
		case HImode: /* TBH */					\
		  asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n",	\
			       VALUE, REL);				\
		  break;						\
		case SImode:						\
		  asm_fprintf (STREAM, "\t.word\t%LL%d-%LL%d\n",	\
			       VALUE, REL);				\
		  break;						\
		default:						\
		  gcc_unreachable();					\
		}							\
	    }								\
	  else								\
	    asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE);		\
	}								\
      else /* Thumb-2 */						\
	{								\
	  switch (GET_MODE(body))					\
	    {								\
	    case QImode: /* TBB */					\
	      asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n",	\
			   VALUE, REL);					\
	      break;							\
	    case HImode: /* TBH */					\
	      asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n",	\
			   VALUE, REL);					\
	      break;							\
	    case SImode:						\
	      if (flag_pic)						\
		asm_fprintf (STREAM, "\t.word\t%LL%d+1-%LL%d\n", VALUE, REL); \
	      else							\
		asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE);	\
	      break;							\
	    default:							\
	      gcc_unreachable();					\
	    }								\
	}								\
    }									\
  while (0)


#undef  ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII(STREAM, PTR, LEN)  \
  output_ascii_pseudo_op (STREAM, (const unsigned char *) (PTR), LEN)

/* Output a gap.  In fact we fill it with nulls.  */
#undef  ASM_OUTPUT_SKIP
#define ASM_OUTPUT_SKIP(STREAM, NBYTES) 	\
  fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES))

/* Align output to a power of two.  Horrible /bin/as.  */
#ifndef ASM_OUTPUT_ALIGN  
#define ASM_OUTPUT_ALIGN(STREAM, POWER)			\
  do							\
    {							\
      register int amount = 1 << (POWER);		\
							\
      if (amount == 2)					\
	fprintf (STREAM, "\t.even\n");			\
      else if (amount != 1)				\
	fprintf (STREAM, "\t.align\t%d\n", amount - 4);	\
    }							\
  while (0)
#endif

/* Output a common block.  */
#ifndef ASM_OUTPUT_COMMON
#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED)	\
  do							\
    {							\
      fprintf (STREAM, "\t.comm\t");			\
      assemble_name (STREAM, NAME);			\
      asm_fprintf (STREAM, ", %d\t%@ %d\n", 		\
	           (int)(ROUNDED), (int)(SIZE));	\
    }							\
  while (0)
#endif
     
/* Output a local common block.  /bin/as can't do this, so hack a
   `.space' into the bss segment.  Note that this is *bad* practice,
   which is guaranteed NOT to work since it doesn't define STATIC
   COMMON space but merely STATIC BSS space.  */
#ifndef ASM_OUTPUT_ALIGNED_LOCAL
#define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN)		\
  do									\
    {									\
      switch_to_section (bss_section);					\
      ASM_OUTPUT_ALIGN (STREAM, floor_log2 (ALIGN / BITS_PER_UNIT));	\
      ASM_OUTPUT_LABEL (STREAM, NAME);					\
      fprintf (STREAM, "\t.space\t%d\n", (int)(SIZE));			\
    }									\
  while (0)
#endif
     
/* Output a zero-initialized block.  */
#ifndef ASM_OUTPUT_ALIGNED_BSS
#define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \
  asm_output_aligned_bss (STREAM, DECL, NAME, SIZE, ALIGN)
#endif

#ifndef ASM_COMMENT_START
#define ASM_COMMENT_START 	"@"
#endif

/* This works for GAS and some other assemblers.  */
#define SET_ASM_OP		"\t.set\t"
Commit	Line	Data
9fb7806b	1	/* Definitions of target machine for GNU compiler, for ARM with a.out
cbe34bb5	2	Copyright (C) 1995-2017 Free Software Foundation, Inc.
ae3e1bb4	3	Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
9fb7806b	4
4f448245	5	This file is part of GCC.
9fb7806b	6
4f448245 NC	7	GCC is free software; you can redistribute it and/or modify it
4f448245 NC	8	under the terms of the GNU General Public License as published
2f83c7d6	9	by the Free Software Foundation; either version 3, or (at your
4f448245	10	option) any later version.
9fb7806b	11
4f448245 NC	12	GCC is distributed in the hope that it will be useful, but WITHOUT
	13	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	14	or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	15	License for more details.
9fb7806b	16
999db125 GJL	17	Under Section 7 of GPL version 3, you are granted additional
	18	permissions described in the GCC Runtime Library Exception, version
	19	3.1, as published by the Free Software Foundation.
	20
c7eca9fe GJL	21	You should have received a copy of the GNU General Public License and
	22	a copy of the GCC Runtime Library Exception along with this program;
	23	see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
2f83c7d6	24	<http://www.gnu.org/licenses/>. */
9fb7806b	25
d5b7b3ae RE	26	#ifndef ASM_APP_ON
	27	#define ASM_APP_ON ""
	28	#endif
	29	#ifndef ASM_APP_OFF
	30	#define ASM_APP_OFF ""
	31	#endif
9fb7806b RE	32
9fb7806b RE	33	/* Switch to the text or data segment. */
93de6f51 HPN	34	#define TEXT_SECTION_ASM_OP "\t.text"
	35	#define DATA_SECTION_ASM_OP "\t.data"
	36	#define BSS_SECTION_ASM_OP "\t.bss"
b355a481 NC	37
	38	/* Note: If USER_LABEL_PREFIX or LOCAL_LABEL_PREFIX are changed,
	39	make sure that this change is reflected in the function
4f448245	40	coff_arm_is_local_label_name() in bfd/coff-arm.c. */
b355a481 NC	41	#ifndef REGISTER_PREFIX
	42	#define REGISTER_PREFIX ""
	43	#endif
	44
	45	#ifndef USER_LABEL_PREFIX
	46	#define USER_LABEL_PREFIX "_"
	47	#endif
	48
	49	#ifndef LOCAL_LABEL_PREFIX
	50	#define LOCAL_LABEL_PREFIX ""
	51	#endif
9fb7806b	52
f1adb0a9 JB	53	/* The assembler's names for the registers. Note that the ?xx registers are
	54	there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
	55	(each of which is overlaid on two S registers), although there are no
	56	actual single-precision registers which correspond to D16-D31. */
9fb7806b	57	#ifndef REGISTER_NAMES
0be8bd1a RE	58	#define REGISTER_NAMES \
	59	{ \
	60	"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
	61	"r8", "r9", "r10", "fp", "ip", "sp", "lr", "pc", \
	62	"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
	63	"s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", \
	64	"s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", \
	65	"s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", \
	66	"d16", "?16", "d17", "?17", "d18", "?18", "d19", "?19", \
	67	"d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23", \
	68	"d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27", \
	69	"d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31", \
	70	"wr0", "wr1", "wr2", "wr3", \
	71	"wr4", "wr5", "wr6", "wr7", \
	72	"wr8", "wr9", "wr10", "wr11", \
	73	"wr12", "wr13", "wr14", "wr15", \
	74	"wcgr0", "wcgr1", "wcgr2", "wcgr3", \
	75	"cc", "vfpcc", "sfp", "afp" \
9fb7806b RE	76	}
	77	#endif
	78
	79	#ifndef ADDITIONAL_REGISTER_NAMES
	80	#define ADDITIONAL_REGISTER_NAMES \
	81	{ \
	82	{"a1", 0}, \
	83	{"a2", 1}, \
	84	{"a3", 2}, \
	85	{"a4", 3}, \
	86	{"v1", 4}, \
	87	{"v2", 5}, \
	88	{"v3", 6}, \
	89	{"v4", 7}, \
	90	{"v5", 8}, \
	91	{"v6", 9}, \
0be8bd1a RE	92	{"rfp", 9}, /* Historical. */ \
0be8bd1a RE	93	{"sb", 9}, /* Historical. */ \
9fb7806b	94	{"v7", 10}, \
0be8bd1a	95	{"sl", 10}, /* Historical. */ \
9fb7806b RE	96	{"r11", 11}, /* fp */ \
	97	{"r12", 12}, /* ip */ \
	98	{"r13", 13}, /* sp */ \
	99	{"r14", 14}, /* lr */ \
0be8bd1a	100	{"r15", 15} /* pc */ \
0c6d290e RE	101	}
	102	#endif
	103
	104	#ifndef OVERLAPPING_REGISTER_NAMES
	105	#define OVERLAPPING_REGISTER_NAMES \
	106	{ \
0be8bd1a RE	107	{"d0", FIRST_VFP_REGNUM + 0, 2}, \
	108	{"d1", FIRST_VFP_REGNUM + 2, 2}, \
	109	{"d2", FIRST_VFP_REGNUM + 4, 2}, \
	110	{"d3", FIRST_VFP_REGNUM + 6, 2}, \
	111	{"d4", FIRST_VFP_REGNUM + 8, 2}, \
	112	{"d5", FIRST_VFP_REGNUM + 10, 2}, \
	113	{"d6", FIRST_VFP_REGNUM + 12, 2}, \
	114	{"d7", FIRST_VFP_REGNUM + 14, 2}, \
	115	{"d8", FIRST_VFP_REGNUM + 16, 2}, \
	116	{"d9", FIRST_VFP_REGNUM + 18, 2}, \
	117	{"d10", FIRST_VFP_REGNUM + 20, 2}, \
	118	{"d11", FIRST_VFP_REGNUM + 22, 2}, \
	119	{"d12", FIRST_VFP_REGNUM + 24, 2}, \
	120	{"d13", FIRST_VFP_REGNUM + 26, 2}, \
	121	{"d14", FIRST_VFP_REGNUM + 28, 2}, \
	122	{"d15", FIRST_VFP_REGNUM + 30, 2}, \
	123	{"q0", FIRST_VFP_REGNUM + 0, 4}, \
	124	{"q1", FIRST_VFP_REGNUM + 4, 4}, \
	125	{"q2", FIRST_VFP_REGNUM + 8, 4}, \
	126	{"q3", FIRST_VFP_REGNUM + 12, 4}, \
	127	{"q4", FIRST_VFP_REGNUM + 16, 4}, \
	128	{"q5", FIRST_VFP_REGNUM + 20, 4}, \
	129	{"q6", FIRST_VFP_REGNUM + 24, 4}, \
	130	{"q7", FIRST_VFP_REGNUM + 28, 4}, \
	131	{"q8", FIRST_VFP_REGNUM + 32, 4}, \
	132	{"q9", FIRST_VFP_REGNUM + 36, 4}, \
	133	{"q10", FIRST_VFP_REGNUM + 40, 4}, \
	134	{"q11", FIRST_VFP_REGNUM + 44, 4}, \
	135	{"q12", FIRST_VFP_REGNUM + 48, 4}, \
	136	{"q13", FIRST_VFP_REGNUM + 52, 4}, \
	137	{"q14", FIRST_VFP_REGNUM + 56, 4}, \
	138	{"q15", FIRST_VFP_REGNUM + 60, 4} \
9fb7806b RE	139	}
	140	#endif
	141
be393ecf	142	#ifndef NO_DOLLAR_IN_LABEL
6cfc7210	143	#define NO_DOLLAR_IN_LABEL 1
be393ecf	144	#endif
9fb7806b	145
9fb7806b	146	/* Generate DBX debugging information. riscix.h will undefine this because
4f448245	147	the native assembler does not support stabs. */
23532de9	148	#define DBX_DEBUGGING_INFO 1
9fb7806b RE	149
	150	/* Acorn dbx moans about continuation chars, so don't use any. */
	151	#ifndef DBX_CONTIN_LENGTH
	152	#define DBX_CONTIN_LENGTH 0
	153	#endif
	154
9fb7806b	155	/* Output a function label definition. */
b355a481	156	#ifndef ASM_DECLARE_FUNCTION_NAME
6cfc7210 NC	157	#define ASM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL) \
	158	do \
	159	{ \
	160	ARM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL); \
	161	ASM_OUTPUT_LABEL (STREAM, NAME); \
	162	} \
	163	while (0)
b355a481	164	#endif
9fb7806b	165
506a61b1 KG	166	/* Globalizing directive for a label. */
506a61b1 KG	167	#define GLOBAL_ASM_OP "\t.global\t"
9fb7806b	168
9fb7806b	169	/* Make an internal label into a string. */
b355a481	170	#ifndef ASM_GENERATE_INTERNAL_LABEL
9fb7806b	171	#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
aec3cfba	172	sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM))
b355a481 NC	173	#endif
b355a481 NC	174
9fb7806b	175	/* Output an element of a dispatch table. */
5b3e6663 PB	176	#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
	177	do \
	178	{ \
	179	gcc_assert (!TARGET_THUMB2); \
	180	asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE); \
	181	} \
	182	while (0)
	183
9fb7806b	184
5b3e6663 PB	185	/* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions
	186	can be used. For non-pic code where the offsets do not suitable for
	187	TBB/TBH the elements are output as absolute labels. */
657d9449 RE	188	#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
	189	do \
	190	{ \
	191	if (TARGET_ARM) \
	192	asm_fprintf (STREAM, "\tb\t%LL%d\n", VALUE); \
5b3e6663	193	else if (TARGET_THUMB1) \
907dd0c7 RE	194	{ \
	195	if (flag_pic \|\| optimize_size) \
	196	{ \
	197	switch (GET_MODE(body)) \
	198	{ \
	199	case QImode: \
	200	asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n", \
	201	VALUE, REL); \
	202	break; \
	203	case HImode: /* TBH */ \
	204	asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n", \
	205	VALUE, REL); \
	206	break; \
	207	case SImode: \
	208	asm_fprintf (STREAM, "\t.word\t%LL%d-%LL%d\n", \
	209	VALUE, REL); \
	210	break; \
	211	default: \
	212	gcc_unreachable(); \
	213	} \
	214	} \
	215	else \
	216	asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE); \
	217	} \
5b3e6663 PB	218	else /* Thumb-2 */ \
	219	{ \
	220	switch (GET_MODE(body)) \
	221	{ \
	222	case QImode: /* TBB */ \
	223	asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n", \
	224	VALUE, REL); \
	225	break; \
	226	case HImode: /* TBH */ \
	227	asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n", \
	228	VALUE, REL); \
	229	break; \
	230	case SImode: \
	231	if (flag_pic) \
	232	asm_fprintf (STREAM, "\t.word\t%LL%d+1-%LL%d\n", VALUE, REL); \
	233	else \
	234	asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE); \
	235	break; \
	236	default: \
	237	gcc_unreachable(); \
	238	} \
	239	} \
657d9449 RE	240	} \
	241	while (0)
	242
9fb7806b	243
be393ecf	244	#undef ASM_OUTPUT_ASCII
9fb7806b	245	#define ASM_OUTPUT_ASCII(STREAM, PTR, LEN) \
5a9335ef	246	output_ascii_pseudo_op (STREAM, (const unsigned char *) (PTR), LEN)
9fb7806b RE	247
9fb7806b RE	248	/* Output a gap. In fact we fill it with nulls. */
be393ecf	249	#undef ASM_OUTPUT_SKIP
b355a481	250	#define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
5a9335ef	251	fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES))
9fb7806b RE	252
9fb7806b RE	253	/* Align output to a power of two. Horrible /bin/as. */
00275db1	254	#ifndef ASM_OUTPUT_ALIGN
6cfc7210 NC	255	#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
	256	do \
	257	{ \
	258	register int amount = 1 << (POWER); \
	259	\
	260	if (amount == 2) \
	261	fprintf (STREAM, "\t.even\n"); \
	262	else if (amount != 1) \
	263	fprintf (STREAM, "\t.align\t%d\n", amount - 4); \
	264	} \
00275db1 PB	265	while (0)
00275db1 PB	266	#endif
9fb7806b	267
4f448245	268	/* Output a common block. */
b355a481	269	#ifndef ASM_OUTPUT_COMMON
6cfc7210 NC	270	#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
	271	do \
	272	{ \
	273	fprintf (STREAM, "\t.comm\t"); \
	274	assemble_name (STREAM, NAME); \
d5b7b3ae	275	asm_fprintf (STREAM, ", %d\t%@ %d\n", \
58e15542	276	(int)(ROUNDED), (int)(SIZE)); \
6cfc7210 NC	277	} \
6cfc7210 NC	278	while (0)
b355a481 NC	279	#endif
b355a481 NC	280
33f7f353	281	/* Output a local common block. /bin/as can't do this, so hack a
b355a481 NC	282	`.space' into the bss segment. Note that this is bad practice,
	283	which is guaranteed NOT to work since it doesn't define STATIC
	284	COMMON space but merely STATIC BSS space. */
	285	#ifndef ASM_OUTPUT_ALIGNED_LOCAL
6cfc7210 NC	286	#define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
	287	do \
	288	{ \
d6b5193b	289	switch_to_section (bss_section); \
6cfc7210 NC	290	ASM_OUTPUT_ALIGN (STREAM, floor_log2 (ALIGN / BITS_PER_UNIT)); \
6cfc7210 NC	291	ASM_OUTPUT_LABEL (STREAM, NAME); \
58e15542	292	fprintf (STREAM, "\t.space\t%d\n", (int)(SIZE)); \
6cfc7210 NC	293	} \
6cfc7210 NC	294	while (0)
b355a481 NC	295	#endif
b355a481 NC	296
c9d9bc85	297	/* Output a zero-initialized block. */
b355a481	298	#ifndef ASM_OUTPUT_ALIGNED_BSS
6cfc7210	299	#define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \
b355a481 NC	300	asm_output_aligned_bss (STREAM, DECL, NAME, SIZE, ALIGN)
b355a481 NC	301	#endif
9fb7806b	302
9fb7806b	303	#ifndef ASM_COMMENT_START
b355a481	304	#define ASM_COMMENT_START "@"
9fb7806b RE	305	#endif
9fb7806b RE	306
ce29b9d0	307	/* This works for GAS and some other assemblers. */
93de6f51	308	#define SET_ASM_OP "\t.set\t"