[thirdparty/gcc.git] / gcc / config / arm / aout.h

/* Definitions of target machine for GNU compiler, for ARM with a.out
   Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2004, 2007
   Free Software Foundation, Inc.
   Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
   
   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published
   by the Free Software Foundation; either version 2, or (at your
   option) any later version.

   GCC is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License
   along with GCC; see the file COPYING.  If not, write to
   the Free Software Foundation, 51 Franklin Street, Fifth Floor,
   Boston, MA 02110-1301, USA.  */

#ifndef ASM_APP_ON
#define ASM_APP_ON  		""
#endif
#ifndef ASM_APP_OFF
#define ASM_APP_OFF  		""
#endif

/* Switch to the text or data segment.  */
#define TEXT_SECTION_ASM_OP  	"\t.text"
#define DATA_SECTION_ASM_OP  	"\t.data"
#define BSS_SECTION_ASM_OP   	"\t.bss"

/* Note: If USER_LABEL_PREFIX or LOCAL_LABEL_PREFIX are changed,
   make sure that this change is reflected in the function
   coff_arm_is_local_label_name() in bfd/coff-arm.c.  */
#ifndef REGISTER_PREFIX
#define REGISTER_PREFIX 	""
#endif

#ifndef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX 	"_"
#endif

#ifndef LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX 	""
#endif

/* The assembler's names for the registers.  Note that the ?xx registers are
   there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
   (each of which is overlaid on two S registers), although there are no
   actual single-precision registers which correspond to D16-D31.  */
#ifndef REGISTER_NAMES
#define REGISTER_NAMES				   \
{				                   \
  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",  \
  "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc",  \
  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",  \
  "cc", "sfp", "afp",		   		   \
  "mv0",   "mv1",   "mv2",   "mv3",		   \
  "mv4",   "mv5",   "mv6",   "mv7",		   \
  "mv8",   "mv9",   "mv10",  "mv11",		   \
  "mv12",  "mv13",  "mv14",  "mv15",		   \
  "wcgr0", "wcgr1", "wcgr2", "wcgr3",		   \
  "wr0",   "wr1",   "wr2",   "wr3",		   \
  "wr4",   "wr5",   "wr6",   "wr7",		   \
  "wr8",   "wr9",   "wr10",  "wr11",		   \
  "wr12",  "wr13",  "wr14",  "wr15",		   \
  "s0",  "s1",  "s2",  "s3",  "s4",  "s5",  "s6",  "s7",  \
  "s8",  "s9",  "s10", "s11", "s12", "s13", "s14", "s15", \
  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", \
  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", \
  "d16", "?16", "d17", "?17", "d18", "?18", "d19", "?19", \
  "d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23", \
  "d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27", \
  "d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31", \
  "vfpcc"					   \
}
#endif

#ifndef ADDITIONAL_REGISTER_NAMES
#define ADDITIONAL_REGISTER_NAMES		\
{						\
  {"a1", 0},					\
  {"a2", 1},					\
  {"a3", 2},					\
  {"a4", 3},					\
  {"v1", 4},					\
  {"v2", 5},					\
  {"v3", 6},					\
  {"v4", 7},					\
  {"v5", 8},					\
  {"v6", 9},					\
  {"rfp", 9}, /* Gcc used to call it this */	\
  {"sb", 9},					\
  {"v7", 10},					\
  {"r10", 10},	/* sl */			\
  {"r11", 11},	/* fp */			\
  {"r12", 12},	/* ip */			\
  {"r13", 13},	/* sp */			\
  {"r14", 14},	/* lr */			\
  {"r15", 15},	/* pc */			\
  {"mvf0", 27},					\
  {"mvf1", 28},					\
  {"mvf2", 29},					\
  {"mvf3", 30},					\
  {"mvf4", 31},					\
  {"mvf5", 32},					\
  {"mvf6", 33},					\
  {"mvf7", 34},					\
  {"mvf8", 35},					\
  {"mvf9", 36},					\
  {"mvf10", 37},				\
  {"mvf11", 38},				\
  {"mvf12", 39},				\
  {"mvf13", 40},				\
  {"mvf14", 41},				\
  {"mvf15", 42},				\
  {"mvd0", 27},					\
  {"mvd1", 28},					\
  {"mvd2", 29},					\
  {"mvd3", 30},					\
  {"mvd4", 31},					\
  {"mvd5", 32},					\
  {"mvd6", 33},					\
  {"mvd7", 34},					\
  {"mvd8", 35},					\
  {"mvd9", 36},					\
  {"mvd10", 37},				\
  {"mvd11", 38},				\
  {"mvd12", 39},				\
  {"mvd13", 40},				\
  {"mvd14", 41},				\
  {"mvd15", 42},				\
  {"mvfx0", 27},				\
  {"mvfx1", 28},				\
  {"mvfx2", 29},				\
  {"mvfx3", 30},				\
  {"mvfx4", 31},				\
  {"mvfx5", 32},				\
  {"mvfx6", 33},				\
  {"mvfx7", 34},				\
  {"mvfx8", 35},				\
  {"mvfx9", 36},				\
  {"mvfx10", 37},				\
  {"mvfx11", 38},				\
  {"mvfx12", 39},				\
  {"mvfx13", 40},				\
  {"mvfx14", 41},				\
  {"mvfx15", 42},				\
  {"mvdx0", 27},				\
  {"mvdx1", 28},				\
  {"mvdx2", 29},				\
  {"mvdx3", 30},				\
  {"mvdx4", 31},				\
  {"mvdx5", 32},				\
  {"mvdx6", 33},				\
  {"mvdx7", 34},				\
  {"mvdx8", 35},				\
  {"mvdx9", 36},				\
  {"mvdx10", 37},				\
  {"mvdx11", 38},				\
  {"mvdx12", 39},				\
  {"mvdx13", 40},				\
  {"mvdx14", 41},				\
  {"mvdx15", 42},				\
  {"d0", 63},					\
  {"d1", 65},					\
  {"d2", 67},					\
  {"d3", 69},					\
  {"d4", 71},					\
  {"d5", 73},					\
  {"d6", 75},					\
  {"d7", 77},					\
  {"d8", 79},					\
  {"d9", 81},					\
  {"d10", 83},					\
  {"d11", 85},					\
  {"d12", 87},					\
  {"d13", 89},					\
  {"d14", 91},					\
  {"d15", 93},					\
}
#endif

/* Arm Assembler barfs on dollars.  */
#define DOLLARS_IN_IDENTIFIERS 0

#ifndef NO_DOLLAR_IN_LABEL
#define NO_DOLLAR_IN_LABEL 1
#endif

/* Generate DBX debugging information.  riscix.h will undefine this because
   the native assembler does not support stabs.  */
#define DBX_DEBUGGING_INFO 1

/* Acorn dbx moans about continuation chars, so don't use any.  */
#ifndef DBX_CONTIN_LENGTH
#define DBX_CONTIN_LENGTH  0
#endif

/* Output a function label definition.  */
#ifndef ASM_DECLARE_FUNCTION_NAME
#define ASM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL)	\
  do							\
    {							\
      ARM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL);   \
      ASM_OUTPUT_LABEL (STREAM, NAME);			\
    }							\
  while (0)
#endif

/* Globalizing directive for a label.  */
#define GLOBAL_ASM_OP "\t.global\t"

/* Make an internal label into a string.  */
#ifndef ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM)  \
  sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM))
#endif
     
/* Output an element of a dispatch table.  */
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)			\
  do								\
    {								\
      gcc_assert (!TARGET_THUMB2);				\
      asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE);		\
    }								\
  while (0)
	  

/* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions
   can be used.  For non-pic code where the offsets do not suitable for
   TBB/TBH the elements are output as absolute labels.  */
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)		\
  do									\
    {									\
      if (TARGET_ARM)							\
	asm_fprintf (STREAM, "\tb\t%LL%d\n", VALUE);			\
      else if (TARGET_THUMB1)						\
	asm_fprintf (STREAM, "\t.word\t%LL%d-%LL%d\n", VALUE, REL);	\
      else /* Thumb-2 */						\
	{								\
	  switch (GET_MODE(body))					\
	    {								\
	    case QImode: /* TBB */					\
	      asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n",	\
			   VALUE, REL);					\
	      break;							\
	    case HImode: /* TBH */					\
	      asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n",	\
			   VALUE, REL);					\
	      break;							\
	    case SImode:						\
	      if (flag_pic)						\
		asm_fprintf (STREAM, "\t.word\t%LL%d+1-%LL%d\n", VALUE, REL); \
	      else							\
		asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE);	\
	      break;							\
	    default:							\
	      gcc_unreachable();					\
	    }								\
	}								\
    }									\
  while (0)


#undef  ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII(STREAM, PTR, LEN)  \
  output_ascii_pseudo_op (STREAM, (const unsigned char *) (PTR), LEN)

/* Output a gap.  In fact we fill it with nulls.  */
#undef  ASM_OUTPUT_SKIP
#define ASM_OUTPUT_SKIP(STREAM, NBYTES) 	\
  fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES))

/* Align output to a power of two.  Horrible /bin/as.  */
#ifndef ASM_OUTPUT_ALIGN  
#define ASM_OUTPUT_ALIGN(STREAM, POWER)			\
  do							\
    {							\
      register int amount = 1 << (POWER);		\
							\
      if (amount == 2)					\
	fprintf (STREAM, "\t.even\n");			\
      else if (amount != 1)				\
	fprintf (STREAM, "\t.align\t%d\n", amount - 4);	\
    }							\
  while (0)
#endif

/* Output a common block.  */
#ifndef ASM_OUTPUT_COMMON
#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED)	\
  do							\
    {							\
      fprintf (STREAM, "\t.comm\t");			\
      assemble_name (STREAM, NAME);			\
      asm_fprintf (STREAM, ", %d\t%@ %d\n", 		\
	           (int)(ROUNDED), (int)(SIZE));	\
    }							\
  while (0)
#endif
     
/* Output a local common block.  /bin/as can't do this, so hack a
   `.space' into the bss segment.  Note that this is *bad* practice,
   which is guaranteed NOT to work since it doesn't define STATIC
   COMMON space but merely STATIC BSS space.  */
#ifndef ASM_OUTPUT_ALIGNED_LOCAL
#define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN)		\
  do									\
    {									\
      switch_to_section (bss_section);					\
      ASM_OUTPUT_ALIGN (STREAM, floor_log2 (ALIGN / BITS_PER_UNIT));	\
      ASM_OUTPUT_LABEL (STREAM, NAME);					\
      fprintf (STREAM, "\t.space\t%d\n", (int)(SIZE));			\
    }									\
  while (0)
#endif
     
/* Output a zero-initialized block.  */
#ifndef ASM_OUTPUT_ALIGNED_BSS
#define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \
  asm_output_aligned_bss (STREAM, DECL, NAME, SIZE, ALIGN)
#endif

/* Output a #ident directive.  */
#ifndef ASM_OUTPUT_IDENT
#define ASM_OUTPUT_IDENT(STREAM,STRING)  \
  asm_fprintf (STREAM, "%@ - - - ident %s\n", STRING)
#endif
     
#ifndef ASM_COMMENT_START
#define ASM_COMMENT_START 	"@"
#endif

/* This works for GAS and some other assemblers.  */
#define SET_ASM_OP		"\t.set\t"
Commit	Line	Data
9fb7806b	1	/* Definitions of target machine for GNU compiler, for ARM with a.out
5b3e6663	2	Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2004, 2007
2398fb2a	3	Free Software Foundation, Inc.
ae3e1bb4	4	Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
9fb7806b	5
4f448245	6	This file is part of GCC.
9fb7806b	7
4f448245 NC	8	GCC is free software; you can redistribute it and/or modify it
	9	under the terms of the GNU General Public License as published
	10	by the Free Software Foundation; either version 2, or (at your
	11	option) any later version.
9fb7806b	12
4f448245 NC	13	GCC is distributed in the hope that it will be useful, but WITHOUT
	14	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	15	or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	16	License for more details.
9fb7806b	17
4f448245 NC	18	You should have received a copy of the GNU General Public License
4f448245 NC	19	along with GCC; see the file COPYING. If not, write to
39d14dda KC	20	the Free Software Foundation, 51 Franklin Street, Fifth Floor,
39d14dda KC	21	Boston, MA 02110-1301, USA. */
9fb7806b	22
d5b7b3ae RE	23	#ifndef ASM_APP_ON
	24	#define ASM_APP_ON ""
	25	#endif
	26	#ifndef ASM_APP_OFF
	27	#define ASM_APP_OFF ""
	28	#endif
9fb7806b RE	29
9fb7806b RE	30	/* Switch to the text or data segment. */
93de6f51 HPN	31	#define TEXT_SECTION_ASM_OP "\t.text"
	32	#define DATA_SECTION_ASM_OP "\t.data"
	33	#define BSS_SECTION_ASM_OP "\t.bss"
b355a481 NC	34
	35	/* Note: If USER_LABEL_PREFIX or LOCAL_LABEL_PREFIX are changed,
	36	make sure that this change is reflected in the function
4f448245	37	coff_arm_is_local_label_name() in bfd/coff-arm.c. */
b355a481 NC	38	#ifndef REGISTER_PREFIX
	39	#define REGISTER_PREFIX ""
	40	#endif
	41
	42	#ifndef USER_LABEL_PREFIX
	43	#define USER_LABEL_PREFIX "_"
	44	#endif
	45
	46	#ifndef LOCAL_LABEL_PREFIX
	47	#define LOCAL_LABEL_PREFIX ""
	48	#endif
9fb7806b	49
f1adb0a9 JB	50	/* The assembler's names for the registers. Note that the ?xx registers are
	51	there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
	52	(each of which is overlaid on two S registers), although there are no
	53	actual single-precision registers which correspond to D16-D31. */
9fb7806b	54	#ifndef REGISTER_NAMES
9b66ebb1	55	#define REGISTER_NAMES \
9fb7806b RE	56	{ \
	57	"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
	58	"r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc", \
	59	"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
9b6b54e2	60	"cc", "sfp", "afp", \
5a9335ef NC	61	"mv0", "mv1", "mv2", "mv3", \
	62	"mv4", "mv5", "mv6", "mv7", \
	63	"mv8", "mv9", "mv10", "mv11", \
	64	"mv12", "mv13", "mv14", "mv15", \
	65	"wcgr0", "wcgr1", "wcgr2", "wcgr3", \
	66	"wr0", "wr1", "wr2", "wr3", \
	67	"wr4", "wr5", "wr6", "wr7", \
	68	"wr8", "wr9", "wr10", "wr11", \
9b66ebb1 PB	69	"wr12", "wr13", "wr14", "wr15", \
	70	"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
	71	"s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", \
	72	"s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", \
	73	"s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", \
f1adb0a9 JB	74	"d16", "?16", "d17", "?17", "d18", "?18", "d19", "?19", \
	75	"d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23", \
	76	"d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27", \
	77	"d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31", \
9b66ebb1	78	"vfpcc" \
9fb7806b RE	79	}
	80	#endif
	81
	82	#ifndef ADDITIONAL_REGISTER_NAMES
	83	#define ADDITIONAL_REGISTER_NAMES \
	84	{ \
	85	{"a1", 0}, \
	86	{"a2", 1}, \
	87	{"a3", 2}, \
	88	{"a4", 3}, \
	89	{"v1", 4}, \
	90	{"v2", 5}, \
	91	{"v3", 6}, \
	92	{"v4", 7}, \
	93	{"v5", 8}, \
	94	{"v6", 9}, \
	95	{"rfp", 9}, /* Gcc used to call it this */ \
	96	{"sb", 9}, \
	97	{"v7", 10}, \
	98	{"r10", 10}, /* sl */ \
	99	{"r11", 11}, /* fp */ \
	100	{"r12", 12}, /* ip */ \
	101	{"r13", 13}, /* sp */ \
	102	{"r14", 14}, /* lr */ \
9b6b54e2 NC	103	{"r15", 15}, /* pc */ \
	104	{"mvf0", 27}, \
	105	{"mvf1", 28}, \
	106	{"mvf2", 29}, \
	107	{"mvf3", 30}, \
	108	{"mvf4", 31}, \
	109	{"mvf5", 32}, \
	110	{"mvf6", 33}, \
	111	{"mvf7", 34}, \
	112	{"mvf8", 35}, \
	113	{"mvf9", 36}, \
	114	{"mvf10", 37}, \
	115	{"mvf11", 38}, \
	116	{"mvf12", 39}, \
	117	{"mvf13", 40}, \
	118	{"mvf14", 41}, \
	119	{"mvf15", 42}, \
	120	{"mvd0", 27}, \
	121	{"mvd1", 28}, \
	122	{"mvd2", 29}, \
	123	{"mvd3", 30}, \
	124	{"mvd4", 31}, \
	125	{"mvd5", 32}, \
	126	{"mvd6", 33}, \
	127	{"mvd7", 34}, \
	128	{"mvd8", 35}, \
	129	{"mvd9", 36}, \
	130	{"mvd10", 37}, \
	131	{"mvd11", 38}, \
	132	{"mvd12", 39}, \
	133	{"mvd13", 40}, \
	134	{"mvd14", 41}, \
	135	{"mvd15", 42}, \
	136	{"mvfx0", 27}, \
	137	{"mvfx1", 28}, \
	138	{"mvfx2", 29}, \
	139	{"mvfx3", 30}, \
	140	{"mvfx4", 31}, \
	141	{"mvfx5", 32}, \
	142	{"mvfx6", 33}, \
	143	{"mvfx7", 34}, \
	144	{"mvfx8", 35}, \
	145	{"mvfx9", 36}, \
	146	{"mvfx10", 37}, \
	147	{"mvfx11", 38}, \
	148	{"mvfx12", 39}, \
	149	{"mvfx13", 40}, \
	150	{"mvfx14", 41}, \
	151	{"mvfx15", 42}, \
	152	{"mvdx0", 27}, \
	153	{"mvdx1", 28}, \
	154	{"mvdx2", 29}, \
	155	{"mvdx3", 30}, \
	156	{"mvdx4", 31}, \
	157	{"mvdx5", 32}, \
	158	{"mvdx6", 33}, \
	159	{"mvdx7", 34}, \
	160	{"mvdx8", 35}, \
	161	{"mvdx9", 36}, \
	162	{"mvdx10", 37}, \
	163	{"mvdx11", 38}, \
	164	{"mvdx12", 39}, \
	165	{"mvdx13", 40}, \
	166	{"mvdx14", 41}, \
9b66ebb1 PB	167	{"mvdx15", 42}, \
	168	{"d0", 63}, \
	169	{"d1", 65}, \
	170	{"d2", 67}, \
	171	{"d3", 69}, \
	172	{"d4", 71}, \
	173	{"d5", 73}, \
	174	{"d6", 75}, \
	175	{"d7", 77}, \
	176	{"d8", 79}, \
	177	{"d9", 81}, \
	178	{"d10", 83}, \
	179	{"d11", 85}, \
	180	{"d12", 87}, \
	181	{"d13", 89}, \
	182	{"d14", 91}, \
	183	{"d15", 93}, \
9fb7806b RE	184	}
	185	#endif
	186
4f448245	187	/* Arm Assembler barfs on dollars. */
9fb7806b RE	188	#define DOLLARS_IN_IDENTIFIERS 0
9fb7806b RE	189
be393ecf	190	#ifndef NO_DOLLAR_IN_LABEL
6cfc7210	191	#define NO_DOLLAR_IN_LABEL 1
be393ecf	192	#endif
9fb7806b	193
9fb7806b	194	/* Generate DBX debugging information. riscix.h will undefine this because
4f448245	195	the native assembler does not support stabs. */
23532de9	196	#define DBX_DEBUGGING_INFO 1
9fb7806b RE	197
	198	/* Acorn dbx moans about continuation chars, so don't use any. */
	199	#ifndef DBX_CONTIN_LENGTH
	200	#define DBX_CONTIN_LENGTH 0
	201	#endif
	202
9fb7806b	203	/* Output a function label definition. */
b355a481	204	#ifndef ASM_DECLARE_FUNCTION_NAME
6cfc7210 NC	205	#define ASM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL) \
	206	do \
	207	{ \
	208	ARM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL); \
	209	ASM_OUTPUT_LABEL (STREAM, NAME); \
	210	} \
	211	while (0)
b355a481	212	#endif
9fb7806b	213
506a61b1 KG	214	/* Globalizing directive for a label. */
506a61b1 KG	215	#define GLOBAL_ASM_OP "\t.global\t"
9fb7806b	216
9fb7806b	217	/* Make an internal label into a string. */
b355a481	218	#ifndef ASM_GENERATE_INTERNAL_LABEL
9fb7806b	219	#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
aec3cfba	220	sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM))
b355a481 NC	221	#endif
b355a481 NC	222
9fb7806b	223	/* Output an element of a dispatch table. */
5b3e6663 PB	224	#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
	225	do \
	226	{ \
	227	gcc_assert (!TARGET_THUMB2); \
	228	asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE); \
	229	} \
	230	while (0)
	231
9fb7806b	232
5b3e6663 PB	233	/* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions
	234	can be used. For non-pic code where the offsets do not suitable for
	235	TBB/TBH the elements are output as absolute labels. */
657d9449 RE	236	#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
	237	do \
	238	{ \
	239	if (TARGET_ARM) \
	240	asm_fprintf (STREAM, "\tb\t%LL%d\n", VALUE); \
5b3e6663	241	else if (TARGET_THUMB1) \
657d9449	242	asm_fprintf (STREAM, "\t.word\t%LL%d-%LL%d\n", VALUE, REL); \
5b3e6663 PB	243	else /* Thumb-2 */ \
	244	{ \
	245	switch (GET_MODE(body)) \
	246	{ \
	247	case QImode: /* TBB */ \
	248	asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n", \
	249	VALUE, REL); \
	250	break; \
	251	case HImode: /* TBH */ \
	252	asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n", \
	253	VALUE, REL); \
	254	break; \
	255	case SImode: \
	256	if (flag_pic) \
	257	asm_fprintf (STREAM, "\t.word\t%LL%d+1-%LL%d\n", VALUE, REL); \
	258	else \
	259	asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE); \
	260	break; \
	261	default: \
	262	gcc_unreachable(); \
	263	} \
	264	} \
657d9449 RE	265	} \
	266	while (0)
	267
9fb7806b	268
be393ecf	269	#undef ASM_OUTPUT_ASCII
9fb7806b	270	#define ASM_OUTPUT_ASCII(STREAM, PTR, LEN) \
5a9335ef	271	output_ascii_pseudo_op (STREAM, (const unsigned char *) (PTR), LEN)
9fb7806b RE	272
9fb7806b RE	273	/* Output a gap. In fact we fill it with nulls. */
be393ecf	274	#undef ASM_OUTPUT_SKIP
b355a481	275	#define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
5a9335ef	276	fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES))
9fb7806b RE	277
9fb7806b RE	278	/* Align output to a power of two. Horrible /bin/as. */
00275db1	279	#ifndef ASM_OUTPUT_ALIGN
6cfc7210 NC	280	#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
	281	do \
	282	{ \
	283	register int amount = 1 << (POWER); \
	284	\
	285	if (amount == 2) \
	286	fprintf (STREAM, "\t.even\n"); \
	287	else if (amount != 1) \
	288	fprintf (STREAM, "\t.align\t%d\n", amount - 4); \
	289	} \
00275db1 PB	290	while (0)
00275db1 PB	291	#endif
9fb7806b	292
4f448245	293	/* Output a common block. */
b355a481	294	#ifndef ASM_OUTPUT_COMMON
6cfc7210 NC	295	#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
	296	do \
	297	{ \
	298	fprintf (STREAM, "\t.comm\t"); \
	299	assemble_name (STREAM, NAME); \
d5b7b3ae	300	asm_fprintf (STREAM, ", %d\t%@ %d\n", \
58e15542	301	(int)(ROUNDED), (int)(SIZE)); \
6cfc7210 NC	302	} \
6cfc7210 NC	303	while (0)
b355a481 NC	304	#endif
b355a481 NC	305
33f7f353	306	/* Output a local common block. /bin/as can't do this, so hack a
b355a481 NC	307	`.space' into the bss segment. Note that this is bad practice,
	308	which is guaranteed NOT to work since it doesn't define STATIC
	309	COMMON space but merely STATIC BSS space. */
	310	#ifndef ASM_OUTPUT_ALIGNED_LOCAL
6cfc7210 NC	311	#define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
	312	do \
	313	{ \
d6b5193b	314	switch_to_section (bss_section); \
6cfc7210 NC	315	ASM_OUTPUT_ALIGN (STREAM, floor_log2 (ALIGN / BITS_PER_UNIT)); \
6cfc7210 NC	316	ASM_OUTPUT_LABEL (STREAM, NAME); \
58e15542	317	fprintf (STREAM, "\t.space\t%d\n", (int)(SIZE)); \
6cfc7210 NC	318	} \
6cfc7210 NC	319	while (0)
b355a481 NC	320	#endif
b355a481 NC	321
c9d9bc85	322	/* Output a zero-initialized block. */
b355a481	323	#ifndef ASM_OUTPUT_ALIGNED_BSS
6cfc7210	324	#define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \
b355a481 NC	325	asm_output_aligned_bss (STREAM, DECL, NAME, SIZE, ALIGN)
b355a481 NC	326	#endif
9fb7806b RE	327
9fb7806b RE	328	/* Output a #ident directive. */
b355a481	329	#ifndef ASM_OUTPUT_IDENT
9fb7806b	330	#define ASM_OUTPUT_IDENT(STREAM,STRING) \
d5b7b3ae	331	asm_fprintf (STREAM, "%@ - - - ident %s\n", STRING)
b355a481 NC	332	#endif
b355a481 NC	333
9fb7806b	334	#ifndef ASM_COMMENT_START
b355a481	335	#define ASM_COMMENT_START "@"
9fb7806b RE	336	#endif
9fb7806b RE	337
ce29b9d0	338	/* This works for GAS and some other assemblers. */
93de6f51	339	#define SET_ASM_OP "\t.set\t"