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Remove enum before machine_mode
[thirdparty/gcc.git] / gcc / config / arm / arm-protos.h
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5d3f468b 1/* Prototypes for exported functions defined in arm.c and pe.c
aad93da1 2 Copyright (C) 1999-2017 Free Software Foundation, Inc.
5d3f468b 3 Contributed by Richard Earnshaw (rearnsha@arm.com)
4 Minor hacks by Nick Clifton (nickc@cygnus.com)
5
acf6ed70 6 This file is part of GCC.
5d3f468b 7
acf6ed70 8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
038d1e19 10 the Free Software Foundation; either version 3, or (at your option)
acf6ed70 11 any later version.
5d3f468b 12
acf6ed70 13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
5d3f468b 17
acf6ed70 18 You should have received a copy of the GNU General Public License
038d1e19 19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
5d3f468b 21
1fcd08b1 22#ifndef GCC_ARM_PROTOS_H
23#define GCC_ARM_PROTOS_H
24
09c93c6d 25#include "sbitmap.h"
c8c5f875 26
218e3e4e 27extern enum unwind_info_type arm_except_unwind_info (struct gcc_options *);
ffc9d00c 28extern int use_return_insn (int, rtx);
0686440e 29extern bool use_simple_return_p (void);
b9c74b4d 30extern enum reg_class arm_regno_class (int);
aa6af490 31extern void arm_load_pic_register (unsigned long);
ebd88a36 32extern int arm_volatile_func (void);
ebd88a36 33extern void arm_expand_prologue (void);
c3635784 34extern void arm_expand_epilogue (bool);
1e63a052 35extern void arm_declare_function_name (FILE *, const char *, tree);
9c21be33 36extern void arm_asm_declare_function_name (FILE *, const char *, tree);
0686440e 37extern void thumb2_expand_return (bool);
ebd88a36 38extern const char *arm_strip_name_encoding (const char *);
39extern void arm_asm_output_labelref (FILE *, const char *);
25f905c2 40extern void thumb2_asm_output_opcode (FILE *);
ebd88a36 41extern unsigned long arm_current_func_type (void);
30e9913f 42extern HOST_WIDE_INT arm_compute_initial_elimination_offset (unsigned int,
43 unsigned int);
f9273c43 44extern HOST_WIDE_INT thumb_compute_initial_elimination_offset (unsigned int,
45 unsigned int);
5f9d1097 46extern unsigned int arm_dbx_register_number (unsigned int);
1774763d 47extern void arm_output_fn_unwind (FILE *, bool);
d6504d76 48
49extern rtx arm_expand_builtin (tree exp, rtx target, rtx subtarget
582adad1 50 ATTRIBUTE_UNUSED, machine_mode mode
d6504d76 51 ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED);
52extern tree arm_builtin_decl (unsigned code, bool initialize_p
53 ATTRIBUTE_UNUSED);
54extern void arm_init_builtins (void);
55extern void arm_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update);
d40b10b2 56extern rtx arm_simd_vect_par_cnst_half (machine_mode mode, bool high);
57extern bool arm_simd_check_vect_par_cnst_half_p (rtx op, machine_mode mode,
58 bool high);
5d3f468b 59#ifdef RTX_CODE
f6c98a9a 60extern void arm_gen_unlikely_cbranch (enum rtx_code, machine_mode cc_mode,
61 rtx label_ref);
3754d046 62extern bool arm_vector_mode_supported_p (machine_mode);
63extern bool arm_small_register_classes_for_mode_p (machine_mode);
64extern int arm_hard_regno_mode_ok (unsigned int, machine_mode);
65extern bool arm_modes_tieable_p (machine_mode, machine_mode);
ebd88a36 66extern int const_ok_for_arm (HOST_WIDE_INT);
d5cbae34 67extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code);
10e5ccd5 68extern int const_ok_for_dimode_op (HOST_WIDE_INT, enum rtx_code);
3754d046 69extern int arm_split_constant (RTX_CODE, machine_mode, rtx,
96f57e36 70 HOST_WIDE_INT, rtx, rtx, int);
ebd88a36 71extern int legitimate_pic_operand_p (rtx);
3754d046 72extern rtx legitimize_pic_address (rtx, machine_mode, rtx);
f655717d 73extern rtx legitimize_tls_address (rtx, rtx);
3754d046 74extern bool arm_legitimate_address_p (machine_mode, rtx, bool);
75extern int arm_legitimate_address_outer_p (machine_mode, rtx, RTX_CODE, int);
76extern int thumb_legitimate_offset_p (machine_mode, HOST_WIDE_INT);
3754d046 77extern int thumb1_legitimate_address_p (machine_mode, rtx, int);
78extern bool ldm_stm_operation_p (rtx, bool, machine_mode mode,
394cb8e0 79 bool, bool);
a2cd141b 80extern int arm_const_double_rtx (rtx);
b5a0636d 81extern int vfp3_const_double_rtx (rtx);
3754d046 82extern int neon_immediate_valid_for_move (rtx, machine_mode, rtx *, int *);
83extern int neon_immediate_valid_for_logic (rtx, machine_mode, int, rtx *,
d98a3884 84 int *);
3754d046 85extern int neon_immediate_valid_for_shift (rtx, machine_mode, rtx *,
73f20323 86 int *, bool);
d98a3884 87extern char *neon_output_logic_immediate (const char *, rtx *,
3754d046 88 machine_mode, int, int);
73f20323 89extern char *neon_output_shift_immediate (const char *, char, rtx *,
3754d046 90 machine_mode, int, bool);
91extern void neon_pairwise_reduce (rtx, rtx, machine_mode,
d98a3884 92 rtx (*) (rtx, rtx, rtx));
c747abbb 93extern rtx neon_make_constant (rtx);
b6c464fe 94extern tree arm_builtin_vectorized_function (unsigned int, tree, tree);
d98a3884 95extern void neon_expand_vector_init (rtx, rtx);
505e1f91 96extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT, const_tree);
1be6395a 97extern void arm_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
3754d046 98extern HOST_WIDE_INT neon_element_bits (machine_mode);
3754d046 99extern void neon_emit_pair_result_insn (machine_mode,
d98a3884 100 rtx (*) (rtx, rtx, rtx, rtx),
101 rtx, rtx, rtx);
102extern void neon_disambiguate_copy (rtx *, rtx *, rtx *, unsigned int);
47ddcd6b 103extern void neon_split_vcombine (rtx op[3]);
3754d046 104extern enum reg_class coproc_secondary_reload_class (machine_mode, rtx,
f1225f6f 105 bool);
f655717d 106extern bool arm_tls_referenced_p (rtx);
cffb2a26 107
a8a3b539 108extern int arm_coproc_mem_operand (rtx, bool);
1c2054e4 109extern int neon_vector_mem_operand (rtx, int, bool);
d98a3884 110extern int neon_struct_mem_operand (rtx);
ebd88a36 111
f655717d 112extern int tls_mentioned_p (rtx);
ebd88a36 113extern int symbol_mentioned_p (rtx);
114extern int label_mentioned_p (rtx);
115extern RTX_CODE minmax_code (rtx);
b49e3742 116extern bool arm_sat_operator_match (rtx, rtx, int *, bool *);
ebd88a36 117extern int adjacent_mem_locations (rtx, rtx);
320ea44d 118extern bool gen_ldm_seq (rtx *, int, bool);
119extern bool gen_stm_seq (rtx *, int);
120extern bool gen_const_stm_seq (rtx *, int);
121extern rtx arm_gen_load_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
122extern rtx arm_gen_store_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
1653cf17 123extern bool offset_ok_for_ldrd_strd (HOST_WIDE_INT);
124extern bool operands_ok_ldrd_strd (rtx, rtx, rtx, HOST_WIDE_INT, bool, bool);
353cf59a 125extern bool gen_operands_ldrd_strd (rtx *, bool, bool, bool);
008c057d 126extern int arm_gen_movmemqi (rtx *);
ae51a965 127extern bool gen_movmem_ldrd_strd (rtx *);
3754d046 128extern machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
129extern machine_mode arm_select_dominance_cc_mode (rtx, rtx,
ebd88a36 130 HOST_WIDE_INT);
e1b93706 131extern rtx arm_gen_compare_reg (RTX_CODE, rtx, rtx, rtx);
ebd88a36 132extern rtx arm_gen_return_addr_mask (void);
133extern void arm_reload_in_hi (rtx *);
134extern void arm_reload_out_hi (rtx *);
861033d5 135extern int arm_max_const_double_inline_cost (void);
359a6e9f 136extern int arm_const_double_inline_cost (rtx);
e5ba9289 137extern bool arm_const_double_by_parts (rtx);
a8045a4f 138extern bool arm_const_double_by_immediates (rtx);
ca373797 139extern void arm_emit_call_insn (rtx, rtx, bool);
2d3a01a7 140bool detect_cmse_nonsecure_call (tree);
ebd88a36 141extern const char *output_call (rtx *);
d0e6a121 142void arm_emit_movpair (rtx, rtx);
ebd88a36 143extern const char *output_mov_long_double_arm_from_arm (rtx *);
26ff80c0 144extern const char *output_move_double (rtx *, bool, int *count);
d98a3884 145extern const char *output_move_quad (rtx *);
26ff80c0 146extern int arm_count_output_move_double_insns (rtx *);
25f905c2 147extern const char *output_move_vfp (rtx *operands);
d98a3884 148extern const char *output_move_neon (rtx *operands);
ed3e6e5d 149extern int arm_attr_length_move_neon (rtx_insn *);
150extern int arm_address_offset_is_imm (rtx_insn *);
ebd88a36 151extern const char *output_add_immediate (rtx *);
152extern const char *arithmetic_instr (rtx, int);
153extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
e2549f81 154extern const char *output_return_instruction (rtx, bool, bool, bool);
706dca65 155extern const char *output_probe_stack_range (rtx, rtx);
ebd88a36 156extern void arm_poke_function_name (FILE *, const char *);
c85c749f 157extern void arm_final_prescan_insn (rtx_insn *);
ebd88a36 158extern int arm_debugger_arg_offset (int, rtx);
de55252a 159extern bool arm_is_long_call_p (tree);
755eb2b4 160extern int arm_emit_vector_const (FILE *, rtx);
9b8516be 161extern void arm_emit_fp16_const (rtx c);
755eb2b4 162extern const char * arm_output_load_gr (rtx *);
b34d8dac 163extern const char *vfp_output_vstmd (rtx *);
426be8c5 164extern void arm_output_multireg_pop (rtx *, bool, rtx, bool, bool);
4c44712e 165extern void arm_set_return_address (rtx, rtx);
841b213d 166extern int arm_eliminable_register (rtx);
25f905c2 167extern const char *arm_output_shift(rtx *, int);
6b8f7c28 168extern const char *arm_output_iwmmxt_shift_immediate (const char *, rtx *, bool);
169extern const char *arm_output_iwmmxt_tinsr (rtx *);
06df6b17 170extern unsigned int arm_sync_loop_insns (rtx , rtx *);
08508cbf 171extern int arm_attr_length_push_multi(rtx, rtx);
5431c9c9 172extern int arm_attr_length_pop_multi(rtx *, bool, bool);
e1b93706 173extern void arm_expand_compare_and_swap (rtx op[]);
174extern void arm_split_compare_and_swap (rtx op[]);
175extern void arm_split_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx, rtx);
badaa04c 176extern rtx arm_load_tp (rtx);
1be6395a 177extern bool arm_coproc_builtin_available (enum unspecv);
638b44bd 178extern bool arm_coproc_ldc_stc_legitimate_address (rtx);
cffb2a26 179
180#if defined TREE_CODE
ebd88a36 181extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
3754d046 182extern bool arm_pad_arg_upward (machine_mode, const_tree);
183extern bool arm_pad_reg_upward (machine_mode, tree, int);
cffb2a26 184#endif
ccd90aaa 185extern int arm_apply_result_size (void);
cffb2a26 186
5d3f468b 187#endif /* RTX_CODE */
188
cffb2a26 189/* Thumb functions. */
ebd88a36 190extern void arm_init_expanders (void);
e7fd8dfa 191extern const char *thumb1_unexpanded_epilogue (void);
25f905c2 192extern void thumb1_expand_prologue (void);
193extern void thumb1_expand_epilogue (void);
7571d3f7 194extern const char *thumb1_output_interwork (void);
ebd88a36 195extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
0bd59681 196#ifdef RTX_CODE
23628a13 197extern enum arm_cond_code maybe_get_arm_condition_code (rtx);
c85c749f 198extern void thumb1_final_prescan_insn (rtx_insn *);
199extern void thumb2_final_prescan_insn (rtx_insn *);
ebd88a36 200extern const char *thumb_load_double_from_address (rtx *);
201extern const char *thumb_output_move_mem_multiple (int, rtx *);
afe27f3b 202extern const char *thumb_call_via_reg (rtx);
008c057d 203extern void thumb_expand_movmemqi (rtx *);
ebd88a36 204extern rtx arm_return_addr (int, rtx);
205extern void thumb_reload_out_hi (rtx *);
4c44712e 206extern void thumb_set_return_address (rtx, rtx);
e6ac8414 207extern const char *thumb1_output_casesi (rtx *);
208extern const char *thumb2_output_casesi (rtx *);
cffb2a26 209#endif
210
211/* Defined in pe.c. */
ebd88a36 212extern int arm_dllexport_name_p (const char *);
213extern int arm_dllimport_name_p (const char *);
cffb2a26 214
215#ifdef TREE_CODE
ebd88a36 216extern void arm_pe_unique_section (tree, int);
217extern void arm_pe_encode_section_info (tree, rtx, int);
218extern int arm_dllexport_p (tree);
219extern int arm_dllimport_p (tree);
220extern void arm_mark_dllexport (tree);
221extern void arm_mark_dllimport (tree);
95f1e0d1 222extern bool arm_change_mode_p (tree);
cffb2a26 223#endif
1fcd08b1 224
5b1ab930 225extern tree arm_valid_target_attribute_tree (tree, struct gcc_options *,
226 struct gcc_options *);
09c93c6d 227extern void arm_configure_build_target (struct arm_build_target *,
ff9eae90 228 struct cl_target_option *,
09c93c6d 229 struct gcc_options *, bool);
ebd88a36 230extern void arm_pr_long_calls (struct cpp_reader *);
231extern void arm_pr_no_long_calls (struct cpp_reader *);
232extern void arm_pr_long_calls_off (struct cpp_reader *);
1fcd08b1 233
a9f1838b 234extern const char *arm_mangle_type (const_tree);
6612f298 235extern const char *arm_mangle_builtin_type (const_tree);
eddcdde1 236
dca1b68c 237extern void arm_order_regs_for_local_alloc (void);
238
1e939b24 239extern int arm_max_conditional_execute ();
240
7ad0a5e6 241/* Vectorizer cost model implementation. */
242struct cpu_vec_costs {
243 const int scalar_stmt_cost; /* Cost of any scalar operation, excluding
244 load and store. */
245 const int scalar_load_cost; /* Cost of scalar load. */
246 const int scalar_store_cost; /* Cost of scalar store. */
247 const int vec_stmt_cost; /* Cost of any vector operation, excluding
248 load, store, vector-to-scalar and
249 scalar-to-vector operation. */
250 const int vec_to_scalar_cost; /* Cost of vect-to-scalar operation. */
251 const int scalar_to_vec_cost; /* Cost of scalar-to-vector operation. */
252 const int vec_align_load_cost; /* Cost of aligned vector load. */
253 const int vec_unalign_load_cost; /* Cost of unaligned vector load. */
254 const int vec_unalign_store_cost; /* Cost of unaligned vector load. */
255 const int vec_store_cost; /* Cost of vector store. */
256 const int cond_taken_branch_cost; /* Cost of taken branch for vectorizer
257 cost model. */
258 const int cond_not_taken_branch_cost;/* Cost of not taken branch for
259 vectorizer cost model. */
260};
261
647e1499 262#ifdef RTX_CODE
263/* This needs to be here because we need RTX_CODE and similar. */
264
8f67eb82 265struct cpu_cost_table;
266
0c2a1f1d 267/* Dump function ARM_PRINT_TUNE_INFO should be updated whenever this
268 structure is modified. */
269
647e1499 270struct tune_params
271{
8f67eb82 272 const struct cpu_cost_table *insn_extra_cost;
99f52c2b 273 bool (*sched_adjust_cost) (rtx_insn *, int, rtx_insn *, int *);
07b456c3 274 int (*branch_cost) (bool, bool);
275 /* Vectorizer costs. */
276 const struct cpu_vec_costs* vec_costs;
647e1499 277 int constant_limit;
1e939b24 278 /* Maximum number of instructions to conditionalise. */
290a6dcf 279 int max_insns_skipped;
07b456c3 280 /* Maximum number of instructions to inline calls to memset. */
281 int max_insns_inline_memset;
282 /* Issue rate of the processor. */
283 unsigned int issue_rate;
284 /* Explicit prefetch data. */
285 struct
286 {
287 int num_slots;
288 int l1_cache_size;
289 int l1_cache_line_size;
290 } prefetch;
291 enum {PREF_CONST_POOL_FALSE, PREF_CONST_POOL_TRUE}
292 prefer_constant_pool: 1;
4a94ccf9 293 /* Prefer STRD/LDRD instructions over PUSH/POP/LDM/STM. */
07b456c3 294 enum {PREF_LDRD_FALSE, PREF_LDRD_TRUE} prefer_ldrd_strd: 1;
7224cf54 295 /* The preference for non short cirtcuit operation when optimizing for
296 performance. The first element covers Thumb state and the second one
297 is for ARM state. */
efbe56fa 298 enum log_op_non_short_circuit {LOG_OP_NON_SHORT_CIRCUIT_FALSE,
299 LOG_OP_NON_SHORT_CIRCUIT_TRUE};
300 log_op_non_short_circuit logical_op_non_short_circuit_thumb: 1;
301 log_op_non_short_circuit logical_op_non_short_circuit_arm: 1;
8eb4a30f 302 /* Prefer 32-bit encoding instead of flag-setting 16-bit encoding. */
07b456c3 303 enum {DISPARAGE_FLAGS_NEITHER, DISPARAGE_FLAGS_PARTIAL, DISPARAGE_FLAGS_ALL}
304 disparage_flag_setting_t16_encodings: 2;
305 enum {PREF_NEON_64_FALSE, PREF_NEON_64_TRUE} prefer_neon_for_64bits: 1;
e34ebfca 306 /* Prefer to inline string operations like memset by using Neon. */
07b456c3 307 enum {PREF_NEON_STRINGOPS_FALSE, PREF_NEON_STRINGOPS_TRUE}
308 string_ops_prefer_neon: 1;
5bf8e0f8 309 /* Bitfield encoding the fusible pairs of instructions. Use FUSE_OPS
07b456c3 310 in an initializer if multiple fusion operations are supported on a
311 target. */
312 enum fuse_ops
313 {
314 FUSE_NOTHING = 0,
42c18f66 315 FUSE_MOVW_MOVT = 1 << 0,
316 FUSE_AES_AESMC = 1 << 1
317 } fusible_ops: 2;
34aaed43 318 /* Depth of scheduling queue to check for L2 autoprefetcher. */
07b456c3 319 enum {SCHED_AUTOPREF_OFF, SCHED_AUTOPREF_RANK, SCHED_AUTOPREF_FULL}
320 sched_autopref: 2;
647e1499 321};
322
07b456c3 323/* Smash multiple fusion operations into a type that can be used for an
324 initializer. */
325#define FUSE_OPS(x) ((tune_params::fuse_ops) (x))
326
647e1499 327extern const struct tune_params *current_tune;
4a62aafb 328extern int vfp3_const_double_for_fract_bits (rtx);
7cb1e49b 329/* return power of two from operand, otherwise 0. */
330extern int vfp3_const_double_for_bits (rtx);
ffcc986d 331
332extern void arm_emit_coreregs_64bit_shift (enum rtx_code, rtx, rtx, rtx, rtx,
333 rtx);
c17f4a5a 334extern bool arm_fusion_enabled_p (tune_params::fuse_ops);
ac528743 335extern bool arm_valid_symbolic_address_p (rtx);
f9aa4160 336extern bool arm_validize_comparison (rtx *, rtx *, rtx *);
647e1499 337#endif /* RTX_CODE */
338
e34ebfca 339extern bool arm_gen_setmem (rtx *);
47ddcd6b 340extern void arm_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel);
341extern bool arm_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel);
342
3754d046 343extern bool arm_autoinc_modes_ok_p (machine_mode, enum arm_auto_incmodes);
aa1572b5 344
2c07aa0a 345extern void arm_emit_eabi_attribute (const char *, int, int);
346
95f1e0d1 347extern void arm_reset_previous_fndecl (void);
7b0c1b6d 348extern void save_restore_target_globals (tree);
95f1e0d1 349
b7188fad 350/* Defined in gcc/common/config/arm-common.c. */
351extern const char *arm_rewrite_selected_cpu (const char *name);
352
4b11ffbd 353/* Defined in gcc/common/config/arm-c.c. */
354extern void arm_lang_object_attributes_init (void);
5b1ab930 355extern void arm_register_target_pragmas (void);
4b11ffbd 356extern void arm_cpu_cpp_builtins (struct cpp_reader *);
357
e3f4ccee 358extern bool arm_is_constant_pool_ref (rtx);
359
43dda728 360/* The bits in this mask specify which instruction scheduling options should
361 be used. */
0a59ae40 362extern unsigned int tune_flags;
43dda728 363
364/* Nonzero if this chip supports the ARM Architecture 3M extensions. */
365extern int arm_arch3m;
366
367/* Nonzero if this chip supports the ARM Architecture 4 extensions. */
368extern int arm_arch4;
369
370/* Nonzero if this chip supports the ARM Architecture 4t extensions. */
371extern int arm_arch4t;
372
373/* Nonzero if this chip supports the ARM Architecture 5 extensions. */
374extern int arm_arch5;
375
376/* Nonzero if this chip supports the ARM Architecture 5E extensions. */
377extern int arm_arch5e;
378
379/* Nonzero if this chip supports the ARM Architecture 6 extensions. */
380extern int arm_arch6;
381
382/* Nonzero if this chip supports the ARM 6K extensions. */
383extern int arm_arch6k;
384
ab2874ba 385/* Nonzero if this chip supports the ARM 6KZ extensions. */
386extern int arm_arch6kz;
387
43dda728 388/* Nonzero if instructions present in ARMv6-M can be used. */
389extern int arm_arch6m;
390
391/* Nonzero if this chip supports the ARM 7 extensions. */
392extern int arm_arch7;
393
343a3a77 394/* Nonzero if this chip supports the Large Physical Address Extension. */
395extern int arm_arch_lpae;
8ab1fc15 396
43dda728 397/* Nonzero if instructions not present in the 'M' profile can be used. */
398extern int arm_arch_notm;
399
400/* Nonzero if instructions present in ARMv7E-M can be used. */
401extern int arm_arch7em;
402
403/* Nonzero if instructions present in ARMv8 can be used. */
404extern int arm_arch8;
405
406/* Nonzero if this chip can benefit from load scheduling. */
407extern int arm_ld_sched;
408
409/* Nonzero if this chip is a StrongARM. */
410extern int arm_tune_strongarm;
411
412/* Nonzero if this chip supports Intel Wireless MMX technology. */
413extern int arm_arch_iwmmxt;
414
415/* Nonzero if this chip supports Intel Wireless MMX2 technology. */
416extern int arm_arch_iwmmxt2;
417
418/* Nonzero if this chip is an XScale. */
419extern int arm_arch_xscale;
420
421/* Nonzero if tuning for XScale */
422extern int arm_tune_xscale;
423
424/* Nonzero if we want to tune for stores that access the write-buffer.
425 This typically means an ARM6 or ARM7 with MMU or MPU. */
426extern int arm_tune_wbuf;
427
428/* Nonzero if tuning for Cortex-A9. */
429extern int arm_tune_cortex_a9;
430
43dda728 431/* Nonzero if we should define __THUMB_INTERWORK__ in the
432 preprocessor.
433 XXX This is a bit of a hack, it's intended to help work around
434 problems in GLD which doesn't understand that armv5t code is
435 interworking clean. */
436extern int arm_cpp_interwork;
437
02978bd1 438/* Nonzero if chip supports Thumb 1. */
439extern int arm_arch_thumb1;
440
43dda728 441/* Nonzero if chip supports Thumb 2. */
442extern int arm_arch_thumb2;
443
444/* Nonzero if chip supports integer division instruction. */
445extern int arm_arch_arm_hwdiv;
446extern int arm_arch_thumb_hwdiv;
447
580f4c48 448/* Nonzero if chip disallows volatile memory access in IT block. */
449extern int arm_arch_no_volatile_ce;
450
43dda728 451/* Nonzero if we should use Neon to handle 64-bits operations rather
452 than core registers. */
453extern int prefer_neon_for_64bits;
454
b2c7942a 455/* Structure defining the current overall architectural target and tuning. */
456struct arm_build_target
457{
458 /* Name of the target CPU, if known, or NULL if the target CPU was not
459 specified by the user (and inferred from the -march option). */
460 const char *core_name;
461 /* Name of the target ARCH. NULL if there is a selected CPU. */
462 const char *arch_name;
463 /* Preprocessor substring (never NULL). */
464 const char *arch_pp_name;
b2c7942a 465 /* The base architecture value. */
466 enum base_architecture base_arch;
05192833 467 /* The profile letter for the architecture, upper case by convention. */
468 char profile;
b2c7942a 469 /* Bitmap encapsulating the isa_bits for the target environment. */
470 sbitmap isa;
471 /* Flags used for tuning. Long term, these move into tune_params. */
472 unsigned int tune_flags;
473 /* Tables with more detailed tuning information. */
474 const struct tune_params *tune;
475 /* CPU identifier for the tuning target. */
476 enum processor_type tune_core;
477};
478
479extern struct arm_build_target arm_active_target;
43dda728 480
ab6a47e4 481struct cpu_arch_extension
482{
57730275 483 /* Feature name. */
ab6a47e4 484 const char *const name;
57730275 485 /* True if the option is negative (removes extensions). */
ab6a47e4 486 bool remove;
57730275 487 /* True if the option is an alias for another option with identical effect;
488 the option will be ignored for canonicalization. */
489 bool alias;
490 /* The modifier bits. */
ab6a47e4 491 const enum isa_feature isa_bits[isa_num_bits];
492};
493
494struct cpu_arch_option
495{
496 /* Name for this option. */
497 const char *name;
498 /* List of feature extensions permitted. */
499 const struct cpu_arch_extension *extensions;
500 /* Standard feature bits. */
501 enum isa_feature isa_bits[isa_num_bits];
502};
503
504struct arch_option
505{
506 /* Common option fields. */
507 cpu_arch_option common;
508 /* Short string for this architecture. */
509 const char *arch;
510 /* Base architecture, from which this specific architecture is derived. */
511 enum base_architecture base_arch;
05192833 512 /* The profile letter for the architecture, upper case by convention. */
513 const char profile;
ab6a47e4 514 /* Default tune target (in the absence of any more specific data). */
515 enum processor_type tune_id;
516};
517
518struct cpu_option
519{
520 /* Common option fields. */
521 cpu_arch_option common;
522 /* Architecture upon which this CPU is based. */
523 enum arch_type arch;
524};
43dda728 525
8498ba66 526extern const arch_option all_architectures[];
527extern const cpu_option all_cores[];
528
529const cpu_option *arm_parse_cpu_option_name (const cpu_option *, const char *,
530 const char *);
531const arch_option *arm_parse_arch_option_name (const arch_option *,
532 const char *, const char *);
533void arm_parse_option_features (sbitmap, const cpu_arch_option *,
534 const char *);
535
536void arm_initialize_isa (sbitmap, const enum isa_feature *);
537
2a281353 538#endif /* ! GCC_ARM_PROTOS_H */
Mirror of https://gcc.gnu.org/git/gcc.git