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1; Options for the ARM port of the compiler.
2
99dee823 3; Copyright (C) 2005-2021 Free Software Foundation, Inc.
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4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it under
8; the terms of the GNU General Public License as published by the Free
2f83c7d6 9; Software Foundation; either version 3, or (at your option) any later
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10; version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13; WARRANTY; without even the implied warranty of MERCHANTABILITY or
14; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15; for more details.
16;
17; You should have received a copy of the GNU General Public License
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18; along with GCC; see the file COPYING3. If not see
19; <http://www.gnu.org/licenses/>.
c54c7322 20
ad7be009
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21HeaderInclude
22config/arm/arm-opts.h
23
ccdc2164
NS
24Enum
25Name(tls_type) Type(enum arm_tls_type)
26TLS dialect to use:
27
28EnumValue
29Enum(tls_type) String(gnu) Value(TLS_GNU)
30
31EnumValue
32Enum(tls_type) String(gnu2) Value(TLS_GNU2)
33
c54c7322 34mabi=
ba163417 35Target RejectNegative Joined Enum(arm_abi_type) Var(arm_abi) Init(ARM_DEFAULT_ABI)
a7b2e184 36Specify an ABI.
c54c7322 37
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38Enum
39Name(arm_abi_type) Type(enum arm_abi_type)
40Known ARM ABIs (for use with the -mabi= option):
41
42EnumValue
43Enum(arm_abi_type) String(apcs-gnu) Value(ARM_ABI_APCS)
44
45EnumValue
46Enum(arm_abi_type) String(atpcs) Value(ARM_ABI_ATPCS)
47
48EnumValue
49Enum(arm_abi_type) String(aapcs) Value(ARM_ABI_AAPCS)
50
51EnumValue
52Enum(arm_abi_type) String(iwmmxt) Value(ARM_ABI_IWMMXT)
53
54EnumValue
55Enum(arm_abi_type) String(aapcs-linux) Value(ARM_ABI_AAPCS_LINUX)
56
c54c7322 57mabort-on-noreturn
eece52b5 58Target Mask(ABORT_NORETURN)
a7b2e184 59Generate a call to abort if a noreturn function returns.
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60
61mapcs
719e1e80 62Target RejectNegative Mask(APCS_FRAME) Undocumented
c54c7322 63
c54c7322 64mapcs-frame
eece52b5 65Target Mask(APCS_FRAME)
a7b2e184 66Generate APCS conformant stack frames.
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67
68mapcs-reentrant
eece52b5 69Target Mask(APCS_REENT)
a7b2e184 70Generate re-entrant, PIC code.
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71
72mapcs-stack-check
eece52b5 73Target Mask(APCS_STACK) Undocumented
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74
75march=
d106029c 76Target Save RejectNegative Negative(march=) ToLower Joined Var(arm_arch_string)
a7b2e184 77Specify the name of the target architecture.
c54c7322 78
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79; Other arm_arch values are loaded from arm-tables.opt
80; but that is a generated file and this is an odd-one-out.
81EnumValue
82Enum(arm_arch) String(native) Value(-1) DriverOnly
83
c54c7322 84marm
eece52b5 85Target RejectNegative Negative(mthumb) InverseMask(THUMB)
ee6824ae 86Generate code in 32 bit ARM state.
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87
88mbig-endian
eece52b5 89Target RejectNegative Negative(mlittle-endian) Mask(BIG_END)
a7b2e184 90Assume target CPU is configured as big endian.
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91
92mcallee-super-interworking
eece52b5 93Target Mask(CALLEE_INTERWORKING)
a7b2e184 94Thumb: Assume non-static functions may be called from ARM code.
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95
96mcaller-super-interworking
eece52b5 97Target Mask(CALLER_INTERWORKING)
a7b2e184 98Thumb: Assume function pointers may go to non-Thumb aware code.
c54c7322 99
c54c7322 100mcpu=
d106029c 101Target Save RejectNegative Negative(mcpu=) ToLower Joined Var(arm_cpu_string)
a7b2e184 102Specify the name of the target CPU.
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103
104mfloat-abi=
ba163417 105Target RejectNegative Joined Enum(float_abi_type) Var(arm_float_abi) Init(TARGET_DEFAULT_FLOAT_ABI)
a7b2e184 106Specify if floating point hardware should be used.
c54c7322 107
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108mcmse
109Target RejectNegative Var(use_cmse)
110Specify that the compiler should target secure code as per ARMv8-M Security Extensions.
111
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112Enum
113Name(float_abi_type) Type(enum float_abi_type)
114Known floating-point ABIs (for use with the -mfloat-abi= option):
115
116EnumValue
117Enum(float_abi_type) String(soft) Value(ARM_FLOAT_ABI_SOFT)
118
119EnumValue
120Enum(float_abi_type) String(softfp) Value(ARM_FLOAT_ABI_SOFTFP)
121
122EnumValue
123Enum(float_abi_type) String(hard) Value(ARM_FLOAT_ABI_HARD)
124
e6553050 125mflip-thumb
eece52b5 126Target Var(TARGET_FLIP_THUMB) Undocumented
a7b2e184 127Switch ARM/Thumb modes on alternating functions for compiler testing.
e6553050 128
0fd8c3ad 129mfp16-format=
ba163417 130Target RejectNegative Joined Enum(arm_fp16_format_type) Var(arm_fp16_format) Init(ARM_FP16_FORMAT_NONE)
a7b2e184 131Specify the __fp16 floating-point format.
0fd8c3ad 132
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133Enum
134Name(arm_fp16_format_type) Type(enum arm_fp16_format_type)
135Known __fp16 formats (for use with the -mfp16-format= option):
136
137EnumValue
138Enum(arm_fp16_format_type) String(none) Value(ARM_FP16_FORMAT_NONE)
139
140EnumValue
141Enum(arm_fp16_format_type) String(ieee) Value(ARM_FP16_FORMAT_IEEE)
142
143EnumValue
144Enum(arm_fp16_format_type) String(alternative) Value(ARM_FP16_FORMAT_ALTERNATIVE)
145
c54c7322 146mfpu=
844af767 147Target RejectNegative Joined Enum(arm_fpu) Var(arm_fpu_index) Init(TARGET_FPU_auto) Save
a7b2e184 148Specify the name of the target floating point hardware/format.
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149
150mhard-float
2cdf9574 151Target RejectNegative Alias(mfloat-abi=, hard) Undocumented
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152
153mlittle-endian
eece52b5 154Target RejectNegative Negative(mbig-endian) InverseMask(BIG_END)
a7b2e184 155Assume target CPU is configured as little endian.
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156
157mlong-calls
eece52b5 158Target Mask(LONG_CALLS)
a7b2e184 159Generate call insns as indirect calls, if necessary.
c54c7322 160
32d6e6c0 161mpic-data-is-text-relative
eece52b5 162Target Var(arm_pic_data_is_text_relative) Init(TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE)
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163Assume data segments are relative to text segment.
164
c54c7322 165mpic-register=
55bea00a 166Target RejectNegative Joined Var(arm_pic_register_string)
a7b2e184 167Specify the register to be used for PIC addressing.
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168
169mpoke-function-name
eece52b5 170Target Mask(POKE_FUNCTION_NAME)
a7b2e184 171Store function names in object code.
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172
173msched-prolog
eece52b5 174Target Mask(SCHED_PROLOG)
a7b2e184 175Permit scheduling of a function's prologue sequence.
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176
177msingle-pic-base
eece52b5 178Target Mask(SINGLE_PIC_BASE)
a7b2e184 179Do not load the PIC register in function prologues.
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180
181msoft-float
2cdf9574 182Target RejectNegative Alias(mfloat-abi=, soft) Undocumented
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183
184mstructure-size-boundary=
ba163417 185Target RejectNegative Joined UInteger Var(arm_structure_size_boundary) Init(DEFAULT_STRUCTURE_SIZE_BOUNDARY)
33cd5f8f 186Specify the minimum bit alignment of structures. (Deprecated).
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187
188mthumb
eece52b5 189Target RejectNegative Negative(marm) Mask(THUMB) Save
a7b2e184 190Generate code for Thumb state.
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191
192mthumb-interwork
eece52b5 193Target Mask(INTERWORK)
a7b2e184 194Support calls between Thumb and ARM instruction sets.
c54c7322 195
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196mtls-dialect=
197Target RejectNegative Joined Enum(tls_type) Var(target_tls_dialect) Init(TLS_GNU)
a7b2e184 198Specify thread local storage scheme.
ccdc2164 199
d3585b76 200mtp=
ba163417 201Target RejectNegative Joined Enum(arm_tp_type) Var(target_thread_pointer) Init(TP_AUTO)
a7b2e184 202Specify how to access the thread pointer.
d3585b76 203
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204Enum
205Name(arm_tp_type) Type(enum arm_tp_type)
206Valid arguments to -mtp=:
207
208EnumValue
209Enum(arm_tp_type) String(soft) Value(TP_SOFT)
210
211EnumValue
212Enum(arm_tp_type) String(auto) Value(TP_AUTO)
213
214EnumValue
215Enum(arm_tp_type) String(cp15) Value(TP_CP15)
216
c54c7322 217mtpcs-frame
eece52b5 218Target Mask(TPCS_FRAME)
a7b2e184 219Thumb: Generate (non-leaf) stack frames even if not needed.
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220
221mtpcs-leaf-frame
eece52b5 222Target Mask(TPCS_LEAF_FRAME)
a7b2e184 223Thumb: Generate (leaf) stack frames even if not needed.
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224
225mtune=
d106029c 226Target Save RejectNegative Negative(mtune=) ToLower Joined Var(arm_tune_string)
a7b2e184 227Tune code for the given processor.
c54c7322 228
2301ca74 229mprint-tune-info
eece52b5 230Target RejectNegative Var(print_tune_info) Init(0)
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231Print CPU tuning information as comment in assembler file. This is
232an option used only for regression testing of the compiler and not
233intended for ordinary use in compiling code.
234
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235; Other processor_type values are loaded from arm-tables.opt
236; but that is a generated file and this is an odd-one-out.
237EnumValue
238Enum(processor_type) String(native) Value(-1) DriverOnly
239
88f77cba 240mvectorize-with-neon-quad
eece52b5 241Target RejectNegative InverseMask(NEON_VECTORIZE_DOUBLE)
a7b2e184 242Use Neon quad-word (rather than double-word) registers for vectorization.
571191af 243
8f40ccea 244mvectorize-with-neon-double
eece52b5 245Target RejectNegative Mask(NEON_VECTORIZE_DOUBLE)
a7b2e184 246Use Neon double-word (rather than quad-word) registers for vectorization.
8f40ccea 247
636f605c
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248mverbose-cost-dump
249Common Undocumented Var(arm_verbose_cost) Init(0)
250Enable more verbose RTX cost dumps during debug. For GCC developers use only.
251
571191af 252mword-relocations
eece52b5 253Target Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS)
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254Only generate absolute relocations on word sized values.
255
9912dbe5 256mrestrict-it
eece52b5 257Target Var(arm_restrict_it) Init(2) Save
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258Generate IT blocks appropriate for ARMv8.
259
5fd42423 260mfix-cortex-m3-ldrd
eece52b5 261Target Var(fix_cm3_ldrd) Init(2)
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262Avoid overlapping destination and address registers on LDRD instructions
263that may trigger Cortex-M3 errata.
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264
265munaligned-access
eece52b5 266Target Var(unaligned_access) Init(2) Save
86b60116 267Enable unaligned word and halfword accesses to packed data.
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268
269mneon-for-64bits
68a57628 270Target WarnRemoved
bf1a58e9 271This option is deprecated and has no effect.
02231c13
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272
273mslow-flash-data
eece52b5 274Target Var(target_slow_flash_data) Init(0)
02231c13 275Assume loading data from flash is slower than fetching instructions.
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276
277masm-syntax-unified
eece52b5 278Target Var(inline_asm_unified) Init(0) Save
bae4ce0f 279Assume unified syntax for inline assembly code.
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280
281mpure-code
eece52b5 282Target Var(target_pure_code) Init(0)
0ee70cc0 283Do not allow constant data to be placed in code sections.
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284
285mbe8
eece52b5 286Target RejectNegative Negative(mbe32) Mask(BE8)
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287When linking for big-endian targets, generate a BE8 format image.
288
289mbe32
eece52b5 290Target RejectNegative Negative(mbe8) InverseMask(BE8)
63d03dce 291When linking for big-endian targets, generate a legacy BE32 format image.
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292
293mbranch-cost=
294Target RejectNegative Joined UInteger Var(arm_branch_cost) Init(-1)
295Cost to assume for a branch insn.
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296
297mgeneral-regs-only
eece52b5 298Target RejectNegative Mask(GENERAL_REGS_ONLY) Save
48528842 299Generate code which uses the core registers only (r0-r14).
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300
301mfdpic
eece52b5 302Target Mask(FDPIC)
4563bc4d 303Enable Function Descriptor PIC mode.