]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/config/arm/bpabi.h
Remove aarch32 support for falkor/qdf24xx, not in released hardware.
[thirdparty/gcc.git] / gcc / config / arm / bpabi.h
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b3f8d95d 1/* Configuration file for ARM BPABI targets.
cbe34bb5 2 Copyright (C) 2004-2017 Free Software Foundation, Inc.
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3 Contributed by CodeSourcery, LLC
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
2f83c7d6 9 by the Free Software Foundation; either version 3, or (at your
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10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
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17 Under Section 7 of GPL version 3, you are granted additional
18 permissions described in the GCC Runtime Library Exception, version
19 3.1, as published by the Free Software Foundation.
20
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21 You should have received a copy of the GNU General Public License and
22 a copy of the GCC Runtime Library Exception along with this program;
23 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
2f83c7d6 24 <http://www.gnu.org/licenses/>. */
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25
26/* Use the AAPCS ABI by default. */
27#define ARM_DEFAULT_ABI ARM_ABI_AAPCS
28
29/* Assume that AAPCS ABIs should adhere to the full BPABI. */
30#define TARGET_BPABI (TARGET_AAPCS_BASED)
31
617a1b71 32/* BPABI targets use EABI frame unwinding tables. */
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33#undef ARM_UNWIND_INFO
34#define ARM_UNWIND_INFO 1
617a1b71 35
deb4af01 36/* Section 4.1 of the AAPCS requires the use of VFP format. */
d3a9662c 37#undef FPUTYPE_DEFAULT
d79f3032 38#define FPUTYPE_DEFAULT "vfp"
deb4af01 39
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40/* TARGET_BIG_ENDIAN_DEFAULT is set in
41 config.gcc for big endian configurations. */
42#if TARGET_BIG_ENDIAN_DEFAULT
43#define TARGET_ENDIAN_DEFAULT MASK_BIG_END
44#else
45#define TARGET_ENDIAN_DEFAULT 0
46#endif
47
077fc835 48/* EABI targets should enable interworking by default. */
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49#undef TARGET_DEFAULT
50#define TARGET_DEFAULT (MASK_INTERWORK | TARGET_ENDIAN_DEFAULT)
077fc835 51
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52/* The ARM BPABI functions return a boolean; they use no special
53 calling convention. */
54#define FLOAT_LIB_COMPARE_RETURNS_BOOL(MODE, COMPARISON) TARGET_BPABI
55
c112cf2b 56/* The BPABI integer comparison routines return { -1, 0, 1 }. */
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57#define TARGET_LIB_INT_CMP_BIASED !TARGET_BPABI
58
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59#define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*"\
60 "|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}"
26272ba2 61
b0c724c2 62#if TARGET_BIG_ENDIAN_DEFAULT
9acebb8a 63#define BE8_LINK_SPEC \
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64 " %{!mlittle-endian:%{march=armv7-a|mcpu=cortex-a5 \
65 |mcpu=cortex-a7 \
66 |mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15 \
6c7e4a18 67 |mcpu=cortex-a12|mcpu=cortex-a17 \
4afb594c 68 |mcpu=cortex-a15.cortex-a7 \
0f4fe895 69 |mcpu=cortex-a17.cortex-a7 \
df8de9b3 70 |mcpu=marvell-pj4 \
debc68ed 71 |mcpu=cortex-a32 \
971f13d7 72 |mcpu=cortex-a35 \
d8c69a92 73 |mcpu=cortex-a53 \
222f9bd0 74 |mcpu=cortex-a57 \
7f8b9e36 75 |mcpu=cortex-a57.cortex-a53 \
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76 |mcpu=cortex-a72 \
77 |mcpu=cortex-a72.cortex-a53 \
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78 |mcpu=cortex-a73 \
79 |mcpu=cortex-a73.cortex-a35 \
80 |mcpu=cortex-a73.cortex-a53 \
e278ae6f 81 |mcpu=exynos-m1 \
cd3246ea 82 |mcpu=xgene1 \
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83 |mcpu=cortex-m1.small-multiply \
84 |mcpu=cortex-m0.small-multiply \
85 |mcpu=cortex-m0plus.small-multiply \
b0c724c2 86 |mcpu=generic-armv7-a \
eb6006ad 87 |march=armv7ve \
b0c724c2 88 |march=armv7-m|mcpu=cortex-m3 \
2f6403f1 89 |march=armv7e-m|mcpu=cortex-m4|mcpu=cortex-m7 \
b0c724c2 90 |march=armv6-m|mcpu=cortex-m0 \
595fefee 91 |march=armv8-a \
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92 |march=armv8-a+crc \
93 |march=armv8.1-a \
94 |march=armv8.1-a+crc \
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95 |march=armv8.2-a \
96 |march=armv8.2-a+fp16 \
f6b2065f 97 |march=armv8-m.base|mcpu=cortex-m23 \
05a437c1 98 |march=armv8-m.main \
cf16d50f 99 |march=armv8-m.main+dsp|mcpu=cortex-m33 \
9acebb8a 100 :%{!r:--be8}}}"
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101#else
102#define BE8_LINK_SPEC \
103 " %{mbig-endian:%{march=armv7-a|mcpu=cortex-a5 \
104 |mcpu=cortex-a7 \
105 |mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15 \
6c7e4a18 106 |mcpu=cortex-a12|mcpu=cortex-a17 \
4afb594c 107 |mcpu=cortex-a15.cortex-a7 \
0f4fe895 108 |mcpu=cortex-a17.cortex-a7 \
971f13d7 109 |mcpu=cortex-a35 \
d8c69a92 110 |mcpu=cortex-a53 \
222f9bd0 111 |mcpu=cortex-a57 \
7f8b9e36 112 |mcpu=cortex-a57.cortex-a53 \
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113 |mcpu=cortex-a72 \
114 |mcpu=cortex-a72.cortex-a53 \
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115 |mcpu=cortex-a73 \
116 |mcpu=cortex-a73.cortex-a35 \
117 |mcpu=cortex-a73.cortex-a53 \
e278ae6f 118 |mcpu=exynos-m1 \
cd3246ea 119 |mcpu=xgene1 \
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120 |mcpu=cortex-m1.small-multiply \
121 |mcpu=cortex-m0.small-multiply \
122 |mcpu=cortex-m0plus.small-multiply \
df8de9b3 123 |mcpu=marvell-pj4 \
b0c724c2 124 |mcpu=generic-armv7-a \
eb6006ad 125 |march=armv7ve \
b0c724c2 126 |march=armv7-m|mcpu=cortex-m3 \
2f6403f1 127 |march=armv7e-m|mcpu=cortex-m4|mcpu=cortex-m7 \
b0c724c2 128 |march=armv6-m|mcpu=cortex-m0 \
595fefee 129 |march=armv8-a \
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130 |march=armv8-a+crc \
131 |march=armv8.1-a \
132 |march=armv8.1-a+crc \
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133 |march=armv8.2-a \
134 |march=armv8.2-a+fp16 \
f6b2065f 135 |march=armv8-m.base|mcpu=cortex-m23 \
05a437c1 136 |march=armv8-m.main \
cf16d50f 137 |march=armv8-m.main+dsp|mcpu=cortex-m33 \
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138 :%{!r:--be8}}}"
139#endif
7664c548 140
87c2399d 141/* Tell the assembler to build BPABI binaries. */
d3a9662c 142#undef SUBTARGET_EXTRA_ASM_SPEC
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143#define SUBTARGET_EXTRA_ASM_SPEC \
144 "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC
87c2399d 145
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146#ifndef SUBTARGET_EXTRA_LINK_SPEC
147#define SUBTARGET_EXTRA_LINK_SPEC ""
148#endif
149
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150/* Split out the EABI common values so other targets can use it. */
151#define EABI_LINK_SPEC \
152 TARGET_FIX_V4BX_SPEC BE8_LINK_SPEC
153
b3f8d95d 154/* The generic link spec in elf.h does not support shared libraries. */
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155#define BPABI_LINK_SPEC \
156 "%{mbig-endian:-EB} %{mlittle-endian:-EL} " \
b3f8d95d 157 "%{static:-Bstatic} %{shared:-shared} %{symbolic:-Bsymbolic} " \
37953bd3 158 "-X" SUBTARGET_EXTRA_LINK_SPEC EABI_LINK_SPEC
b3f8d95d 159
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160#undef LINK_SPEC
161#define LINK_SPEC BPABI_LINK_SPEC
162
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163/* The BPABI requires that we always use an out-of-line implementation
164 of RTTI comparison, even if the target supports weak symbols,
165 because the same object file might be used on a target that does
166 not support merging symbols across DLL boundaries. This macro is
167 broken out separately so that it can be used within
168 TARGET_OS_CPP_BUILTINS in configuration files for systems based on
169 the BPABI. */
170#define TARGET_BPABI_CPP_BUILTINS() \
171 do \
172 { \
b54c93b7 173 builtin_define ("__GXX_TYPEINFO_EQUALITY_INLINE=0"); \
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174 } \
175 while (false)
176
077fc835 177#undef TARGET_OS_CPP_BUILTINS
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178#define TARGET_OS_CPP_BUILTINS() \
179 TARGET_BPABI_CPP_BUILTINS()
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180
181/* The BPABI specifies the use of .{init,fini}_array. Therefore, we
182 do not want GCC to put anything into the .{init,fini} sections. */
183#undef INIT_SECTION_ASM_OP
184#undef FINI_SECTION_ASM_OP
185#define INIT_ARRAY_SECTION_ASM_OP ARM_EABI_CTORS_SECTION_OP
186#define FINI_ARRAY_SECTION_ASM_OP ARM_EABI_DTORS_SECTION_OP
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187
188/* The legacy _mcount implementation assumes r11 points to a
189 4-word APCS frame. This is generally not true for EABI targets,
190 particularly not in Thumb mode. We assume the mcount
191 implementation does not require a counter variable (No Counter).
192 Note that __gnu_mcount_nc will be entered with a misaligned stack.
193 This is OK because it uses a special calling convention anyway. */
194
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195#undef NO_PROFILE_COUNTERS
196#define NO_PROFILE_COUNTERS 1
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197#undef ARM_FUNCTION_PROFILER
198#define ARM_FUNCTION_PROFILER(STREAM, LABELNO) \
199{ \
200 fprintf (STREAM, "\tpush\t{lr}\n"); \
201 fprintf (STREAM, "\tbl\t__gnu_mcount_nc\n"); \
202}
203
204#undef SUBTARGET_FRAME_POINTER_REQUIRED
205#define SUBTARGET_FRAME_POINTER_REQUIRED 0
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206
207/* __gnu_mcount_nc restores the original LR value before returning. Ensure
208 that there is no unnecessary hook set up. */
209#undef PROFILE_HOOK