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b3f8d95d 1/* Configuration file for ARM BPABI targets.
818ab71a 2 Copyright (C) 2004-2016 Free Software Foundation, Inc.
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3 Contributed by CodeSourcery, LLC
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
2f83c7d6 9 by the Free Software Foundation; either version 3, or (at your
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10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
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17 Under Section 7 of GPL version 3, you are granted additional
18 permissions described in the GCC Runtime Library Exception, version
19 3.1, as published by the Free Software Foundation.
20
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21 You should have received a copy of the GNU General Public License and
22 a copy of the GCC Runtime Library Exception along with this program;
23 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
2f83c7d6 24 <http://www.gnu.org/licenses/>. */
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25
26/* Use the AAPCS ABI by default. */
27#define ARM_DEFAULT_ABI ARM_ABI_AAPCS
28
29/* Assume that AAPCS ABIs should adhere to the full BPABI. */
30#define TARGET_BPABI (TARGET_AAPCS_BASED)
31
617a1b71 32/* BPABI targets use EABI frame unwinding tables. */
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33#undef ARM_UNWIND_INFO
34#define ARM_UNWIND_INFO 1
617a1b71 35
deb4af01 36/* Section 4.1 of the AAPCS requires the use of VFP format. */
d3a9662c 37#undef FPUTYPE_DEFAULT
d79f3032 38#define FPUTYPE_DEFAULT "vfp"
deb4af01 39
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40/* TARGET_BIG_ENDIAN_DEFAULT is set in
41 config.gcc for big endian configurations. */
42#if TARGET_BIG_ENDIAN_DEFAULT
43#define TARGET_ENDIAN_DEFAULT MASK_BIG_END
44#else
45#define TARGET_ENDIAN_DEFAULT 0
46#endif
47
077fc835 48/* EABI targets should enable interworking by default. */
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49#undef TARGET_DEFAULT
50#define TARGET_DEFAULT (MASK_INTERWORK | TARGET_ENDIAN_DEFAULT)
077fc835 51
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52/* The ARM BPABI functions return a boolean; they use no special
53 calling convention. */
54#define FLOAT_LIB_COMPARE_RETURNS_BOOL(MODE, COMPARISON) TARGET_BPABI
55
c112cf2b 56/* The BPABI integer comparison routines return { -1, 0, 1 }. */
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57#define TARGET_LIB_INT_CMP_BIASED !TARGET_BPABI
58
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59#define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*"\
60 "|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}"
26272ba2 61
b0c724c2 62#if TARGET_BIG_ENDIAN_DEFAULT
9acebb8a 63#define BE8_LINK_SPEC \
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64 " %{!mlittle-endian:%{march=armv7-a|mcpu=cortex-a5 \
65 |mcpu=cortex-a7 \
66 |mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15 \
6c7e4a18 67 |mcpu=cortex-a12|mcpu=cortex-a17 \
4afb594c 68 |mcpu=cortex-a15.cortex-a7 \
0f4fe895 69 |mcpu=cortex-a17.cortex-a7 \
df8de9b3 70 |mcpu=marvell-pj4 \
debc68ed 71 |mcpu=cortex-a32 \
971f13d7 72 |mcpu=cortex-a35 \
d8c69a92 73 |mcpu=cortex-a53 \
222f9bd0 74 |mcpu=cortex-a57 \
7f8b9e36 75 |mcpu=cortex-a57.cortex-a53 \
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76 |mcpu=cortex-a72 \
77 |mcpu=cortex-a72.cortex-a53 \
e278ae6f 78 |mcpu=exynos-m1 \
bc77eb4b 79 |mcpu=qdf24xx \
cd3246ea 80 |mcpu=xgene1 \
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81 |mcpu=cortex-m1.small-multiply \
82 |mcpu=cortex-m0.small-multiply \
83 |mcpu=cortex-m0plus.small-multiply \
b0c724c2 84 |mcpu=generic-armv7-a \
eb6006ad 85 |march=armv7ve \
b0c724c2 86 |march=armv7-m|mcpu=cortex-m3 \
2f6403f1 87 |march=armv7e-m|mcpu=cortex-m4|mcpu=cortex-m7 \
b0c724c2 88 |march=armv6-m|mcpu=cortex-m0 \
595fefee 89 |march=armv8-a \
9acebb8a 90 :%{!r:--be8}}}"
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91#else
92#define BE8_LINK_SPEC \
93 " %{mbig-endian:%{march=armv7-a|mcpu=cortex-a5 \
94 |mcpu=cortex-a7 \
95 |mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15 \
6c7e4a18 96 |mcpu=cortex-a12|mcpu=cortex-a17 \
4afb594c 97 |mcpu=cortex-a15.cortex-a7 \
0f4fe895 98 |mcpu=cortex-a17.cortex-a7 \
971f13d7 99 |mcpu=cortex-a35 \
d8c69a92 100 |mcpu=cortex-a53 \
222f9bd0 101 |mcpu=cortex-a57 \
7f8b9e36 102 |mcpu=cortex-a57.cortex-a53 \
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103 |mcpu=cortex-a72 \
104 |mcpu=cortex-a72.cortex-a53 \
e278ae6f 105 |mcpu=exynos-m1 \
bc77eb4b 106 |mcpu=qdf24xx \
cd3246ea 107 |mcpu=xgene1 \
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108 |mcpu=cortex-m1.small-multiply \
109 |mcpu=cortex-m0.small-multiply \
110 |mcpu=cortex-m0plus.small-multiply \
df8de9b3 111 |mcpu=marvell-pj4 \
b0c724c2 112 |mcpu=generic-armv7-a \
eb6006ad 113 |march=armv7ve \
b0c724c2 114 |march=armv7-m|mcpu=cortex-m3 \
2f6403f1 115 |march=armv7e-m|mcpu=cortex-m4|mcpu=cortex-m7 \
b0c724c2 116 |march=armv6-m|mcpu=cortex-m0 \
595fefee 117 |march=armv8-a \
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118 :%{!r:--be8}}}"
119#endif
7664c548 120
87c2399d 121/* Tell the assembler to build BPABI binaries. */
d3a9662c 122#undef SUBTARGET_EXTRA_ASM_SPEC
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123#define SUBTARGET_EXTRA_ASM_SPEC \
124 "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC
87c2399d 125
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126#ifndef SUBTARGET_EXTRA_LINK_SPEC
127#define SUBTARGET_EXTRA_LINK_SPEC ""
128#endif
129
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130/* Split out the EABI common values so other targets can use it. */
131#define EABI_LINK_SPEC \
132 TARGET_FIX_V4BX_SPEC BE8_LINK_SPEC
133
b3f8d95d 134/* The generic link spec in elf.h does not support shared libraries. */
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135#define BPABI_LINK_SPEC \
136 "%{mbig-endian:-EB} %{mlittle-endian:-EL} " \
b3f8d95d 137 "%{static:-Bstatic} %{shared:-shared} %{symbolic:-Bsymbolic} " \
37953bd3 138 "-X" SUBTARGET_EXTRA_LINK_SPEC EABI_LINK_SPEC
b3f8d95d 139
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140#undef LINK_SPEC
141#define LINK_SPEC BPABI_LINK_SPEC
142
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143/* The BPABI requires that we always use an out-of-line implementation
144 of RTTI comparison, even if the target supports weak symbols,
145 because the same object file might be used on a target that does
146 not support merging symbols across DLL boundaries. This macro is
147 broken out separately so that it can be used within
148 TARGET_OS_CPP_BUILTINS in configuration files for systems based on
149 the BPABI. */
150#define TARGET_BPABI_CPP_BUILTINS() \
151 do \
152 { \
b54c93b7 153 builtin_define ("__GXX_TYPEINFO_EQUALITY_INLINE=0"); \
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154 } \
155 while (false)
156
077fc835 157#undef TARGET_OS_CPP_BUILTINS
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158#define TARGET_OS_CPP_BUILTINS() \
159 TARGET_BPABI_CPP_BUILTINS()
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160
161/* The BPABI specifies the use of .{init,fini}_array. Therefore, we
162 do not want GCC to put anything into the .{init,fini} sections. */
163#undef INIT_SECTION_ASM_OP
164#undef FINI_SECTION_ASM_OP
165#define INIT_ARRAY_SECTION_ASM_OP ARM_EABI_CTORS_SECTION_OP
166#define FINI_ARRAY_SECTION_ASM_OP ARM_EABI_DTORS_SECTION_OP
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167
168/* The legacy _mcount implementation assumes r11 points to a
169 4-word APCS frame. This is generally not true for EABI targets,
170 particularly not in Thumb mode. We assume the mcount
171 implementation does not require a counter variable (No Counter).
172 Note that __gnu_mcount_nc will be entered with a misaligned stack.
173 This is OK because it uses a special calling convention anyway. */
174
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175#undef NO_PROFILE_COUNTERS
176#define NO_PROFILE_COUNTERS 1
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177#undef ARM_FUNCTION_PROFILER
178#define ARM_FUNCTION_PROFILER(STREAM, LABELNO) \
179{ \
180 fprintf (STREAM, "\tpush\t{lr}\n"); \
181 fprintf (STREAM, "\tbl\t__gnu_mcount_nc\n"); \
182}
183
184#undef SUBTARGET_FRAME_POINTER_REQUIRED
185#define SUBTARGET_FRAME_POINTER_REQUIRED 0
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186
187/* __gnu_mcount_nc restores the original LR value before returning. Ensure
188 that there is no unnecessary hook set up. */
189#undef PROFILE_HOOK