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42e7b263 | 1 | ;; ARM Cortex-A17 NEON pipeline description |
f1717362 | 2 | ;; Copyright (C) 2014-2016 Free Software Foundation, Inc. |
42e7b263 | 3 | ;; |
4 | ;; This file is part of GCC. | |
5 | ;; | |
6 | ;; GCC is free software; you can redistribute it and/or modify it | |
7 | ;; under the terms of the GNU General Public License as published by | |
8 | ;; the Free Software Foundation; either version 3, or (at your option) | |
9 | ;; any later version. | |
10 | ;; | |
11 | ;; GCC is distributed in the hope that it will be useful, but | |
12 | ;; WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | ;; General Public License for more details. | |
15 | ;; | |
16 | ;; You should have received a copy of the GNU General Public License | |
17 | ;; along with GCC; see the file COPYING3. If not see | |
18 | ;; <http://www.gnu.org/licenses/>. | |
19 | ||
20 | (define_attr "cortex_a17_neon_type" | |
21 | "neon_abd, neon_abd_q, neon_arith_acc, neon_arith_acc_q, | |
22 | neon_arith_basic, neon_arith_complex, | |
23 | neon_reduc_add_acc, neon_multiply, neon_multiply_q, | |
24 | neon_multiply_long, neon_mla, neon_mla_q, neon_mla_long, | |
25 | neon_sat_mla_long, neon_shift_acc, neon_shift_imm_basic,\ | |
26 | neon_shift_imm_complex, | |
27 | neon_shift_reg_basic, neon_shift_reg_basic_q, neon_shift_reg_complex, | |
28 | neon_shift_reg_complex_q, neon_fp_negabs, neon_fp_arith, | |
29 | neon_fp_arith_q, neon_fp_cvt_int, | |
30 | neon_fp_cvt_int_q, neon_fp_cvt16, neon_fp_minmax, neon_fp_mul, | |
31 | neon_fp_mul_q, neon_fp_mla, neon_fp_mla_q, neon_fp_recpe_rsqrte, | |
32 | neon_fp_recpe_rsqrte_q, neon_bitops, neon_bitops_q, neon_from_gp, | |
33 | neon_from_gp_q, neon_move, neon_tbl3_tbl4, neon_zip_q, neon_to_gp, | |
34 | neon_load_a, neon_load_b, neon_load_c, neon_load_d, neon_load_e, | |
35 | neon_load_f, neon_load_g, neon_load_h, neon_store_a, neon_store_b, | |
36 | unknown" | |
37 | (cond [ | |
38 | (eq_attr "type" "neon_abd, neon_abd_long") | |
39 | (const_string "neon_abd") | |
40 | (eq_attr "type" "neon_abd_q") | |
41 | (const_string "neon_abd_q") | |
42 | (eq_attr "type" "neon_arith_acc, neon_reduc_add_acc,\ | |
43 | neon_reduc_add_acc_q") | |
44 | (const_string "neon_arith_acc") | |
45 | (eq_attr "type" "neon_arith_acc_q") | |
46 | (const_string "neon_arith_acc_q") | |
47 | (eq_attr "type" "neon_add, neon_add_q, neon_add_long,\ | |
48 | neon_add_widen, neon_neg, neon_neg_q,\ | |
49 | neon_reduc_add, neon_reduc_add_q,\ | |
50 | neon_reduc_add_long, neon_sub, neon_sub_q,\ | |
51 | neon_sub_long, neon_sub_widen, neon_logic,\ | |
52 | neon_logic_q, neon_tst, neon_tst_q") | |
53 | (const_string "neon_arith_basic") | |
54 | (eq_attr "type" "neon_abs, neon_abs_q, neon_add_halve_narrow_q,\ | |
55 | neon_add_halve, neon_add_halve_q,\ | |
56 | neon_sub_halve, neon_sub_halve_q, neon_qabs,\ | |
57 | neon_qabs_q, neon_qadd, neon_qadd_q, neon_qneg,\ | |
58 | neon_qneg_q, neon_qsub, neon_qsub_q,\ | |
59 | neon_sub_halve_narrow_q,\ | |
60 | neon_compare, neon_compare_q,\ | |
61 | neon_compare_zero, neon_compare_zero_q,\ | |
62 | neon_minmax, neon_minmax_q, neon_reduc_minmax,\ | |
63 | neon_reduc_minmax_q") | |
64 | (const_string "neon_arith_complex") | |
65 | ||
66 | (eq_attr "type" "neon_mul_b, neon_mul_h, neon_mul_s,\ | |
67 | neon_mul_h_scalar, neon_mul_s_scalar,\ | |
68 | neon_sat_mul_b, neon_sat_mul_h,\ | |
69 | neon_sat_mul_s, neon_sat_mul_h_scalar,\ | |
70 | neon_sat_mul_s_scalar,\ | |
71 | neon_mul_b_long, neon_mul_h_long,\ | |
72 | neon_mul_s_long,\ | |
73 | neon_mul_h_scalar_long, neon_mul_s_scalar_long,\ | |
74 | neon_sat_mul_b_long, neon_sat_mul_h_long,\ | |
75 | neon_sat_mul_s_long, neon_sat_mul_h_scalar_long,\ | |
76 | neon_sat_mul_s_scalar_long") | |
77 | (const_string "neon_multiply") | |
78 | (eq_attr "type" "neon_mul_b_q, neon_mul_h_q, neon_mul_s_q,\ | |
79 | neon_mul_h_scalar_q, neon_mul_s_scalar_q,\ | |
80 | neon_sat_mul_b_q, neon_sat_mul_h_q,\ | |
81 | neon_sat_mul_s_q, neon_sat_mul_h_scalar_q,\ | |
82 | neon_sat_mul_s_scalar_q") | |
83 | (const_string "neon_multiply_q") | |
84 | (eq_attr "type" "neon_mla_b, neon_mla_h, neon_mla_s,\ | |
85 | neon_mla_h_scalar, neon_mla_s_scalar,\ | |
86 | neon_mla_b_long, neon_mla_h_long,\ | |
87 | neon_mla_s_long,\ | |
88 | neon_mla_h_scalar_long, neon_mla_s_scalar_long") | |
89 | (const_string "neon_mla") | |
90 | (eq_attr "type" "neon_mla_b_q, neon_mla_h_q, neon_mla_s_q,\ | |
91 | neon_mla_h_scalar_q, neon_mla_s_scalar_q") | |
92 | (const_string "neon_mla_q") | |
93 | (eq_attr "type" "neon_sat_mla_b_long, neon_sat_mla_h_long,\ | |
94 | neon_sat_mla_s_long, neon_sat_mla_h_scalar_long,\ | |
95 | neon_sat_mla_s_scalar_long") | |
96 | (const_string "neon_sat_mla_long") | |
97 | ||
98 | (eq_attr "type" "neon_shift_acc, neon_shift_acc_q") | |
99 | (const_string "neon_shift_acc") | |
100 | (eq_attr "type" "neon_shift_imm, neon_shift_imm_q,\ | |
101 | neon_shift_imm_narrow_q, neon_shift_imm_long") | |
102 | (const_string "neon_shift_imm_basic") | |
103 | (eq_attr "type" "neon_sat_shift_imm, neon_sat_shift_imm_q,\ | |
104 | neon_sat_shift_imm_narrow_q") | |
105 | (const_string "neon_shift_imm_complex") | |
106 | (eq_attr "type" "neon_shift_reg") | |
107 | (const_string "neon_shift_reg_basic") | |
108 | (eq_attr "type" "neon_shift_reg_q") | |
109 | (const_string "neon_shift_reg_basic_q") | |
110 | (eq_attr "type" "neon_sat_shift_reg") | |
111 | (const_string "neon_shift_reg_complex") | |
112 | (eq_attr "type" "neon_sat_shift_reg_q") | |
113 | (const_string "neon_shift_reg_complex_q") | |
114 | ||
115 | (eq_attr "type" "neon_fp_neg_s, neon_fp_neg_s_q,\ | |
116 | neon_fp_abs_s, neon_fp_abs_s_q") | |
117 | (const_string "neon_fp_negabs") | |
118 | (eq_attr "type" "neon_fp_addsub_s, neon_fp_abd_s,\ | |
119 | neon_fp_reduc_add_s, neon_fp_compare_s,\ | |
120 | neon_fp_minmax_s, neon_fp_minmax_s_q,\ | |
121 | neon_fp_reduc_minmax_s, neon_fp_round_s,\ | |
122 | neon_fp_round_s_q, neon_fp_round_d,\ | |
123 | neon_fp_round_d_q, neon_fp_reduc_minmax_s_q") | |
124 | (const_string "neon_fp_arith") | |
125 | (eq_attr "type" "neon_fp_addsub_s_q, neon_fp_abd_s_q,\ | |
126 | neon_fp_reduc_add_s_q, neon_fp_compare_s_q") | |
127 | (const_string "neon_fp_arith_q") | |
128 | (eq_attr "type" "neon_fp_to_int_s, neon_int_to_fp_s") | |
129 | (const_string "neon_fp_cvt_int") | |
130 | (eq_attr "type" "neon_fp_to_int_s_q, neon_int_to_fp_s_q") | |
131 | (const_string "neon_fp_cvt_int_q") | |
132 | (eq_attr "type" "neon_fp_cvt_narrow_s_q, neon_fp_cvt_widen_h") | |
133 | (const_string "neon_fp_cvt16") | |
134 | (eq_attr "type" "neon_fp_mul_s, neon_fp_mul_s_scalar") | |
135 | (const_string "neon_fp_mul") | |
136 | (eq_attr "type" "neon_fp_mul_s_q, neon_fp_mul_s_scalar_q") | |
137 | (const_string "neon_fp_mul_q") | |
138 | (eq_attr "type" "neon_fp_mla_s, neon_fp_mla_s_scalar") | |
139 | (const_string "neon_fp_mla") | |
140 | (eq_attr "type" "neon_fp_mla_s_q, neon_fp_mla_s_scalar_q") | |
141 | (const_string "neon_fp_mla_q") | |
142 | (eq_attr "type" "neon_fp_recpe_s, neon_fp_rsqrte_s") | |
143 | (const_string "neon_fp_recpe_rsqrte") | |
144 | (eq_attr "type" "neon_fp_recpe_s_q, neon_fp_rsqrte_s_q") | |
145 | (const_string "neon_fp_recpe_rsqrte_q") | |
146 | ||
147 | (eq_attr "type" "neon_bsl, neon_cls, neon_cnt,\ | |
148 | neon_rev, neon_permute,\ | |
149 | neon_tbl1, neon_tbl2, neon_zip,\ | |
150 | neon_dup, neon_dup_q, neon_ext, neon_ext_q,\ | |
151 | neon_move, neon_move_q, neon_move_narrow_q") | |
152 | (const_string "neon_bitops") | |
153 | (eq_attr "type" "neon_bsl_q, neon_cls_q, neon_cnt_q,\ | |
154 | neon_rev_q, neon_permute_q") | |
155 | (const_string "neon_bitops_q") | |
156 | (eq_attr "type" "neon_from_gp") | |
157 | (const_string "neon_from_gp") | |
158 | (eq_attr "type" "neon_from_gp_q") | |
159 | (const_string "neon_from_gp_q") | |
160 | (eq_attr "type" "neon_tbl3, neon_tbl4") | |
161 | (const_string "neon_tbl3_tbl4") | |
162 | (eq_attr "type" "neon_zip_q") | |
163 | (const_string "neon_zip_q") | |
164 | (eq_attr "type" "neon_to_gp, neon_to_gp_q") | |
165 | (const_string "neon_to_gp") | |
166 | ||
167 | (eq_attr "type" "neon_load1_1reg, neon_load1_1reg_q,\ | |
168 | neon_load1_one_lane, neon_load1_one_lane_q") | |
169 | (const_string "neon_load_a") | |
170 | ||
171 | (eq_attr "type" "neon_load1_2reg, neon_load1_2reg_q") | |
172 | (const_string "neon_load_b") | |
173 | ||
174 | (eq_attr "type" "neon_load1_3reg, neon_load1_3reg_q,\ | |
175 | neon_load1_all_lanes,neon_load1_all_lanes_q,\ | |
176 | neon_load2_one_lane, neon_load2_one_lane_q,\ | |
177 | neon_load2_all_lanes, neon_load2_all_lanes_q") | |
178 | (const_string "neon_load_c") | |
179 | ||
180 | (eq_attr "type" "neon_load1_4reg, neon_load1_4reg_q,\ | |
181 | neon_load2_2reg, neon_load2_2reg_q") | |
182 | (const_string "neon_load_d") | |
183 | ||
184 | (eq_attr "type" "neon_load3_one_lane,\ | |
185 | neon_load3_all_lanes,\ | |
186 | neon_load4_one_lane, neon_load4_all_lanes") | |
187 | (const_string "neon_load_e") | |
188 | ||
189 | ||
190 | (eq_attr "type" "neon_load3_one_lane_q,\ | |
191 | neon_load3_all_lanes_q,\ | |
192 | neon_load4_one_lane_q, neon_load4_all_lanes_q") | |
193 | (const_string "neon_load_f") | |
194 | ||
195 | (eq_attr "type" "neon_load3_3reg,neon_load3_3reg_q") | |
196 | (const_string "neon_load_g") | |
197 | ||
198 | (eq_attr "type" "neon_load2_4reg,neon_load2_4reg_q,\ | |
199 | neon_load4_4reg,neon_load4_4reg_q") | |
200 | (const_string "neon_load_h") | |
201 | ||
202 | (eq_attr "type" "neon_store1_1reg, neon_store1_1reg_q,\ | |
203 | neon_store1_2reg, neon_store1_2reg_q,\ | |
204 | neon_store1_3reg, neon_store1_3reg_q,\ | |
205 | neon_store1_4reg, neon_store1_4reg_q,\ | |
206 | neon_store1_one_lane, neon_store1_one_lane_q,\ | |
207 | neon_store2_2reg, neon_store2_2reg_q,\ | |
208 | neon_store3_one_lane, neon_store3_one_lane_q,\ | |
209 | neon_store4_one_lane, neon_store4_one_lane_q") | |
210 | (const_string "neon_store_a") | |
211 | ||
212 | (eq_attr "type" "neon_store2_4reg, neon_store2_4reg_q,\ | |
213 | neon_store2_one_lane, neon_store2_one_lane_q,\ | |
214 | neon_store3_3reg, neon_store3_3reg_q,\ | |
215 | neon_store4_4reg, neon_store4_4reg_q") | |
216 | (const_string "neon_store_b") | |
217 | ] | |
218 | (const_string "unknown"))) | |
219 | ||
220 | (define_automaton "cortex_a17_neon") | |
221 | ||
222 | (define_cpu_unit "ca17_asimd0, ca17_asimd1" "cortex_a17_neon") | |
223 | (define_cpu_unit "ca17_fdiv0,ca17_simdfpadd0, ca17_simdfpmul0" "cortex_a17_neon") | |
224 | (define_cpu_unit "ca17_simdimac0, ca17_simdialu0, ca17_perm0" "cortex_a17_neon") | |
225 | ||
226 | (define_cpu_unit "ca17_simdialu1, ca17_perm1, ca17_simdshift1" "cortex_a17_neon") | |
227 | (define_cpu_unit "ca17_iacc1" "cortex_a17_neon") | |
228 | (define_cpu_unit "ca17_fpmul1, ca17_fpadd1" "cortex_a17_neon") | |
229 | ||
230 | ||
231 | ;; Integer Arithmetic Instructions. | |
232 | ||
233 | (define_insn_reservation "cortex_a17_neon_abd" 5 | |
234 | (and (eq_attr "tune" "cortexa17") | |
235 | (eq_attr "cortex_a17_neon_type" "neon_abd")) | |
236 | "(ca17_asimd0+ca17_simdialu0) | (ca17_asimd1+ca17_simdialu1)") | |
237 | ||
238 | (define_insn_reservation "cortex_a17_neon_abd_q" 5 | |
239 | (and (eq_attr "tune" "cortexa17") | |
240 | (eq_attr "cortex_a17_neon_type" "neon_abd_q")) | |
241 | "ca17_asimd0+ca17_asimd1+ca17_simdialu0+ca17_simdialu1") | |
242 | ||
243 | (define_insn_reservation "cortex_a17_neon_aba" 7 | |
244 | (and (eq_attr "tune" "cortexa17") | |
245 | (eq_attr "cortex_a17_neon_type" "neon_arith_acc")) | |
246 | "ca17_asimd1+ca17_simdialu1, ca17_iacc1") | |
247 | ||
248 | (define_insn_reservation "cortex_a17_neon_aba_q" 8 | |
249 | (and (eq_attr "tune" "cortexa17") | |
250 | (eq_attr "cortex_a17_neon_type" "neon_arith_acc_q")) | |
251 | "ca17_asimd0+ca17_asimd1+ca17_simdialu0+ca17_simdialu1, ca17_iacc1*2") | |
252 | ||
253 | (define_insn_reservation "cortex_a17_neon_arith_basic" 4 | |
254 | (and (eq_attr "tune" "cortexa17") | |
255 | (eq_attr "cortex_a17_neon_type" "neon_arith_basic")) | |
256 | "(ca17_asimd0+ca17_simdialu0) | (ca17_asimd1+ca17_simdialu1)") | |
257 | ||
258 | (define_insn_reservation "cortex_a17_neon_arith_complex" 5 | |
259 | (and (eq_attr "tune" "cortexa17") | |
260 | (eq_attr "cortex_a17_neon_type" "neon_arith_complex")) | |
261 | "(ca17_asimd0+ca17_simdialu0) | (ca17_asimd1+ca17_simdialu1)") | |
262 | ||
263 | ;; Integer Multiply Instructions. | |
264 | ||
265 | (define_insn_reservation "cortex_a17_neon_multiply" 6 | |
266 | (and (eq_attr "tune" "cortexa17") | |
267 | (eq_attr "cortex_a17_neon_type" "neon_multiply")) | |
268 | "ca17_asimd0+ca17_simdimac0") | |
269 | ||
270 | (define_insn_reservation "cortex_a17_neon_multiply_q" 7 | |
271 | (and (eq_attr "tune" "cortexa17") | |
272 | (eq_attr "cortex_a17_neon_type" "neon_multiply_q")) | |
273 | "(ca17_asimd0+ca17_simdimac0)*2") | |
274 | ||
275 | (define_insn_reservation "cortex_a17_neon_mla" 6 | |
276 | (and (eq_attr "tune" "cortexa17") | |
277 | (eq_attr "cortex_a17_neon_type" "neon_mla")) | |
278 | "ca17_asimd0+ca17_simdimac0*2") | |
279 | ||
280 | (define_insn_reservation "cortex_a17_neon_mla_q" 7 | |
281 | (and (eq_attr "tune" "cortexa17") | |
282 | (eq_attr "cortex_a17_neon_type" "neon_mla_q")) | |
283 | "(ca17_asimd0+ca17_simdimac0)*2,ca17_simdimac0") | |
284 | ||
285 | (define_insn_reservation "cortex_a17_neon_sat_mla_long" 6 | |
286 | (and (eq_attr "tune" "cortexa17") | |
287 | (eq_attr "cortex_a17_neon_type" "neon_sat_mla_long")) | |
288 | "ca17_asimd0+ca17_simdimac0*2") | |
289 | ||
290 | ;; Integer Shift Instructions. | |
291 | ||
292 | (define_insn_reservation | |
293 | "cortex_a17_neon_shift_acc" 7 | |
294 | (and (eq_attr "tune" "cortexa17") | |
295 | (eq_attr "cortex_a17_neon_type" "neon_shift_acc")) | |
296 | "ca17_asimd1+ca17_simdshift1,ca17_iacc1") | |
297 | ||
298 | (define_insn_reservation | |
299 | "cortex_a17_neon_shift_imm_basic" 4 | |
300 | (and (eq_attr "tune" "cortexa17") | |
301 | (eq_attr "cortex_a17_neon_type" "neon_shift_imm_basic")) | |
302 | "ca17_asimd1+ca17_simdshift1") | |
303 | ||
304 | (define_insn_reservation | |
305 | "cortex_a17_neon_shift_imm_complex" 5 | |
306 | (and (eq_attr "tune" "cortexa17") | |
307 | (eq_attr "cortex_a17_neon_type" "neon_shift_imm_complex")) | |
308 | "ca17_asimd1+ca17_simdshift1") | |
309 | ||
310 | (define_insn_reservation | |
311 | "cortex_a17_neon_shift_reg_basic" 4 | |
312 | (and (eq_attr "tune" "cortexa17") | |
313 | (eq_attr "cortex_a17_neon_type" "neon_shift_reg_basic")) | |
314 | "ca17_asimd1+ca17_simdshift1") | |
315 | ||
316 | (define_insn_reservation | |
317 | "cortex_a17_neon_shift_reg_basic_q" 5 | |
318 | (and (eq_attr "tune" "cortexa17") | |
319 | (eq_attr "cortex_a17_neon_type" "neon_shift_reg_basic_q")) | |
320 | "(ca17_asimd1+ca17_simdshift1)*2") | |
321 | ||
322 | (define_insn_reservation | |
323 | "cortex_a17_neon_shift_reg_complex" 5 | |
324 | (and (eq_attr "tune" "cortexa17") | |
325 | (eq_attr "cortex_a17_neon_type" "neon_shift_reg_complex")) | |
326 | "ca17_asimd1+ca17_simdshift1") | |
327 | ||
328 | (define_insn_reservation | |
329 | "cortex_a17_neon_shift_reg_complex_q" 6 | |
330 | (and (eq_attr "tune" "cortexa17") | |
331 | (eq_attr "cortex_a17_neon_type" "neon_shift_reg_complex_q")) | |
332 | "(ca17_asimd1+ca17_simdshift1)*2") | |
333 | ||
334 | (define_insn_reservation | |
335 | "cortex_a17_neon_fp_negabs" 4 | |
336 | (and (eq_attr "tune" "cortexa17") | |
337 | (eq_attr "cortex_a17_neon_type" "neon_fp_negabs")) | |
338 | "ca17_asimd0+ca17_simdfpadd0") | |
339 | ||
340 | (define_insn_reservation | |
341 | "cortex_a17_neon_fp_arith" 6 | |
342 | (and (eq_attr "tune" "cortexa17") | |
343 | (eq_attr "cortex_a17_neon_type" "neon_fp_arith")) | |
344 | "ca17_asimd0+ca17_simdfpadd0") | |
345 | ||
346 | (define_insn_reservation | |
347 | "cortex_a17_neon_fp_arith_q" 6 | |
348 | (and (eq_attr "tune" "cortexa17") | |
349 | (eq_attr "cortex_a17_neon_type" "neon_fp_arith_q")) | |
350 | "(ca17_asimd0+ca17_simdfpadd0)*2") | |
351 | ||
352 | (define_insn_reservation | |
353 | "cortex_a17_neon_fp_cvt_int" 6 | |
354 | (and (eq_attr "tune" "cortexa17") | |
355 | (eq_attr "cortex_a17_neon_type" "neon_fp_cvt_int")) | |
356 | "ca17_asimd0+ca17_simdfpadd0") | |
357 | ||
358 | (define_insn_reservation | |
359 | "cortex_a17_neon_fp_cvt_int_q" 6 | |
360 | (and (eq_attr "tune" "cortexa17") | |
361 | (eq_attr "cortex_a17_neon_type" "neon_fp_cvt_int_q")) | |
362 | "(ca17_asimd0+ca17_simdfpadd0)*2") | |
363 | ||
364 | (define_insn_reservation | |
365 | "cortex_a17_neon_fp_cvt16" 10 | |
366 | (and (eq_attr "tune" "cortexa17") | |
367 | (eq_attr "cortex_a17_neon_type" "neon_fp_cvt16")) | |
368 | "ca17_asimd0+ca17_simdfpadd0") | |
369 | ||
370 | (define_insn_reservation | |
371 | "cortex_a17_neon_fp_mul" 5 | |
372 | (and (eq_attr "tune" "cortexa17") | |
373 | (eq_attr "cortex_a17_neon_type" "neon_fp_mul")) | |
374 | "ca17_asimd0+ca17_simdfpmul0") | |
375 | ||
376 | (define_insn_reservation | |
377 | "cortex_a17_neon_fp_mul_q" 5 | |
378 | (and (eq_attr "tune" "cortexa17") | |
379 | (eq_attr "cortex_a17_neon_type" "neon_fp_mul_q")) | |
380 | "(ca17_asimd0+ca17_simdfpmul0)*2") | |
381 | ||
382 | (define_insn_reservation | |
383 | "cortex_a17_neon_fp_mla" 8 | |
384 | (and (eq_attr "tune" "cortexa17") | |
385 | (eq_attr "cortex_a17_neon_type" "neon_fp_mla")) | |
386 | "ca17_asimd0+ca17_simdfpmul0,ca17_simdfpadd0") | |
387 | ||
388 | (define_insn_reservation | |
389 | "cortex_a17_neon_fp_mla_q" 9 | |
390 | (and (eq_attr "tune" "cortexa17") | |
391 | (eq_attr "cortex_a17_neon_type" "neon_fp_mla_q")) | |
392 | "ca17_asimd0+ca17_simdfpmul0,ca17_asimd0+ca17_simdfpadd0+ca17_simdfpmul0,ca17_simdfpadd0") | |
393 | ||
394 | (define_insn_reservation | |
395 | "cortex_a17_neon_fp_recps_rsqrte" 9 | |
396 | (and (eq_attr "tune" "cortexa17") | |
397 | (eq_attr "cortex_a17_neon_type" "neon_fp_recpe_rsqrte")) | |
398 | "(ca17_asimd0+ca17_perm0)|(ca17_asimd1+ca17_perm1)") | |
399 | ||
400 | (define_insn_reservation | |
401 | "cortex_a17_neon_fp_recps_rsqrte_q" 9 | |
402 | (and (eq_attr "tune" "cortexa17") | |
403 | (eq_attr "cortex_a17_neon_type" "neon_fp_recpe_rsqrte_q")) | |
404 | "(ca17_asimd0+ca17_perm0)*2|(ca17_asimd1+ca17_perm1)*2") | |
405 | ||
406 | ;; Miscelaneous Instructions. | |
407 | ||
408 | (define_insn_reservation | |
409 | "cortex_a17_neon_bitops" 4 | |
410 | (and (eq_attr "tune" "cortexa17") | |
411 | (eq_attr "cortex_a17_neon_type" "neon_bitops")) | |
412 | "(ca17_asimd0+ca17_perm0) | (ca17_asimd1+ca17_perm1)") | |
413 | ||
414 | (define_insn_reservation | |
415 | "cortex_a17_neon_bitops_q" 4 | |
416 | (and (eq_attr "tune" "cortexa17") | |
417 | (eq_attr "cortex_a17_neon_type" "neon_bitops_q")) | |
418 | "(ca17_asimd0+ca17_perm0)*2 | (ca17_asimd1+ca17_perm1)*2") | |
419 | ||
420 | (define_insn_reservation | |
421 | "cortex_a17_neon_from_gp" 2 | |
422 | (and (eq_attr "tune" "cortexa17") | |
423 | (eq_attr "cortex_a17_neon_type" "neon_from_gp")) | |
424 | "(ca17_asimd0+ca17_perm0)|(ca17_asimd1+ca17_perm1)") | |
425 | ||
426 | (define_insn_reservation | |
427 | "cortex_a17_neon_from_gp_q" 3 | |
428 | (and (eq_attr "tune" "cortexa17") | |
429 | (eq_attr "cortex_a17_neon_type" "neon_from_gp_q")) | |
430 | "(ca17_asimd0+ca17_perm0)|(ca17_asimd1+ca17_perm1)") | |
431 | ||
432 | (define_insn_reservation | |
433 | "cortex_a17_neon_tbl3_tbl4" 7 | |
434 | (and (eq_attr "tune" "cortexa17") | |
435 | (eq_attr "cortex_a17_neon_type" "neon_tbl3_tbl4")) | |
436 | "(ca17_asimd0+ca17_perm0)|(ca17_asimd1+ca17_perm1)") | |
437 | ||
438 | (define_insn_reservation | |
439 | "cortex_a17_neon_zip_q" 7 | |
440 | (and (eq_attr "tune" "cortexa17") | |
441 | (eq_attr "cortex_a17_neon_type" "neon_zip_q")) | |
442 | "(ca17_asimd0+ca17_perm0)|(ca17_asimd1+ca17_perm1)") | |
443 | ||
444 | (define_insn_reservation | |
445 | "cortex_a17_neon_to_gp" 2 | |
446 | (and (eq_attr "tune" "cortexa17") | |
447 | (eq_attr "cortex_a17_neon_type" "neon_to_gp")) | |
448 | "ca17_asimd0+ca17_perm0*3") | |
449 | ||
450 | (define_insn_reservation | |
451 | "cortex_a17_vfp_flag" 5 | |
452 | (and (eq_attr "tune" "cortexa17") | |
453 | (eq_attr "type" "f_flag")) | |
454 | "ca17_asimd0+ca17_perm0") | |
455 | ||
456 | ;; Load Instructions. | |
457 | ||
458 | (define_insn_reservation | |
459 | "cortex_a17_vfp_load" 5 | |
460 | (and (eq_attr "tune" "cortexa17") | |
461 | (eq_attr "type" "f_loads, f_loadd")) | |
462 | "ca17_ls0|ca17_ls1") | |
463 | ||
464 | (define_insn_reservation | |
465 | "cortex_a17_neon_load_a" 6 | |
466 | (and (eq_attr "tune" "cortexa17") | |
467 | (eq_attr "cortex_a17_neon_type" "neon_load_a")) | |
468 | "ca17_ls0*2|ca17_ls1*2") | |
469 | ||
470 | (define_insn_reservation | |
471 | "cortex_a17_neon_load_b" 7 | |
472 | (and (eq_attr "tune" "cortexa17") | |
473 | (eq_attr "cortex_a17_neon_type" "neon_load_b")) | |
474 | "ca17_ls0*2|ca17_ls1*2") | |
475 | ||
476 | (define_insn_reservation | |
477 | "cortex_a17_neon_load_c" 8 | |
478 | (and (eq_attr "tune" "cortexa17") | |
479 | (eq_attr "cortex_a17_neon_type" "neon_load_c")) | |
480 | "ca17_ls0*2|ca17_ls1*2") | |
481 | ||
482 | (define_insn_reservation | |
483 | "cortex_a17_neon_load_d" 9 | |
484 | (and (eq_attr "tune" "cortexa17") | |
485 | (eq_attr "cortex_a17_neon_type" "neon_load_d")) | |
486 | "ca17_ls0*2|ca17_ls1*2") | |
487 | ||
488 | (define_insn_reservation | |
489 | "cortex_a17_neon_load_e" 9 | |
490 | (and (eq_attr "tune" "cortexa17") | |
491 | (eq_attr "cortex_a17_neon_type" "neon_load_e")) | |
492 | "ca17_ls0*2|ca17_ls1*2") | |
493 | ||
494 | (define_insn_reservation | |
495 | "cortex_a17_neon_load_f" 10 | |
496 | (and (eq_attr "tune" "cortexa17") | |
497 | (eq_attr "cortex_a17_neon_type" "neon_load_f")) | |
498 | "ca17_ls0*2+ca17_ls1*2") | |
499 | ||
500 | (define_insn_reservation | |
501 | "cortex_a17_neon_load_g" 10 | |
502 | (and (eq_attr "tune" "cortexa17") | |
503 | (eq_attr "cortex_a17_neon_type" "neon_load_g")) | |
504 | "ca17_ls0*2+ca17_ls1*2") | |
505 | ||
506 | (define_insn_reservation | |
507 | "cortex_a17_neon_load_h" 11 | |
508 | (and (eq_attr "tune" "cortexa17") | |
509 | (eq_attr "cortex_a17_neon_type" "neon_load_h")) | |
510 | "ca17_ls0*2+ca17_ls1*2") | |
511 | ||
512 | ;; Store Instructions. | |
513 | ||
514 | (define_insn_reservation | |
515 | "cortex_a17_vfp_store" 0 | |
516 | (and (eq_attr "tune" "cortexa17") | |
517 | (eq_attr "type" "f_stores, f_stored")) | |
518 | "ca17_ls0|ca17_ls1") | |
519 | ||
520 | ||
521 | (define_insn_reservation | |
522 | "cortex_a17_neon_store_a" 0 | |
523 | (and (eq_attr "tune" "cortexa17") | |
524 | (eq_attr "cortex_a17_neon_type" "neon_store_a")) | |
525 | "ca17_ls0*2|ca17_ls1*2") | |
526 | ||
527 | (define_insn_reservation | |
528 | "cortex_a17_neon_store_b" 0 | |
529 | (and (eq_attr "tune" "cortexa17") | |
530 | (eq_attr "cortex_a17_neon_type" "neon_store_b")) | |
531 | "ca17_ls0*2+ca17_ls1*2") | |
532 | ||
533 | ;; VFP Operations. | |
534 | ||
535 | (define_insn_reservation "cortex_a17_vfp_const" 4 | |
536 | (and (eq_attr "tune" "cortexa17") | |
537 | (eq_attr "type" "fconsts,fconstd")) | |
538 | "ca17_asimd1+ca17_fpadd1") | |
539 | ||
540 | (define_insn_reservation "cortex_a17_vfp_adds_subs" 6 | |
541 | (and (eq_attr "tune" "cortexa17") | |
542 | (eq_attr "type" "fadds")) | |
543 | "ca17_asimd1+ca17_fpadd1") | |
544 | ||
545 | ||
546 | (define_insn_reservation "cortex_a17_vfp_addd_subd" 6 | |
547 | (and (eq_attr "tune" "cortexa17") | |
548 | (eq_attr "type" "faddd")) | |
549 | "ca17_asimd1+ca17_fpadd1") | |
550 | ||
551 | (define_insn_reservation "cortex_a17_vfp_mul" 6 | |
552 | (and (eq_attr "tune" "cortexa17") | |
553 | (eq_attr "type" "fmuls,fmuld")) | |
554 | "ca17_asimd1+ca17_fpmul1") | |
555 | ||
556 | (define_insn_reservation "cortex_a17_vfp_mac" 11 | |
557 | (and (eq_attr "tune" "cortexa17") | |
558 | (eq_attr "type" "fmacs,ffmas,fmacd,ffmad")) | |
559 | "ca17_asimd1+ca17_fpmul1,ca17_fpadd1") | |
560 | ||
561 | (define_insn_reservation "cortex_a17_vfp_cvt" 6 | |
562 | (and (eq_attr "tune" "cortexa17") | |
563 | (eq_attr "type" "f_cvt,f_cvtf2i,f_cvti2f,f_rints,f_rintd")) | |
564 | "ca17_asimd1+ca17_fpadd1") | |
565 | ||
566 | (define_insn_reservation "cortex_a17_vfp_cmp" 4 | |
567 | (and (eq_attr "tune" "cortexa17") | |
568 | (eq_attr "type" "fcmps,fcmpd")) | |
569 | "ca17_asimd1+ca17_fpadd1") | |
570 | ||
571 | (define_insn_reservation "cortex_a17_vfp_arithd" 4 | |
572 | (and (eq_attr "tune" "cortexa17") | |
573 | (eq_attr "type" "ffarithd")) | |
574 | "ca17_asimd1+ca17_fpadd1") | |
575 | ||
576 | (define_insn_reservation "cortex_a17_vfp_cpys" 4 | |
577 | (and (eq_attr "tune" "cortexa17") | |
578 | (eq_attr "type" "fmov,fcsel")) | |
579 | "ca17_asimd1+ca17_fpadd1") | |
580 | ||
581 | (define_insn_reservation "cortex_a17_gp_to_vfp" 2 | |
582 | (and (eq_attr "tune" "cortexa17") | |
583 | (eq_attr "type" "f_mcr, f_mcrr")) | |
584 | "(ca17_asimd0+ca17_perm0)|(ca17_asimd1+ca17_perm1)") | |
585 | ||
586 | (define_insn_reservation "cortex_a17_mov_vfp_to_gp" 4 | |
587 | (and (eq_attr "tune" "cortexa17") | |
588 | (eq_attr "type" "f_mrc, f_mrrc")) | |
589 | "ca17_asimd0+ca17_perm0*3") | |
590 | ||
591 | (define_insn_reservation "cortex_a17_vfp_ariths" 4 | |
592 | (and (eq_attr "tune" "cortexa17") | |
593 | (eq_attr "type" "ffariths")) | |
594 | "ca17_asimd1+ca17_fpadd1") | |
595 | ||
596 | (define_insn_reservation "cortex_a17_vfp_divs" 18 | |
597 | (and (eq_attr "tune" "cortexa17") | |
598 | (eq_attr "type" "fdivs, fsqrts")) | |
599 | "ca17_asimd0+ca17_fdiv0*10") | |
600 | ||
601 | (define_insn_reservation "cortex_a17_vfp_divd" 32 | |
602 | (and (eq_attr "tune" "cortexa17") | |
603 | (eq_attr "type" "fdivd, fsqrtd")) | |
604 | "ca17_asimd0+ca17_fdiv0*10") | |
605 |