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2ae1f0cc | 1 | /* Subroutines for the gcc driver. |
f1717362 | 2 | Copyright (C) 2011-2016 Free Software Foundation, Inc. |
2ae1f0cc | 3 | |
4 | This file is part of GCC. | |
5 | ||
6 | GCC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GCC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GCC; see the file COPYING3. If not see | |
18 | <http://www.gnu.org/licenses/>. */ | |
19 | ||
20 | #include "config.h" | |
21 | #include "system.h" | |
22 | #include "coretypes.h" | |
23 | #include "tm.h" | |
24 | #include "configargs.h" | |
25 | ||
26 | struct vendor_cpu { | |
27 | const char *part_no; | |
28 | const char *arch_name; | |
29 | const char *cpu_name; | |
30 | }; | |
31 | ||
32 | static struct vendor_cpu arm_cpu_table[] = { | |
33 | {"0x926", "armv5te", "arm926ej-s"}, | |
34 | {"0xa26", "armv5te", "arm1026ej-s"}, | |
35 | {"0xb02", "armv6k", "mpcore"}, | |
36 | {"0xb36", "armv6j", "arm1136j-s"}, | |
37 | {"0xb56", "armv6t2", "arm1156t2-s"}, | |
ab2874ba | 38 | /* armv6kz is the correct spelling for ARMv6KZ but may not be supported in |
39 | the version of binutils used. The incorrect spelling is supported in | |
40 | legacy and current binutils so that is used instead. */ | |
2ae1f0cc | 41 | {"0xb76", "armv6zk", "arm1176jz-s"}, |
42 | {"0xc05", "armv7-a", "cortex-a5"}, | |
67127400 | 43 | {"0xc07", "armv7ve", "cortex-a7"}, |
2ae1f0cc | 44 | {"0xc08", "armv7-a", "cortex-a8"}, |
45 | {"0xc09", "armv7-a", "cortex-a9"}, | |
67127400 | 46 | {"0xc0d", "armv7ve", "cortex-a12"}, |
42e7b263 | 47 | {"0xc0e", "armv7ve", "cortex-a17"}, |
67127400 | 48 | {"0xc0f", "armv7ve", "cortex-a15"}, |
2ae1f0cc | 49 | {"0xc14", "armv7-r", "cortex-r4"}, |
50 | {"0xc15", "armv7-r", "cortex-r5"}, | |
51 | {"0xc20", "armv6-m", "cortex-m0"}, | |
52 | {"0xc21", "armv6-m", "cortex-m1"}, | |
53 | {"0xc23", "armv7-m", "cortex-m3"}, | |
54 | {"0xc24", "armv7e-m", "cortex-m4"}, | |
55 | {NULL, NULL, NULL} | |
56 | }; | |
57 | ||
fab4327c | 58 | static struct { |
2ae1f0cc | 59 | const char *vendor_no; |
60 | const struct vendor_cpu *vendor_parts; | |
61 | } vendors[] = { | |
62 | {"0x41", arm_cpu_table}, | |
63 | {NULL, NULL} | |
64 | }; | |
65 | ||
66 | /* This will be called by the spec parser in gcc.c when it sees | |
67 | a %:local_cpu_detect(args) construct. Currently it will be called | |
68 | with either "arch", "cpu" or "tune" as argument depending on if | |
69 | -march=native, -mcpu=native or -mtune=native is to be substituted. | |
70 | ||
71 | It returns a string containing new command line parameters to be | |
72 | put at the place of the above two options, depending on what CPU | |
73 | this is executed. E.g. "-march=armv7-a" on a Cortex-A8 for | |
74 | -march=native. If the routine can't detect a known processor, | |
75 | the -march or -mtune option is discarded. | |
76 | ||
77 | ARGC and ARGV are set depending on the actual arguments given | |
78 | in the spec. */ | |
79 | const char * | |
80 | host_detect_local_cpu (int argc, const char **argv) | |
81 | { | |
82 | const char *val = NULL; | |
83 | char buf[128]; | |
51591341 | 84 | FILE *f = NULL; |
2ae1f0cc | 85 | bool arch; |
86 | const struct vendor_cpu *cpu_table = NULL; | |
87 | ||
88 | if (argc < 1) | |
89 | goto not_found; | |
90 | ||
91 | arch = strcmp (argv[0], "arch") == 0; | |
92 | if (!arch && strcmp (argv[0], "cpu") != 0 && strcmp (argv[0], "tune")) | |
93 | goto not_found; | |
94 | ||
95 | f = fopen ("/proc/cpuinfo", "r"); | |
96 | if (f == NULL) | |
97 | goto not_found; | |
98 | ||
99 | while (fgets (buf, sizeof (buf), f) != NULL) | |
100 | { | |
101 | /* Ensure that CPU implementer is ARM (0x41). */ | |
102 | if (strncmp (buf, "CPU implementer", sizeof ("CPU implementer") - 1) == 0) | |
103 | { | |
104 | int i; | |
105 | for (i = 0; vendors[i].vendor_no != NULL; i++) | |
106 | if (strstr (buf, vendors[i].vendor_no) != NULL) | |
107 | { | |
108 | cpu_table = vendors[i].vendor_parts; | |
109 | break; | |
110 | } | |
111 | } | |
112 | ||
113 | /* Detect arch/cpu. */ | |
114 | if (strncmp (buf, "CPU part", sizeof ("CPU part") - 1) == 0) | |
115 | { | |
116 | int i; | |
117 | ||
118 | if (cpu_table == NULL) | |
119 | goto not_found; | |
120 | ||
121 | for (i = 0; cpu_table[i].part_no != NULL; i++) | |
122 | if (strstr (buf, cpu_table[i].part_no) != NULL) | |
123 | { | |
124 | val = arch ? cpu_table[i].arch_name : cpu_table[i].cpu_name; | |
125 | break; | |
126 | } | |
127 | break; | |
128 | } | |
129 | } | |
130 | ||
131 | fclose (f); | |
132 | ||
133 | if (val == NULL) | |
134 | goto not_found; | |
135 | ||
136 | return concat ("-m", argv[0], "=", val, NULL); | |
137 | ||
138 | not_found: | |
139 | { | |
140 | unsigned int i; | |
141 | unsigned int opt; | |
142 | const char *search[] = {NULL, "arch"}; | |
9d16ceb0 | 143 | |
51591341 | 144 | if (f) |
145 | fclose (f); | |
9d16ceb0 | 146 | |
2ae1f0cc | 147 | search[0] = argv[0]; |
148 | for (opt = 0; opt < ARRAY_SIZE (search); opt++) | |
149 | for (i = 0; i < ARRAY_SIZE (configure_default_options); i++) | |
150 | if (strcmp (configure_default_options[i].name, search[opt]) == 0) | |
151 | return concat ("-m", search[opt], "=", | |
152 | configure_default_options[i].value, NULL); | |
153 | return NULL; | |
154 | } | |
155 | } |