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cffb2a26 1/* Definitions of target machine for GNU compiler.
2 For ARM with ELF obj format.
fbd26352 3 Copyright (C) 1995-2019 Free Software Foundation, Inc.
6cd47762 4 Contributed by Philip Blundell <philb@gnu.org> and
5 Catherine Moore <clm@cygnus.com>
6
acf6ed70 7 This file is part of GCC.
6cd47762 8
acf6ed70 9 GCC is free software; you can redistribute it and/or modify it
10 under the terms of the GNU General Public License as published
038d1e19 11 by the Free Software Foundation; either version 3, or (at your
acf6ed70 12 option) any later version.
6cd47762 13
acf6ed70 14 GCC is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
6cd47762 18
b81ef88d 19 Under Section 7 of GPL version 3, you are granted additional
20 permissions described in the GCC Runtime Library Exception, version
21 3.1, as published by the Free Software Foundation.
22
6f0c730b 23 You should have received a copy of the GNU General Public License and
24 a copy of the GCC Runtime Library Exception along with this program;
25 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
038d1e19 26 <http://www.gnu.org/licenses/>. */
6cd47762 27
a9acd81a 28#ifndef OBJECT_FORMAT_ELF
29 #error elf.h included before elfos.h
30#endif
6cd47762 31
32#ifndef LOCAL_LABEL_PREFIX
33#define LOCAL_LABEL_PREFIX "."
34#endif
35
96576951 36#ifndef SUBTARGET_CPP_SPEC
82655d83 37#define SUBTARGET_CPP_SPEC "-D__ELF__"
6cd47762 38#endif
39
26eb05e6 40#ifndef SUBTARGET_EXTRA_SPECS
41#define SUBTARGET_EXTRA_SPECS \
3eddb6a2 42 { "subtarget_extra_asm_spec", SUBTARGET_EXTRA_ASM_SPEC }, \
657e4193 43 { "subtarget_asm_float_spec", SUBTARGET_ASM_FLOAT_SPEC }, \
44 SUBSUBTARGET_EXTRA_SPECS
26eb05e6 45#endif
46
cffb2a26 47#ifndef SUBTARGET_EXTRA_ASM_SPEC
26eb05e6 48#define SUBTARGET_EXTRA_ASM_SPEC ""
cffb2a26 49#endif
50
3eddb6a2 51#ifndef SUBTARGET_ASM_FLOAT_SPEC
52#define SUBTARGET_ASM_FLOAT_SPEC "\
a2cd141b 53%{mapcs-float:-mfloat}"
3eddb6a2 54#endif
55
657e4193 56#undef SUBSUBTARGET_EXTRA_SPECS
57#define SUBSUBTARGET_EXTRA_SPECS
58
cffb2a26 59#ifndef ASM_SPEC
60#define ASM_SPEC "\
61%{mbig-endian:-EB} \
e1e06b21 62%{mlittle-endian:-EL} \
af9b12a1 63%(asm_cpu_spec) \
cffb2a26 64%{mapcs-*:-mapcs-%*} \
3eddb6a2 65%(subtarget_asm_float_spec) \
cffb2a26 66%{mthumb-interwork:-mthumb-interwork} \
2c9e7fd3 67%{mfloat-abi=*} %{!mfpu=auto: %{mfpu=*}} \
26eb05e6 68%(subtarget_extra_asm_spec)"
cffb2a26 69#endif
70
a9acd81a 71/* The ARM uses @ are a comment character so we need to redefine
72 TYPE_OPERAND_FMT. */
73#undef TYPE_OPERAND_FMT
5f61bb87 74#define TYPE_OPERAND_FMT "%%%s"
6cd47762 75
a9acd81a 76/* We might need a ARM specific header to function declarations. */
77#undef ASM_DECLARE_FUNCTION_NAME
9c21be33 78#define ASM_DECLARE_FUNCTION_NAME arm_asm_declare_function_name
6cd47762 79
a9acd81a 80/* We might need an ARM specific trailer for function declarations. */
81#undef ASM_DECLARE_FUNCTION_SIZE
bba10fb8 82#define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
83 do \
84 { \
1774763d 85 ARM_OUTPUT_FN_UNWIND (FILE, FALSE); \
bba10fb8 86 if (!flag_inhibit_size_directive) \
a7424888 87 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
bba10fb8 88 } \
89 while (0)
6cd47762 90
91/* Define this macro if jump tables (for `tablejump' insns) should be
92 output in the text section, along with the assembler instructions.
93 Otherwise, the readonly data section is used. */
25f905c2 94/* We put ARM and Thumb-2 jump tables in the text section, because it makes
95 the code more efficient, but for Thumb-1 it's better to put them out of
e6ac8414 96 band unless we are generating compressed tables. */
97#define JUMP_TABLES_IN_TEXT_SECTION \
9753b549 98 ((TARGET_32BIT || (TARGET_THUMB && (optimize_size || flag_pic))) \
99 && !target_pure_code)
6cd47762 100
6cd47762 101#ifndef LINK_SPEC
e1e06b21 102#define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X"
6cd47762 103#endif
104
105/* Run-time Target Specification. */
6cd47762 106#ifndef TARGET_DEFAULT
81f6de2f 107#define TARGET_DEFAULT (MASK_APCS_FRAME)
6cd47762 108#endif
109
6cd47762 110\f
92c473b8 111#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
6cd47762 112\f
45220d6c 113
d24bc145 114/* Output an element in the static constructor array. */
115#undef TARGET_ASM_CONSTRUCTOR
116#define TARGET_ASM_CONSTRUCTOR arm_elf_asm_constructor
117
a457f9f8 118#undef TARGET_ASM_DESTRUCTOR
119#define TARGET_ASM_DESTRUCTOR arm_elf_asm_destructor
120
6ebaa29d 121/* For PIC code we need to explicitly specify (PLT) and (GOT) relocs. */
55c1e470 122#define NEED_PLT_RELOC flag_pic
123#define NEED_GOT_RELOC flag_pic
6ebaa29d 124
4e06b511 125/* The ELF assembler handles GOT addressing differently to NetBSD. */
126#define GOT_PCREL 0
127
0e2a616b 128/* Align output to a power of two. Note ".align 0" is redundant,
129 and also GAS will treat it as ".align 2" which we do not want. */
130#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
131 do \
132 { \
133 if ((POWER) > 0) \
134 fprintf (STREAM, "\t.align\t%d\n", POWER); \
135 } \
136 while (0)
e15d4684 137
b77c60b7 138/* Horrible hack: We want to prevent some libgcc routines being included
9e6f4af4 139 for some multilibs. The condition should match the one in
73dbcdab 140 libgcc/config/arm/lib1funcs.S and libgcc/config/arm/t-elf. */
9e6f4af4 141#if __ARM_ARCH_ISA_ARM || __ARM_ARCH_ISA_THUMB != 1
b77c60b7 142#undef L_fixdfsi
143#undef L_fixunsdfsi
144#undef L_truncdfsf2
145#undef L_fixsfsi
146#undef L_fixunssfsi
147#undef L_floatdidf
148#undef L_floatdisf
149#undef L_floatundidf
150#undef L_floatundisf
151#endif
152