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d0687401 | 1 | /* Definitions of target machine for GNU compiler. ARM on semi-hosted platform |
f1717362 | 2 | Copyright (C) 1994-2016 Free Software Foundation, Inc. |
9c235d70 | 3 | Contributed by Richard Earnshaw (richard.earnshaw@arm.com) |
d0687401 | 4 | |
acf6ed70 | 5 | This file is part of GCC. |
6 | ||
7 | GCC is free software; you can redistribute it and/or modify it | |
8 | under the terms of the GNU General Public License as published | |
038d1e19 | 9 | by the Free Software Foundation; either version 3, or (at your |
acf6ed70 | 10 | option) any later version. |
11 | ||
12 | GCC is distributed in the hope that it will be useful, but WITHOUT | |
13 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 | License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
038d1e19 | 18 | along with GCC; see the file COPYING3. If not see |
19 | <http://www.gnu.org/licenses/>. */ | |
d0687401 | 20 | |
21 | #define STARTFILE_SPEC "crt0.o%s" | |
22 | ||
a9acd81a | 23 | #ifndef LIB_SPEC |
d0687401 | 24 | #define LIB_SPEC "-lc" |
a9acd81a | 25 | #endif |
d0687401 | 26 | |
a9acd81a | 27 | #ifndef SUBTARGET_CPP_SPEC |
cffb2a26 | 28 | #define SUBTARGET_CPP_SPEC "-D__semi__" |
a9acd81a | 29 | #endif |
a5029a9e | 30 | |
a9acd81a | 31 | #ifndef LINK_SPEC |
a5029a9e | 32 | #define LINK_SPEC "%{mbig-endian:-EB} -X" |
a9acd81a | 33 | #endif |
a5029a9e | 34 | |
87f8017f | 35 | #ifndef TARGET_DEFAULT_FLOAT_ABI |
36 | #define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_HARD | |
37 | #endif | |
38 | ||
6c4c2133 | 39 | #ifndef TARGET_DEFAULT |
81f6de2f | 40 | #define TARGET_DEFAULT (MASK_APCS_FRAME) |
cffb2a26 | 41 | #endif |
42 | ||
26eb05e6 | 43 | #ifndef SUBTARGET_EXTRA_SPECS |
44 | #define SUBTARGET_EXTRA_SPECS \ | |
45 | { "subtarget_extra_asm_spec", SUBTARGET_EXTRA_ASM_SPEC }, | |
46 | #endif | |
47 | ||
cffb2a26 | 48 | #ifndef SUBTARGET_EXTRA_ASM_SPEC |
26eb05e6 | 49 | #define SUBTARGET_EXTRA_ASM_SPEC "" |
cffb2a26 | 50 | #endif |
51 | ||
9c235d70 | 52 | /* The compiler supports PIC code generation, even though the binutils |
53 | may not. If we are asked to compile position independent code, we | |
54 | always pass -k to the assembler. If it doesn't recognize it, then | |
55 | it will barf, which probably means that it doesn't know how to | |
56 | assemble PIC code. This is what we want, since otherwise tools | |
57 | may incorrectly assume we support PIC compilation even if the | |
58 | binutils can't. */ | |
cffb2a26 | 59 | #ifndef ASM_SPEC |
60 | #define ASM_SPEC "\ | |
e9abca4f | 61 | %{" FPIE_OR_FPIC_SPEC ": -k} \ |
cffb2a26 | 62 | %{mbig-endian:-EB} \ |
af9b12a1 | 63 | %(arm_cpu_spec) \ |
cffb2a26 | 64 | %{mapcs-float:-mfloat} \ |
a2cd141b | 65 | %{mfloat-abi=*} %{mfpu=*} \ |
cffb2a26 | 66 | %{mthumb-interwork:-mthumb-interwork} \ |
26eb05e6 | 67 | %(subtarget_extra_asm_spec)" |
6c4c2133 | 68 | #endif |