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a28e4651 | 1 | /* Definitions of target machine for GNU compiler, |
2 | for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers. | |
aad93da1 | 3 | Copyright (C) 1998-2017 Free Software Foundation, Inc. |
947dd720 | 4 | Contributed by Denis Chertykov (chertykov@gmail.com) |
a28e4651 | 5 | |
187b36cf | 6 | This file is part of GCC. |
a28e4651 | 7 | |
187b36cf | 8 | GCC is free software; you can redistribute it and/or modify |
a28e4651 | 9 | it under the terms of the GNU General Public License as published by |
038d1e19 | 10 | the Free Software Foundation; either version 3, or (at your option) |
a28e4651 | 11 | any later version. |
12 | ||
187b36cf | 13 | GCC is distributed in the hope that it will be useful, |
a28e4651 | 14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
038d1e19 | 19 | along with GCC; see the file COPYING3. If not see |
20 | <http://www.gnu.org/licenses/>. */ | |
a28e4651 | 21 | |
9d734fa8 | 22 | typedef struct |
23 | { | |
24 | /* Id of the address space as used in c_register_addr_space */ | |
25 | unsigned char id; | |
26 | ||
27 | /* Flavour of memory: 0 = RAM, 1 = Flash */ | |
28 | int memory_class; | |
29 | ||
30 | /* Width of pointer (in bytes) */ | |
31 | int pointer_size; | |
32 | ||
33 | /* Name of the address space as visible to the user */ | |
34 | const char *name; | |
35 | ||
36 | /* Segment (i.e. 64k memory chunk) number. */ | |
37 | int segment; | |
0558f5da | 38 | |
39 | /* Section prefix, e.g. ".progmem1.data" */ | |
40 | const char *section_name; | |
9d734fa8 | 41 | } avr_addrspace_t; |
42 | ||
43 | extern const avr_addrspace_t avr_addrspace[]; | |
44 | ||
45 | /* Known address spaces */ | |
46 | ||
47 | enum | |
48 | { | |
0558f5da | 49 | ADDR_SPACE_RAM, /* ADDR_SPACE_GENERIC */ |
590da9f2 | 50 | ADDR_SPACE_FLASH, |
51 | ADDR_SPACE_FLASH1, | |
52 | ADDR_SPACE_FLASH2, | |
53 | ADDR_SPACE_FLASH3, | |
54 | ADDR_SPACE_FLASH4, | |
55 | ADDR_SPACE_FLASH5, | |
0558f5da | 56 | ADDR_SPACE_MEMX, |
57 | /* Sentinel */ | |
58 | ADDR_SPACE_COUNT | |
9d734fa8 | 59 | }; |
60 | ||
00abffbf | 61 | #define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile) |
b2afd900 | 62 | |
02bfce13 | 63 | #define AVR_SHORT_CALLS (TARGET_SHORT_CALLS \ |
64 | && avr_arch == &avr_arch_types[ARCH_AVRXMEGA3]) | |
65 | #define AVR_HAVE_JMP_CALL (avr_arch->have_jmp_call && ! AVR_SHORT_CALLS) | |
f0aa7fe2 | 66 | #define AVR_HAVE_MUL (avr_arch->have_mul) |
67 | #define AVR_HAVE_MOVW (avr_arch->have_movw_lpmx) | |
b4e6d2e2 | 68 | #define AVR_HAVE_LPM (!AVR_TINY) |
f0aa7fe2 | 69 | #define AVR_HAVE_LPMX (avr_arch->have_movw_lpmx) |
70 | #define AVR_HAVE_ELPM (avr_arch->have_elpm) | |
71 | #define AVR_HAVE_ELPMX (avr_arch->have_elpmx) | |
72 | #define AVR_HAVE_RAMPD (avr_arch->have_rampd) | |
73 | #define AVR_HAVE_RAMPX (avr_arch->have_rampd) | |
74 | #define AVR_HAVE_RAMPY (avr_arch->have_rampd) | |
75 | #define AVR_HAVE_RAMPZ (avr_arch->have_elpm \ | |
76 | || avr_arch->have_rampd) | |
77 | #define AVR_HAVE_EIJMP_EICALL (avr_arch->have_eijmp_eicall) | |
d32d7e3a | 78 | |
79 | /* Handling of 8-bit SP versus 16-bit SP is as follows: | |
80 | ||
c0d7a1d0 | 81 | FIXME: DRIVER_SELF_SPECS has changed. |
d32d7e3a | 82 | -msp8 is used internally to select the right multilib for targets with |
83 | 8-bit SP. -msp8 is set automatically by DRIVER_SELF_SPECS for devices | |
84 | with 8-bit SP or by multilib generation machinery. If a frame pointer is | |
85 | needed and SP is only 8 bits wide, SP is zero-extended to get FP. | |
86 | ||
87 | TARGET_TINY_STACK is triggered by -mtiny-stack which is a user option. | |
88 | This option has no effect on multilib selection. It serves to save some | |
89 | bytes on 16-bit SP devices by only changing SP_L and leaving SP_H alone. | |
90 | ||
91 | These two properties are reflected by built-in macros __AVR_SP8__ resp. | |
92 | __AVR_HAVE_8BIT_SP__ and __AVR_HAVE_16BIT_SP__. During multilib generation | |
93 | there is always __AVR_SP8__ == __AVR_HAVE_8BIT_SP__. */ | |
94 | ||
f0aa7fe2 | 95 | #define AVR_HAVE_8BIT_SP \ |
96 | (TARGET_TINY_STACK || avr_sp8) | |
d32d7e3a | 97 | |
98 | #define AVR_HAVE_SPH (!avr_sp8) | |
a28e4651 | 99 | |
90ef7269 | 100 | #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL) |
101 | #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL) | |
df3d6232 | 102 | |
f0aa7fe2 | 103 | #define AVR_XMEGA (avr_arch->xmega_p) |
104 | #define AVR_TINY (avr_arch->tiny_p) | |
0b6cf66f | 105 | |
a28e4651 | 106 | #define BITS_BIG_ENDIAN 0 |
a28e4651 | 107 | #define BYTES_BIG_ENDIAN 0 |
a28e4651 | 108 | #define WORDS_BIG_ENDIAN 0 |
109 | ||
a7690ba9 | 110 | #ifdef IN_LIBGCC2 |
111 | /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */ | |
112 | #define UNITS_PER_WORD 4 | |
113 | #else | |
674a8f0b | 114 | /* Width of a word, in units (bytes). */ |
a28e4651 | 115 | #define UNITS_PER_WORD 1 |
a7690ba9 | 116 | #endif |
a28e4651 | 117 | |
a28e4651 | 118 | #define POINTER_SIZE 16 |
119 | ||
120 | ||
121 | /* Maximum sized of reasonable data type | |
122 | DImode or Dfmode ... */ | |
123 | #define MAX_FIXED_MODE_SIZE 32 | |
124 | ||
a28e4651 | 125 | #define PARM_BOUNDARY 8 |
126 | ||
a28e4651 | 127 | #define FUNCTION_BOUNDARY 8 |
128 | ||
a28e4651 | 129 | #define EMPTY_FIELD_BOUNDARY 8 |
130 | ||
674a8f0b | 131 | /* No data type wants to be aligned rounder than this. */ |
a28e4651 | 132 | #define BIGGEST_ALIGNMENT 8 |
133 | ||
f89fa443 | 134 | #define TARGET_VTABLE_ENTRY_ALIGN 8 |
a28e4651 | 135 | |
a28e4651 | 136 | #define STRICT_ALIGNMENT 0 |
137 | ||
a28e4651 | 138 | #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16) |
a28e4651 | 139 | #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16) |
a28e4651 | 140 | #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32) |
25715f21 | 141 | #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64) |
a28e4651 | 142 | #define FLOAT_TYPE_SIZE 32 |
a28e4651 | 143 | #define DOUBLE_TYPE_SIZE 32 |
a28e4651 | 144 | #define LONG_DOUBLE_TYPE_SIZE 32 |
017c5b98 | 145 | #define LONG_LONG_ACCUM_TYPE_SIZE 64 |
a28e4651 | 146 | |
147 | #define DEFAULT_SIGNED_CHAR 1 | |
a28e4651 | 148 | |
149 | #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int") | |
37ac04dc | 150 | #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int") |
a28e4651 | 151 | |
152 | #define WCHAR_TYPE_SIZE 16 | |
a28e4651 | 153 | |
154 | #define FIRST_PSEUDO_REGISTER 36 | |
a28e4651 | 155 | |
9f42c829 | 156 | #define FIXED_REGISTERS {\ |
157 | 1,1,/* r0 r1 */\ | |
158 | 0,0,/* r2 r3 */\ | |
159 | 0,0,/* r4 r5 */\ | |
160 | 0,0,/* r6 r7 */\ | |
161 | 0,0,/* r8 r9 */\ | |
162 | 0,0,/* r10 r11 */\ | |
163 | 0,0,/* r12 r13 */\ | |
164 | 0,0,/* r14 r15 */\ | |
165 | 0,0,/* r16 r17 */\ | |
166 | 0,0,/* r18 r19 */\ | |
167 | 0,0,/* r20 r21 */\ | |
168 | 0,0,/* r22 r23 */\ | |
169 | 0,0,/* r24 r25 */\ | |
170 | 0,0,/* r26 r27 */\ | |
171 | 0,0,/* r28 r29 */\ | |
172 | 0,0,/* r30 r31 */\ | |
173 | 1,1,/* STACK */\ | |
174 | 1,1 /* arg pointer */ } | |
a28e4651 | 175 | |
176 | #define CALL_USED_REGISTERS { \ | |
177 | 1,1,/* r0 r1 */ \ | |
9f42c829 | 178 | 0,0,/* r2 r3 */ \ |
179 | 0,0,/* r4 r5 */ \ | |
180 | 0,0,/* r6 r7 */ \ | |
181 | 0,0,/* r8 r9 */ \ | |
182 | 0,0,/* r10 r11 */ \ | |
183 | 0,0,/* r12 r13 */ \ | |
184 | 0,0,/* r14 r15 */ \ | |
185 | 0,0,/* r16 r17 */ \ | |
186 | 1,1,/* r18 r19 */ \ | |
187 | 1,1,/* r20 r21 */ \ | |
188 | 1,1,/* r22 r23 */ \ | |
189 | 1,1,/* r24 r25 */ \ | |
190 | 1,1,/* r26 r27 */ \ | |
191 | 0,0,/* r28 r29 */ \ | |
192 | 1,1,/* r30 r31 */ \ | |
193 | 1,1,/* STACK */ \ | |
194 | 1,1 /* arg pointer */ } | |
a28e4651 | 195 | |
a28e4651 | 196 | #define REG_ALLOC_ORDER { \ |
197 | 24,25, \ | |
198 | 18,19, \ | |
199 | 20,21, \ | |
200 | 22,23, \ | |
201 | 30,31, \ | |
202 | 26,27, \ | |
203 | 28,29, \ | |
204 | 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \ | |
205 | 0,1, \ | |
206 | 32,33,34,35 \ | |
207 | } | |
a28e4651 | 208 | |
0dff9558 | 209 | #define ADJUST_REG_ALLOC_ORDER avr_adjust_reg_alloc_order() |
a28e4651 | 210 | |
211 | ||
0dff9558 | 212 | #define HARD_REGNO_NREGS(REGNO, MODE) \ |
213 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
a28e4651 | 214 | |
a7690ba9 | 215 | #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE) |
a28e4651 | 216 | |
2e53aef5 | 217 | #define MODES_TIEABLE_P(MODE1, MODE2) 1 |
a28e4651 | 218 | |
219 | enum reg_class { | |
220 | NO_REGS, | |
221 | R0_REG, /* r0 */ | |
222 | POINTER_X_REGS, /* r26 - r27 */ | |
223 | POINTER_Y_REGS, /* r28 - r29 */ | |
224 | POINTER_Z_REGS, /* r30 - r31 */ | |
225 | STACK_REG, /* STACK */ | |
226 | BASE_POINTER_REGS, /* r28 - r31 */ | |
227 | POINTER_REGS, /* r26 - r31 */ | |
228 | ADDW_REGS, /* r24 - r31 */ | |
229 | SIMPLE_LD_REGS, /* r16 - r23 */ | |
230 | LD_REGS, /* r16 - r31 */ | |
231 | NO_LD_REGS, /* r0 - r15 */ | |
232 | GENERAL_REGS, /* r0 - r31 */ | |
233 | ALL_REGS, LIM_REG_CLASSES | |
234 | }; | |
a28e4651 | 235 | |
236 | ||
237 | #define N_REG_CLASSES (int)LIM_REG_CLASSES | |
a28e4651 | 238 | |
239 | #define REG_CLASS_NAMES { \ | |
240 | "NO_REGS", \ | |
241 | "R0_REG", /* r0 */ \ | |
242 | "POINTER_X_REGS", /* r26 - r27 */ \ | |
243 | "POINTER_Y_REGS", /* r28 - r29 */ \ | |
244 | "POINTER_Z_REGS", /* r30 - r31 */ \ | |
245 | "STACK_REG", /* STACK */ \ | |
246 | "BASE_POINTER_REGS", /* r28 - r31 */ \ | |
247 | "POINTER_REGS", /* r26 - r31 */ \ | |
248 | "ADDW_REGS", /* r24 - r31 */ \ | |
249 | "SIMPLE_LD_REGS", /* r16 - r23 */ \ | |
250 | "LD_REGS", /* r16 - r31 */ \ | |
251 | "NO_LD_REGS", /* r0 - r15 */ \ | |
252 | "GENERAL_REGS", /* r0 - r31 */ \ | |
253 | "ALL_REGS" } | |
a28e4651 | 254 | |
a28e4651 | 255 | #define REG_CLASS_CONTENTS { \ |
256 | {0x00000000,0x00000000}, /* NO_REGS */ \ | |
257 | {0x00000001,0x00000000}, /* R0_REG */ \ | |
a80fc64d | 258 | {3u << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \ |
259 | {3u << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \ | |
260 | {3u << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \ | |
a28e4651 | 261 | {0x00000000,0x00000003}, /* STACK_REG, STACK */ \ |
a80fc64d | 262 | {(3u << REG_Y) | (3u << REG_Z), \ |
9f42c829 | 263 | 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \ |
a80fc64d | 264 | {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z), \ |
9f42c829 | 265 | 0x00000000}, /* POINTER_REGS, r26 - r31 */ \ |
a80fc64d | 266 | {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z) | (3u << REG_W), \ |
a28e4651 | 267 | 0x00000000}, /* ADDW_REGS, r24 - r31 */ \ |
06b9f7dc | 268 | {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \ |
a80fc64d | 269 | {(3u << REG_X)|(3u << REG_Y)|(3u << REG_Z)|(3u << REG_W)|(0xffu << 16),\ |
9f42c829 | 270 | 0x00000000}, /* LD_REGS, r16 - r31 */ \ |
06b9f7dc | 271 | {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \ |
9f42c829 | 272 | {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \ |
273 | {0xffffffff,0x00000003} /* ALL_REGS */ \ | |
a28e4651 | 274 | } |
a28e4651 | 275 | |
276 | #define REGNO_REG_CLASS(R) avr_regno_reg_class(R) | |
a28e4651 | 277 | |
f8a8fc7b | 278 | #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code) \ |
279 | avr_mode_code_base_reg_class (mode, as, outer_code, index_code) | |
a28e4651 | 280 | |
281 | #define INDEX_REG_CLASS NO_REGS | |
a28e4651 | 282 | |
f8a8fc7b | 283 | #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \ |
284 | avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code) | |
a28e4651 | 285 | |
286 | #define REGNO_OK_FOR_INDEX_P(NUM) 0 | |
a28e4651 | 287 | |
ed5527ca | 288 | #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true |
a28e4651 | 289 | |
a28e4651 | 290 | #define STACK_PUSH_CODE POST_DEC |
291 | ||
2b785411 | 292 | #define STACK_GROWS_DOWNWARD 1 |
a28e4651 | 293 | |
a12b9b80 | 294 | #define STARTING_FRAME_OFFSET avr_starting_frame_offset() |
a28e4651 | 295 | |
296 | #define STACK_POINTER_OFFSET 1 | |
a28e4651 | 297 | |
298 | #define FIRST_PARM_OFFSET(FUNDECL) 0 | |
a28e4651 | 299 | |
300 | #define STACK_BOUNDARY 8 | |
a28e4651 | 301 | |
302 | #define STACK_POINTER_REGNUM 32 | |
a28e4651 | 303 | |
9f42c829 | 304 | #define FRAME_POINTER_REGNUM REG_Y |
a28e4651 | 305 | |
306 | #define ARG_POINTER_REGNUM 34 | |
a28e4651 | 307 | |
b4e6d2e2 | 308 | #define STATIC_CHAIN_REGNUM ((AVR_TINY) ? 18 :2) |
a28e4651 | 309 | |
a28e4651 | 310 | #define ELIMINABLE_REGS { \ |
1a96adb9 | 311 | { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ |
312 | { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \ | |
313 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ | |
314 | { FRAME_POINTER_REGNUM + 1, STACK_POINTER_REGNUM + 1 } } | |
a28e4651 | 315 | |
9f42c829 | 316 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ |
ebdd0478 | 317 | OFFSET = avr_initial_elimination_offset (FROM, TO) |
a28e4651 | 318 | |
34413b10 | 319 | #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem) |
1cb39658 | 320 | |
6ce48f50 | 321 | /* Don't use Push rounding. expr.c: emit_single_push_insn is broken |
322 | for POST_DEC targets (PR27386). */ | |
323 | /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/ | |
a28e4651 | 324 | |
0dff9558 | 325 | typedef struct avr_args |
326 | { | |
327 | /* # Registers available for passing */ | |
328 | int nregs; | |
329 | ||
330 | /* Next available register number */ | |
331 | int regno; | |
a28e4651 | 332 | } CUMULATIVE_ARGS; |
a28e4651 | 333 | |
30c70355 | 334 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ |
0dff9558 | 335 | avr_init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL) |
a28e4651 | 336 | |
0dff9558 | 337 | #define FUNCTION_ARG_REGNO_P(r) avr_function_arg_regno_p(r) |
a28e4651 | 338 | |
a28e4651 | 339 | #define DEFAULT_PCC_STRUCT_RETURN 0 |
a28e4651 | 340 | |
df3d6232 | 341 | #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO) |
a28e4651 | 342 | |
343 | #define HAVE_POST_INCREMENT 1 | |
a28e4651 | 344 | #define HAVE_PRE_DECREMENT 1 |
a28e4651 | 345 | |
a28e4651 | 346 | #define MAX_REGS_PER_ADDRESS 1 |
a28e4651 | 347 | |
68a79dfc | 348 | #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \ |
349 | do { \ | |
1f46ee39 | 350 | rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \ |
68a79dfc | 351 | ADDR_TYPE (TYPE), \ |
352 | IND_L, make_memloc); \ | |
353 | if (new_x) \ | |
354 | { \ | |
355 | X = new_x; \ | |
356 | goto WIN; \ | |
357 | } \ | |
358 | } while (0) | |
06b9f7dc | 359 | |
94cd1cd4 | 360 | /* We increase branch costs after reload in order to keep basic-block |
361 | reordering from introducing out-of-line jumps and to prefer fall-through | |
362 | edges instead. The default branch costs are 0, mainly because otherwise | |
363 | do_store_flag might come up with bloated code. */ | |
364 | #define BRANCH_COST(speed_p, predictable_p) \ | |
365 | (avr_branch_cost + (reload_completed ? 4 : 0)) | |
6e888188 | 366 | |
a28e4651 | 367 | #define SLOW_BYTE_ACCESS 0 |
a28e4651 | 368 | |
93516111 | 369 | #define NO_FUNCTION_CSE 1 |
a28e4651 | 370 | |
4202ef11 | 371 | #define REGISTER_TARGET_PRAGMAS() \ |
372 | do { \ | |
373 | avr_register_target_pragmas(); \ | |
374 | } while (0) | |
375 | ||
3080379f | 376 | #define TEXT_SECTION_ASM_OP "\t.text" |
a28e4651 | 377 | |
3080379f | 378 | #define DATA_SECTION_ASM_OP "\t.data" |
a28e4651 | 379 | |
68e7ca0a | 380 | #define BSS_SECTION_ASM_OP "\t.section .bss" |
68e7ca0a | 381 | |
9aa7484c | 382 | /* Define the pseudo-ops used to switch to the .ctors and .dtors sections. |
383 | There are no shared libraries on this target, and these sections are | |
384 | placed in the read-only program memory, so they are not writable. */ | |
385 | ||
386 | #undef CTORS_SECTION_ASM_OP | |
387 | #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits" | |
388 | ||
389 | #undef DTORS_SECTION_ASM_OP | |
390 | #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits" | |
391 | ||
392 | #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor | |
9aa7484c | 393 | |
394 | #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor | |
9aa7484c | 395 | |
393d07b1 | 396 | #define SUPPORTS_INIT_PRIORITY 0 |
397 | ||
97032951 | 398 | /* We pretend jump tables are in text section because otherwise, |
399 | final.c will switch to .rodata before jump tables and thereby | |
400 | triggers __do_copy_data. As we implement ASM_OUTPUT_ADDR_VEC, | |
401 | we still have full control over the jump tables themselves. */ | |
365ba13d | 402 | #define JUMP_TABLES_IN_TEXT_SECTION 1 |
a28e4651 | 403 | |
a28e4651 | 404 | #define ASM_COMMENT_START " ; " |
a28e4651 | 405 | |
406 | #define ASM_APP_ON "/* #APP */\n" | |
a28e4651 | 407 | |
408 | #define ASM_APP_OFF "/* #NOAPP */\n" | |
a28e4651 | 409 | |
0cb73417 | 410 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$')) |
a28e4651 | 411 | |
7c2339f8 | 412 | #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \ |
413 | avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false) | |
a28e4651 | 414 | |
b47778c4 | 415 | #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ |
c0d7a1d0 | 416 | avr_asm_asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN, \ |
417 | asm_output_aligned_bss) | |
68e7ca0a | 418 | |
7c2339f8 | 419 | #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \ |
420 | avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true) | |
a28e4651 | 421 | |
0036ad94 | 422 | /* Globalizing directive for a label. */ |
423 | #define GLOBAL_ASM_OP ".global\t" | |
a28e4651 | 424 | |
e511e253 | 425 | #define SUPPORTS_WEAK 1 |
a28e4651 | 426 | |
a28e4651 | 427 | #define HAS_INIT_SECTION 1 |
a28e4651 | 428 | |
429 | #define REGISTER_NAMES { \ | |
430 | "r0","r1","r2","r3","r4","r5","r6","r7", \ | |
431 | "r8","r9","r10","r11","r12","r13","r14","r15", \ | |
432 | "r16","r17","r18","r19","r20","r21","r22","r23", \ | |
433 | "r24","r25","r26","r27","r28","r29","r30","r31", \ | |
9f42c829 | 434 | "__SP_L__","__SP_H__","argL","argH"} |
a28e4651 | 435 | |
0dff9558 | 436 | #define FINAL_PRESCAN_INSN(insn, operand, nop) \ |
437 | avr_final_prescan_insn (insn, operand,nop) | |
a28e4651 | 438 | |
a28e4651 | 439 | #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \ |
440 | { \ | |
8ef66241 | 441 | gcc_assert (REGNO < 32); \ |
a28e4651 | 442 | fprintf (STREAM, "\tpush\tr%d", REGNO); \ |
443 | } | |
a28e4651 | 444 | |
445 | #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \ | |
446 | { \ | |
8ef66241 | 447 | gcc_assert (REGNO < 32); \ |
a28e4651 | 448 | fprintf (STREAM, "\tpop\tr%d", REGNO); \ |
449 | } | |
a28e4651 | 450 | |
97032951 | 451 | #define ASM_OUTPUT_ADDR_VEC(TLABEL, TDATA) \ |
452 | avr_output_addr_vec (TLABEL, TDATA) | |
a28e4651 | 453 | |
7ce72b61 | 454 | #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ |
455 | do { \ | |
456 | if ((POWER) > 0) \ | |
457 | fprintf (STREAM, "\t.p2align\t%d\n", POWER); \ | |
9384357b | 458 | } while (0) |
a28e4651 | 459 | |
460 | #define CASE_VECTOR_MODE HImode | |
a28e4651 | 461 | |
a28e4651 | 462 | #undef WORD_REGISTER_OPERATIONS |
a28e4651 | 463 | |
a24f50c5 | 464 | /* Can move only a single byte from memory to reg in a |
465 | single instruction. */ | |
466 | ||
467 | #define MOVE_MAX 1 | |
468 | ||
469 | /* Allow upto two bytes moves to occur using by_pieces | |
470 | infrastructure */ | |
471 | ||
472 | #define MOVE_MAX_PIECES 2 | |
473 | ||
474 | /* Set MOVE_RATIO to 3 to allow memory moves upto 4 bytes to happen | |
475 | by pieces when optimizing for speed, like it did when MOVE_MAX_PIECES | |
476 | was 4. When optimizing for size, allow memory moves upto 2 bytes. | |
477 | Also see avr_use_by_pieces_infrastructure_p. */ | |
478 | ||
479 | #define MOVE_RATIO(speed) ((speed) ? 3 : 2) | |
a28e4651 | 480 | |
481 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
a28e4651 | 482 | |
483 | #define Pmode HImode | |
a28e4651 | 484 | |
485 | #define FUNCTION_MODE HImode | |
d41dc6f8 | 486 | |
a28e4651 | 487 | #define DOLLARS_IN_IDENTIFIERS 0 |
a28e4651 | 488 | |
a28e4651 | 489 | #define TRAMPOLINE_SIZE 4 |
490 | ||
a28e4651 | 491 | /* Store in cc_status the expressions |
492 | that the condition codes will describe | |
493 | after execution of an instruction whose pattern is EXP. | |
494 | Do not alter them if the instruction would not alter the cc's. */ | |
495 | ||
0dff9558 | 496 | #define NOTICE_UPDATE_CC(EXP, INSN) avr_notice_update_cc (EXP, INSN) |
a28e4651 | 497 | |
498 | /* The add insns don't set overflow in a usable way. */ | |
499 | #define CC_OVERFLOW_UNUSABLE 01000 | |
500 | /* The mov,and,or,xor insns don't set carry. That's ok though as the | |
501 | Z bit is all we need when doing unsigned comparisons on the result of | |
502 | these insns (since they're always with 0). However, conditions.h has | |
503 | CC_NO_OVERFLOW defined for this purpose. Rename it to something more | |
504 | understandable. */ | |
505 | #define CC_NO_CARRY CC_NO_OVERFLOW | |
506 | ||
507 | ||
508 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
509 | for profiling a function entry. */ | |
510 | ||
511 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
512 | fprintf (FILE, "/* profiler %d */", (LABELNO)) | |
513 | ||
0dff9558 | 514 | #define ADJUST_INSN_LENGTH(INSN, LENGTH) \ |
515 | (LENGTH = avr_adjust_insn_length (INSN, LENGTH)) | |
a28e4651 | 516 | |
f0aa7fe2 | 517 | extern const char *avr_devicespecs_file (int, const char**); |
c284a148 | 518 | |
f0aa7fe2 | 519 | #define EXTRA_SPEC_FUNCTIONS \ |
520 | { "device-specs-file", avr_devicespecs_file }, | |
0eac737b | 521 | |
f0aa7fe2 | 522 | /* Driver self specs has lmited functionality w.r.t. '%s' for dynamic specs. |
523 | Apply '%s' to a static string to inflate the file (directory) name which | |
524 | is used to diagnose problems with reading the specs file. */ | |
9aa7484c | 525 | |
f0aa7fe2 | 526 | #undef DRIVER_SELF_SPECS |
527 | #define DRIVER_SELF_SPECS \ | |
528 | " %:device-specs-file(device-specs%s %{mmcu=*:%*})" | |
a28e4651 | 529 | |
f0aa7fe2 | 530 | /* No libstdc++ for now. Empty string doesn't work. */ |
531 | #define LIBSTDCXX "gcc" | |
a28e4651 | 532 | |
f0aa7fe2 | 533 | /* This is the default without any -mmcu=* option. */ |
534 | #define MULTILIB_DEFAULTS { "mmcu=" AVR_MMCU_DEFAULT } | |
e511e253 | 535 | |
a28e4651 | 536 | #define TEST_HARD_REG_CLASS(CLASS, REGNO) \ |
537 | TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO) | |
538 | ||
a28e4651 | 539 | #define CR_TAB "\n\t" |
540 | ||
cc48d302 | 541 | #define DWARF2_ADDR_SIZE 4 |
542 | ||
e484266f | 543 | #define INCOMING_RETURN_ADDR_RTX avr_incoming_return_addr_rtx () |
544 | #define INCOMING_FRAME_SP_OFFSET (AVR_3_BYTE_PC ? 3 : 2) | |
545 | ||
546 | /* The caller's stack pointer value immediately before the call | |
547 | is one byte below the first argument. */ | |
548 | #define ARG_POINTER_CFA_OFFSET(FNDECL) -1 | |
549 | ||
afe7695c | 550 | #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ |
551 | avr_hard_regno_rename_ok (OLD_REG, NEW_REG) | |
552 | ||
df3d6232 | 553 | /* A C structure for machine-specific, per-function data. |
554 | This is added to the cfun structure. */ | |
fb1e4f4a | 555 | struct GTY(()) machine_function |
df3d6232 | 556 | { |
df3d6232 | 557 | /* 'true' - if current function is a naked function. */ |
558 | int is_naked; | |
559 | ||
560 | /* 'true' - if current function is an interrupt function | |
561 | as specified by the "interrupt" attribute. */ | |
562 | int is_interrupt; | |
563 | ||
564 | /* 'true' - if current function is a signal function | |
565 | as specified by the "signal" attribute. */ | |
566 | int is_signal; | |
ba8273a8 | 567 | |
a6e595be | 568 | /* 'true' - if current function is a 'task' function |
ba8273a8 | 569 | as specified by the "OS_task" attribute. */ |
570 | int is_OS_task; | |
a6e595be | 571 | |
572 | /* 'true' - if current function is a 'main' function | |
573 | as specified by the "OS_main" attribute. */ | |
574 | int is_OS_main; | |
34413b10 | 575 | |
576 | /* Current function stack size. */ | |
577 | int stack_usage; | |
32969c63 | 578 | |
579 | /* 'true' if a callee might be tail called */ | |
580 | int sibcall_fails; | |
ea679361 | 581 | |
582 | /* 'true' if the above is_foo predicates are sanity-checked to avoid | |
583 | multiple diagnose for the same function. */ | |
584 | int attributes_checked_p; | |
056f86e8 | 585 | |
586 | /* 'true' - if current function shall not use '__gcc_isr' pseudo | |
587 | instructions as specified by the "no_gccisr" attribute. */ | |
588 | int is_no_gccisr; | |
589 | ||
590 | /* Used for `__gcc_isr' pseudo instruction handling of | |
591 | non-naked ISR prologue / epilogue(s). */ | |
592 | struct | |
593 | { | |
594 | /* 'true' if this function actually uses "*gasisr" insns. */ | |
595 | int yes; | |
596 | /* 'true' if this function is allowed to use "*gasisr" insns. */ | |
597 | int maybe; | |
598 | /* The register numer as printed by the Done chunk. */ | |
599 | int regno; | |
600 | } gasisr; | |
601 | ||
602 | /* 'true' if this function references .L__stack_usage like with | |
603 | __builtin_return_address. */ | |
604 | int use_L__stack_usage; | |
df3d6232 | 605 | }; |
22d4c405 | 606 | |
9d75589a | 607 | /* AVR does not round pushes, but the existence of this macro is |
22d4c405 | 608 | required in order for pushes to be generated. */ |
609 | #define PUSH_ROUNDING(X) (X) | |
a12b9b80 | 610 | |
184a25cd | 611 | /* Define prototype here to avoid build warning. Some files using |
612 | ACCUMULATE_OUTGOING_ARGS (directly or indirectly) include | |
613 | tm.h but not tm_p.h. */ | |
c529cd37 | 614 | extern int avr_accumulate_outgoing_args (void); |
a12b9b80 | 615 | #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args() |
5bd39e93 | 616 | |
617 | #define INIT_EXPANDERS avr_init_expanders() | |
c0d7a1d0 | 618 | |
619 | /* Flags used for io and address attributes. */ | |
620 | #define SYMBOL_FLAG_IO_LOW (SYMBOL_FLAG_MACH_DEP << 4) | |
621 | #define SYMBOL_FLAG_IO (SYMBOL_FLAG_MACH_DEP << 5) | |
622 | #define SYMBOL_FLAG_ADDRESS (SYMBOL_FLAG_MACH_DEP << 6) |