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90e7678c DC |
1 | /* Definitions of target machine for GNU compiler, |
2 | for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers. | |
aeee4812 | 3 | Copyright (C) 1998-2023 Free Software Foundation, Inc. |
92bffc14 | 4 | Contributed by Denis Chertykov (chertykov@gmail.com) |
90e7678c | 5 | |
7ec022b2 | 6 | This file is part of GCC. |
90e7678c | 7 | |
7ec022b2 | 8 | GCC is free software; you can redistribute it and/or modify |
90e7678c | 9 | it under the terms of the GNU General Public License as published by |
2f83c7d6 | 10 | the Free Software Foundation; either version 3, or (at your option) |
90e7678c DC |
11 | any later version. |
12 | ||
7ec022b2 | 13 | GCC is distributed in the hope that it will be useful, |
90e7678c DC |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
19 | along with GCC; see the file COPYING3. If not see |
20 | <http://www.gnu.org/licenses/>. */ | |
90e7678c | 21 | |
562f552b GJL |
22 | typedef struct |
23 | { | |
24 | /* Id of the address space as used in c_register_addr_space */ | |
25 | unsigned char id; | |
26 | ||
27 | /* Flavour of memory: 0 = RAM, 1 = Flash */ | |
28 | int memory_class; | |
29 | ||
30 | /* Width of pointer (in bytes) */ | |
31 | int pointer_size; | |
32 | ||
33 | /* Name of the address space as visible to the user */ | |
34 | const char *name; | |
35 | ||
36 | /* Segment (i.e. 64k memory chunk) number. */ | |
37 | int segment; | |
e5669488 GJL |
38 | |
39 | /* Section prefix, e.g. ".progmem1.data" */ | |
40 | const char *section_name; | |
562f552b GJL |
41 | } avr_addrspace_t; |
42 | ||
43 | extern const avr_addrspace_t avr_addrspace[]; | |
44 | ||
45 | /* Known address spaces */ | |
46 | ||
47 | enum | |
48 | { | |
e5669488 | 49 | ADDR_SPACE_RAM, /* ADDR_SPACE_GENERIC */ |
3a840863 GJL |
50 | ADDR_SPACE_FLASH, |
51 | ADDR_SPACE_FLASH1, | |
52 | ADDR_SPACE_FLASH2, | |
53 | ADDR_SPACE_FLASH3, | |
54 | ADDR_SPACE_FLASH4, | |
55 | ADDR_SPACE_FLASH5, | |
e5669488 GJL |
56 | ADDR_SPACE_MEMX, |
57 | /* Sentinel */ | |
58 | ADDR_SPACE_COUNT | |
562f552b GJL |
59 | }; |
60 | ||
97c281da | 61 | #define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile) |
470a4c97 | 62 | |
3266ddb3 GJL |
63 | #define AVR_SHORT_CALLS (TARGET_SHORT_CALLS \ |
64 | && avr_arch == &avr_arch_types[ARCH_AVRXMEGA3]) | |
65 | #define AVR_HAVE_JMP_CALL (avr_arch->have_jmp_call && ! AVR_SHORT_CALLS) | |
4a2caf6c GJL |
66 | #define AVR_HAVE_MUL (avr_arch->have_mul) |
67 | #define AVR_HAVE_MOVW (avr_arch->have_movw_lpmx) | |
c1dd9790 | 68 | #define AVR_HAVE_LPM (!AVR_TINY) |
4a2caf6c GJL |
69 | #define AVR_HAVE_LPMX (avr_arch->have_movw_lpmx) |
70 | #define AVR_HAVE_ELPM (avr_arch->have_elpm) | |
71 | #define AVR_HAVE_ELPMX (avr_arch->have_elpmx) | |
72 | #define AVR_HAVE_RAMPD (avr_arch->have_rampd) | |
73 | #define AVR_HAVE_RAMPX (avr_arch->have_rampd) | |
74 | #define AVR_HAVE_RAMPY (avr_arch->have_rampd) | |
75 | #define AVR_HAVE_RAMPZ (avr_arch->have_elpm \ | |
76 | || avr_arch->have_rampd) | |
77 | #define AVR_HAVE_EIJMP_EICALL (avr_arch->have_eijmp_eicall) | |
7fd6378e GJL |
78 | |
79 | /* Handling of 8-bit SP versus 16-bit SP is as follows: | |
80 | ||
f9d29866 | 81 | FIXME: DRIVER_SELF_SPECS has changed. |
7fd6378e GJL |
82 | -msp8 is used internally to select the right multilib for targets with |
83 | 8-bit SP. -msp8 is set automatically by DRIVER_SELF_SPECS for devices | |
84 | with 8-bit SP or by multilib generation machinery. If a frame pointer is | |
85 | needed and SP is only 8 bits wide, SP is zero-extended to get FP. | |
86 | ||
87 | TARGET_TINY_STACK is triggered by -mtiny-stack which is a user option. | |
88 | This option has no effect on multilib selection. It serves to save some | |
89 | bytes on 16-bit SP devices by only changing SP_L and leaving SP_H alone. | |
90 | ||
91 | These two properties are reflected by built-in macros __AVR_SP8__ resp. | |
92 | __AVR_HAVE_8BIT_SP__ and __AVR_HAVE_16BIT_SP__. During multilib generation | |
93 | there is always __AVR_SP8__ == __AVR_HAVE_8BIT_SP__. */ | |
94 | ||
4a2caf6c GJL |
95 | #define AVR_HAVE_8BIT_SP \ |
96 | (TARGET_TINY_STACK || avr_sp8) | |
7fd6378e GJL |
97 | |
98 | #define AVR_HAVE_SPH (!avr_sp8) | |
90e7678c | 99 | |
693092fb BH |
100 | #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL) |
101 | #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL) | |
4fc2b4ff | 102 | |
4a2caf6c GJL |
103 | #define AVR_XMEGA (avr_arch->xmega_p) |
104 | #define AVR_TINY (avr_arch->tiny_p) | |
2da8c1ad | 105 | |
90e7678c | 106 | #define BITS_BIG_ENDIAN 0 |
90e7678c | 107 | #define BYTES_BIG_ENDIAN 0 |
90e7678c DC |
108 | #define WORDS_BIG_ENDIAN 0 |
109 | ||
f30dd607 GJL |
110 | #define FLOAT_LIB_COMPARE_RETURNS_BOOL(mode, comparison) \ |
111 | avr_float_lib_compare_returns_bool (mode, comparison) | |
112 | ||
78cf8279 MM |
113 | #ifdef IN_LIBGCC2 |
114 | /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */ | |
115 | #define UNITS_PER_WORD 4 | |
116 | #else | |
d6b4baa4 | 117 | /* Width of a word, in units (bytes). */ |
90e7678c | 118 | #define UNITS_PER_WORD 1 |
78cf8279 | 119 | #endif |
90e7678c | 120 | |
90e7678c DC |
121 | #define POINTER_SIZE 16 |
122 | ||
123 | ||
124 | /* Maximum sized of reasonable data type | |
125 | DImode or Dfmode ... */ | |
126 | #define MAX_FIXED_MODE_SIZE 32 | |
127 | ||
90e7678c DC |
128 | #define PARM_BOUNDARY 8 |
129 | ||
90e7678c DC |
130 | #define FUNCTION_BOUNDARY 8 |
131 | ||
90e7678c DC |
132 | #define EMPTY_FIELD_BOUNDARY 8 |
133 | ||
d6b4baa4 | 134 | /* No data type wants to be aligned rounder than this. */ |
90e7678c DC |
135 | #define BIGGEST_ALIGNMENT 8 |
136 | ||
93976860 | 137 | #define TARGET_VTABLE_ENTRY_ALIGN 8 |
90e7678c | 138 | |
90e7678c DC |
139 | #define STRICT_ALIGNMENT 0 |
140 | ||
90e7678c | 141 | #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16) |
90e7678c | 142 | #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16) |
90e7678c | 143 | #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32) |
11338cda | 144 | #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64) |
90e7678c | 145 | #define FLOAT_TYPE_SIZE 32 |
29f3def3 GJL |
146 | #define DOUBLE_TYPE_SIZE (avr_double) |
147 | #define LONG_DOUBLE_TYPE_SIZE (avr_long_double) | |
148 | ||
e55e4056 | 149 | #define LONG_LONG_ACCUM_TYPE_SIZE 64 |
90e7678c DC |
150 | |
151 | #define DEFAULT_SIGNED_CHAR 1 | |
90e7678c DC |
152 | |
153 | #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int") | |
5fecfd8d | 154 | #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int") |
90e7678c DC |
155 | |
156 | #define WCHAR_TYPE_SIZE 16 | |
90e7678c | 157 | |
3ba781d3 | 158 | #define FIRST_PSEUDO_REGISTER 37 |
90e7678c | 159 | |
3924c9be GJL |
160 | #define GENERAL_REGNO_P(N) IN_RANGE (N, 2, 31) |
161 | #define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X))) | |
162 | ||
cfbaed3b DC |
163 | #define FIXED_REGISTERS {\ |
164 | 1,1,/* r0 r1 */\ | |
165 | 0,0,/* r2 r3 */\ | |
166 | 0,0,/* r4 r5 */\ | |
167 | 0,0,/* r6 r7 */\ | |
168 | 0,0,/* r8 r9 */\ | |
169 | 0,0,/* r10 r11 */\ | |
170 | 0,0,/* r12 r13 */\ | |
171 | 0,0,/* r14 r15 */\ | |
172 | 0,0,/* r16 r17 */\ | |
173 | 0,0,/* r18 r19 */\ | |
174 | 0,0,/* r20 r21 */\ | |
175 | 0,0,/* r22 r23 */\ | |
176 | 0,0,/* r24 r25 */\ | |
177 | 0,0,/* r26 r27 */\ | |
178 | 0,0,/* r28 r29 */\ | |
179 | 0,0,/* r30 r31 */\ | |
180 | 1,1,/* STACK */\ | |
3ba781d3 SKS |
181 | 1,1, /* arg pointer */ \ |
182 | 1 /* CC */ } | |
90e7678c DC |
183 | |
184 | #define CALL_USED_REGISTERS { \ | |
185 | 1,1,/* r0 r1 */ \ | |
cfbaed3b DC |
186 | 0,0,/* r2 r3 */ \ |
187 | 0,0,/* r4 r5 */ \ | |
188 | 0,0,/* r6 r7 */ \ | |
189 | 0,0,/* r8 r9 */ \ | |
190 | 0,0,/* r10 r11 */ \ | |
191 | 0,0,/* r12 r13 */ \ | |
192 | 0,0,/* r14 r15 */ \ | |
193 | 0,0,/* r16 r17 */ \ | |
194 | 1,1,/* r18 r19 */ \ | |
195 | 1,1,/* r20 r21 */ \ | |
196 | 1,1,/* r22 r23 */ \ | |
197 | 1,1,/* r24 r25 */ \ | |
198 | 1,1,/* r26 r27 */ \ | |
199 | 0,0,/* r28 r29 */ \ | |
200 | 1,1,/* r30 r31 */ \ | |
201 | 1,1,/* STACK */ \ | |
3ba781d3 SKS |
202 | 1,1, /* arg pointer */ \ |
203 | 1 /* CC */ } | |
90e7678c | 204 | |
90e7678c DC |
205 | #define REG_ALLOC_ORDER { \ |
206 | 24,25, \ | |
207 | 18,19, \ | |
208 | 20,21, \ | |
209 | 22,23, \ | |
210 | 30,31, \ | |
211 | 26,27, \ | |
212 | 28,29, \ | |
213 | 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \ | |
214 | 0,1, \ | |
3ba781d3 | 215 | 32,33,34,35,36 \ |
90e7678c | 216 | } |
90e7678c | 217 | |
00892272 | 218 | #define ADJUST_REG_ALLOC_ORDER avr_adjust_reg_alloc_order() |
90e7678c DC |
219 | |
220 | ||
90e7678c DC |
221 | enum reg_class { |
222 | NO_REGS, | |
223 | R0_REG, /* r0 */ | |
224 | POINTER_X_REGS, /* r26 - r27 */ | |
225 | POINTER_Y_REGS, /* r28 - r29 */ | |
226 | POINTER_Z_REGS, /* r30 - r31 */ | |
227 | STACK_REG, /* STACK */ | |
228 | BASE_POINTER_REGS, /* r28 - r31 */ | |
229 | POINTER_REGS, /* r26 - r31 */ | |
230 | ADDW_REGS, /* r24 - r31 */ | |
231 | SIMPLE_LD_REGS, /* r16 - r23 */ | |
232 | LD_REGS, /* r16 - r31 */ | |
233 | NO_LD_REGS, /* r0 - r15 */ | |
234 | GENERAL_REGS, /* r0 - r31 */ | |
3ba781d3 | 235 | CC_REG, /* CC */ |
90e7678c DC |
236 | ALL_REGS, LIM_REG_CLASSES |
237 | }; | |
90e7678c DC |
238 | |
239 | ||
240 | #define N_REG_CLASSES (int)LIM_REG_CLASSES | |
90e7678c DC |
241 | |
242 | #define REG_CLASS_NAMES { \ | |
243 | "NO_REGS", \ | |
244 | "R0_REG", /* r0 */ \ | |
245 | "POINTER_X_REGS", /* r26 - r27 */ \ | |
246 | "POINTER_Y_REGS", /* r28 - r29 */ \ | |
247 | "POINTER_Z_REGS", /* r30 - r31 */ \ | |
248 | "STACK_REG", /* STACK */ \ | |
249 | "BASE_POINTER_REGS", /* r28 - r31 */ \ | |
250 | "POINTER_REGS", /* r26 - r31 */ \ | |
251 | "ADDW_REGS", /* r24 - r31 */ \ | |
252 | "SIMPLE_LD_REGS", /* r16 - r23 */ \ | |
253 | "LD_REGS", /* r16 - r31 */ \ | |
254 | "NO_LD_REGS", /* r0 - r15 */ \ | |
255 | "GENERAL_REGS", /* r0 - r31 */ \ | |
3ba781d3 | 256 | "CC_REG", /* CC */ \ |
90e7678c | 257 | "ALL_REGS" } |
90e7678c | 258 | |
90e7678c DC |
259 | #define REG_CLASS_CONTENTS { \ |
260 | {0x00000000,0x00000000}, /* NO_REGS */ \ | |
261 | {0x00000001,0x00000000}, /* R0_REG */ \ | |
fa96aa45 GJL |
262 | {3u << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \ |
263 | {3u << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \ | |
264 | {3u << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \ | |
90e7678c | 265 | {0x00000000,0x00000003}, /* STACK_REG, STACK */ \ |
fa96aa45 | 266 | {(3u << REG_Y) | (3u << REG_Z), \ |
cfbaed3b | 267 | 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \ |
fa96aa45 | 268 | {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z), \ |
cfbaed3b | 269 | 0x00000000}, /* POINTER_REGS, r26 - r31 */ \ |
fa96aa45 | 270 | {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z) | (3u << REG_W), \ |
90e7678c | 271 | 0x00000000}, /* ADDW_REGS, r24 - r31 */ \ |
35d8c8e2 | 272 | {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \ |
fa96aa45 | 273 | {(3u << REG_X)|(3u << REG_Y)|(3u << REG_Z)|(3u << REG_W)|(0xffu << 16),\ |
cfbaed3b | 274 | 0x00000000}, /* LD_REGS, r16 - r31 */ \ |
35d8c8e2 | 275 | {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \ |
cfbaed3b | 276 | {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \ |
3ba781d3 SKS |
277 | {0x00000000,0x00000010}, /* CC */ \ |
278 | {0xffffffff,0x00000013} /* ALL_REGS */ \ | |
90e7678c | 279 | } |
90e7678c DC |
280 | |
281 | #define REGNO_REG_CLASS(R) avr_regno_reg_class(R) | |
90e7678c | 282 | |
86fc3d06 UW |
283 | #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code) \ |
284 | avr_mode_code_base_reg_class (mode, as, outer_code, index_code) | |
90e7678c DC |
285 | |
286 | #define INDEX_REG_CLASS NO_REGS | |
90e7678c | 287 | |
86fc3d06 UW |
288 | #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \ |
289 | avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code) | |
90e7678c DC |
290 | |
291 | #define REGNO_OK_FOR_INDEX_P(NUM) 0 | |
90e7678c | 292 | |
42db504c | 293 | #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true |
90e7678c | 294 | |
90e7678c DC |
295 | #define STACK_PUSH_CODE POST_DEC |
296 | ||
62f9f30b | 297 | #define STACK_GROWS_DOWNWARD 1 |
90e7678c | 298 | |
90e7678c | 299 | #define STACK_POINTER_OFFSET 1 |
90e7678c DC |
300 | |
301 | #define FIRST_PARM_OFFSET(FUNDECL) 0 | |
90e7678c DC |
302 | |
303 | #define STACK_BOUNDARY 8 | |
90e7678c DC |
304 | |
305 | #define STACK_POINTER_REGNUM 32 | |
90e7678c | 306 | |
cfbaed3b | 307 | #define FRAME_POINTER_REGNUM REG_Y |
90e7678c DC |
308 | |
309 | #define ARG_POINTER_REGNUM 34 | |
90e7678c | 310 | |
c1dd9790 | 311 | #define STATIC_CHAIN_REGNUM ((AVR_TINY) ? 18 :2) |
90e7678c | 312 | |
90e7678c | 313 | #define ELIMINABLE_REGS { \ |
0c9ef7ad GJL |
314 | { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ |
315 | { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \ | |
316 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ | |
317 | { FRAME_POINTER_REGNUM + 1, STACK_POINTER_REGNUM + 1 } } | |
90e7678c | 318 | |
cfbaed3b | 319 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ |
c21ca196 | 320 | OFFSET = avr_initial_elimination_offset (FROM, TO) |
90e7678c | 321 | |
a212a5d4 | 322 | #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem) |
3454eb73 | 323 | |
e53b6e56 | 324 | /* Don't use Push rounding. expr.cc: emit_single_push_insn is broken |
28734c39 AH |
325 | for POST_DEC targets (PR27386). */ |
326 | /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/ | |
90e7678c | 327 | |
00892272 GJL |
328 | typedef struct avr_args |
329 | { | |
330 | /* # Registers available for passing */ | |
331 | int nregs; | |
332 | ||
333 | /* Next available register number */ | |
334 | int regno; | |
90e7678c | 335 | } CUMULATIVE_ARGS; |
90e7678c | 336 | |
0f6937fe | 337 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ |
00892272 | 338 | avr_init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL) |
90e7678c | 339 | |
00892272 | 340 | #define FUNCTION_ARG_REGNO_P(r) avr_function_arg_regno_p(r) |
90e7678c | 341 | |
90e7678c | 342 | #define DEFAULT_PCC_STRUCT_RETURN 0 |
90e7678c | 343 | |
4fc2b4ff | 344 | #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO) |
90e7678c DC |
345 | |
346 | #define HAVE_POST_INCREMENT 1 | |
90e7678c | 347 | #define HAVE_PRE_DECREMENT 1 |
90e7678c | 348 | |
90e7678c | 349 | #define MAX_REGS_PER_ADDRESS 1 |
90e7678c | 350 | |
36a50ab6 GJL |
351 | #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \ |
352 | do { \ | |
c1a330ef | 353 | rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \ |
36a50ab6 GJL |
354 | ADDR_TYPE (TYPE), \ |
355 | IND_L, make_memloc); \ | |
356 | if (new_x) \ | |
357 | { \ | |
358 | X = new_x; \ | |
359 | goto WIN; \ | |
360 | } \ | |
361 | } while (0) | |
35d8c8e2 | 362 | |
1bcd0192 GJL |
363 | /* We increase branch costs after reload in order to keep basic-block |
364 | reordering from introducing out-of-line jumps and to prefer fall-through | |
365 | edges instead. The default branch costs are 0, mainly because otherwise | |
366 | do_store_flag might come up with bloated code. */ | |
367 | #define BRANCH_COST(speed_p, predictable_p) \ | |
368 | (avr_branch_cost + (reload_completed ? 4 : 0)) | |
51296ba0 | 369 | |
90e7678c | 370 | #define SLOW_BYTE_ACCESS 0 |
90e7678c | 371 | |
1e8552c2 | 372 | #define NO_FUNCTION_CSE 1 |
90e7678c | 373 | |
7c209481 GJL |
374 | #define REGISTER_TARGET_PRAGMAS() \ |
375 | do { \ | |
376 | avr_register_target_pragmas(); \ | |
377 | } while (0) | |
378 | ||
8c13c7b3 | 379 | #define TEXT_SECTION_ASM_OP "\t.text" |
90e7678c | 380 | |
8c13c7b3 | 381 | #define DATA_SECTION_ASM_OP "\t.data" |
90e7678c | 382 | |
b47cae3d | 383 | #define BSS_SECTION_ASM_OP "\t.section .bss" |
b47cae3d | 384 | |
9af145ae MM |
385 | /* Define the pseudo-ops used to switch to the .ctors and .dtors sections. |
386 | There are no shared libraries on this target, and these sections are | |
387 | placed in the read-only program memory, so they are not writable. */ | |
388 | ||
389 | #undef CTORS_SECTION_ASM_OP | |
390 | #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits" | |
391 | ||
392 | #undef DTORS_SECTION_ASM_OP | |
393 | #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits" | |
394 | ||
395 | #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor | |
9af145ae MM |
396 | |
397 | #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor | |
9af145ae | 398 | |
34babc73 AH |
399 | #define SUPPORTS_INIT_PRIORITY 0 |
400 | ||
92383fee | 401 | /* We pretend jump tables are in text section because otherwise, |
e53b6e56 | 402 | final.cc will switch to .rodata before jump tables and thereby |
92383fee GJL |
403 | triggers __do_copy_data. As we implement ASM_OUTPUT_ADDR_VEC, |
404 | we still have full control over the jump tables themselves. */ | |
2d761a37 | 405 | #define JUMP_TABLES_IN_TEXT_SECTION 1 |
90e7678c | 406 | |
90e7678c | 407 | #define ASM_COMMENT_START " ; " |
90e7678c DC |
408 | |
409 | #define ASM_APP_ON "/* #APP */\n" | |
90e7678c DC |
410 | |
411 | #define ASM_APP_OFF "/* #NOAPP */\n" | |
90e7678c | 412 | |
980d8882 | 413 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$')) |
90e7678c | 414 | |
516edfdd GJL |
415 | #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \ |
416 | avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false) | |
90e7678c | 417 | |
53802f27 | 418 | #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ |
f9d29866 JR |
419 | avr_asm_asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN, \ |
420 | asm_output_aligned_bss) | |
b47cae3d | 421 | |
516edfdd GJL |
422 | #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \ |
423 | avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true) | |
90e7678c | 424 | |
506a61b1 KG |
425 | /* Globalizing directive for a label. */ |
426 | #define GLOBAL_ASM_OP ".global\t" | |
90e7678c | 427 | |
6bec29c9 | 428 | #define SUPPORTS_WEAK 1 |
90e7678c | 429 | |
90e7678c | 430 | #define HAS_INIT_SECTION 1 |
90e7678c DC |
431 | |
432 | #define REGISTER_NAMES { \ | |
433 | "r0","r1","r2","r3","r4","r5","r6","r7", \ | |
434 | "r8","r9","r10","r11","r12","r13","r14","r15", \ | |
435 | "r16","r17","r18","r19","r20","r21","r22","r23", \ | |
436 | "r24","r25","r26","r27","r28","r29","r30","r31", \ | |
3ba781d3 | 437 | "__SP_L__","__SP_H__","argL","argH", "cc"} |
90e7678c | 438 | |
00892272 GJL |
439 | #define FINAL_PRESCAN_INSN(insn, operand, nop) \ |
440 | avr_final_prescan_insn (insn, operand,nop) | |
90e7678c | 441 | |
90e7678c DC |
442 | #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \ |
443 | { \ | |
25b9575b | 444 | gcc_assert (REGNO < 32); \ |
90e7678c DC |
445 | fprintf (STREAM, "\tpush\tr%d", REGNO); \ |
446 | } | |
90e7678c DC |
447 | |
448 | #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \ | |
449 | { \ | |
25b9575b | 450 | gcc_assert (REGNO < 32); \ |
90e7678c DC |
451 | fprintf (STREAM, "\tpop\tr%d", REGNO); \ |
452 | } | |
90e7678c | 453 | |
92383fee GJL |
454 | #define ASM_OUTPUT_ADDR_VEC(TLABEL, TDATA) \ |
455 | avr_output_addr_vec (TLABEL, TDATA) | |
90e7678c | 456 | |
b49eb0ff GJL |
457 | #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ |
458 | do { \ | |
459 | if ((POWER) > 0) \ | |
460 | fprintf (STREAM, "\t.p2align\t%d\n", POWER); \ | |
5178d50a | 461 | } while (0) |
90e7678c DC |
462 | |
463 | #define CASE_VECTOR_MODE HImode | |
90e7678c | 464 | |
90e7678c | 465 | #undef WORD_REGISTER_OPERATIONS |
90e7678c | 466 | |
998f15f3 SKS |
467 | /* Can move only a single byte from memory to reg in a |
468 | single instruction. */ | |
469 | ||
470 | #define MOVE_MAX 1 | |
471 | ||
472 | /* Allow upto two bytes moves to occur using by_pieces | |
473 | infrastructure */ | |
474 | ||
475 | #define MOVE_MAX_PIECES 2 | |
476 | ||
477 | /* Set MOVE_RATIO to 3 to allow memory moves upto 4 bytes to happen | |
478 | by pieces when optimizing for speed, like it did when MOVE_MAX_PIECES | |
479 | was 4. When optimizing for size, allow memory moves upto 2 bytes. | |
480 | Also see avr_use_by_pieces_infrastructure_p. */ | |
481 | ||
482 | #define MOVE_RATIO(speed) ((speed) ? 3 : 2) | |
90e7678c | 483 | |
90e7678c | 484 | #define Pmode HImode |
90e7678c DC |
485 | |
486 | #define FUNCTION_MODE HImode | |
3cea4788 | 487 | |
90e7678c | 488 | #define DOLLARS_IN_IDENTIFIERS 0 |
90e7678c | 489 | |
90e7678c DC |
490 | #define TRAMPOLINE_SIZE 4 |
491 | ||
90e7678c DC |
492 | /* Output assembler code to FILE to increment profiler label # LABELNO |
493 | for profiling a function entry. */ | |
494 | ||
495 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
496 | fprintf (FILE, "/* profiler %d */", (LABELNO)) | |
497 | ||
00892272 GJL |
498 | #define ADJUST_INSN_LENGTH(INSN, LENGTH) \ |
499 | (LENGTH = avr_adjust_insn_length (INSN, LENGTH)) | |
90e7678c | 500 | |
4a2caf6c | 501 | extern const char *avr_devicespecs_file (int, const char**); |
29f3def3 | 502 | extern const char *avr_double_lib (int, const char**); |
92c392e6 | 503 | |
29f3def3 GJL |
504 | #define EXTRA_SPEC_FUNCTIONS \ |
505 | { "double-lib", avr_double_lib }, \ | |
4a2caf6c | 506 | { "device-specs-file", avr_devicespecs_file }, |
27be769c | 507 | |
4a2caf6c GJL |
508 | /* Driver self specs has lmited functionality w.r.t. '%s' for dynamic specs. |
509 | Apply '%s' to a static string to inflate the file (directory) name which | |
510 | is used to diagnose problems with reading the specs file. */ | |
9af145ae | 511 | |
4a2caf6c | 512 | #undef DRIVER_SELF_SPECS |
29f3def3 GJL |
513 | #define DRIVER_SELF_SPECS \ |
514 | " %:double-lib(%{m*:m%*})" \ | |
4a2caf6c | 515 | " %:device-specs-file(device-specs%s %{mmcu=*:%*})" |
90e7678c | 516 | |
4a2caf6c GJL |
517 | /* No libstdc++ for now. Empty string doesn't work. */ |
518 | #define LIBSTDCXX "gcc" | |
90e7678c | 519 | |
4a2caf6c GJL |
520 | /* This is the default without any -mmcu=* option. */ |
521 | #define MULTILIB_DEFAULTS { "mmcu=" AVR_MMCU_DEFAULT } | |
6bec29c9 | 522 | |
90e7678c DC |
523 | #define TEST_HARD_REG_CLASS(CLASS, REGNO) \ |
524 | TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO) | |
525 | ||
90e7678c DC |
526 | #define CR_TAB "\n\t" |
527 | ||
d1fc69e4 AS |
528 | #define DWARF2_ADDR_SIZE 4 |
529 | ||
bdfe906f RH |
530 | #define INCOMING_RETURN_ADDR_RTX avr_incoming_return_addr_rtx () |
531 | #define INCOMING_FRAME_SP_OFFSET (AVR_3_BYTE_PC ? 3 : 2) | |
532 | ||
533 | /* The caller's stack pointer value immediately before the call | |
534 | is one byte below the first argument. */ | |
535 | #define ARG_POINTER_CFA_OFFSET(FNDECL) -1 | |
536 | ||
91635d08 AS |
537 | #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ |
538 | avr_hard_regno_rename_ok (OLD_REG, NEW_REG) | |
539 | ||
4fc2b4ff AH |
540 | /* A C structure for machine-specific, per-function data. |
541 | This is added to the cfun structure. */ | |
d1b38208 | 542 | struct GTY(()) machine_function |
4fc2b4ff | 543 | { |
4fc2b4ff AH |
544 | /* 'true' - if current function is a naked function. */ |
545 | int is_naked; | |
546 | ||
547 | /* 'true' - if current function is an interrupt function | |
548 | as specified by the "interrupt" attribute. */ | |
549 | int is_interrupt; | |
550 | ||
551 | /* 'true' - if current function is a signal function | |
552 | as specified by the "signal" attribute. */ | |
553 | int is_signal; | |
96ac4c9b | 554 | |
9b678d96 | 555 | /* 'true' - if current function is a 'task' function |
96ac4c9b AS |
556 | as specified by the "OS_task" attribute. */ |
557 | int is_OS_task; | |
9b678d96 AS |
558 | |
559 | /* 'true' - if current function is a 'main' function | |
560 | as specified by the "OS_main" attribute. */ | |
561 | int is_OS_main; | |
a212a5d4 AH |
562 | |
563 | /* Current function stack size. */ | |
564 | int stack_usage; | |
980a0ff4 GJL |
565 | |
566 | /* 'true' if a callee might be tail called */ | |
567 | int sibcall_fails; | |
eac188c5 GJL |
568 | |
569 | /* 'true' if the above is_foo predicates are sanity-checked to avoid | |
570 | multiple diagnose for the same function. */ | |
571 | int attributes_checked_p; | |
63866e04 GJL |
572 | |
573 | /* 'true' - if current function shall not use '__gcc_isr' pseudo | |
574 | instructions as specified by the "no_gccisr" attribute. */ | |
575 | int is_no_gccisr; | |
576 | ||
577 | /* Used for `__gcc_isr' pseudo instruction handling of | |
578 | non-naked ISR prologue / epilogue(s). */ | |
579 | struct | |
580 | { | |
581 | /* 'true' if this function actually uses "*gasisr" insns. */ | |
582 | int yes; | |
583 | /* 'true' if this function is allowed to use "*gasisr" insns. */ | |
584 | int maybe; | |
585 | /* The register numer as printed by the Done chunk. */ | |
586 | int regno; | |
587 | } gasisr; | |
588 | ||
589 | /* 'true' if this function references .L__stack_usage like with | |
590 | __builtin_return_address. */ | |
591 | int use_L__stack_usage; | |
4fc2b4ff | 592 | }; |
172c08a5 | 593 | |
073a8998 | 594 | /* AVR does not round pushes, but the existence of this macro is |
172c08a5 RH |
595 | required in order for pushes to be generated. */ |
596 | #define PUSH_ROUNDING(X) (X) | |
d702f362 | 597 | |
0545950b GJL |
598 | /* Define prototype here to avoid build warning. Some files using |
599 | ACCUMULATE_OUTGOING_ARGS (directly or indirectly) include | |
600 | tm.h but not tm_p.h. */ | |
45958634 | 601 | extern int avr_accumulate_outgoing_args (void); |
d702f362 | 602 | #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args() |
7bc6df2c GJL |
603 | |
604 | #define INIT_EXPANDERS avr_init_expanders() | |
f9d29866 JR |
605 | |
606 | /* Flags used for io and address attributes. */ | |
607 | #define SYMBOL_FLAG_IO_LOW (SYMBOL_FLAG_MACH_DEP << 4) | |
608 | #define SYMBOL_FLAG_IO (SYMBOL_FLAG_MACH_DEP << 5) | |
609 | #define SYMBOL_FLAG_ADDRESS (SYMBOL_FLAG_MACH_DEP << 6) |