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164f5b34 | 1 | ;; Constraint definitions for ATMEL AVR micro controllers. |
71e45bc2 | 2 | ;; Copyright (C) 2006, 2007, 2011, 2012 Free Software Foundation, Inc. |
164f5b34 | 3 | ;; |
4 | ;; This file is part of GCC. | |
5 | ;; | |
6 | ;; GCC is free software; you can redistribute it and/or modify | |
7 | ;; it under the terms of the GNU General Public License as published by | |
038d1e19 | 8 | ;; the Free Software Foundation; either version 3, or (at your option) |
164f5b34 | 9 | ;; any later version. |
10 | ;; | |
11 | ;; GCC is distributed in the hope that it will be useful, | |
12 | ;; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ;; GNU General Public License for more details. | |
15 | ;; | |
16 | ;; You should have received a copy of the GNU General Public License | |
038d1e19 | 17 | ;; along with GCC; see the file COPYING3. If not see |
18 | ;; <http://www.gnu.org/licenses/>. | |
164f5b34 | 19 | |
20 | ;; Register constraints | |
21 | ||
22 | (define_register_constraint "t" "R0_REG" | |
23 | "Temporary register r0") | |
24 | ||
25 | (define_register_constraint "b" "BASE_POINTER_REGS" | |
26 | "Base pointer registers (r28--r31)") | |
27 | ||
28 | (define_register_constraint "e" "POINTER_REGS" | |
29 | "Pointer registers (r26--r31)") | |
30 | ||
31 | (define_register_constraint "w" "ADDW_REGS" | |
32 | "Registers from r24 to r31. These registers | |
33 | can be used in @samp{adiw} command.") | |
34 | ||
35 | (define_register_constraint "d" "LD_REGS" | |
36 | "Registers from r16 to r31.") | |
37 | ||
38 | (define_register_constraint "l" "NO_LD_REGS" | |
39 | "Registers from r0 to r15.") | |
40 | ||
41 | (define_register_constraint "a" "SIMPLE_LD_REGS" | |
42 | "Registers from r16 to r23.") | |
43 | ||
44 | (define_register_constraint "x" "POINTER_X_REGS" | |
45 | "Register pair X (r27:r26).") | |
46 | ||
47 | (define_register_constraint "y" "POINTER_Y_REGS" | |
48 | "Register pair Y (r29:r28).") | |
49 | ||
50 | (define_register_constraint "z" "POINTER_Z_REGS" | |
51 | "Register pair Z (r31:r30).") | |
52 | ||
53 | (define_register_constraint "q" "STACK_REG" | |
54 | "Stack pointer register (SPH:SPL).") | |
55 | ||
56 | (define_constraint "I" | |
57 | "Integer constant in the range 0 @dots{} 63." | |
58 | (and (match_code "const_int") | |
59 | (match_test "ival >= 0 && ival <= 63"))) | |
60 | ||
61 | (define_constraint "J" | |
62 | "Integer constant in the range -63 @dots{} 0." | |
63 | (and (match_code "const_int") | |
64 | (match_test "ival <= 0 && ival >= -63"))) | |
65 | ||
66 | (define_constraint "K" | |
67 | "Integer constant 2." | |
68 | (and (match_code "const_int") | |
69 | (match_test "ival == 2"))) | |
70 | ||
71 | (define_constraint "L" | |
72 | "Zero." | |
73 | (and (match_code "const_int") | |
74 | (match_test "ival == 0"))) | |
75 | ||
76 | (define_constraint "M" | |
77 | "Integer constant in the range 0 @dots{} 0xff." | |
78 | (and (match_code "const_int") | |
79 | (match_test "ival >= 0 && ival <= 0xff"))) | |
80 | ||
81 | (define_constraint "N" | |
82 | "Constant integer @minus{}1." | |
83 | (and (match_code "const_int") | |
84 | (match_test "ival == -1"))) | |
85 | ||
86 | (define_constraint "O" | |
87 | "Constant integer 8, 16, or 24." | |
88 | (and (match_code "const_int") | |
89 | (match_test "ival == 8 || ival == 16 || ival == 24"))) | |
90 | ||
91 | (define_constraint "P" | |
92 | "Constant integer 1." | |
93 | (and (match_code "const_int") | |
94 | (match_test "ival == 1"))) | |
95 | ||
96 | (define_constraint "G" | |
97 | "Constant float 0." | |
98 | (and (match_code "const_double") | |
99 | (match_test "op == CONST0_RTX (SFmode)"))) | |
100 | ||
101 | (define_memory_constraint "Q" | |
378eb4b7 | 102 | "A memory address based on Y or Z pointer with displacement." |
164f5b34 | 103 | (and (match_code "mem") |
104 | (match_test "extra_constraint_Q (op)"))) | |
0f713cc8 | 105 | |
69a5e82f | 106 | (define_constraint "Cm2" |
107 | "Constant integer @minus{}2." | |
108 | (and (match_code "const_int") | |
109 | (match_test "ival == -2"))) | |
110 | ||
36181f98 | 111 | (define_constraint "C03" |
112 | "Constant integer 3." | |
113 | (and (match_code "const_int") | |
114 | (match_test "ival == 3"))) | |
115 | ||
0f713cc8 | 116 | (define_constraint "C04" |
117 | "Constant integer 4." | |
118 | (and (match_code "const_int") | |
119 | (match_test "ival == 4"))) | |
6be828c1 | 120 | |
36181f98 | 121 | (define_constraint "C05" |
122 | "Constant integer 5." | |
123 | (and (match_code "const_int") | |
124 | (match_test "ival == 5"))) | |
125 | ||
126 | (define_constraint "C06" | |
127 | "Constant integer 6." | |
128 | (and (match_code "const_int") | |
129 | (match_test "ival == 6"))) | |
130 | ||
131 | (define_constraint "C07" | |
132 | "Constant integer 7." | |
133 | (and (match_code "const_int") | |
134 | (match_test "ival == 7"))) | |
135 | ||
6be828c1 | 136 | (define_constraint "Ca2" |
137 | "Constant 2-byte integer that allows AND without clobber register." | |
138 | (and (match_code "const_int") | |
139 | (match_test "avr_popcount_each_byte (op, 2, (1<<0) | (1<<7) | (1<<8))"))) | |
140 | ||
02d9a2c3 | 141 | (define_constraint "Ca3" |
142 | "Constant 3-byte integer that allows AND without clobber register." | |
143 | (and (match_code "const_int") | |
144 | (match_test "avr_popcount_each_byte (op, 3, (1<<0) | (1<<7) | (1<<8))"))) | |
145 | ||
6be828c1 | 146 | (define_constraint "Ca4" |
147 | "Constant 4-byte integer that allows AND without clobber register." | |
148 | (and (match_code "const_int") | |
149 | (match_test "avr_popcount_each_byte (op, 4, (1<<0) | (1<<7) | (1<<8))"))) | |
150 | ||
151 | (define_constraint "Co2" | |
152 | "Constant 2-byte integer that allows OR without clobber register." | |
153 | (and (match_code "const_int") | |
154 | (match_test "avr_popcount_each_byte (op, 2, (1<<0) | (1<<1) | (1<<8))"))) | |
155 | ||
02d9a2c3 | 156 | (define_constraint "Co3" |
157 | "Constant 3-byte integer that allows OR without clobber register." | |
158 | (and (match_code "const_int") | |
159 | (match_test "avr_popcount_each_byte (op, 3, (1<<0) | (1<<1) | (1<<8))"))) | |
160 | ||
6be828c1 | 161 | (define_constraint "Co4" |
162 | "Constant 4-byte integer that allows OR without clobber register." | |
163 | (and (match_code "const_int") | |
164 | (match_test "avr_popcount_each_byte (op, 4, (1<<0) | (1<<1) | (1<<8))"))) | |
165 | ||
166 | (define_constraint "Cx2" | |
167 | "Constant 2-byte integer that allows XOR without clobber register." | |
168 | (and (match_code "const_int") | |
169 | (match_test "avr_popcount_each_byte (op, 2, (1<<0) | (1<<8))"))) | |
170 | ||
02d9a2c3 | 171 | (define_constraint "Cx3" |
172 | "Constant 3-byte integer that allows XOR without clobber register." | |
173 | (and (match_code "const_int") | |
174 | (match_test "avr_popcount_each_byte (op, 3, (1<<0) | (1<<8))"))) | |
175 | ||
6be828c1 | 176 | (define_constraint "Cx4" |
177 | "Constant 4-byte integer that allows XOR without clobber register." | |
178 | (and (match_code "const_int") | |
179 | (match_test "avr_popcount_each_byte (op, 4, (1<<0) | (1<<8))"))) | |
a12b9b80 | 180 | |
181 | (define_constraint "Csp" | |
182 | "Integer constant in the range -6 @dots{} 6." | |
183 | (and (match_code "const_int") | |
184 | (match_test "IN_RANGE (ival, -6, 6)"))) | |
15b84087 | 185 | |
186 | (define_constraint "Cxf" | |
187 | "32-bit integer constant where at least one nibble is 0xf." | |
188 | (and (match_code "const_int") | |
189 | (match_test "avr_has_nibble_0xf (op)"))) | |
190 | ||
191 | (define_constraint "C0f" | |
192 | "32-bit integer constant where no nibble equals 0xf." | |
193 | (and (match_code "const_int") | |
194 | (match_test "!avr_has_nibble_0xf (op)"))) | |
017c5b98 | 195 | |
196 | ;; CONST_FIXED is no element of 'n' so cook our own. | |
197 | ;; "i" or "s" would match but because the insn uses iterators that cover | |
198 | ;; INT_MODE, "i" or "s" is not always possible. | |
199 | ||
200 | (define_constraint "Ynn" | |
201 | "Fixed-point constant known at compile time." | |
202 | (match_code "const_fixed")) | |
203 | ||
204 | (define_constraint "Y00" | |
205 | "Fixed-point or integer constant with bit representation 0x0" | |
206 | (and (match_code "const_fixed,const_int") | |
207 | (match_test "op == CONST0_RTX (GET_MODE (op))"))) | |
208 | ||
209 | (define_constraint "Y01" | |
210 | "Fixed-point or integer constant with bit representation 0x1" | |
211 | (ior (and (match_code "const_fixed") | |
212 | (match_test "1 == INTVAL (avr_to_int_mode (op))")) | |
213 | (match_test "satisfies_constraint_P (op)"))) | |
214 | ||
215 | (define_constraint "Ym1" | |
216 | "Fixed-point or integer constant with bit representation -0x1" | |
217 | (ior (and (match_code "const_fixed") | |
218 | (match_test "-1 == INTVAL (avr_to_int_mode (op))")) | |
219 | (match_test "satisfies_constraint_N (op)"))) | |
220 | ||
221 | (define_constraint "Y02" | |
222 | "Fixed-point or integer constant with bit representation 0x2" | |
223 | (ior (and (match_code "const_fixed") | |
224 | (match_test "2 == INTVAL (avr_to_int_mode (op))")) | |
225 | (match_test "satisfies_constraint_K (op)"))) | |
226 | ||
227 | (define_constraint "Ym2" | |
228 | "Fixed-point or integer constant with bit representation -0x2" | |
229 | (ior (and (match_code "const_fixed") | |
230 | (match_test "-2 == INTVAL (avr_to_int_mode (op))")) | |
231 | (match_test "satisfies_constraint_Cm2 (op)"))) | |
232 | ||
233 | ;; Similar to "IJ" used with ADIW/SBIW, but for CONST_FIXED. | |
234 | ||
235 | (define_constraint "YIJ" | |
236 | "Fixed-point constant from @minus{}0x003f to 0x003f." | |
237 | (and (match_code "const_fixed") | |
238 | (match_test "IN_RANGE (INTVAL (avr_to_int_mode (op)), -63, 63)"))) |