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bcead286 | 1 | ;; Constraint definitions for TI C6X. |
7adcbafe | 2 | ;; Copyright (C) 2010-2022 Free Software Foundation, Inc. |
bcead286 BS |
3 | ;; Contributed by Andrew Jenner <andrew@codesourcery.com> |
4 | ;; Contributed by Bernd Schmidt <bernds@codesourcery.com> | |
5 | ;; Contributed by CodeSourcery. | |
6 | ;; | |
7 | ;; This file is part of GCC. | |
8 | ;; | |
9 | ;; GCC is free software; you can redistribute it and/or modify | |
10 | ;; it under the terms of the GNU General Public License as published by | |
11 | ;; the Free Software Foundation; either version 3, or (at your option) | |
12 | ;; any later version. | |
13 | ;; | |
14 | ;; GCC is distributed in the hope that it will be useful, | |
15 | ;; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | ;; GNU General Public License for more details. | |
18 | ;; | |
19 | ;; You should have received a copy of the GNU General Public License | |
20 | ;; along with GCC; see the file COPYING3. If not see | |
21 | ;; <http://www.gnu.org/licenses/>. | |
22 | ||
23 | (define_register_constraint "a" "A_REGS" | |
24 | "Register file A (A0--A31).") | |
25 | ||
26 | (define_register_constraint "b" "B_REGS" | |
27 | "Register file B (B0--B31).") | |
28 | ||
29 | (define_register_constraint "A" "PREDICATE_A_REGS" | |
30 | "Predicate registers in register file A (A0--A2 on C64X and higher, | |
31 | A1 and A2 otherwise).") | |
32 | ||
33 | (define_register_constraint "B" "PREDICATE_B_REGS" | |
34 | "Predicate registers in register file B (B0--B2).") | |
35 | ||
36 | (define_register_constraint "C" "CALL_USED_B_REGS" | |
37 | "A call-used register in register file B (B0--B9, B16--B31).") | |
38 | ||
39 | (define_register_constraint "Da" "NONPREDICATE_A_REGS" | |
40 | "Register file A, excluding predicate registers (A3--A31, plus A0 if | |
41 | not C64X or higher).") | |
42 | ||
43 | (define_register_constraint "Db" "NONPREDICATE_B_REGS" | |
44 | "Register file B, excluding predicate registers (B3--B31).") | |
45 | ||
46 | (define_register_constraint "Z" "PICREG" | |
47 | "Register B14 (aka DP).") | |
48 | ||
49 | (define_register_constraint "z" "SPREG" | |
50 | "Register B15 (aka SP).") | |
51 | ||
52 | (define_constraint "Iu4" | |
53 | "Integer constant in the range 0 @dots{} 15, aka ucst4." | |
54 | (and (match_code "const_int") | |
55 | (match_test "ival >= 0 && ival <= 15"))) | |
56 | ||
57 | (define_constraint "Iu5" | |
58 | "Integer constant in the range 0 @dots{} 31, aka ucst5." | |
59 | (and (match_code "const_int") | |
60 | (match_test "ival >= 0 && ival <= 31"))) | |
61 | ||
62 | (define_constraint "In5" | |
63 | "Integer constant in the range @minus{}31 @dots{} 0, negation of ucst5." | |
64 | (and (match_code "const_int") | |
65 | (match_test "ival >= -31 && ival <= 0"))) | |
66 | ||
67 | (define_constraint "Is5" | |
68 | "Integer constant in the range @minus{}16 @dots{} 15, aka scst5." | |
69 | (and (match_code "const_int") | |
70 | (match_test "ival >= -16 && ival <= 15"))) | |
71 | ||
72 | (define_constraint "I5x" | |
73 | "Integer constant that can be the operand of an ADDA or a SUBA insn." | |
74 | (and (match_code "const_int") | |
75 | (match_test "(ival >= -31 && ival <= 31) | |
76 | || ((ival & 1) == 0 && ival >= -62 && ival <= 62) | |
77 | || ((ival & 3) == 0 && ival >= -124 && ival <= 124) | |
78 | || ((TARGET_INSNS_64 || TARGET_INSNS_67) | |
79 | && (ival & 7) == 0 && ival > 0 && ival <= 248)"))) | |
80 | ||
81 | (define_constraint "Iux" | |
82 | "Integer constant that can be the operand of a long ADDA or a SUBA insn, | |
83 | i.e. one involving B14 or B15 as source operand." | |
84 | (and (match_code "const_int") | |
85 | (and (match_test "TARGET_INSNS_64PLUS") | |
86 | (match_test "ival >= 0 | |
87 | && (ival < 32768 | |
88 | || ((ival & 1) == 0 && ival < 65536) | |
89 | || ((ival & 3) == 0 && ival < 131072))")))) | |
90 | ||
91 | (define_constraint "IuB" | |
92 | "Integer constant in the range 0 @dots{} 65535, aka ucst16." | |
93 | (and (match_code "const_int") | |
94 | (match_test "ival >= 0 && ival <= 65535"))) | |
95 | ||
96 | (define_constraint "IsB" | |
97 | "Integer constant in the range @minus{}32768 @dots{} 32767." | |
98 | (and (match_code "const_int") | |
99 | (match_test "ival >= -32768 && ival <= 32767"))) | |
100 | ||
101 | (define_constraint "IsC" | |
102 | "Integer constant in the range @math{-2^{20}} @dots{} @math{2^{20} - 1}." | |
103 | (and (match_code "const_int") | |
104 | (match_test "ival >= -0x100000 && ival <= 0xfffff"))) | |
105 | ||
106 | (define_constraint "JA" | |
107 | "@internal | |
108 | Integer constant in the range 0 @dots{} 31, corresponding to an A register | |
109 | number." | |
110 | (and (match_code "const_int") | |
111 | (match_test "ival >= 0 && ival < 32"))) | |
112 | ||
113 | (define_constraint "JB" | |
114 | "@internal | |
115 | Integer constant in the range 32 @dots{} 63, corresponding to a B register | |
116 | number." | |
117 | (and (match_code "const_int") | |
118 | (match_test "ival >= 32 && ival < 64"))) | |
119 | ||
120 | (define_constraint "Jc" | |
121 | "Integer constant that is a valid mask for the clr instruction" | |
122 | (and (match_code "const_int") | |
123 | (match_test "c6x_valid_mask_p (ival)"))) | |
124 | ||
125 | (define_constraint "Js" | |
126 | "Integer constant that is a valid mask for the set instruction" | |
127 | (and (match_code "const_int") | |
128 | (match_test "c6x_valid_mask_p (~ival)"))) | |
129 | ||
130 | (define_memory_constraint "Q" | |
131 | "Memory location with A base register." | |
132 | (and (match_code "mem") | |
133 | (match_test "c6x_mem_operand (op, A_REGS, false)"))) | |
134 | ||
135 | (define_memory_constraint "R" | |
136 | "Memory location with B base register." | |
137 | (and (match_code "mem") | |
138 | (match_test "c6x_mem_operand (op, B_REGS, false)"))) | |
139 | ||
140 | (define_memory_constraint "T" | |
141 | "@internal | |
142 | Memory location with B base register, but not using a long offset." | |
143 | (and (match_code "mem") | |
144 | (match_test "c6x_mem_operand (op, B_REGS, true)"))) | |
145 | ||
146 | (define_constraint "S0" | |
147 | "@internal | |
148 | On C64x+ targets, a GP-relative small data reference" | |
149 | (and (match_test "TARGET_INSNS_64PLUS") | |
150 | (match_operand 0 "sdata_symbolic_operand"))) | |
151 | ||
152 | (define_constraint "S1" | |
153 | "@internal | |
154 | Any kind of @code{SYMBOL_REF}, for use in a call address." | |
155 | (and (match_code "symbol_ref") | |
156 | (match_operand 0 "c6x_call_operand"))) | |
157 | ||
158 | (define_constraint "S2" | |
159 | "@internal | |
160 | Any SYMBOL_REF or LABEL_REF." | |
161 | (ior (match_code "symbol_ref") (match_code "label_ref"))) | |
162 | ||
f50e5fcc BS |
163 | (define_constraint "S3" |
164 | "Matches a symbolic integer constant, even if invalid for PIC." | |
165 | (and (match_test "CONSTANT_P (op)") | |
166 | (match_test "!CONST_SCALAR_INT_P (op)"))) | |
167 | ||
bcead286 BS |
168 | (define_constraint "Si" |
169 | "@internal | |
170 | Any immediate value, unless it matches the S0 constraint." | |
171 | (and (match_operand 0 "immediate_operand") | |
172 | (match_test "!satisfies_constraint_S0 (op)"))) | |
173 | ||
174 | (define_memory_constraint "W" | |
175 | "@internal | |
176 | A memory operand with an address that can't be used in an unaligned access." | |
177 | (and (match_code "mem") | |
178 | (match_test "!c6x_legitimate_address_p_1 (GET_MODE (op), XEXP (op, 0), | |
179 | reload_completed, true)"))) |