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Fix test for recursive_directory_iterator::pop
[thirdparty/gcc.git] / gcc / config / cr16 / cr16.c
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b25364a0 1/* Output routines for CR16 processor.
818ab71a 2 Copyright (C) 2012-2016 Free Software Foundation, Inc.
b25364a0
S		 3 Contributed by KPIT Cummins Infosystems Limited.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21#include "config.h"
22#include "system.h"
23#include "coretypes.h"
c7131fb2 24#include "backend.h"
e11c4407 25#include "target.h"
b25364a0 26#include "rtl.h"
e11c4407 27#include "tree.h"
c7131fb2 28#include "df.h"
4d0cdd0c 29#include "memmodel.h"
b25364a0
S		 30#include "tm_p.h"
31#include "regs.h"
e11c4407
AM		 32#include "emit-rtl.h"
33#include "diagnostic-core.h"
34#include "stor-layout.h"
35#include "calls.h"
b25364a0
S		 36#include "conditions.h"
37#include "output.h"
b25364a0 38#include "expr.h"
9b2b7279 39#include "builtins.h"
b25364a0 40
994c5d85 41/* This file should be included last. */
d58627a0
RS		 42#include "target-def.h"
43
b25364a0
S		 44/* Definitions. */
45
46/* Maximum number of register used for passing parameters. */
47#define MAX_REG_FOR_PASSING_ARGS 6
48
49/* Minimum number register used for passing parameters. */
50#define MIN_REG_FOR_PASSING_ARGS 2
51
52/* The maximum count of words supported in the assembly of the architecture in
53 a push/pop instruction. */
54#define MAX_COUNT 8
55
56/* Predicate is true if the current function is a 'noreturn' function,
57 i.e. it is qualified as volatile. */
58#define FUNC_IS_NORETURN_P(decl) (TREE_THIS_VOLATILE (decl))
59
60/* Predicate that holds when we need to save registers even for 'noreturn'
073a8998 61 functions, to accommodate for unwinding. */
b25364a0
S		 62#define MUST_SAVE_REGS_P() \
63 (flag_unwind_tables || (flag_exceptions && !UI_SJLJ))
64
65/* Nonzero if the rtx X is a signed const int of n bits. */
66#define RTX_SIGNED_INT_FITS_N_BITS(X, n) \
67 ((GET_CODE (X) == CONST_INT \
68 && SIGNED_INT_FITS_N_BITS (INTVAL (X), n)) ? 1 : 0)
69
70/* Nonzero if the rtx X is an unsigned const int of n bits. */
71#define RTX_UNSIGNED_INT_FITS_N_BITS(X, n) \
72 ((GET_CODE (X) == CONST_INT \
73 && UNSIGNED_INT_FITS_N_BITS (INTVAL (X), n)) ? 1 : 0)
74
75/* Structure for stack computations. */
76
77/* variable definitions in the struture
78 args_size Number of bytes saved on the stack for local
79 variables
80
81 reg_size Number of bytes saved on the stack for
82 non-scratch registers
83
84 total_size The sum of 2 sizes: locals vars and padding byte
85 for saving the registers. Used in expand_prologue()
86 and expand_epilogue()
87
88 last_reg_to_save Will hold the number of the last register the
89 prologue saves, -1 if no register is saved
90
91 save_regs[16] Each object in the array is a register number.
92 Mark 1 for registers that need to be saved
93
94 num_regs Number of registers saved
95
96 initialized Non-zero if frame size already calculated, not
97 used yet
98
99 function_makes_calls Does the function make calls ? not used yet. */
100
101struct cr16_frame_info
102{
103 unsigned long var_size;
104 unsigned long args_size;
105 unsigned int reg_size;
106 unsigned long total_size;
107 long last_reg_to_save;
108 long save_regs[FIRST_PSEUDO_REGISTER];
109 int num_regs;
110 int initialized;
111 int function_makes_calls;
112};
113
114/* Current frame information calculated by cr16_compute_frame_size. */
115static struct cr16_frame_info current_frame_info;
116
117/* Static Variables. */
118
119/* Data model that was supplied by user via command line option
120 This will be overridden in case of invalid combination
121 of core and data model options are supplied. */
122static enum data_model_type data_model = DM_DEFAULT;
123
124/* TARGETM Function Prototypes and forward declarations */
125static void cr16_print_operand (FILE *, rtx, int);
cc8ca59e 126static void cr16_print_operand_address (FILE *, machine_mode, rtx);
b25364a0
S		 127
128/* Stack layout and calling conventions. */
129#undef TARGET_STRUCT_VALUE_RTX
130#define TARGET_STRUCT_VALUE_RTX cr16_struct_value_rtx
131#undef TARGET_RETURN_IN_MEMORY
132#define TARGET_RETURN_IN_MEMORY cr16_return_in_memory
133
134/* Target-specific uses of '__attribute__'. */
135#undef TARGET_ATTRIBUTE_TABLE
136#define TARGET_ATTRIBUTE_TABLE cr16_attribute_table
137#undef TARGET_NARROW_VOLATILE_BITFIELD
138#define TARGET_NARROW_VOLATILE_BITFIELD hook_bool_void_false
139
140/* EH related. */
141#undef TARGET_UNWIND_WORD_MODE
142#define TARGET_UNWIND_WORD_MODE cr16_unwind_word_mode
143
144/* Override Options. */
145#undef TARGET_OPTION_OVERRIDE
146#define TARGET_OPTION_OVERRIDE cr16_override_options
147
148/* Conditional register usuage. */
149#undef TARGET_CONDITIONAL_REGISTER_USAGE
150#define TARGET_CONDITIONAL_REGISTER_USAGE cr16_conditional_register_usage
151
152/* Controlling register spills. */
153#undef TARGET_CLASS_LIKELY_SPILLED_P
154#define TARGET_CLASS_LIKELY_SPILLED_P cr16_class_likely_spilled_p
155
156/* Passing function arguments. */
157#undef TARGET_FUNCTION_ARG
158#define TARGET_FUNCTION_ARG cr16_function_arg
159#undef TARGET_FUNCTION_ARG_ADVANCE
160#define TARGET_FUNCTION_ARG_ADVANCE cr16_function_arg_advance
161#undef TARGET_RETURN_POPS_ARGS
162#define TARGET_RETURN_POPS_ARGS cr16_return_pops_args
163
164/* Initialize the GCC target structure. */
165#undef TARGET_FRAME_POINTER_REQUIRED
166#define TARGET_FRAME_POINTER_REQUIRED cr16_frame_pointer_required
167#undef TARGET_CAN_ELIMINATE
168#define TARGET_CAN_ELIMINATE cr16_can_eliminate
169#undef TARGET_LEGITIMIZE_ADDRESS
170#define TARGET_LEGITIMIZE_ADDRESS cr16_legitimize_address
171#undef TARGET_LEGITIMATE_CONSTANT_P
172#define TARGET_LEGITIMATE_CONSTANT_P cr16_legitimate_constant_p
173#undef TARGET_LEGITIMATE_ADDRESS_P
174#define TARGET_LEGITIMATE_ADDRESS_P cr16_legitimate_address_p
175
d81db636
SB		 176#undef TARGET_LRA_P
177#define TARGET_LRA_P hook_bool_void_false
178
b25364a0
S		 179/* Returning function value. */
180#undef TARGET_FUNCTION_VALUE
181#define TARGET_FUNCTION_VALUE cr16_function_value
182#undef TARGET_LIBCALL_VALUE
183#define TARGET_LIBCALL_VALUE cr16_libcall_value
184#undef TARGET_FUNCTION_VALUE_REGNO_P
185#define TARGET_FUNCTION_VALUE_REGNO_P cr16_function_value_regno_p
186
187/* printing the values. */
188#undef TARGET_PRINT_OPERAND
189#define TARGET_PRINT_OPERAND cr16_print_operand
190#undef TARGET_PRINT_OPERAND_ADDRESS
191#define TARGET_PRINT_OPERAND_ADDRESS cr16_print_operand_address
192
193/* Relative costs of operations. */
194#undef TARGET_ADDRESS_COST
195#define TARGET_ADDRESS_COST cr16_address_cost
196#undef TARGET_REGISTER_MOVE_COST
197#define TARGET_REGISTER_MOVE_COST cr16_register_move_cost
198#undef TARGET_MEMORY_MOVE_COST
199#define TARGET_MEMORY_MOVE_COST cr16_memory_move_cost
200
201/* Table of machine attributes. */
202static const struct attribute_spec cr16_attribute_table[] = {
203 /* ISRs have special prologue and epilogue requirements. */
204 /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler,
205 affects_type_identity }. */
206 {"interrupt", 0, 0, false, true, true, NULL, false},
207 {NULL, 0, 0, false, false, false, NULL, false}
208};
209
210/* TARGET_ASM_UNALIGNED_xx_OP generates .?byte directive
211 .?byte directive along with @c is not understood by assembler.
212 Therefore, make all TARGET_ASM_UNALIGNED_xx_OP same
213 as TARGET_ASM_ALIGNED_xx_OP. */
214#undef TARGET_ASM_UNALIGNED_HI_OP
215#define TARGET_ASM_UNALIGNED_HI_OP TARGET_ASM_ALIGNED_HI_OP
216#undef TARGET_ASM_UNALIGNED_SI_OP
217#define TARGET_ASM_UNALIGNED_SI_OP TARGET_ASM_ALIGNED_SI_OP
218#undef TARGET_ASM_UNALIGNED_DI_OP
219#define TARGET_ASM_UNALIGNED_DI_OP TARGET_ASM_ALIGNED_DI_OP
220
221/* Target hook implementations. */
222
223/* Implements hook TARGET_RETURN_IN_MEMORY. */
224static bool
225cr16_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
226{
227 const HOST_WIDE_INT size = int_size_in_bytes (type);
228 return ((size == -1) || (size > 8));
229}
230
231/* Implement TARGET_CLASS_LIKELY_SPILLED_P. */
232static bool
233cr16_class_likely_spilled_p (reg_class_t rclass)
234{
235 if ((rclass) == SHORT_REGS || (rclass) == DOUBLE_BASE_REGS
236 || (rclass) == LONG_REGS || (rclass) == GENERAL_REGS)
237 return true;
238
239 return false;
240}
241
242static int
243cr16_return_pops_args (tree fundecl ATTRIBUTE_UNUSED,
244 tree funtype ATTRIBUTE_UNUSED,
245 int size ATTRIBUTE_UNUSED)
246{
247 return 0;
248}
249
250/* Returns true if data model selected via command line option
251 is same as function argument. */
252bool
253cr16_is_data_model (enum data_model_type model)
254{
255 return (model == data_model);
256}
257
258/* Parse relevant options and override. */
259static void
260cr16_override_options (void)
261{
262 /* Disable -fdelete-null-pointer-checks option for CR16 target.
263 Programs which rely on NULL pointer dereferences _not_ halting the
264 program may not work properly with this option. So disable this
265 option. */
266 flag_delete_null_pointer_checks = 0;
267
268 /* FIXME: To avoid spill_failure ICE during exception handling,
269 * disable cse_fllow_jumps. The spill error occurs when compiler
270 * can't find a suitable candidate in GENERAL_REGS class to reload
271 * a 32bit register.
272 * Need to find a better way of avoiding this situation. */
273 if (flag_exceptions)
274 flag_cse_follow_jumps = 0;
275
276 /* If -fpic option, data_model == DM_FAR. */
277 if (flag_pic == NEAR_PIC)
278 {
279 data_model = DM_FAR;
280 }
281
282 /* The only option we want to examine is data model option. */
283 if (cr16_data_model)
284 {
285 if (strcmp (cr16_data_model, "medium") == 0)
286 data_model = DM_DEFAULT;
287 else if (strcmp (cr16_data_model, "near") == 0)
288 data_model = DM_NEAR;
289 else if (strcmp (cr16_data_model, "far") == 0)
290 {
291 if (TARGET_CR16CP)
292 data_model = DM_FAR;
293 else
294 error ("data-model=far not valid for cr16c architecture");
295 }
296 else
297 error ("invalid data model option -mdata-model=%s", cr16_data_model);
298 }
299 else
300 data_model = DM_DEFAULT;
301}
302
303/* Implements the macro TARGET_CONDITIONAL_REGISTER_USAGE. */
304static void
305cr16_conditional_register_usage (void)
306{
307 if (flag_pic)
308 {
309 fixed_regs[12] = call_used_regs[12] = 1;
310 }
311}
312
313/* Stack layout and calling conventions routines. */
314
315/* Return nonzero if the current function being compiled is an interrupt
316 function as specified by the "interrupt" attribute. */
317int
318cr16_interrupt_function_p (void)
319{
320 tree attributes;
321
322 attributes = TYPE_ATTRIBUTES (TREE_TYPE (current_function_decl));
323 return (lookup_attribute ("interrupt", attributes) != NULL_TREE);
324}
325
326/* Compute values for the array current_frame_info.save_regs and the variable
327 current_frame_info.reg_size. The index of current_frame_info.save_regs
328 is numbers of register, each will get 1 if we need to save it in the
329 current function, 0 if not. current_frame_info.reg_size is the total sum
330 of the registers being saved. */
331static void
332cr16_compute_save_regs (void)
333{
334 unsigned int regno;
335
336 /* Initialize here so in case the function is no-return it will be -1. */
337 current_frame_info.last_reg_to_save = -1;
338
339 /* Initialize the number of bytes to be saved. */
340 current_frame_info.reg_size = 0;
341
342 /* No need to save any registers if the function never returns. */
343 if (FUNC_IS_NORETURN_P (current_function_decl) && !MUST_SAVE_REGS_P ())
344 return;
345
346 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
347 {
348 if (fixed_regs[regno])
349 {
350 current_frame_info.save_regs[regno] = 0;
351 continue;
352 }
353
354 /* If this reg is used and not call-used (except RA), save it. */
355 if (cr16_interrupt_function_p ())
356 {
416ff32e 357 if (!crtl->is_leaf && call_used_regs[regno])
b25364a0
S		 358 /* This is a volatile reg in a non-leaf interrupt routine - save
359 it for the sake of its sons. */
360 current_frame_info.save_regs[regno] = 1;
361 else if (df_regs_ever_live_p (regno))
362 /* This reg is used - save it. */
363 current_frame_info.save_regs[regno] = 1;
364 else
365 /* This reg is not used, and is not a volatile - don't save. */
366 current_frame_info.save_regs[regno] = 0;
367 }
368 else
369 {
370 /* If this reg is used and not call-used (except RA), save it. */
371 if (df_regs_ever_live_p (regno)
372 && (!call_used_regs[regno] || regno == RETURN_ADDRESS_REGNUM))
373 current_frame_info.save_regs[regno] = 1;
374 else
375 current_frame_info.save_regs[regno] = 0;
376 }
377 }
378
379 /* Save registers so the exception handler can modify them. */
380 if (crtl->calls_eh_return)
381 {
382 unsigned int i;
383
384 for (i = 0;; ++i)
385 {
386 regno = EH_RETURN_DATA_REGNO (i);
387 if (INVALID_REGNUM == regno)
388 break;
389 current_frame_info.save_regs[regno] = 1;
390 }
391 }
392
393 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
394 if (current_frame_info.save_regs[regno] == 1)
395 {
396 current_frame_info.last_reg_to_save = regno;
397 if (regno >= CR16_FIRST_DWORD_REGISTER)
398 current_frame_info.reg_size += CR16_UNITS_PER_DWORD;
399 else
400 current_frame_info.reg_size += UNITS_PER_WORD;
401 }
402}
403
404/* Compute the size of the local area and the size to be adjusted by the
405 prologue and epilogue. */
406static void
407cr16_compute_frame (void)
408{
409 /* For aligning the local variables. */
410 int stack_alignment = STACK_BOUNDARY / BITS_PER_UNIT;
411 int padding_locals;
412
413 /* Padding needed for each element of the frame. */
414 current_frame_info.var_size = get_frame_size ();
415
416 /* Align to the stack alignment. */
417 padding_locals = current_frame_info.var_size % stack_alignment;
418 if (padding_locals)
419 padding_locals = stack_alignment - padding_locals;
420
421 current_frame_info.var_size += padding_locals;
422 current_frame_info.total_size = current_frame_info.var_size
423 + (ACCUMULATE_OUTGOING_ARGS
424 ? crtl->outgoing_args_size : 0);
425}
426
427/* Implements the macro INITIAL_ELIMINATION_OFFSET, return the OFFSET. */
428int
429cr16_initial_elimination_offset (int from, int to)
430{
431 /* Compute this since we need to use current_frame_info.reg_size. */
432 cr16_compute_save_regs ();
433
434 /* Compute this since we need to use current_frame_info.var_size. */
435 cr16_compute_frame ();
436
437 if (((from) == FRAME_POINTER_REGNUM) && ((to) == STACK_POINTER_REGNUM))
438 return (ACCUMULATE_OUTGOING_ARGS ? crtl->outgoing_args_size : 0);
439 else if (((from) == ARG_POINTER_REGNUM) && ((to) == FRAME_POINTER_REGNUM))
440 return (current_frame_info.reg_size + current_frame_info.var_size);
441 else if (((from) == ARG_POINTER_REGNUM) && ((to) == STACK_POINTER_REGNUM))
442 return (current_frame_info.reg_size + current_frame_info.var_size
443 + (ACCUMULATE_OUTGOING_ARGS ? crtl->outgoing_args_size : 0));
444 else
445 gcc_unreachable ();
446}
447
448/* Register Usage. */
449
450/* Return the class number of the smallest class containing reg number REGNO.
451 This could be a conditional expression or could index an array. */
452enum reg_class
453cr16_regno_reg_class (int regno)
454{
455 if ((regno >= 0) && (regno < CR16_FIRST_DWORD_REGISTER))
456 return SHORT_REGS;
457
458 if ((regno >= CR16_FIRST_DWORD_REGISTER) && (regno < FIRST_PSEUDO_REGISTER))
459 return LONG_REGS;
460
461 return NO_REGS;
462}
463
464/* Return 1 if hard register REGNO can hold a value of machine-mode MODE. */
465int
ef4bddc2 466cr16_hard_regno_mode_ok (int regno, machine_mode mode)
b25364a0
S		 467{
468 if ((GET_MODE_SIZE (mode) >= 4) && (regno == 11))
469 return 0;
470
471 if (mode == DImode || mode == DFmode)
472 {
473 if ((regno > 8) || (regno & 1))
474 return 0;
475 return 1;
476 }
477
478 if ((TARGET_INT32)
479 && ((regno >= 12) && (GET_MODE_SIZE (mode) < 4 )))
480 return 0;
481
482 /* CC can only hold CCmode values. */
483 if (GET_MODE_CLASS (mode) == MODE_CC)
484 return 0;
485 return 1;
486}
487
488/* Returns register number for function return value.*/
489static inline unsigned int
490cr16_ret_register (void)
491{
492 return 0;
493}
494
495/* Implements hook TARGET_STRUCT_VALUE_RTX. */
496static rtx
497cr16_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
498 int incoming ATTRIBUTE_UNUSED)
499{
500 return gen_rtx_REG (Pmode, cr16_ret_register ());
501}
502
503/* Returning function value. */
504
505/* Worker function for TARGET_FUNCTION_VALUE_REGNO_P. */
506static bool
507cr16_function_value_regno_p (const unsigned int regno)
508{
509 return (regno == cr16_ret_register ());
510}
511
512/* Create an RTX representing the place where a
513 library function returns a value of mode MODE. */
514static rtx
ef4bddc2 515cr16_libcall_value (machine_mode mode,
b25364a0
S		 516 const_rtx func ATTRIBUTE_UNUSED)
517{
518 return gen_rtx_REG (mode, cr16_ret_register ());
519}
520
521/* Create an RTX representing the place where a
522 function returns a value of data type VALTYPE. */
523static rtx
524cr16_function_value (const_tree type,
525 const_tree fn_decl_or_type ATTRIBUTE_UNUSED,
526 bool outgoing ATTRIBUTE_UNUSED)
527{
528 return gen_rtx_REG (TYPE_MODE (type), cr16_ret_register ());
529}
530
531/* Passing function arguments. */
532
533/* If enough param regs are available for passing the param of type TYPE return
534 the number of registers needed else 0. */
535static int
536enough_regs_for_param (CUMULATIVE_ARGS * cum, const_tree type,
ef4bddc2 537 machine_mode mode)
b25364a0
S		 538{
539 int type_size;
540 int remaining_size;
541
542 if (mode != BLKmode)
543 type_size = GET_MODE_BITSIZE (mode);
544 else
545 type_size = int_size_in_bytes (type) * BITS_PER_UNIT;
546
547 remaining_size = BITS_PER_WORD * (MAX_REG_FOR_PASSING_ARGS
548 - (MIN_REG_FOR_PASSING_ARGS + cum->ints) +
549 1);
550
551 /* Any variable which is too big to pass in two registers, will pass on
552 stack. */
553 if ((remaining_size >= type_size) && (type_size <= 2 * BITS_PER_WORD))
554 return (type_size + BITS_PER_WORD - 1) / BITS_PER_WORD;
555
556 return 0;
557}
558
559/* Implements the macro FUNCTION_ARG defined in cr16.h. */
560static rtx
ef4bddc2 561cr16_function_arg (cumulative_args_t cum_v, machine_mode mode,
b25364a0
S		 562 const_tree type, bool named ATTRIBUTE_UNUSED)
563{
564 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
565 cum->last_parm_in_reg = 0;
566
567 /* function_arg () is called with this type just after all the args have
568 had their registers assigned. The rtx that function_arg returns from
569 this type is supposed to pass to 'gen_call' but currently it is not
58d745ec 570 implemented. */
b25364a0
S		 571 if (type == void_type_node)
572 return NULL_RTX;
573
574 if (targetm.calls.must_pass_in_stack (mode, type) || (cum->ints < 0))
575 return NULL_RTX;
576
577 if (mode == BLKmode)
578 {
579 /* Enable structures that need padding bytes at the end to pass to a
580 function in registers. */
581 if (enough_regs_for_param (cum, type, mode) != 0)
582 {
583 cum->last_parm_in_reg = 1;
584 return gen_rtx_REG (mode, MIN_REG_FOR_PASSING_ARGS + cum->ints);
585 }
586 }
587
588 if ((MIN_REG_FOR_PASSING_ARGS + cum->ints) > MAX_REG_FOR_PASSING_ARGS)
589 return NULL_RTX;
590 else
591 {
592 if (enough_regs_for_param (cum, type, mode) != 0)
593 {
594 cum->last_parm_in_reg = 1;
595 return gen_rtx_REG (mode, MIN_REG_FOR_PASSING_ARGS + cum->ints);
596 }
597 }
598
599 return NULL_RTX;
600}
601
602/* Implements the macro INIT_CUMULATIVE_ARGS defined in cr16.h. */
603void
604cr16_init_cumulative_args (CUMULATIVE_ARGS * cum, tree fntype,
605 rtx libfunc ATTRIBUTE_UNUSED)
606{
607 tree param, next_param;
608
609 cum->ints = 0;
610
611 /* Determine if this function has variable arguments. This is indicated by
612 the last argument being 'void_type_mode' if there are no variable
613 arguments. Change here for a different vararg. */
614 for (param = (fntype) ? TYPE_ARG_TYPES (fntype) : 0;
615 param != NULL_TREE; param = next_param)
616 {
617 next_param = TREE_CHAIN (param);
618 if ((next_param == NULL_TREE) && (TREE_VALUE (param) != void_type_node))
619 {
620 cum->ints = -1;
621 return;
622 }
623 }
624}
625
626/* Implements the macro FUNCTION_ARG_ADVANCE defined in cr16.h. */
627static void
ef4bddc2 628cr16_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
b25364a0
S		 629 const_tree type, bool named ATTRIBUTE_UNUSED)
630{
631 CUMULATIVE_ARGS * cum = get_cumulative_args (cum_v);
632
633 /* l holds the number of registers required. */
634 int l = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
635
636 /* If the parameter isn't passed on a register don't advance cum. */
637 if (!cum->last_parm_in_reg)
638 return;
639
640 if (targetm.calls.must_pass_in_stack (mode, type) || (cum->ints < 0))
641 return;
642
643 if ((mode == SImode) || (mode == HImode)
644 || (mode == QImode) || (mode == DImode))
645 {
646 if (l <= 1)
647 cum->ints += 1;
648 else
649 cum->ints += l;
650 }
651 else if ((mode == SFmode) || (mode == DFmode))
652 cum->ints += l;
653 else if ((mode) == BLKmode)
654 {
655 if ((l = enough_regs_for_param (cum, type, mode)) != 0)
656 cum->ints += l;
657 }
658 return;
659}
660
661/* Implements the macro FUNCTION_ARG_REGNO_P defined in cr16.h.
662 Return nonzero if N is a register used for passing parameters. */
663int
664cr16_function_arg_regno_p (int n)
665{
666 return ((n <= MAX_REG_FOR_PASSING_ARGS) && (n >= MIN_REG_FOR_PASSING_ARGS));
667}
668
669/* Addressing modes.
670 Following set of function implement the macro GO_IF_LEGITIMATE_ADDRESS
671 defined in cr16.h. */
672
673/* Helper function to check if is a valid base register that can
674 hold address. */
675static int
676cr16_addr_reg_p (rtx addr_reg)
677{
678 rtx reg;
679
680 if (REG_P (addr_reg))
681 reg = addr_reg;
682 else if ((GET_CODE (addr_reg) == SUBREG)
683 && REG_P (SUBREG_REG (addr_reg))
684 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (addr_reg)))
685 <= UNITS_PER_WORD))
686 reg = SUBREG_REG (addr_reg);
687 else
688 return FALSE;
689
690 if (GET_MODE (reg) != Pmode)
691 return FALSE;
692
693 return TRUE;
694}
695
696/* Helper functions: Created specifically for decomposing operand of CONST
697 Recursively look into expression x for code or data symbol.
698 The function expects the expression to contain combination of
699 SYMBOL_REF, CONST_INT, (PLUS or MINUS)
700 LABEL_REF, CONST_INT, (PLUS or MINUS)
701 SYMBOL_REF
702 LABEL_REF
703 All other combinations will result in code = -1 and data = ILLEGAL_DM
704 code data
705 -1 ILLEGAL_DM The expression did not contain SYMBOL_REF or LABEL_REF
706 0 DM_FAR SYMBOL_REF was found and it was far data reference.
707 0 DM_DEFAULT SYMBOL_REF was found and it was medium data reference.
708 1 ILLEGAL_DM LABEL_REF was found.
709 2 ILLEGAL_DM SYMBOL_REF was found and it was function reference. */
710void
711cr16_decompose_const (rtx x, int *code, enum data_model_type *data,
712 bool treat_as_const)
713{
714 *code = -1;
715 *data = ILLEGAL_DM;
716 switch (GET_CODE (x))
717 {
718 case SYMBOL_REF:
719 *code = SYMBOL_REF_FUNCTION_P (x) ? 2 : 0;
720 /* 2 indicates func sym. */
721 if (*code == 0)
722 {
723 if (CR16_TARGET_DATA_NEAR)
724 *data = DM_DEFAULT;
725 else if (CR16_TARGET_DATA_MEDIUM)
726 *data = DM_FAR;
727 else if (CR16_TARGET_DATA_FAR)
728 {
729 if (treat_as_const)
730 /* This will be used only for printing
731 the qualifier. This call is (may be)
732 made by cr16_print_operand_address. */
733 *data = DM_FAR;
734 else
735 /* This call is (may be) made by
736 cr16_legitimate_address_p. */
737 *data = ILLEGAL_DM;
738 }
739 }
740 return;
741
742 case LABEL_REF:
743 /* 1 - indicates non-function symbol. */
744 *code = 1;
745 return;
746
747 case PLUS:
748 case MINUS:
749 /* Look into the tree nodes. */
750 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
751 cr16_decompose_const (XEXP (x, 1), code, data, treat_as_const);
752 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
753 cr16_decompose_const (XEXP (x, 0), code, data, treat_as_const);
754 return;
755 default:
756 return;
757 }
758}
759
760/* Decompose Address
761 This function decomposes the address returns the type of address
762 as defined in enum cr16_addrtype. It also fills the parameter *out.
763 The decomposed address can be used for two purposes. One to
764 check if the address is valid and second to print the address
765 operand.
766
767 Following tables list valid address supported in CR16C/C+ architectures.
768 Legend:
769 aN : Absoulte address N-bit address
770 R : One 16-bit register
771 RP : Consecutive two 16-bit registers or one 32-bit register
772 I : One 32-bit register
773 dispN : Signed displacement of N-bits
774
775 ----Code addresses----
776 Branch operands:
777 disp9 : CR16_ABSOLUTE (disp)
778 disp17 : CR16_ABSOLUTE (disp)
779 disp25 : CR16_ABSOLUTE (disp)
780 RP + disp25 : CR16_REGP_REL (base, disp)
781
782 Jump operands:
783 RP : CR16_REGP_REL (base, disp=0)
784 a24 : CR16_ABSOLUTE (disp)
785
786 ----Data addresses----
787 a20 : CR16_ABSOLUTE (disp) near (1M)
788 a24 : CR16_ABSOLUTE (disp) medium (16M)
789 R + d20 : CR16_REG_REL (base, disp) near (1M+64K)
790 RP + d4 : CR16_REGP_REL (base, disp) far (4G)
791 RP + d16 : CR16_REGP_REL (base, disp) far (4G)
792 RP + d20 : CR16_REGP_REL (base, disp) far (4G)
793 I : *** Valid but port does not support this
794 I + a20 : *** Valid but port does not support this
795 I + RP + d14: CR16_INDEX_REGP_REL (base, index, disp) far (4G)
796 I + RP + d20: CR16_INDEX_REGP_REL (base, index, disp) far (4G)
797
798 Decomposing Data model in case of absolute address.
799
800 Target Option Address type Resultant Data ref type
801 ---------------------- ------------ -----------------------
802 CR16_TARGET_MODEL_NEAR ABS20 DM_DEFAULT
803 CR16_TARGET_MODEL_NEAR IMM20 DM_DEFAULT
804 CR16_TARGET_MODEL_NEAR ABS24 Invalid
805 CR16_TARGET_MODEL_NEAR IMM32 Invalid
806
807 CR16_TARGET_MODEL_MEDIUM ABS20 DM_DEFAULT
808 CR16_TARGET_MODEL_MEDIUM IMM20 DM_DEFAULT
809 CR16_TARGET_MODEL_MEDIUM ABS24 DM_FAR
810 CR16_TARGET_MODEL_MEDIUM IMM32 Invalid
811
812 CR16_TARGET_MODEL_FAR ABS20 DM_DEFAULT
813 CR16_TARGET_MODEL_FAR IMM20 DM_DEFAULT
814 CR16_TARGET_MODEL_FAR ABS24 DM_FAR
815 CR16_TARGET_MODEL_FAR IMM32 DM_FAR. */
816enum cr16_addrtype
817cr16_decompose_address (rtx addr, struct cr16_address *out,
818 bool debug_print, bool treat_as_const)
819{
820 rtx base = NULL_RTX, disp = NULL_RTX, index = NULL_RTX;
821 enum data_model_type data = ILLEGAL_DM;
822 int code = -1;
823 enum cr16_addrtype retval = CR16_INVALID;
824
825 switch (GET_CODE (addr))
826 {
827 case CONST_INT:
828 /* Absolute address (known at compile time). */
829 code = 0;
830 if (debug_print)
831 fprintf (stderr, "\ncode:%d", code);
832 disp = addr;
833
834 if (debug_print)
835 {
836 fprintf (stderr, "\ndisp:");
837 debug_rtx (disp);
838 }
839
840 if (UNSIGNED_INT_FITS_N_BITS (INTVAL (disp), 20))
841 {
842 data = DM_DEFAULT;
843 if (debug_print)
844 fprintf (stderr, "\ndata:%d", data);
845 retval = CR16_ABSOLUTE;
846 }
847 else if (UNSIGNED_INT_FITS_N_BITS (INTVAL (disp), 24))
848 {
849 if (!CR16_TARGET_DATA_NEAR)
850 {
851 data = DM_FAR;
852 if (debug_print)
853 fprintf (stderr, "\ndata:%d", data);
854 retval = CR16_ABSOLUTE;
855 }
856 else
857 return CR16_INVALID; /* ABS24 is not support in NEAR model. */
858 }
859 else
860 return CR16_INVALID;
861 break;
862
863 case CONST:
864 /* A CONST is an expression of PLUS or MINUS with
865 CONST_INT, SYMBOL_REF or LABEL_REF. This is the
866 result of assembly-time arithmetic computation. */
867 retval = CR16_ABSOLUTE;
868 disp = addr;
869 /* Call the helper function to check the validity. */
870 cr16_decompose_const (XEXP (addr, 0), &code, &data, treat_as_const);
871 if ((code == 0) && (data == ILLEGAL_DM))
872 /* CONST is not valid code or data address. */
873 return CR16_INVALID;
874 if (debug_print)
875 {
876 fprintf (stderr, "\ndisp:");
877 debug_rtx (disp);
878 fprintf (stderr, "\ncode:%d", code);
879 fprintf (stderr, "\ndata:%d", data);
880 }
881 break;
882
883 case LABEL_REF:
884 retval = CR16_ABSOLUTE;
885 disp = addr;
886 /* 1 - indicates non-function symbol. */
887 code = 1;
888 if (debug_print)
889 {
890 fprintf (stderr, "\ndisp:");
891 debug_rtx (disp);
892 fprintf (stderr, "\ncode:%d", code);
893 }
894 break;
895
896 case SYMBOL_REF:
897 /* Absolute address (known at link time). */
898 retval = CR16_ABSOLUTE;
899 disp = addr;
900 /* This is a code address if symbol_ref is a function. */
901 /* 2 indicates func sym. */
902 code = SYMBOL_REF_FUNCTION_P (addr) ? 2 : 0;
903 if (debug_print)
904 {
905 fprintf (stderr, "\ndisp:");
906 debug_rtx (disp);
907 fprintf (stderr, "\ncode:%d", code);
908 }
909 /* If not function ref then check if valid data ref. */
910 if (code == 0)
911 {
912 if (CR16_TARGET_DATA_NEAR)
913 data = DM_DEFAULT;
914 else if (CR16_TARGET_DATA_MEDIUM)
915 data = DM_FAR;
916 else if (CR16_TARGET_DATA_FAR)
917 {
918 if (treat_as_const)
919 /* This will be used only for printing the
920 qualifier. This call is (may be) made
921 by cr16_print_operand_address. */
922 data = DM_FAR;
923 else
924 /* This call is (may be) made by
925 cr16_legitimate_address_p. */
926 return CR16_INVALID;
927 }
928 else
929 data = DM_DEFAULT;
930 }
931 if (debug_print)
932 fprintf (stderr, "\ndata:%d", data);
933 break;
934
935 case REG:
936 case SUBREG:
937 /* Register relative address. */
938 /* Assume REG fits in a single register. */
939 retval = CR16_REG_REL;
940 if (GET_MODE_BITSIZE (GET_MODE (addr)) > BITS_PER_WORD)
941 if (!LONG_REG_P (REGNO (addr)))
942 /* REG will result in reg pair. */
943 retval = CR16_REGP_REL;
944 base = addr;
945 if (debug_print)
946 {
947 fprintf (stderr, "\nbase:");
948 debug_rtx (base);
949 }
950 break;
951
952 case PLUS:
953 switch (GET_CODE (XEXP (addr, 0)))
954 {
955 case REG:
956 case SUBREG:
957 /* REG + DISP20. */
958 /* All Reg relative addresses having a displacement needs
959 to fit in 20-bits. */
960 disp = XEXP (addr, 1);
961 if (debug_print)
962 {
963 fprintf (stderr, "\ndisp:");
964 debug_rtx (disp);
965 }
966 switch (GET_CODE (XEXP (addr, 1)))
967 {
968 case CONST_INT:
969 /* Shall fit in 20-bits. */
970 if (!UNSIGNED_INT_FITS_N_BITS (INTVAL (disp), 20))
971 return CR16_INVALID;
972 code = 0;
973 if (debug_print)
974 fprintf (stderr, "\ncode:%d", code);
975 break;
976
977 case UNSPEC:
978 switch (XINT (XEXP (addr, 1), 1))
979 {
980 case UNSPEC_LIBRARY_OFFSET:
981 default:
982 gcc_unreachable ();
983 }
984 break;
985
986 case LABEL_REF:
987 case SYMBOL_REF:
988 case CONST:
989 /* This is also a valid expression for address.
990 However, we cannot ascertain if the resultant
991 displacement will be valid 20-bit value. Therefore,
992 lets not allow such an expression for now. This will
993 be updated when we find a way to validate this
994 expression as legitimate address.
995 Till then fall through CR16_INVALID. */
996 default:
997 return CR16_INVALID;
998 }
999
1000 /* Now check if REG can fit into single or pair regs. */
1001 retval = CR16_REG_REL;
1002 base = XEXP (addr, 0);
1003 if (debug_print)
1004 {
1005 fprintf (stderr, "\nbase:");
1006 debug_rtx (base);
1007 }
1008 if (GET_MODE_BITSIZE (GET_MODE ((XEXP (addr, 0)))) > BITS_PER_WORD)
1009 {
1010 if (!LONG_REG_P (REGNO ((XEXP (addr, 0)))))
1011 /* REG will result in reg pair. */
1012 retval = CR16_REGP_REL;
1013 }
1014 break;
1015
1016 case PLUS:
1017 /* Valid expr:
1018 plus
1019 /\
1020 / \
1021 plus idx
1022 /\
1023 / \
1024 reg const_int
1025
1026 Check if the operand 1 is valid index register. */
1027 data = ILLEGAL_DM;
1028 if (debug_print)
1029 fprintf (stderr, "\ndata:%d", data);
1030 switch (GET_CODE (XEXP (addr, 1)))
1031 {
1032 case REG:
1033 case SUBREG:
1034 if (!REG_OK_FOR_INDEX_P (XEXP (addr, 1)))
1035 return CR16_INVALID;
1036 /* OK. REG is a valid index register. */
1037 index = XEXP (addr, 1);
1038 if (debug_print)
1039 {
1040 fprintf (stderr, "\nindex:");
1041 debug_rtx (index);
1042 }
1043 break;
1044 default:
1045 return CR16_INVALID;
1046 }
1047 /* Check if operand 0 of operand 0 is REGP. */
1048 switch (GET_CODE (XEXP (XEXP (addr, 0), 0)))
1049 {
1050 case REG:
1051 case SUBREG:
1052 /* Now check if REG is a REGP and not in LONG regs. */
1053 if (GET_MODE_BITSIZE (GET_MODE (XEXP (XEXP (addr, 0), 0)))
1054 > BITS_PER_WORD)
1055 {
1056 if (REGNO (XEXP (XEXP (addr, 0), 0))
1057 >= CR16_FIRST_DWORD_REGISTER)
1058 return CR16_INVALID;
1059 base = XEXP (XEXP (addr, 0), 0);
1060 if (debug_print)
1061 {
1062 fprintf (stderr, "\nbase:");
1063 debug_rtx (base);
1064 }
1065 }
1066 else
1067 return CR16_INVALID;
1068 break;
1069 default:
1070 return CR16_INVALID;
1071 }
1072 /* Now check if the operand 1 of operand 0 is const_int. */
1073 if (GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
1074 {
1075 disp = XEXP (XEXP (addr, 0), 1);
1076 if (debug_print)
1077 {
1078 fprintf (stderr, "\ndisp:");
1079 debug_rtx (disp);
1080 }
1081 if (!UNSIGNED_INT_FITS_N_BITS (INTVAL (disp), 20))
1082 return CR16_INVALID;
1083 }
1084 else
1085 return CR16_INVALID;
1086 retval = CR16_INDEX_REGP_REL;
1087 break;
1088 default:
1089 return CR16_INVALID;
1090 }
1091 break;
1092
1093 default:
1094 return CR16_INVALID;
1095 }
1096
1097 /* Check if the base and index registers are valid. */
1098 if (base && !(cr16_addr_reg_p (base)))
1099 return CR16_INVALID;
1100 if (base && !(CR16_REG_OK_FOR_BASE_P (base)))
1101 return CR16_INVALID;
1102 if (index && !(REG_OK_FOR_INDEX_P (index)))
1103 return CR16_INVALID;
1104
1105 /* Write the decomposition to out parameter. */
1106 out->base = base;
1107 out->disp = disp;
1108 out->index = index;
1109 out->data = data;
1110 out->code = code;
1111
1112 return retval;
1113}
1114
1115/* Return non-zero value if 'x' is legitimate PIC operand
1116 when generating PIC code. */
1117int
1118legitimate_pic_operand_p (rtx x)
1119{
1120 switch (GET_CODE (x))
1121 {
1122 case SYMBOL_REF:
1123 return 0;
b25364a0
S		 1124 case LABEL_REF:
1125 return 0;
b25364a0
S		 1126 case CONST:
1127 /* REVISIT: Use something like symbol_referenced_p. */
1128 if (GET_CODE (XEXP (x, 0)) == PLUS
1129 && (GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1130 || GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF)
1131 && (GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT))
1132 return 0;
1133 break;
1134 case MEM:
1135 return legitimate_pic_operand_p (XEXP (x, 0));
b25364a0
S		 1136 default:
1137 break;
1138 }
1139 return 1;
1140}
1141
1142/* Convert a non-PIC address in `orig' to a PIC address in `reg'.
1143
1144 Input Output (-f pic) Output (-f PIC)
1145 orig reg
1146
1147 C1 symbol symbol@BRO (r12) symbol@GOT (r12)
1148
1149 C2 symbol + offset symbol+offset@BRO (r12) symbol+offset@GOT (r12)
1150
1151 NOTE: @BRO is added using unspec:BRO
1152 NOTE: @GOT is added using unspec:GOT. */
1153rtx
ef4bddc2 1154legitimize_pic_address (rtx orig, machine_mode mode ATTRIBUTE_UNUSED,
b25364a0
S		 1155 rtx reg)
1156{
1157 /* First handle a simple SYMBOL_REF or LABEL_REF. */
1158 if (GET_CODE (orig) == SYMBOL_REF || GET_CODE (orig) == LABEL_REF)
1159 {
1160 if (reg == 0)
1161 reg = gen_reg_rtx (Pmode);
1162
1163 if (flag_pic == NEAR_PIC)
1164 {
1165 /* Unspec to handle -fpic option. */
1166 emit_insn (gen_unspec_bro_addr (reg, orig));
1167 emit_insn (gen_addsi3 (reg, reg, pic_offset_table_rtx));
1168 }
1169 else if (flag_pic == FAR_PIC)
1170 {
1171 /* Unspec to handle -fPIC option. */
1172 emit_insn (gen_unspec_got_addr (reg, orig));
1173 }
1174 return reg;
1175 }
1176 else if (GET_CODE (orig) == CONST)
1177 {
1178 /* To handle (symbol + offset). */
1179 rtx base, offset;
1180
1181 if (GET_CODE (XEXP (orig, 0)) == PLUS
1182 && XEXP (XEXP (orig, 0), 0) == pic_offset_table_rtx)
1183 return orig;
1184
1185 if (reg == 0)
1186 {
1187 gcc_assert (can_create_pseudo_p ());
1188 reg = gen_reg_rtx (Pmode);
1189 }
1190
1191 gcc_assert (GET_CODE (XEXP (orig, 0)) == PLUS);
1192
1193 base = legitimize_pic_address (XEXP (XEXP (orig, 0), 0), Pmode, reg);
1194 offset = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode,
1195 base == reg ? 0 : reg);
1196
1197 /* REVISIT: Optimize for const-offsets. */
1198 emit_insn (gen_addsi3 (reg, base, offset));
1199
1200 return reg;
1201 }
1202 return orig;
1203}
1204
1205/* Implementation of TARGET_LEGITIMATE_ADDRESS_P. */
1206static bool
ef4bddc2 1207cr16_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED,
b25364a0
S		 1208 rtx addr, bool strict)
1209{
1210 enum cr16_addrtype addrtype;
1211 struct cr16_address address;
1212
1213 if (TARGET_DEBUG_ADDR)
1214 {
1215 fprintf (stderr,
1216 "\n======\nTARGET_LEGITIMATE_ADDRESS_P, mode = %s, strict = %d",
1217 GET_MODE_NAME (mode), strict);
1218 debug_rtx (addr);
1219 }
1220 addrtype = cr16_decompose_address (addr, &address,
1221 (TARGET_DEBUG_ADDR ? 1 : 0), FALSE);
1222
1223 if (TARGET_DEBUG_ADDR)
1224 {
1225 const char *typestr;
1226
1227 switch (addrtype)
1228 {
1229 case CR16_INVALID:
1230 typestr = "invalid";
1231 break;
1232 case CR16_ABSOLUTE:
1233 typestr = "absolute";
1234 break;
1235 case CR16_REG_REL:
1236 typestr = "register relative";
1237 break;
1238 case CR16_REGP_REL:
1239 typestr = "register pair relative";
1240 break;
1241 case CR16_INDEX_REGP_REL:
1242 typestr = "index + register pair relative";
1243 break;
1244 default:
1245 gcc_unreachable ();
1246 }
1247 fprintf (stderr, "\ncr16 address type: %s\n", typestr);
1248 }
1249
1250 if (addrtype == CR16_INVALID)
1251 return FALSE;
1252
1253 if (strict)
1254 {
1255 if (address.base
1256 && !REGNO_MODE_OK_FOR_BASE_P (REGNO (address.base), mode))
1257 {
1258 if (TARGET_DEBUG_ADDR)
1259 fprintf (stderr, "base register not strict\n");
1260 return FALSE;
1261 }
1262 if (address.index && !REGNO_OK_FOR_INDEX_P (REGNO (address.index)))
1263 {
1264 if (TARGET_DEBUG_ADDR)
1265 fprintf (stderr, "index register not strict\n");
1266 return FALSE;
1267 }
1268 }
1269
1270 /* Return true if addressing mode is register relative. */
1271 if (flag_pic)
1272 {
1273 if (addrtype == CR16_REG_REL || addrtype == CR16_REGP_REL)
1274 return TRUE;
1275 else
1276 return FALSE;
1277 }
1278
1279 return TRUE;
1280}
1281
1282/* Routines to compute costs. */
1283
1284/* Return cost of the memory address x. */
1285static int
ef4bddc2 1286cr16_address_cost (rtx addr, machine_mode mode ATTRIBUTE_UNUSED,
b413068c
OE		 1287 addr_space_t as ATTRIBUTE_UNUSED,
1288 bool speed ATTRIBUTE_UNUSED)
b25364a0
S		 1289{
1290 enum cr16_addrtype addrtype;
1291 struct cr16_address address;
1292 int cost = 2;
1293
1294 addrtype = cr16_decompose_address (addr, &address, 0, FALSE);
1295
1296 gcc_assert (addrtype != CR16_INVALID);
1297
1298 /* CR16_ABSOLUTE : 3
1299 CR16_REG_REL (disp !=0) : 4
1300 CR16_REG_REL (disp ==0) : 5
1301 CR16_REGP_REL (disp !=0) : 6
1302 CR16_REGP_REL (disp ==0) : 7
1303 CR16_INDEX_REGP_REL (disp !=0) : 8
1304 CR16_INDEX_REGP_REL (disp ==0) : 9. */
1305 switch (addrtype)
1306 {
1307 case CR16_ABSOLUTE:
1308 cost += 1;
1309 break;
1310 case CR16_REGP_REL:
1311 cost += 2;
1312 /* Fall through. */
1313 case CR16_REG_REL:
1314 cost += 3;
1315 if (address.disp)
1316 cost -= 1;
1317 break;
1318 case CR16_INDEX_REGP_REL:
1319 cost += 7;
1320 if (address.disp)
1321 cost -= 1;
1322 default:
1323 break;
1324 }
1325
1326 if (TARGET_DEBUG_ADDR)
1327 {
1328 fprintf (stderr, "\n======\nmacro TARGET_ADDRESS_COST = %d\n", cost);
1329 debug_rtx (addr);
1330 }
1331
1332 return cost;
1333}
1334
1335
1336/* Implement `TARGET_REGISTER_MOVE_COST'. */
1337static int
ef4bddc2 1338cr16_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
b25364a0
S		 1339 reg_class_t from ATTRIBUTE_UNUSED, reg_class_t to)
1340{
1341 return (to != GENERAL_REGS ? 8 : 2);
1342}
1343
1344/* Implement `TARGET_MEMORY_MOVE_COST'. */
1345
1346/* Return the cost of moving data of mode MODE between a register of class
1347 CLASS and memory; IN is zero if the value is to be written to memory,
1348 nonzero if it is to be read in. This cost is relative to those in
1349 REGISTER_MOVE_COST. */
1350static int
ef4bddc2 1351cr16_memory_move_cost (machine_mode mode,
b25364a0
S		 1352 reg_class_t rclass ATTRIBUTE_UNUSED,
1353 bool in ATTRIBUTE_UNUSED)
1354{
1355 /* One LD or ST takes twice the time of a simple reg-reg move. */
1356 if (reg_classes_intersect_p (rclass, GENERAL_REGS))
1357 return (4 * HARD_REGNO_NREGS (0, mode));
1358 else
1359 return (100);
1360}
1361
1362/* Instruction output. */
1363
1364/* Check if a const_double is ok for cr16 store-immediate instructions. */
1365int
1366cr16_const_double_ok (rtx op)
1367{
1368 if (GET_MODE (op) == SFmode)
1369 {
b25364a0 1370 long l;
34a72c33 1371 REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (op), l);
b25364a0
S		 1372 return UNSIGNED_INT_FITS_N_BITS (l, 4) ? 1 : 0;
1373 }
1374
1375 return ((UNSIGNED_INT_FITS_N_BITS (CONST_DOUBLE_LOW (op), 4)) &&
1376 (UNSIGNED_INT_FITS_N_BITS (CONST_DOUBLE_HIGH (op), 4))) ? 1 : 0;
1377}
1378
1379/* Returns bit position of first 0 or 1 bit.
1380 It is safe to assume val as 16-bit wide. */
1381int
1382cr16_operand_bit_pos (int val, int bitval)
1383{
1384 int i;
1385 if (bitval == 0)
1386 val = ~val;
1387
1388 for (i = 0; i < 16; i++)
1389 if (val & (1 << i))
1390 break;
1391 return i;
1392}
1393
1394/* Implements the macro PRINT_OPERAND defined in cr16.h. */
1395static void
1396cr16_print_operand (FILE * file, rtx x, int code)
1397{
1398 int ptr_dereference = 0;
1399
1400 switch (code)
1401 {
1402 case 'd':
1403 {
1404 const char *cr16_cmp_str;
1405 switch (GET_CODE (x))
1406 {
1407 /* MD: compare (reg, reg or imm) but CR16: cmp (reg or imm, reg)
1408 -> swap all non symmetric ops. */
1409 case EQ:
1410 cr16_cmp_str = "eq";
1411 break;
1412 case NE:
1413 cr16_cmp_str = "ne";
1414 break;
1415 case GT:
1416 cr16_cmp_str = "lt";
1417 break;
1418 case GTU:
1419 cr16_cmp_str = "lo";
1420 break;
1421 case LT:
1422 cr16_cmp_str = "gt";
1423 break;
1424 case LTU:
1425 cr16_cmp_str = "hi";
1426 break;
1427 case GE:
1428 cr16_cmp_str = "le";
1429 break;
1430 case GEU:
1431 cr16_cmp_str = "ls";
1432 break;
1433 case LE:
1434 cr16_cmp_str = "ge";
1435 break;
1436 case LEU:
1437 cr16_cmp_str = "hs";
1438 break;
1439 default:
1440 gcc_unreachable ();
1441 }
1442 fprintf (file, "%s", cr16_cmp_str);
1443 return;
1444 }
1445 case '$':
1446 putc ('$', file);
1447 return;
1448
1449 case 'p':
1450 if (GET_CODE (x) == REG)
1451 {
1452 /* For Push instructions, we should not print register pairs. */
1453 fprintf (file, "%s", reg_names[REGNO (x)]);
1454 return;
1455 }
1456 break;
1457
1458 case 'b':
1459 /* Print the immediate address for bal
1460 'b' is used instead of 'a' to avoid compiler calling
1461 the GO_IF_LEGITIMATE_ADDRESS which cannot
1462 perform checks on const_int code addresses as it
1463 assumes all const_int are data addresses. */
1464 fprintf (file, "0x%lx", INTVAL (x));
1465 return;
1466
1467 case 'r':
1468 /* Print bit position of first 0. */
1469 fprintf (file, "%d", cr16_operand_bit_pos (INTVAL (x), 0));
1470 return;
1471
1472 case 's':
1473 /* Print bit position of first 1. */
1474 fprintf (file, "%d", cr16_operand_bit_pos (INTVAL (x), 1));
1475 return;
1476 case 'g':
1477 /* 'g' is used for implicit mem: dereference. */
1478 ptr_dereference = 1;
1479 case 'f':
1480 case 0:
1481 /* default. */
1482 switch (GET_CODE (x))
1483 {
1484 case REG:
1485 if (GET_MODE_BITSIZE (GET_MODE (x)) > BITS_PER_WORD)
1486 {
1487 if (LONG_REG_P (REGNO (x)))
1488 fprintf (file, "(%s)", reg_names[REGNO (x)]);
1489 else
1490 fprintf (file, "(%s,%s)", reg_names[REGNO (x) + 1],
1491 reg_names[REGNO (x)]);
1492 }
1493 else
1494 fprintf (file, "%s", reg_names[REGNO (x)]);
1495 return;
1496
1497 case MEM:
cc8ca59e 1498 output_address (GET_MODE (x), XEXP (x, 0));
b25364a0
S		 1499 return;
1500
1501 case CONST_DOUBLE:
1502 {
b25364a0
S		 1503 long l;
1504
34a72c33 1505 REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (x), l);
b25364a0
S		 1506
1507 fprintf (file, "$0x%lx", l);
1508 return;
1509 }
1510 case CONST_INT:
1511 {
1512 fprintf (file, "$%ld", INTVAL (x));
1513 return;
1514 }
1515 case UNSPEC:
1516 switch (XINT (x, 1))
1517 {
1518 default:
1519 gcc_unreachable ();
1520 }
1521 break;
1522
1523 default:
1524 if (!ptr_dereference)
1525 {
1526 putc ('$', file);
1527 }
cc8ca59e 1528 cr16_print_operand_address (file, VOIDmode, x);
b25364a0
S		 1529 return;
1530 }
1531 default:
1532 output_operand_lossage ("invalid %%xn code");
1533 }
1534
1535 gcc_unreachable ();
1536}
1537
1538/* Implements the macro PRINT_OPERAND_ADDRESS defined in cr16.h. */
1539
1540static void
cc8ca59e 1541cr16_print_operand_address (FILE * file, machine_mode /*mode*/, rtx addr)
b25364a0
S		 1542{
1543 enum cr16_addrtype addrtype;
1544 struct cr16_address address;
1545
1546 /* Decompose the address. Also ask it to treat address as constant. */
1547 addrtype = cr16_decompose_address (addr, &address, 0, TRUE);
1548
1549 if (address.disp && GET_CODE (address.disp) == UNSPEC)
1550 {
1551 debug_rtx (addr);
1552 }
1553
1554 switch (addrtype)
1555 {
1556 case CR16_REG_REL:
1557 if (address.disp)
1558 {
1559 if (GET_CODE (address.disp) == UNSPEC)
1560 cr16_print_operand (file, address.disp, 0);
1561 else
1562 output_addr_const (file, address.disp);
1563 }
1564 else
1565 fprintf (file, "0");
1566 fprintf (file, "(%s)", reg_names[REGNO (address.base)]);
1567 break;
1568
1569 case CR16_ABSOLUTE:
1570 if (address.disp)
1571 output_addr_const (file, address.disp);
1572 else
1573 fprintf (file, "0");
1574 break;
1575
1576 case CR16_INDEX_REGP_REL:
1577 fprintf (file, "[%s]", reg_names[REGNO (address.index)]);
1578 /* Fall through. */
1579 case CR16_REGP_REL:
1580 if (address.disp)
1581 {
1582 if (GET_CODE (address.disp) == UNSPEC)
1583 cr16_print_operand (file, address.disp, 0);
1584 else
1585 output_addr_const (file, address.disp);
1586 }
1587 else
1588 fprintf (file, "0");
1589 fprintf (file, "(%s,%s)", reg_names[REGNO (address.base) + 1],
1590 reg_names[REGNO (address.base)]);
1591 break;
1592 default:
1593 debug_rtx (addr);
1594 gcc_unreachable ();
1595 }
1596 /* Add qualifiers to the address expression that was just printed. */
1597 if (flag_pic < NEAR_PIC && address.code == 0)
1598 {
1599 if (address.data == DM_FAR)
1600 /* Addr contains SYMBOL_REF & far data ptr. */
1601 fprintf (file, "@l");
1602 else if (address.data == DM_DEFAULT)
1603 /* Addr contains SYMBOL_REF & medium data ptr. */
1604 fprintf (file, "@m");
1605 /* Addr contains SYMBOL_REF & medium data ptr. */
1606 else if (address.data == DM_NEAR)
1607 /* Addr contains SYMBOL_REF & near data ptr. */
1608 fprintf (file, "@s");
1609 }
1610 else if (flag_pic == NEAR_PIC
1611 && (address.code == 0) && (address.data == DM_FAR
1612 || address.data == DM_DEFAULT
1613 || address.data == DM_NEAR))
1614 {
1615 fprintf (file, "@l");
1616 }
1617 else if (flag_pic == NEAR_PIC && address.code == 2)
1618 {
1619 fprintf (file, "pic");
1620 }
1621 else if (flag_pic == NEAR_PIC && address.code == 1)
1622 {
1623 fprintf (file, "@cpic");
1624 }
1625
1626 else if (flag_pic == FAR_PIC && address.code == 2)
1627 {
1628 /* REVISIT: cr16 register indirect jump expects a 1-bit right shifted
1629 address ! GOTc tells assembler this symbol is a text-address
1630 This needs to be fixed in such a way that this offset is done
1631 only in the case where an address is being used for indirect jump
1632 or call. Determining the potential usage of loadd is of course not
1633 possible always. Eventually, this has to be fixed in the
1634 processor. */
1635 fprintf (file, "GOT (%s)", reg_names[PIC_OFFSET_TABLE_REGNUM]);
1636 }
1637 else if (flag_pic == FAR_PIC && address.code == 1)
1638 {
1639 fprintf (file, "@cGOT (%s)", reg_names[PIC_OFFSET_TABLE_REGNUM]);
1640 }
1641
1642 else if (flag_pic == FAR_PIC &&
1643 (address.data == DM_FAR || address.data == DM_DEFAULT
1644 || address.data == DM_NEAR))
1645 {
1646 fprintf (file, "@GOT (%s)", reg_names[PIC_OFFSET_TABLE_REGNUM]);
1647 }
1648}
1649
1650/* Machine description helper functions. */
1651
1652/* Called from cr16.md. The return value depends on the parameter push_or_pop:
1653 When push_or_pop is zero -> string for push instructions of prologue.
1654 When push_or_pop is nonzero -> string for pop/popret/retx in epilogue.
1655 Relies on the assumptions:
1656 1. RA is the last register to be saved.
1657 2. The maximal value of the counter is MAX_COUNT. */
1658char *
1659cr16_prepare_push_pop_string (int push_or_pop)
1660{
1661 /* j is the number of registers being saved, takes care that there won't be
1662 more than 8 in one push/pop instruction. */
1663
1664 /* For the register mask string. */
1665 static char one_inst_str[50];
1666
1667 /* i is the index of current_frame_info.save_regs[], going from 0 until
1668 current_frame_info.last_reg_to_save. */
1669 int i, start_reg;
1670 int word_cnt;
1671 int print_ra;
1672 char *return_str;
1673
1674 /* For reversing on the push instructions if there are more than one. */
1675 char *temp_str;
1676
1677 return_str = (char *) xmalloc (160);
1678 temp_str = (char *) xmalloc (160);
1679
1680 /* Initialize. */
1681 memset (return_str, 0, 3);
1682
1683 i = 0;
1684 while (i <= current_frame_info.last_reg_to_save)
1685 {
1686 /* Prepare mask for one instruction. */
1687 one_inst_str[0] = 0;
1688
1689 /* To count number of words in one instruction. */
1690 word_cnt = 0;
1691 start_reg = i;
1692 print_ra = 0;
1693 while ((word_cnt < MAX_COUNT)
1694 && (i <= current_frame_info.last_reg_to_save))
1695 {
1696 /* For each non consecutive save register,
1697 a new instruction shall be generated. */
1698 if (!current_frame_info.save_regs[i])
1699 {
1700 /* Move to next reg and break. */
1701 ++i;
1702 break;
1703 }
1704
1705 if (i == RETURN_ADDRESS_REGNUM)
1706 print_ra = 1;
1707 else
1708 {
1709 /* Check especially if adding 2 does not cross the MAX_COUNT. */
1710 if ((word_cnt + ((i < CR16_FIRST_DWORD_REGISTER) ? 1 : 2))
1711 >= MAX_COUNT)
1712 break;
1713 /* Increase word count by 2 for long registers except RA. */
1714 word_cnt += ((i < CR16_FIRST_DWORD_REGISTER) ? 1 : 2);
1715 }
1716 ++i;
1717 }
1718
1719 /* No need to generate any instruction as
1720 no register or RA needs to be saved. */
1721 if ((word_cnt == 0) && (print_ra == 0))
1722 continue;
1723
1724 /* Now prepare the instruction operands. */
1725 if (word_cnt > 0)
1726 {
1727 sprintf (one_inst_str, "$%d, %s", word_cnt, reg_names[start_reg]);
1728 if (print_ra)
1729 strcat (one_inst_str, ", ra");
1730 }
1731 else
1732 strcat (one_inst_str, "ra");
1733
1734 if (push_or_pop == 1)
1735 {
1736 /* Pop instruction. */
1737 if (print_ra && !cr16_interrupt_function_p ()
1738 && !crtl->calls_eh_return)
1739 /* Print popret if RA is saved and its not a interrupt
1740 function. */
1741 strcpy (temp_str, "\n\tpopret\t");
1742 else
1743 strcpy (temp_str, "\n\tpop\t");
1744
1745 strcat (temp_str, one_inst_str);
1746
1747 /* Add the pop instruction list. */
1748 strcat (return_str, temp_str);
1749 }
1750 else
1751 {
1752 /* Push instruction. */
1753 strcpy (temp_str, "\n\tpush\t");
1754 strcat (temp_str, one_inst_str);
1755
1756 /* We need to reverse the order of the instructions if there
1757 are more than one. (since the pop will not be reversed in
1758 the epilogue. */
1759 strcat (temp_str, return_str);
1760 strcpy (return_str, temp_str);
1761 }
1762 }
1763
1764 if (push_or_pop == 1)
1765 {
1766 /* POP. */
1767 if (cr16_interrupt_function_p ())
1768 strcat (return_str, "\n\tretx\n");
1769 else if (crtl->calls_eh_return)
1770 {
1771 /* Add stack adjustment before returning to exception handler
1772 NOTE: EH_RETURN_STACKADJ_RTX must refer to (r5, r4). */
1773 strcat (return_str, "\n\taddd\t (r5, r4), (sp)\t\n");
1774 strcat (return_str, "\n\tjump\t (ra)\n");
1775
1776 /* But before anything else, undo the adjustment addition done in
1777 cr16_expand_epilogue (). */
1778 strcpy (temp_str, "\n\tsubd\t (r5, r4), (sp)\t\n");
1779 strcat (temp_str, return_str);
1780 strcpy (return_str, temp_str);
1781 }
1782 else if (!FUNC_IS_NORETURN_P (current_function_decl)
1783 && !(current_frame_info.save_regs[RETURN_ADDRESS_REGNUM]))
1784 strcat (return_str, "\n\tjump\t (ra)\n");
1785 }
1786
1787 /* Skip the newline and the tab in the start of return_str. */
1788 return_str += 2;
1789 return return_str;
1790}
1791
1792
1793/* Generate DWARF2 annotation for multi-push instruction. */
1794static void
1795cr16_create_dwarf_for_multi_push (rtx insn)
1796{
1797 rtx dwarf, reg, tmp;
1798 int i, j, from, to, word_cnt, dwarf_par_index, inc;
ef4bddc2 1799 machine_mode mode;
b25364a0
S		 1800 int num_regs = 0, offset = 0, split_here = 0, total_push_bytes = 0;
1801
1802 for (i = 0; i <= current_frame_info.last_reg_to_save; ++i)
1803 {
1804 if (current_frame_info.save_regs[i])
1805 {
1806 ++num_regs;
1807 if (i < CR16_FIRST_DWORD_REGISTER)
1808 total_push_bytes += 2;
1809 else
1810 total_push_bytes += 4;
1811 }
1812 }
1813
1814 if (!num_regs)
1815 return;
1816
1817 dwarf = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (num_regs + 1));
1818 dwarf_par_index = num_regs;
1819
1820 from = current_frame_info.last_reg_to_save + 1;
1821 to = current_frame_info.last_reg_to_save;
1822 word_cnt = 0;
1823
1824 for (i = current_frame_info.last_reg_to_save; i >= 0;)
1825 {
1826 if (!current_frame_info.save_regs[i] || 0 == i || split_here)
1827 {
1828 /* This block of regs is pushed in one instruction. */
1829 if (0 == i && current_frame_info.save_regs[i])
1830 from = 0;
1831
1832 for (j = to; j >= from; --j)
1833 {
1834 if (j < CR16_FIRST_DWORD_REGISTER)
1835 {
1836 mode = HImode;
1837 inc = 1;
1838 }
1839 else
1840 {
1841 mode = SImode;
1842 inc = 2;
1843 }
1844 reg = gen_rtx_REG (mode, j);
1845 offset += 2 * inc;
f7df4a84 1846 tmp = gen_rtx_SET (gen_frame_mem (mode,
b25364a0 1847 plus_constant
0a81f074 1848 (Pmode, stack_pointer_rtx,
b25364a0
S		 1849 total_push_bytes - offset)),
1850 reg);
1851 RTX_FRAME_RELATED_P (tmp) = 1;
1852 XVECEXP (dwarf, 0, dwarf_par_index--) = tmp;
1853 }
1854 from = i;
1855 to = --i;
1856 split_here = 0;
1857 word_cnt = 0;
1858 continue;
1859 }
1860
1861 if (i != RETURN_ADDRESS_REGNUM)
1862 {
1863 inc = (i < CR16_FIRST_DWORD_REGISTER) ? 1 : 2;
1864 if (word_cnt + inc >= MAX_COUNT || FRAME_POINTER_REGNUM == i)
1865 {
1866 split_here = 1;
1867 from = i;
1868 continue;
1869 }
1870 word_cnt += inc;
1871 }
1872
1873 from = i--;
1874 }
1875
f7df4a84 1876 tmp = gen_rtx_SET (stack_pointer_rtx,
b25364a0
S		 1877 gen_rtx_PLUS (SImode, stack_pointer_rtx,
1878 GEN_INT (-offset)));
1879 RTX_FRAME_RELATED_P (tmp) = 1;
1880 XVECEXP (dwarf, 0, 0) = tmp;
1881
1882 add_reg_note (insn, REG_FRAME_RELATED_EXPR, dwarf);
1883}
1884
1885/*
1886CompactRISC CR16 Architecture stack layout:
1887
1888 0 +---------------------
1889 |
1890 .
1891 .
1892 |
1893 +==================== Sp (x) = Ap (x+1)
1894 A | Args for functions
1895 | | called by X and Dynamically
1896 | | Dynamic allocations allocated and
1897 | | (alloca, variable deallocated
1898 Stack | length arrays).
1899 grows +-------------------- Fp (x)
1900 down| | Local variables of X
1901 ward| +--------------------
1902 | | Regs saved for X-1
1903 | +==================== Sp (x-1) = Ap (x)
1904 | Args for func X
1905 | pushed by X-1
1906 +-------------------- Fp (x-1)
1907 |
1908 |
1909 V
1910*/
1911void
1912cr16_expand_prologue (void)
1913{
1914 rtx insn;
1915
1916 cr16_compute_frame ();
1917 cr16_compute_save_regs ();
1918
1919 /* If there is no need in push and adjustment to sp, return. */
1920 if ((current_frame_info.total_size + current_frame_info.reg_size) == 0)
1921 return;
1922
1923 if (current_frame_info.last_reg_to_save != -1)
1924 {
1925 /* If there are registers to push. */
1926 insn = emit_insn (gen_push_for_prologue
1927 (GEN_INT (current_frame_info.reg_size)));
1928 cr16_create_dwarf_for_multi_push (insn);
1929 RTX_FRAME_RELATED_P (insn) = 1;
1930 }
1931
1932
1933 if (current_frame_info.total_size > 0)
1934 {
1935 insn = emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,
1936 GEN_INT (-current_frame_info.total_size)));
1937 RTX_FRAME_RELATED_P (insn) = 1;
1938 }
1939
1940 if (frame_pointer_needed)
1941 {
1942 /* Initialize the frame pointer with the value of the stack pointer
1943 pointing now to the locals. */
1944 insn = emit_move_insn (frame_pointer_rtx, stack_pointer_rtx);
1945 }
1946}
1947
1948/* Generate insn that updates the stack for local variables and padding
1949 for registers we save. - Generate the appropriate return insn. */
1950void
1951cr16_expand_epilogue (void)
1952{
1953 rtx insn;
1954
1955 /* Nonzero if we need to return and pop only RA. This will generate a
1956 different insn. This differentiate is for the peepholes for call as
1957 last statement in function. */
1958 int only_popret_RA = (current_frame_info.save_regs[RETURN_ADDRESS_REGNUM]
1959 && (current_frame_info.reg_size
1960 == CR16_UNITS_PER_DWORD));
1961
1962 if (frame_pointer_needed)
1963 {
1964 /* Restore the stack pointer with the frame pointers value. */
1965 insn = emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
1966 }
1967
1968 if (current_frame_info.total_size > 0)
1969 {
1970 insn = emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,
1971 GEN_INT (current_frame_info.total_size)));
1972 RTX_FRAME_RELATED_P (insn) = 1;
1973 }
1974
1975 if (crtl->calls_eh_return)
1976 {
1977 /* Add this here so that (r5, r4) is actually loaded with the adjustment
1978 value; otherwise, the load might be optimized away...
1979 NOTE: remember to subtract the adjustment before popping the regs
1980 and add it back before returning. */
1981 insn = emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,
1982 EH_RETURN_STACKADJ_RTX));
1983 }
1984
1985 if (cr16_interrupt_function_p ())
1986 {
1987 insn = emit_jump_insn (gen_interrupt_return ());
1988 RTX_FRAME_RELATED_P (insn) = 1;
1989 }
1990 else if (crtl->calls_eh_return)
1991 {
1992 /* Special case, pop what's necessary, adjust SP and jump to (RA). */
1993 insn = emit_jump_insn (gen_pop_and_popret_return
1994 (GEN_INT (current_frame_info.reg_size)));
1995 RTX_FRAME_RELATED_P (insn) = 1;
1996 }
1997 else if (current_frame_info.last_reg_to_save == -1)
1998 /* Nothing to pop. */
1999 /* Don't output jump for interrupt routine, only retx. */
2000 emit_jump_insn (gen_jump_return ());
2001 else if (only_popret_RA)
2002 {
2003 insn = emit_jump_insn (gen_popret_RA_return ());
2004 RTX_FRAME_RELATED_P (insn) = 1;
2005 }
2006 else
2007 {
2008 insn = emit_jump_insn (gen_pop_and_popret_return
2009 (GEN_INT (current_frame_info.reg_size)));
2010 RTX_FRAME_RELATED_P (insn) = 1;
2011 }
2012}
2013
2014/* Implements FRAME_POINTER_REQUIRED. */
2015static bool
2016cr16_frame_pointer_required (void)
2017{
2018 return (cfun->calls_alloca || crtl->calls_eh_return
2019 || cfun->has_nonlocal_label || crtl->calls_eh_return);
2020}
2021
2022static bool
2023cr16_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
2024{
2025 return (to == STACK_POINTER_REGNUM ? !frame_pointer_needed : true);
2026}
2027
2028
2029/* A C compound statement that attempts to replace X with
2030 a valid memory address for an operand of mode MODE. WIN
2031 will be a C statement label elsewhere in the code.
2032 X will always be the result of a call to break_out_memory_refs (),
2033 and OLDX will be the operand that was given to that function to
2034 produce X.
2035 The code generated by this macro should not alter the
2036 substructure of X. If it transforms X into a more legitimate form,
2037 it should assign X (which will always be a C variable) a new value. */
2038static rtx
2039cr16_legitimize_address (rtx x, rtx orig_x ATTRIBUTE_UNUSED,
ef4bddc2 2040 machine_mode mode ATTRIBUTE_UNUSED)
b25364a0
S		 2041{
2042 if (flag_pic)
2043 return legitimize_pic_address (orig_x, mode, NULL_RTX);
2044 else
2045 return x;
2046}
2047
2048/* Implement TARGET_LEGITIMATE_CONSTANT_P
2049 Nonzero if X is a legitimate constant for an immediate
2050 operand on the target machine. You can assume that X
2051 satisfies CONSTANT_P. In cr16c treat legitimize float
2052 constant as an immediate operand. */
2053static bool
ef4bddc2 2054cr16_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED,
b25364a0
S		 2055 rtx x ATTRIBUTE_UNUSED)
2056{
2057 return 1;
2058}
2059
2060void
2061notice_update_cc (rtx exp)
2062{
2063 if (GET_CODE (exp) == SET)
2064 {
2065 /* Jumps do not alter the cc's. */
2066 if (SET_DEST (exp) == pc_rtx)
2067 return;
2068
2069 /* Moving register or memory into a register:
2070 it doesn't alter the cc's, but it might invalidate
2071 the RTX's which we remember the cc's came from.
2072 (Note that moving a constant 0 or 1 MAY set the cc's). */
2073 if (REG_P (SET_DEST (exp))
2074 && (REG_P (SET_SRC (exp)) || GET_CODE (SET_SRC (exp)) == MEM))
2075 {
2076 return;
2077 }
2078
2079 /* Moving register into memory doesn't alter the cc's.
2080 It may invalidate the RTX's which we remember the cc's came from. */
2081 if (GET_CODE (SET_DEST (exp)) == MEM && REG_P (SET_SRC (exp)))
2082 {
2083 return;
2084 }
2085 }
2086
2087 CC_STATUS_INIT;
2088 return;
2089}
2090
ef4bddc2 2091static machine_mode
b25364a0
S		 2092cr16_unwind_word_mode (void)
2093{
2094 return SImode;
2095}
2096
2097/* Helper function for md file. This function is used to emit arithmetic
2098 DI instructions. The argument "num" decides which instruction to be
2099 printed. */
2100const char *
2101cr16_emit_add_sub_di (rtx *operands, enum rtx_code code)
2102{
2103 rtx lo_op[2] ;
2104 rtx hi0_op[2] ;
2105 rtx hi1_op[2] ;
2106
2107 lo_op[0] = gen_lowpart (SImode, operands[0]);
2108 hi0_op[0] = simplify_gen_subreg (HImode, operands[0], DImode, 4);
2109 hi1_op[0] = simplify_gen_subreg (HImode, operands[0], DImode, 6);
2110
2111 lo_op[1] = gen_lowpart (SImode, operands[2]);
2112 hi0_op[1] = simplify_gen_subreg (HImode, operands[2], DImode, 4);
2113 hi1_op[1] = simplify_gen_subreg (HImode, operands[2], DImode, 6);
2114
2115 switch (code)
2116 {
2117 case PLUS:
2118 {
2119 output_asm_insn ("addd\t%1, %0", lo_op) ;
2120 output_asm_insn ("addcw\t%1, %0", hi0_op) ;
2121 output_asm_insn ("addcw\t%1, %0", hi1_op) ;
2122 break;
2123 }
2124 case MINUS:
2125 {
2126 output_asm_insn ("subd\t%1, %0", lo_op) ;
2127 output_asm_insn ("subcw\t%1, %0", hi0_op) ;
2128 output_asm_insn ("subcw\t%1, %0", hi1_op) ;
2129 break;
2130 }
2131 default:
2132 break;
2133 }
2134
2135 return "";
2136}
2137
2138
2139/* Helper function for md file. This function is used to emit logical
2140 DI instructions. The argument "num" decides which instruction to be
2141 printed. */
2142const char *
2143cr16_emit_logical_di (rtx *operands, enum rtx_code code)
2144{
2145 rtx lo_op[2] ;
2146 rtx hi_op[2] ;
2147
2148 lo_op[0] = gen_lowpart (SImode, operands[0]);
2149 hi_op[0] = simplify_gen_subreg (SImode, operands[0], DImode, 4);
2150
2151 lo_op[1] = gen_lowpart (SImode, operands[2]);
2152 hi_op[1] = simplify_gen_subreg (SImode, operands[2], DImode, 4);
2153
2154 switch (code)
2155 {
2156 case AND:
2157 {
2158 output_asm_insn ("andd\t%1, %0", lo_op) ;
2159 output_asm_insn ("andd\t%1, %0", hi_op) ;
2160 return "";
2161 }
2162 case IOR:
2163 {
2164 output_asm_insn ("ord\t%1, %0", lo_op) ;
2165 output_asm_insn ("ord\t%1, %0", hi_op) ;
2166 return "";
2167 }
2168 case XOR:
2169 {
2170 output_asm_insn ("xord\t%1, %0", lo_op) ;
2171 output_asm_insn ("xord\t%1, %0", hi_op) ;
2172 return "";
2173 }
2174 default:
2175 break;
2176 }
2177
2178 return "";
2179}
2180
2181/* Initialize 'targetm' variable which contains pointers to functions
2182 and data relating to the target machine. */
2183
2184struct gcc_target targetm = TARGET_INITIALIZER;
Mirror of https://gcc.gnu.org/git/gcc.git