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0b85d816 | 1 | /* Definitions for GCC. Part of the machine description for CRIS. |
5b296d93 | 2 | Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
0b85d816 HPN |
3 | Contributed by Axis Communications. Written by Hans-Peter Nilsson. |
4 | ||
5 | This file is part of GCC. | |
6 | ||
7 | GCC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GCC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GCC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include "config.h" | |
23 | #include "system.h" | |
4977bab6 ZW |
24 | #include "coretypes.h" |
25 | #include "tm.h" | |
0b85d816 HPN |
26 | #include "rtl.h" |
27 | #include "regs.h" | |
28 | #include "hard-reg-set.h" | |
29 | #include "real.h" | |
30 | #include "insn-config.h" | |
31 | #include "conditions.h" | |
0b85d816 HPN |
32 | #include "insn-attr.h" |
33 | #include "flags.h" | |
34 | #include "tree.h" | |
35 | #include "expr.h" | |
36 | #include "except.h" | |
37 | #include "function.h" | |
38 | #include "toplev.h" | |
39 | #include "recog.h" | |
40 | #include "tm_p.h" | |
41 | #include "debug.h" | |
78b14aa6 | 42 | #include "output.h" |
0b85d816 HPN |
43 | #include "target.h" |
44 | #include "target-def.h" | |
ae9dbf1f | 45 | #include "ggc.h" |
0b85d816 HPN |
46 | |
47 | /* Usable when we have an amount to add or subtract, and want the | |
48 | optimal size of the insn. */ | |
49 | #define ADDITIVE_SIZE_MODIFIER(size) \ | |
50 | ((size) <= 63 ? "q" : (size) <= 255 ? "u.b" : (size) <= 65535 ? "u.w" : ".d") | |
51 | ||
52 | #define ASSERT_PLT_UNSPEC(x) \ | |
53 | do \ | |
54 | { \ | |
55 | if (XEXP (x, 1) != NULL_RTX \ | |
56 | || (GET_CODE (XVECEXP (x, 0, 0)) != SYMBOL_REF \ | |
57 | && GET_CODE (XVECEXP (x, 0, 0)) != LABEL_REF)) \ | |
58 | abort (); \ | |
59 | } while (0) | |
60 | ||
a52453cc | 61 | #define LOSE_AND_RETURN(msgid, x) \ |
3d556836 HPN |
62 | do \ |
63 | { \ | |
a52453cc | 64 | cris_operand_lossage (msgid, x); \ |
3d556836 HPN |
65 | return; \ |
66 | } while (0) | |
67 | ||
0b85d816 | 68 | /* Per-function machine data. */ |
e2500fed | 69 | struct machine_function GTY(()) |
0b85d816 HPN |
70 | { |
71 | int needs_return_address_on_stack; | |
72 | }; | |
73 | ||
0b85d816 HPN |
74 | /* This little fix suppresses the 'u' or 's' when '%e' in assembly |
75 | pattern. */ | |
76 | static char cris_output_insn_is_bound = 0; | |
77 | ||
78 | /* This one suppresses printing out the "rPIC+" in | |
79 | "rPIC+sym:GOTOFF+offset" when doing PIC. For a PLT symbol, it | |
80 | suppresses outputting it as [rPIC+sym:GOTPLT] and outputs similarly | |
81 | just the "sym:GOTOFF" part. */ | |
82 | static int cris_pic_sympart_only = 0; | |
83 | ||
3d556836 HPN |
84 | /* Fix for reg_overlap_mentioned_p. */ |
85 | static int cris_reg_overlap_mentioned_p PARAMS ((rtx, rtx)); | |
0b85d816 | 86 | |
3d556836 | 87 | static void cris_print_base PARAMS ((rtx, FILE *)); |
0b85d816 | 88 | |
3d556836 | 89 | static void cris_print_index PARAMS ((rtx, FILE *)); |
0b85d816 | 90 | |
e2500fed | 91 | static struct machine_function * cris_init_machine_status PARAMS ((void)); |
0b85d816 | 92 | |
3d556836 HPN |
93 | static int cris_initial_frame_pointer_offset PARAMS ((void)); |
94 | ||
95 | static int saved_regs_mentioned PARAMS ((rtx)); | |
0b85d816 HPN |
96 | |
97 | static void cris_target_asm_function_prologue | |
98 | PARAMS ((FILE *, HOST_WIDE_INT)); | |
3d556836 | 99 | |
0b85d816 HPN |
100 | static void cris_target_asm_function_epilogue |
101 | PARAMS ((FILE *, HOST_WIDE_INT)); | |
102 | ||
fb49053f | 103 | static void cris_encode_section_info PARAMS ((tree, int)); |
3d556836 HPN |
104 | static void cris_operand_lossage PARAMS ((const char *, rtx)); |
105 | ||
c590b625 | 106 | static void cris_asm_output_mi_thunk |
3961e8fe | 107 | PARAMS ((FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree)); |
c590b625 | 108 | |
75642f32 RH |
109 | static bool cris_rtx_costs PARAMS ((rtx, int, int, int *)); |
110 | static int cris_address_cost PARAMS ((rtx)); | |
c590b625 | 111 | |
0b85d816 | 112 | /* The function cris_target_asm_function_epilogue puts the last insn to |
3d556836 HPN |
113 | output here. It always fits; there won't be a symbol operand. Used in |
114 | delay_slots_for_epilogue and function_epilogue. */ | |
0b85d816 HPN |
115 | static char save_last[80]; |
116 | ||
117 | /* This is the argument from the "-max-stack-stackframe=" option. */ | |
118 | const char *cris_max_stackframe_str; | |
119 | ||
120 | /* This is the argument from the "-march=" option. */ | |
121 | const char *cris_cpu_str; | |
122 | ||
123 | /* This is the argument from the "-mtune=" option. */ | |
124 | const char *cris_tune_str; | |
125 | ||
126 | /* This is the argument from the "-melinux-stacksize=" option. */ | |
127 | const char *cris_elinux_stacksize_str; | |
128 | ||
129 | /* This is the parsed result of the "-max-stack-stackframe=" option. If | |
130 | it (still) is zero, then there was no such option given. */ | |
131 | int cris_max_stackframe = 0; | |
132 | ||
133 | /* This is the parsed result of the "-march=" option, if given. */ | |
134 | int cris_cpu_version = CRIS_DEFAULT_CPU_VERSION; | |
135 | ||
301d03af RS |
136 | #undef TARGET_ASM_ALIGNED_HI_OP |
137 | #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t" | |
138 | #undef TARGET_ASM_ALIGNED_SI_OP | |
139 | #define TARGET_ASM_ALIGNED_SI_OP "\t.dword\t" | |
140 | #undef TARGET_ASM_ALIGNED_DI_OP | |
141 | #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t" | |
142 | ||
143 | /* We need to define these, since the 2byte, 4byte, 8byte op:s are only | |
144 | available in ELF. These "normal" pseudos do not have any alignment | |
145 | constraints or side-effects. */ | |
146 | #undef TARGET_ASM_UNALIGNED_HI_OP | |
147 | #define TARGET_ASM_UNALIGNED_HI_OP TARGET_ASM_ALIGNED_HI_OP | |
148 | ||
149 | #undef TARGET_ASM_UNALIGNED_SI_OP | |
150 | #define TARGET_ASM_UNALIGNED_SI_OP TARGET_ASM_ALIGNED_SI_OP | |
151 | ||
152 | #undef TARGET_ASM_UNALIGNED_DI_OP | |
153 | #define TARGET_ASM_UNALIGNED_DI_OP TARGET_ASM_ALIGNED_DI_OP | |
154 | ||
0b85d816 HPN |
155 | #undef TARGET_ASM_FUNCTION_PROLOGUE |
156 | #define TARGET_ASM_FUNCTION_PROLOGUE cris_target_asm_function_prologue | |
157 | ||
158 | #undef TARGET_ASM_FUNCTION_EPILOGUE | |
159 | #define TARGET_ASM_FUNCTION_EPILOGUE cris_target_asm_function_epilogue | |
160 | ||
fb49053f RH |
161 | #undef TARGET_ENCODE_SECTION_INFO |
162 | #define TARGET_ENCODE_SECTION_INFO cris_encode_section_info | |
163 | ||
c590b625 RH |
164 | #undef TARGET_ASM_OUTPUT_MI_THUNK |
165 | #define TARGET_ASM_OUTPUT_MI_THUNK cris_asm_output_mi_thunk | |
3961e8fe RH |
166 | #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK |
167 | #define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall | |
c590b625 | 168 | |
75642f32 RH |
169 | #undef TARGET_RTX_COSTS |
170 | #define TARGET_RTX_COSTS cris_rtx_costs | |
171 | #undef TARGET_ADDRESS_COST | |
172 | #define TARGET_ADDRESS_COST cris_address_cost | |
173 | ||
0b85d816 HPN |
174 | struct gcc_target targetm = TARGET_INITIALIZER; |
175 | ||
176 | /* Predicate functions. */ | |
177 | ||
178 | /* This checks a part of an address, the one that is not a plain register | |
179 | for an addressing mode using BDAP. | |
180 | Allowed operands is either: | |
181 | a) a register | |
182 | b) a CONST operand (but not a symbol when generating PIC) | |
183 | c) a [r] or [r+] in SImode, or sign-extend from HI or QI. */ | |
184 | ||
185 | int | |
186 | cris_bdap_operand (op, mode) | |
187 | rtx op; | |
188 | enum machine_mode mode; | |
189 | { | |
190 | register enum rtx_code code = GET_CODE (op); | |
191 | ||
192 | if (mode != SImode && (mode != VOIDmode || GET_MODE (op) != VOIDmode)) | |
193 | return 0; | |
194 | ||
195 | /* Just return whether this is a simple register or constant. */ | |
196 | if (register_operand (op, mode) | |
197 | || (CONSTANT_P (op) && !(flag_pic && cris_symbol (op)))) | |
198 | return 1; | |
199 | ||
200 | /* Is it a [r] or possibly a [r+]? */ | |
201 | if (code == MEM) | |
202 | { | |
203 | rtx tem = XEXP (op, 0); | |
204 | ||
205 | if (mode == SImode | |
206 | && (register_operand (tem, SImode) | |
207 | || (GET_CODE (tem) == POST_INC | |
208 | && register_operand (XEXP (tem, 0), SImode)))) | |
209 | return 1; | |
210 | else | |
211 | return 0; | |
212 | } | |
213 | ||
214 | /* Perhaps a sign-extended mem: [r].(b|w) or [r+].(b|w)? */ | |
215 | if (code == SIGN_EXTEND) | |
216 | { | |
217 | rtx tem = XEXP (op, 0); | |
218 | ||
219 | if (GET_CODE (tem) != MEM) | |
220 | return 0; | |
221 | ||
222 | tem = XEXP (tem, 0); | |
223 | if (mode == SImode | |
224 | && (register_operand (tem, SImode) | |
225 | || (GET_CODE (tem) == POST_INC | |
226 | && register_operand (XEXP (tem, 0), SImode)))) | |
227 | return 1; | |
228 | else | |
229 | return 0; | |
230 | } | |
231 | ||
232 | return 0; | |
233 | } | |
234 | ||
235 | /* This is similar to cris_bdap_operand: | |
236 | It checks a part of an address, the one that is not a plain register | |
237 | for an addressing mode using BDAP *or* BIAP. | |
238 | Allowed operands is either: | |
239 | a) a register | |
240 | b) a CONST operand (but not a symbol when generating PIC) | |
241 | c) a mult of (1, 2 or 4) and a register | |
242 | d) a [r] or [r+] in SImode, or sign-extend from HI or QI. */ | |
243 | ||
244 | int | |
245 | cris_bdap_biap_operand (op, mode) | |
246 | rtx op; | |
247 | enum machine_mode mode; | |
248 | { | |
249 | register enum rtx_code code = GET_CODE (op); | |
250 | rtx reg; | |
251 | rtx val; | |
252 | ||
253 | /* Check for bdap operand. */ | |
254 | if (cris_bdap_operand (op, mode)) | |
255 | return 1; | |
256 | ||
257 | if (mode != SImode && (mode != VOIDmode || GET_MODE (op) != VOIDmode)) | |
258 | return 0; | |
259 | ||
260 | /* Check that we're looking at a BIAP operand. */ | |
261 | if (code != MULT) | |
262 | return 0; | |
263 | ||
264 | /* Canonicalize register and multiplicand. */ | |
265 | if (GET_CODE (XEXP (op, 0)) == CONST_INT) | |
266 | { | |
267 | val = XEXP (op, 0); | |
268 | reg = XEXP (op, 1); | |
269 | } | |
270 | else | |
271 | { | |
272 | val = XEXP (op, 1); | |
273 | reg = XEXP (op, 0); | |
274 | } | |
275 | ||
276 | /* Check that the operands are correct after canonicalization. */ | |
277 | if (! register_operand (reg, SImode) || GET_CODE (val) != CONST_INT) | |
278 | return 0; | |
279 | ||
280 | /* Check that the multiplicand has a valid value. */ | |
281 | if ((code == MULT | |
282 | && (INTVAL (val) == 1 || INTVAL (val) == 2 || INTVAL (val) == 4))) | |
283 | return 1; | |
284 | ||
285 | return 0; | |
286 | } | |
287 | ||
288 | /* Check if MODE is same as mode for X, and X is PLUS, MINUS, IOR or | |
289 | AND or UMIN. */ | |
290 | ||
291 | int | |
292 | cris_orthogonal_operator (x, mode) | |
293 | rtx x; | |
294 | enum machine_mode mode; | |
295 | { | |
296 | enum rtx_code code = GET_CODE (x); | |
297 | ||
298 | if (mode == VOIDmode) | |
299 | mode = GET_MODE (x); | |
300 | ||
301 | return (GET_MODE (x) == mode | |
302 | && (code == PLUS || code == MINUS | |
303 | || code == IOR || code == AND || code == UMIN)); | |
304 | } | |
305 | ||
306 | /* Check if MODE is same as mode for X, and X is PLUS, IOR or AND or | |
307 | UMIN. */ | |
308 | ||
309 | int | |
310 | cris_commutative_orth_op (x, mode) | |
311 | rtx x; | |
312 | enum machine_mode mode; | |
313 | { | |
314 | enum rtx_code code = GET_CODE (x); | |
315 | ||
316 | if (mode == VOIDmode) | |
317 | mode = GET_MODE (x); | |
318 | ||
319 | return (GET_MODE (x) == mode && | |
320 | (code == PLUS | |
321 | || code == IOR || code == AND || code == UMIN)); | |
322 | } | |
323 | ||
324 | /* Check if MODE is same as mode for X, and X is PLUS or MINUS or UMIN. */ | |
325 | ||
326 | int | |
327 | cris_operand_extend_operator (x, mode) | |
328 | rtx x; | |
329 | enum machine_mode mode; | |
330 | { | |
331 | enum rtx_code code = GET_CODE (x); | |
332 | ||
333 | if (mode == VOIDmode) | |
334 | mode = GET_MODE (x); | |
335 | ||
336 | return (GET_MODE (x) == mode | |
337 | && (code == PLUS || code == MINUS || code == UMIN)); | |
338 | } | |
339 | ||
d2f55c5c HPN |
340 | /* Check if MODE is same as mode for X, and X is PLUS or MINUS. */ |
341 | ||
342 | int | |
343 | cris_additive_operand_extend_operator (x, mode) | |
344 | rtx x; | |
345 | enum machine_mode mode; | |
346 | { | |
347 | enum rtx_code code = GET_CODE (x); | |
348 | ||
349 | if (mode == VOIDmode) | |
350 | mode = GET_MODE (x); | |
351 | ||
352 | return (GET_MODE (x) == mode | |
353 | && (code == PLUS || code == MINUS)); | |
354 | } | |
355 | ||
0b85d816 HPN |
356 | /* Check to see if MODE is same as mode for X, and X is SIGN_EXTEND or |
357 | ZERO_EXTEND. */ | |
358 | ||
359 | int | |
360 | cris_extend_operator (x, mode) | |
361 | rtx x; | |
362 | enum machine_mode mode; | |
363 | { | |
364 | enum rtx_code code = GET_CODE (x); | |
365 | ||
366 | if (mode == VOIDmode) | |
367 | mode = GET_MODE (x); | |
368 | ||
369 | return | |
370 | (GET_MODE (x) == mode && (code == SIGN_EXTEND || code == ZERO_EXTEND)); | |
371 | } | |
372 | ||
373 | /* Check to see if MODE is same as mode for X, and X is PLUS or BOUND. */ | |
374 | ||
375 | int | |
376 | cris_plus_or_bound_operator (x, mode) | |
377 | rtx x; | |
378 | enum machine_mode mode; | |
379 | { | |
380 | enum rtx_code code = GET_CODE (x); | |
381 | ||
382 | if (mode == VOIDmode) | |
383 | mode = GET_MODE (x); | |
384 | ||
385 | return | |
386 | (GET_MODE (x) == mode && (code == UMIN || code == PLUS)); | |
387 | } | |
388 | ||
389 | /* Since with -fPIC, not all symbols are valid PIC symbols or indeed | |
390 | general_operands, we have to have a predicate that matches it for the | |
391 | "movsi" expander. */ | |
392 | ||
393 | int | |
394 | cris_general_operand_or_symbol (op, mode) | |
395 | rtx op; | |
396 | enum machine_mode mode; | |
397 | { | |
398 | return general_operand (op, mode) | |
399 | || (CONSTANT_P (op) && cris_symbol (op)); | |
400 | } | |
401 | ||
402 | /* Since a PIC symbol without a GOT entry is not a general_operand, we | |
403 | have to have a predicate that matches it. We use this in the expanded | |
404 | "movsi" anonymous pattern for PIC symbols. */ | |
405 | ||
406 | int | |
407 | cris_general_operand_or_gotless_symbol (op, mode) | |
408 | rtx op; | |
409 | enum machine_mode mode; | |
410 | { | |
411 | return general_operand (op, mode) | |
412 | || (CONSTANT_P (op) && cris_gotless_symbol (op)); | |
413 | } | |
414 | ||
415 | /* Since a PLT symbol is not a general_operand, we have to have a | |
416 | predicate that matches it when we need it. We use this in the expanded | |
417 | "call" and "call_value" anonymous patterns. */ | |
418 | ||
419 | int | |
420 | cris_general_operand_or_plt_symbol (op, mode) | |
421 | rtx op; | |
422 | enum machine_mode mode; | |
423 | { | |
424 | return general_operand (op, mode) | |
425 | || (GET_CODE (op) == CONST | |
426 | && GET_CODE (XEXP (op, 0)) == UNSPEC | |
427 | && !TARGET_AVOID_GOTPLT); | |
428 | } | |
429 | ||
430 | /* This matches a (MEM (general_operand)) or | |
431 | (MEM (cris_general_operand_or_symbol)). The second one isn't a valid | |
432 | memory_operand, so we need this predicate to recognize call | |
433 | destinations before we change them to a PLT operand (by wrapping in | |
434 | UNSPEC 0). */ | |
435 | ||
436 | int | |
437 | cris_mem_call_operand (op, mode) | |
438 | rtx op; | |
439 | enum machine_mode mode; | |
440 | { | |
441 | rtx xmem; | |
442 | ||
443 | if (GET_CODE (op) != MEM) | |
444 | return 0; | |
445 | ||
446 | if (memory_operand (op, mode)) | |
447 | return 1; | |
448 | ||
449 | xmem = XEXP (op, 0); | |
450 | ||
451 | return cris_general_operand_or_symbol (xmem, GET_MODE (op)); | |
452 | } | |
453 | ||
454 | /* The CONDITIONAL_REGISTER_USAGE worker. */ | |
455 | ||
456 | void | |
457 | cris_conditional_register_usage () | |
458 | { | |
459 | /* FIXME: This isn't nice. We should be able to use that register for | |
460 | something else if the PIC table isn't needed. */ | |
461 | if (flag_pic) | |
462 | fixed_regs[PIC_OFFSET_TABLE_REGNUM] | |
463 | = call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; | |
464 | } | |
465 | ||
466 | /* Return current_function_uses_pic_offset_table. For use in cris.md, | |
467 | since some generated files do not include function.h. */ | |
468 | ||
469 | int | |
470 | cris_cfun_uses_pic_table () | |
471 | { | |
472 | return current_function_uses_pic_offset_table; | |
473 | } | |
474 | ||
475 | /* Given an rtx, return the text string corresponding to the CODE of X. | |
476 | Intended for use in the assembly language output section of a | |
477 | define_insn. */ | |
478 | ||
479 | const char * | |
480 | cris_op_str (x) | |
481 | rtx x; | |
482 | { | |
483 | cris_output_insn_is_bound = 0; | |
484 | switch (GET_CODE (x)) | |
485 | { | |
486 | case PLUS: | |
487 | return "add"; | |
488 | break; | |
489 | ||
490 | case MINUS: | |
491 | return "sub"; | |
492 | break; | |
493 | ||
494 | case MULT: | |
495 | return "mul"; | |
496 | break; | |
497 | ||
498 | case DIV: | |
499 | return "div"; | |
500 | break; | |
501 | ||
502 | case AND: | |
503 | return "and"; | |
504 | break; | |
505 | ||
506 | case IOR: | |
507 | return "or"; | |
508 | break; | |
509 | ||
510 | case XOR: | |
511 | return "xor"; | |
512 | break; | |
513 | ||
514 | case NOT: | |
515 | return "not"; | |
516 | break; | |
517 | ||
518 | case ASHIFT: | |
519 | return "lsl"; | |
520 | break; | |
521 | ||
522 | case LSHIFTRT: | |
523 | return "lsr"; | |
524 | break; | |
525 | ||
526 | case ASHIFTRT: | |
527 | return "asr"; | |
528 | break; | |
529 | ||
530 | case UMIN: | |
531 | /* Used to control the sign/zero-extend character for the 'e' modifier. | |
532 | BOUND has none. */ | |
533 | cris_output_insn_is_bound = 1; | |
534 | return "bound"; | |
535 | break; | |
536 | ||
537 | default: | |
538 | return "Unknown operator"; | |
539 | break; | |
540 | } | |
541 | } | |
542 | ||
3d556836 HPN |
543 | /* Emit an error message when we're in an asm, and a fatal error for |
544 | "normal" insns. Formatted output isn't easily implemented, since we | |
545 | use output_operand_lossage to output the actual message and handle the | |
546 | categorization of the error. */ | |
547 | ||
548 | static void | |
a52453cc PT |
549 | cris_operand_lossage (msgid, op) |
550 | const char *msgid; | |
3d556836 HPN |
551 | rtx op; |
552 | { | |
553 | debug_rtx (op); | |
a52453cc | 554 | output_operand_lossage ("%s", msgid); |
3d556836 HPN |
555 | } |
556 | ||
0b85d816 HPN |
557 | /* Print an index part of an address to file. */ |
558 | ||
559 | static void | |
560 | cris_print_index (index, file) | |
561 | rtx index; | |
562 | FILE * file; | |
563 | { | |
564 | rtx inner = XEXP (index, 0); | |
565 | ||
566 | /* Make the index "additive" unless we'll output a negative number, in | |
567 | which case the sign character is free (as in free beer). */ | |
568 | if (GET_CODE (index) != CONST_INT || INTVAL (index) >= 0) | |
569 | putc ('+', file); | |
570 | ||
571 | if (REG_P (index)) | |
572 | fprintf (file, "$%s.b", reg_names[REGNO (index)]); | |
573 | else if (CONSTANT_P (index)) | |
574 | cris_output_addr_const (file, index); | |
575 | else if (GET_CODE (index) == MULT) | |
576 | { | |
577 | fprintf (file, "$%s.", | |
578 | reg_names[REGNO (XEXP (index, 0))]); | |
579 | ||
580 | putc (INTVAL (XEXP (index, 1)) == 2 ? 'w' : 'd', file); | |
581 | } | |
582 | else if (GET_CODE (index) == SIGN_EXTEND && | |
583 | GET_CODE (inner) == MEM) | |
584 | { | |
585 | rtx inner_inner = XEXP (inner, 0); | |
586 | ||
587 | if (GET_CODE (inner_inner) == POST_INC) | |
588 | { | |
589 | fprintf (file, "[$%s+].", | |
590 | reg_names[REGNO (XEXP (inner_inner, 0))]); | |
591 | putc (GET_MODE (inner) == HImode ? 'w' : 'b', file); | |
592 | } | |
593 | else | |
594 | { | |
595 | fprintf (file, "[$%s].", reg_names[REGNO (inner_inner)]); | |
596 | ||
597 | putc (GET_MODE (inner) == HImode ? 'w' : 'b', file); | |
598 | } | |
599 | } | |
600 | else if (GET_CODE (index) == MEM) | |
601 | { | |
602 | if (GET_CODE (inner) == POST_INC) | |
603 | fprintf (file, "[$%s+].d", reg_names[REGNO (XEXP (inner, 0))]); | |
604 | else | |
605 | fprintf (file, "[$%s].d", reg_names[REGNO (inner)]); | |
606 | } | |
607 | else | |
117b0c0a | 608 | cris_operand_lossage ("unexpected index-type in cris_print_index", |
3d556836 | 609 | index); |
0b85d816 HPN |
610 | } |
611 | ||
612 | /* Print a base rtx of an address to file. */ | |
613 | ||
614 | static void | |
615 | cris_print_base (base, file) | |
616 | rtx base; | |
617 | FILE *file; | |
618 | { | |
619 | if (REG_P (base)) | |
620 | fprintf (file, "$%s", reg_names[REGNO (base)]); | |
621 | else if (GET_CODE (base) == POST_INC) | |
622 | fprintf (file, "$%s+", reg_names[REGNO (XEXP (base, 0))]); | |
623 | else | |
117b0c0a | 624 | cris_operand_lossage ("unexpected base-type in cris_print_base", |
3d556836 | 625 | base); |
0b85d816 HPN |
626 | } |
627 | ||
628 | /* Usable as a guard in expressions. */ | |
629 | ||
630 | int | |
631 | cris_fatal (arg) | |
632 | char *arg; | |
633 | { | |
634 | internal_error (arg); | |
635 | ||
636 | /* We'll never get here; this is just to appease compilers. */ | |
637 | return 0; | |
638 | } | |
639 | ||
640 | /* Textual function prologue. */ | |
641 | ||
642 | static void | |
643 | cris_target_asm_function_prologue (file, size) | |
644 | FILE *file; | |
645 | HOST_WIDE_INT size; | |
646 | { | |
647 | int regno; | |
648 | ||
649 | /* Shorten the used name for readability. */ | |
650 | int cfoa_size = current_function_outgoing_args_size; | |
651 | int last_movem_reg = -1; | |
652 | int doing_dwarf = dwarf2out_do_frame (); | |
653 | int framesize; | |
654 | int faked_args_size = 0; | |
655 | int cfa_write_offset = 0; | |
656 | char *cfa_label = NULL; | |
657 | int return_address_on_stack | |
658 | = regs_ever_live[CRIS_SRP_REGNUM] | |
659 | || cfun->machine->needs_return_address_on_stack != 0; | |
660 | ||
661 | /* Don't do anything if no prologues or epilogues are wanted. */ | |
662 | if (!TARGET_PROLOGUE_EPILOGUE) | |
663 | return; | |
664 | ||
665 | if (size < 0) | |
666 | abort (); | |
667 | ||
668 | /* Align the size to what's best for the CPU model. */ | |
669 | if (TARGET_STACK_ALIGN) | |
670 | size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1; | |
671 | ||
672 | if (current_function_pretend_args_size) | |
673 | { | |
674 | int pretend = current_function_pretend_args_size; | |
675 | for (regno = CRIS_FIRST_ARG_REG + CRIS_MAX_ARGS_IN_REGS - 1; | |
676 | pretend > 0; | |
677 | regno--, pretend -= 4) | |
678 | { | |
679 | fprintf (file, "\tpush $%s\n", reg_names[regno]); | |
680 | faked_args_size += 4; | |
681 | } | |
682 | } | |
683 | ||
684 | framesize = faked_args_size; | |
685 | ||
686 | if (doing_dwarf) | |
687 | { | |
688 | /* FIXME: Slightly redundant calculation, as we do the same in | |
689 | pieces below. This offset must be the total adjustment of the | |
690 | stack-pointer. We can then def_cfa call at the end of this | |
691 | function with the current implementation of execute_cfa_insn, but | |
692 | that wouldn't really be clean. */ | |
693 | ||
694 | int cfa_offset | |
695 | = faked_args_size | |
696 | + (return_address_on_stack ? 4 : 0) | |
697 | + (frame_pointer_needed ? 4 : 0); | |
698 | ||
699 | int cfa_reg; | |
700 | ||
701 | if (frame_pointer_needed) | |
702 | cfa_reg = FRAME_POINTER_REGNUM; | |
703 | else | |
704 | { | |
705 | cfa_reg = STACK_POINTER_REGNUM; | |
706 | cfa_offset += cris_initial_frame_pointer_offset (); | |
707 | } | |
708 | ||
709 | cfa_label = dwarf2out_cfi_label (); | |
710 | dwarf2out_def_cfa (cfa_label, cfa_reg, cfa_offset); | |
711 | ||
712 | cfa_write_offset = - faked_args_size - 4; | |
713 | } | |
714 | ||
715 | /* Save SRP if not a leaf function. */ | |
716 | if (return_address_on_stack) | |
717 | { | |
718 | fprintf (file, "\tPush $srp\n"); | |
719 | framesize += 4; | |
720 | ||
721 | if (doing_dwarf) | |
722 | { | |
723 | dwarf2out_return_save (cfa_label, cfa_write_offset); | |
724 | cfa_write_offset -= 4; | |
725 | } | |
726 | } | |
727 | ||
728 | /* Set up frame pointer if needed. */ | |
729 | if (frame_pointer_needed) | |
730 | { | |
731 | fprintf (file, "\tpush $%s\n\tmove.d $sp,$%s\n", | |
732 | reg_names[FRAME_POINTER_REGNUM], | |
733 | reg_names[FRAME_POINTER_REGNUM]); | |
734 | framesize += 4; | |
735 | ||
736 | if (doing_dwarf) | |
737 | { | |
738 | dwarf2out_reg_save (cfa_label, FRAME_POINTER_REGNUM, | |
739 | cfa_write_offset); | |
740 | cfa_write_offset -= 4; | |
741 | } | |
742 | } | |
743 | ||
744 | /* Local vars are located above saved regs. */ | |
745 | cfa_write_offset -= size; | |
746 | ||
747 | /* Get a contiguous sequence of registers, starting with r0, that need | |
e5837c07 | 748 | to be saved. */ |
0b85d816 HPN |
749 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) |
750 | { | |
751 | if ((((regs_ever_live[regno] | |
752 | && !call_used_regs[regno]) | |
053d3344 | 753 | || (regno == (int) PIC_OFFSET_TABLE_REGNUM |
0b85d816 HPN |
754 | && (current_function_uses_pic_offset_table |
755 | /* It is saved anyway, if there would be a gap. */ | |
756 | || (flag_pic | |
757 | && regs_ever_live[regno + 1] | |
758 | && !call_used_regs[regno + 1])))) | |
759 | && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
760 | && regno != CRIS_SRP_REGNUM) | |
761 | || (current_function_calls_eh_return | |
762 | && (regno == EH_RETURN_DATA_REGNO (0) | |
763 | || regno == EH_RETURN_DATA_REGNO (1) | |
764 | || regno == EH_RETURN_DATA_REGNO (2) | |
765 | || regno == EH_RETURN_DATA_REGNO (3)))) | |
766 | { | |
767 | /* Check if movem may be used for registers so far. */ | |
768 | if (regno == last_movem_reg + 1) | |
769 | /* Yes, update next expected register. */ | |
770 | last_movem_reg++; | |
771 | else | |
772 | { | |
773 | /* We cannot use movem for all registers. We have to flush | |
774 | any movem:ed registers we got so far. */ | |
775 | if (last_movem_reg != -1) | |
776 | { | |
777 | /* It is a win to use a side-effect assignment for | |
778 | 64 <= size <= 128. But side-effect on movem was | |
779 | not usable for CRIS v0..3. Also only do it if | |
780 | side-effects insns are allowed. */ | |
781 | if ((last_movem_reg + 1) * 4 + size >= 64 | |
782 | && (last_movem_reg + 1) * 4 + size <= 128 | |
783 | && cris_cpu_version >= CRIS_CPU_SVINTO | |
784 | && TARGET_SIDE_EFFECT_PREFIXES) | |
785 | fprintf (file, "\tmovem $%s,[$sp=$sp-%d]\n", | |
786 | reg_names[last_movem_reg], | |
787 | (last_movem_reg + 1) * 4 + size); | |
788 | else | |
789 | { | |
790 | /* Avoid printing multiple subsequent sub:s for sp. */ | |
791 | fprintf (file, "\tsub%s %d,$sp\n", | |
792 | ADDITIVE_SIZE_MODIFIER ((last_movem_reg + 1) | |
793 | * 4 + size), | |
794 | (last_movem_reg + 1) * 4 + size); | |
795 | ||
796 | fprintf (file, "\tmovem $%s,[$sp]\n", | |
797 | reg_names[last_movem_reg]); | |
798 | } | |
799 | ||
800 | framesize += (last_movem_reg + 1) * 4 + size; | |
801 | ||
802 | if (TARGET_PDEBUG) | |
803 | fprintf (file, "; frame %d, #regs %d, bytes %d args %d\n", | |
804 | size, | |
805 | last_movem_reg + 1, | |
806 | (last_movem_reg + 1) * 4, | |
807 | current_function_args_size); | |
808 | ||
809 | last_movem_reg = -1; | |
810 | size = 0; | |
811 | } | |
812 | else if (size > 0) | |
813 | { | |
814 | /* Local vars on stack, but there are no movem:s. | |
815 | Just allocate space. */ | |
816 | fprintf (file, "\tSub%s %d,$sp\n", | |
817 | ADDITIVE_SIZE_MODIFIER (size), | |
818 | size); | |
819 | framesize += size; | |
820 | size = 0; | |
821 | } | |
822 | ||
823 | fprintf (file, "\tPush $%s\n", reg_names[regno]); | |
824 | framesize += 4; | |
825 | } | |
826 | ||
827 | if (doing_dwarf) | |
828 | { | |
829 | /* Registers are stored lowest numbered at highest address, | |
830 | which matches the loop order; we just need to update the | |
831 | write-offset. */ | |
832 | dwarf2out_reg_save (cfa_label, regno, cfa_write_offset); | |
833 | cfa_write_offset -= 4; | |
834 | } | |
835 | } | |
836 | } | |
837 | ||
838 | /* Check after, if we can movem all registers. This is the normal | |
839 | case. */ | |
840 | if (last_movem_reg != -1) | |
841 | { | |
842 | /* Side-effect assignment on movem was not supported for CRIS v0..3, | |
843 | and don't do it if we're asked not to. | |
844 | ||
845 | The movem is already accounted for, for unwind. */ | |
846 | ||
847 | if ((last_movem_reg + 1) * 4 + size >= 64 | |
848 | && (last_movem_reg + 1) * 4 + size <= 128 | |
849 | && cris_cpu_version >= CRIS_CPU_SVINTO | |
850 | && TARGET_SIDE_EFFECT_PREFIXES) | |
851 | fprintf (file, "\tmovem $%s,[$sp=$sp-%d]\n", | |
852 | reg_names[last_movem_reg], | |
853 | (last_movem_reg+1) * 4 + size); | |
854 | else | |
855 | { | |
856 | /* Avoid printing multiple subsequent sub:s for sp. FIXME: | |
e5837c07 | 857 | Clean up the conditional expression. */ |
0b85d816 HPN |
858 | fprintf (file, "\tsub%s %d,$sp\n", |
859 | ADDITIVE_SIZE_MODIFIER ((last_movem_reg + 1) * 4 + size), | |
860 | (last_movem_reg + 1) * 4 + size); | |
861 | /* To be compatible with v0..v3 means we do not use an assignment | |
862 | addressing mode with movem. We normally don't need that | |
863 | anyway. It would only be slightly more efficient for 64..128 | |
864 | bytes frame size. */ | |
865 | fprintf (file, "\tmovem $%s,[$sp]\n", reg_names[last_movem_reg]); | |
866 | } | |
867 | ||
868 | framesize += (last_movem_reg + 1) * 4 + size; | |
869 | ||
870 | if (TARGET_PDEBUG) | |
871 | fprintf (file, "; frame %d, #regs %d, bytes %d args %d\n", | |
872 | size, | |
873 | last_movem_reg + 1, | |
874 | (last_movem_reg + 1) * 4, | |
875 | current_function_args_size); | |
876 | ||
877 | /* We have to put outgoing argument space after regs. */ | |
878 | if (cfoa_size) | |
879 | { | |
880 | /* This does not need to be accounted for, for unwind. */ | |
881 | ||
882 | fprintf (file, "\tSub%s %d,$sp\n", | |
883 | ADDITIVE_SIZE_MODIFIER (cfoa_size), | |
884 | cfoa_size); | |
885 | framesize += cfoa_size; | |
886 | } | |
887 | } | |
888 | else if ((size + cfoa_size) > 0) | |
889 | { | |
890 | /* This does not need to be accounted for, for unwind. */ | |
891 | ||
892 | /* Local vars on stack, and we could not use movem. Add a sub here. */ | |
893 | fprintf (file, "\tSub%s %d,$sp\n", | |
894 | ADDITIVE_SIZE_MODIFIER (size + cfoa_size), | |
895 | cfoa_size + size); | |
896 | framesize += size + cfoa_size; | |
897 | } | |
898 | ||
2a15f5e1 | 899 | /* Set up the PIC register. */ |
0b85d816 | 900 | if (current_function_uses_pic_offset_table) |
761c70aa KG |
901 | fprintf (file, "\tmove.d $pc,$%s\n\tsub.d .:GOTOFF,$%s\n", |
902 | reg_names[PIC_OFFSET_TABLE_REGNUM], | |
903 | reg_names[PIC_OFFSET_TABLE_REGNUM]); | |
0b85d816 HPN |
904 | |
905 | if (TARGET_PDEBUG) | |
906 | fprintf (file, | |
907 | "; parm #%d @ %d; frame %d, FP-SP is %d; leaf: %s%s; fp %s, outg: %d arg %d\n", | |
908 | CRIS_MAX_ARGS_IN_REGS + 1, FIRST_PARM_OFFSET (0), | |
909 | get_frame_size (), | |
910 | cris_initial_frame_pointer_offset (), | |
911 | leaf_function_p () ? "yes" : "no", | |
912 | return_address_on_stack ? "no" :"yes", | |
913 | frame_pointer_needed ? "yes" : "no", | |
914 | cfoa_size, current_function_args_size); | |
915 | ||
916 | if (cris_max_stackframe && framesize > cris_max_stackframe) | |
c725bd79 | 917 | warning ("stackframe too big: %d bytes", framesize); |
0b85d816 HPN |
918 | } |
919 | ||
920 | /* Return nonzero if there are regs mentioned in the insn that are not all | |
921 | in the call_used regs. This is part of the decision whether an insn | |
922 | can be put in the epilogue. */ | |
923 | ||
924 | static int | |
925 | saved_regs_mentioned (x) | |
926 | rtx x; | |
927 | { | |
928 | int i; | |
929 | const char *fmt; | |
930 | RTX_CODE code; | |
931 | ||
e5837c07 | 932 | /* Mainly stolen from refers_to_regno_p in rtlanal.c. */ |
0b85d816 HPN |
933 | |
934 | code = GET_CODE (x); | |
935 | ||
936 | switch (code) | |
937 | { | |
938 | case REG: | |
939 | i = REGNO (x); | |
940 | return !call_used_regs[i]; | |
941 | ||
942 | case SUBREG: | |
943 | /* If this is a SUBREG of a hard reg, we can see exactly which | |
944 | registers are being modified. Otherwise, handle normally. */ | |
945 | i = REGNO (SUBREG_REG (x)); | |
946 | return !call_used_regs[i]; | |
947 | ||
948 | default: | |
949 | ; | |
950 | } | |
951 | ||
952 | fmt = GET_RTX_FORMAT (code); | |
953 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
954 | { | |
955 | if (fmt[i] == 'e') | |
956 | { | |
957 | if (saved_regs_mentioned (XEXP (x, i))) | |
958 | return 1; | |
959 | } | |
960 | else if (fmt[i] == 'E') | |
961 | { | |
962 | int j; | |
963 | for (j = XVECLEN (x, i) - 1; j >=0; j--) | |
964 | if (saved_regs_mentioned (XEXP (x, i))) | |
965 | return 1; | |
966 | } | |
967 | } | |
968 | ||
969 | return 0; | |
970 | } | |
971 | ||
972 | /* Figure out if the insn may be put in the epilogue. */ | |
973 | ||
974 | int | |
975 | cris_eligible_for_epilogue_delay (insn) | |
976 | rtx insn; | |
977 | { | |
978 | /* First of all, it must be as slottable as for a delayed branch insn. */ | |
979 | if (get_attr_slottable (insn) != SLOTTABLE_YES) | |
980 | return 0; | |
981 | ||
982 | /* It must not refer to the stack pointer (may be valid for some cases | |
983 | that I can't think of). */ | |
984 | if (reg_mentioned_p (stack_pointer_rtx, PATTERN (insn))) | |
985 | return 0; | |
986 | ||
987 | /* The frame pointer will be restored in the epilogue, before the | |
988 | "ret", so it can't be referred to. */ | |
989 | if (frame_pointer_needed | |
990 | && reg_mentioned_p (frame_pointer_rtx, PATTERN (insn))) | |
991 | return 0; | |
992 | ||
993 | /* All saved regs are restored before the delayed insn. | |
994 | This means that we cannot have any instructions that mention the | |
995 | registers that are restored by the epilogue. */ | |
996 | if (saved_regs_mentioned (PATTERN (insn))) | |
997 | return 0; | |
998 | ||
999 | /* It seems to be ok. */ | |
1000 | return 1; | |
1001 | } | |
1002 | ||
1003 | /* Return the number of delay-slots in the epilogue: return 1 if it | |
1004 | contains "ret", else 0. */ | |
1005 | ||
1006 | int | |
1007 | cris_delay_slots_for_epilogue () | |
1008 | { | |
1009 | /* Check if we use a return insn, which we only do for leaf functions. | |
1010 | Else there is no slot to fill. */ | |
1011 | if (regs_ever_live[CRIS_SRP_REGNUM] | |
1012 | || cfun->machine->needs_return_address_on_stack != 0) | |
1013 | return 0; | |
1014 | ||
1015 | /* By calling function_epilogue with the same parameters as from gcc | |
1016 | we can get info about if the epilogue can fill the delay-slot by itself. | |
1017 | If it is filled from the epilogue, then the corresponding string | |
1018 | is in save_last. | |
1019 | This depends on that the "size" argument to function_epilogue | |
1020 | always is get_frame_size. | |
1021 | FIXME: Kludgy. At least make it a separate function that is not | |
1022 | misnamed or abuses the stream parameter. */ | |
1023 | cris_target_asm_function_epilogue (NULL, get_frame_size ()); | |
1024 | ||
1025 | if (*save_last) | |
1026 | return 1; | |
1027 | return 0; | |
1028 | } | |
1029 | ||
1030 | /* Textual function epilogue. When file is NULL, it serves doubly as | |
1031 | a test for whether the epilogue can fill any "ret" delay-slots by | |
1032 | itself by storing the delay insn in save_last. */ | |
1033 | ||
1034 | static void | |
1035 | cris_target_asm_function_epilogue (file, size) | |
1036 | FILE *file; | |
1037 | HOST_WIDE_INT size; | |
1038 | { | |
1039 | int regno; | |
1040 | int last_movem_reg = -1; | |
1041 | rtx insn = get_last_insn (); | |
1042 | int argspace_offset = current_function_outgoing_args_size; | |
1043 | int pretend = current_function_pretend_args_size; | |
1044 | int return_address_on_stack | |
1045 | = regs_ever_live[CRIS_SRP_REGNUM] | |
1046 | || cfun->machine->needs_return_address_on_stack != 0; | |
1047 | ||
1048 | save_last[0] = 0; | |
1049 | ||
1050 | if (file && !TARGET_PROLOGUE_EPILOGUE) | |
1051 | return; | |
1052 | ||
1053 | if (TARGET_PDEBUG && file) | |
1054 | fprintf (file, ";;\n"); | |
1055 | ||
1056 | /* Align byte count of stack frame. */ | |
1057 | if (TARGET_STACK_ALIGN) | |
1058 | size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1; | |
1059 | ||
1060 | /* If the last insn was a BARRIER, we don't have to write any code, | |
1061 | then all returns were covered by "return" insns. */ | |
1062 | if (GET_CODE (insn) == NOTE) | |
1063 | insn = prev_nonnote_insn (insn); | |
1064 | if (insn | |
1065 | && (GET_CODE (insn) == BARRIER | |
1066 | /* We must make sure that the insn really is a "return" and | |
1067 | not a conditional branch. Try to match the return exactly, | |
1068 | and if it doesn't match, assume it is a conditional branch | |
1069 | (and output an epilogue). */ | |
1070 | || (GET_CODE (insn) == JUMP_INSN | |
1071 | && GET_CODE (PATTERN (insn)) == RETURN))) | |
1072 | { | |
1073 | if (TARGET_PDEBUG && file) | |
1074 | fprintf (file, ";;;;;\n"); | |
1075 | return; | |
1076 | } | |
1077 | ||
1078 | /* Check how many saved regs we can movem. They start at r0 and must | |
1079 | be contiguous. */ | |
1080 | for (regno = 0; | |
1081 | regno < FIRST_PSEUDO_REGISTER; | |
1082 | regno++) | |
1083 | if ((((regs_ever_live[regno] | |
1084 | && !call_used_regs[regno]) | |
053d3344 | 1085 | || (regno == (int) PIC_OFFSET_TABLE_REGNUM |
0b85d816 HPN |
1086 | && (current_function_uses_pic_offset_table |
1087 | /* It is saved anyway, if there would be a gap. */ | |
1088 | || (flag_pic | |
1089 | && regs_ever_live[regno + 1] | |
1090 | && !call_used_regs[regno + 1])))) | |
1091 | && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
1092 | && regno != CRIS_SRP_REGNUM) | |
1093 | || (current_function_calls_eh_return | |
1094 | && (regno == EH_RETURN_DATA_REGNO (0) | |
1095 | || regno == EH_RETURN_DATA_REGNO (1) | |
1096 | || regno == EH_RETURN_DATA_REGNO (2) | |
1097 | || regno == EH_RETURN_DATA_REGNO (3)))) | |
1098 | ||
1099 | { | |
1100 | if (regno == last_movem_reg + 1) | |
1101 | last_movem_reg++; | |
1102 | else | |
1103 | break; | |
1104 | } | |
1105 | ||
1106 | for (regno = FIRST_PSEUDO_REGISTER - 1; | |
1107 | regno > last_movem_reg; | |
1108 | regno--) | |
1109 | if ((((regs_ever_live[regno] | |
1110 | && !call_used_regs[regno]) | |
053d3344 | 1111 | || (regno == (int) PIC_OFFSET_TABLE_REGNUM |
0b85d816 HPN |
1112 | && (current_function_uses_pic_offset_table |
1113 | /* It is saved anyway, if there would be a gap. */ | |
1114 | || (flag_pic | |
1115 | && regs_ever_live[regno + 1] | |
1116 | && !call_used_regs[regno + 1])))) | |
1117 | && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
1118 | && regno != CRIS_SRP_REGNUM) | |
1119 | || (current_function_calls_eh_return | |
1120 | && (regno == EH_RETURN_DATA_REGNO (0) | |
1121 | || regno == EH_RETURN_DATA_REGNO (1) | |
1122 | || regno == EH_RETURN_DATA_REGNO (2) | |
1123 | || regno == EH_RETURN_DATA_REGNO (3)))) | |
1124 | { | |
1125 | if (argspace_offset) | |
1126 | { | |
1127 | /* There is an area for outgoing parameters located before | |
1128 | the saved registers. We have to adjust for that. */ | |
1129 | if (file) | |
1130 | fprintf (file, "\tAdd%s %d,$sp\n", | |
1131 | ADDITIVE_SIZE_MODIFIER (argspace_offset), | |
1132 | argspace_offset); | |
1133 | ||
1134 | /* Make sure we only do this once. */ | |
1135 | argspace_offset = 0; | |
1136 | } | |
1137 | ||
1138 | /* Flush previous non-movem:ed registers. */ | |
1139 | if (*save_last && file) | |
1140 | fprintf (file, save_last); | |
44a4ca5e | 1141 | sprintf (save_last, "\tPop $%s\n", reg_names[regno]); |
0b85d816 HPN |
1142 | } |
1143 | ||
1144 | if (last_movem_reg != -1) | |
1145 | { | |
1146 | if (argspace_offset) | |
1147 | { | |
1148 | /* Adjust for the outgoing parameters area, if that's not | |
1149 | handled yet. */ | |
1150 | if (*save_last && file) | |
1151 | { | |
1152 | fprintf (file, save_last); | |
1153 | *save_last = 0; | |
1154 | } | |
117b0c0a | 1155 | |
0b85d816 HPN |
1156 | if (file) |
1157 | fprintf (file, "\tAdd%s %d,$sp\n", | |
1158 | ADDITIVE_SIZE_MODIFIER (argspace_offset), | |
1159 | argspace_offset); | |
1160 | argspace_offset = 0; | |
1161 | } | |
1162 | /* Flush previous non-movem:ed registers. */ | |
1163 | else if (*save_last && file) | |
1164 | fprintf (file, save_last); | |
1165 | sprintf (save_last, "\tmovem [$sp+],$%s\n", reg_names[last_movem_reg]); | |
1166 | } | |
1167 | ||
1168 | /* Restore frame pointer if necessary. */ | |
1169 | if (frame_pointer_needed) | |
1170 | { | |
1171 | if (*save_last && file) | |
1172 | fprintf (file, save_last); | |
1173 | ||
1174 | if (file) | |
1175 | fprintf (file, "\tmove.d $%s,$sp\n", | |
1176 | reg_names[FRAME_POINTER_REGNUM]); | |
1177 | sprintf (save_last, "\tPop $%s\n", | |
1178 | reg_names[FRAME_POINTER_REGNUM]); | |
1179 | } | |
1180 | else | |
1181 | { | |
1182 | /* If there was no frame-pointer to restore sp from, we must | |
1183 | explicitly deallocate local variables. */ | |
1184 | ||
1185 | /* Handle space for outgoing parameters that hasn't been handled | |
1186 | yet. */ | |
1187 | size += argspace_offset; | |
1188 | ||
1189 | if (size) | |
1190 | { | |
1191 | if (*save_last && file) | |
1192 | fprintf (file, save_last); | |
1193 | ||
1194 | sprintf (save_last, "\tadd%s %d,$sp\n", | |
1195 | ADDITIVE_SIZE_MODIFIER (size), size); | |
1196 | } | |
1197 | ||
1198 | /* If the size was not in the range for a "quick", we must flush | |
1199 | it here. */ | |
1200 | if (size > 63) | |
1201 | { | |
1202 | if (file) | |
1203 | fprintf (file, save_last); | |
1204 | *save_last = 0; | |
1205 | } | |
1206 | } | |
1207 | ||
1208 | /* If this function has no pushed register parameters | |
1209 | (stdargs/varargs), and if it is not a leaf function, then we can | |
1210 | just jump-return here. */ | |
1211 | if (return_address_on_stack && pretend == 0) | |
1212 | { | |
1213 | if (*save_last && file) | |
1214 | fprintf (file, save_last); | |
1215 | *save_last = 0; | |
1216 | ||
1217 | if (file) | |
1218 | { | |
1219 | if (current_function_calls_eh_return) | |
1220 | { | |
1221 | /* The installed EH-return address is in *this* frame, so we | |
1222 | need to pop it before we return. */ | |
44a4ca5e | 1223 | fprintf (file, "\tpop $srp\n"); |
0b85d816 HPN |
1224 | fprintf (file, "\tret\n"); |
1225 | fprintf (file, "\tadd.d $%s,$sp\n", reg_names[CRIS_STACKADJ_REG]); | |
1226 | } | |
1227 | else | |
1228 | fprintf (file, "\tJump [$sp+]\n"); | |
1229 | ||
1230 | /* Do a sanity check to avoid generating invalid code. */ | |
1231 | if (current_function_epilogue_delay_list) | |
c725bd79 | 1232 | internal_error ("allocated but unused delay list in epilogue"); |
0b85d816 HPN |
1233 | } |
1234 | return; | |
1235 | } | |
1236 | ||
1237 | /* Rather than add current_function_calls_eh_return conditions | |
1238 | everywhere in the following code (and not be able to test it | |
1239 | thoroughly), assert the assumption that all usage of | |
1240 | __builtin_eh_return are handled above. */ | |
1241 | if (current_function_calls_eh_return) | |
c725bd79 | 1242 | internal_error ("unexpected function type needing stack adjustment for\ |
0b85d816 HPN |
1243 | __builtin_eh_return"); |
1244 | ||
1245 | /* If we pushed some register parameters, then adjust the stack for | |
1246 | them. */ | |
1247 | if (pretend) | |
1248 | { | |
e5837c07 | 1249 | /* Since srp is stored on the way, we need to restore it first. */ |
0b85d816 HPN |
1250 | if (return_address_on_stack) |
1251 | { | |
1252 | if (*save_last && file) | |
1253 | fprintf (file, save_last); | |
1254 | *save_last = 0; | |
1255 | ||
1256 | if (file) | |
1257 | fprintf (file, "\tpop $srp\n"); | |
1258 | } | |
1259 | ||
1260 | if (*save_last && file) | |
1261 | fprintf (file, save_last); | |
1262 | ||
1263 | sprintf (save_last, "\tadd%s %d,$sp\n", | |
1264 | ADDITIVE_SIZE_MODIFIER (pretend), pretend); | |
1265 | } | |
1266 | ||
e5837c07 | 1267 | /* Here's where we have a delay-slot we need to fill. */ |
0b85d816 HPN |
1268 | if (file && current_function_epilogue_delay_list) |
1269 | { | |
1270 | /* If gcc has allocated an insn for the epilogue delay slot, but | |
1271 | things were arranged so we now thought we could do it | |
1272 | ourselves, don't forget to flush that insn. */ | |
1273 | if (*save_last) | |
1274 | fprintf (file, save_last); | |
1275 | ||
1276 | fprintf (file, "\tRet\n"); | |
1277 | ||
1278 | /* Output the delay-slot-insn the mandated way. */ | |
1279 | final_scan_insn (XEXP (current_function_epilogue_delay_list, 0), | |
1280 | file, 1, -2, 1); | |
1281 | } | |
1282 | else if (file) | |
1283 | { | |
1284 | fprintf (file, "\tRet\n"); | |
1285 | ||
1286 | /* If the GCC did not do it, we have to use whatever insn we have, | |
1287 | or a nop. */ | |
1288 | if (*save_last) | |
1289 | fprintf (file, save_last); | |
1290 | else | |
1291 | fprintf (file, "\tnOp\n"); | |
1292 | } | |
1293 | } | |
1294 | ||
1295 | /* The PRINT_OPERAND worker. */ | |
1296 | ||
1297 | void | |
1298 | cris_print_operand (file, x, code) | |
1299 | FILE *file; | |
1300 | rtx x; | |
1301 | int code; | |
1302 | { | |
1303 | rtx operand = x; | |
1304 | ||
1305 | /* Size-strings corresponding to MULT expressions. */ | |
0139adca | 1306 | static const char *const mults[] = { "BAD:0", ".b", ".w", "BAD:3", ".d" }; |
0b85d816 HPN |
1307 | |
1308 | /* New code entries should just be added to the switch below. If | |
1309 | handling is finished, just return. If handling was just a | |
1310 | modification of the operand, the modified operand should be put in | |
1311 | "operand", and then do a break to let default handling | |
1312 | (zero-modifier) output the operand. */ | |
1313 | ||
1314 | switch (code) | |
1315 | { | |
1316 | case 'b': | |
1317 | /* Print the unsigned supplied integer as if it was signed | |
1318 | and < 0, i.e print 255 or 65535 as -1, 254, 65534 as -2, etc. */ | |
1319 | if (GET_CODE (x) != CONST_INT | |
1320 | || ! CONST_OK_FOR_LETTER_P (INTVAL (x), 'O')) | |
3d556836 | 1321 | LOSE_AND_RETURN ("invalid operand for 'b' modifier", x); |
0b85d816 HPN |
1322 | fprintf (file, "%d", INTVAL (x)| (INTVAL (x) <= 255 ? ~255 : ~65535)); |
1323 | return; | |
1324 | ||
1325 | case 'x': | |
1326 | /* Print assembler code for operator. */ | |
1327 | fprintf (file, "%s", cris_op_str (operand)); | |
1328 | return; | |
1329 | ||
1330 | case 'v': | |
1331 | /* Print the operand without the PIC register. */ | |
3d556836 HPN |
1332 | if (! flag_pic || ! CONSTANT_P (x) || ! cris_gotless_symbol (x)) |
1333 | LOSE_AND_RETURN ("invalid operand for 'v' modifier", x); | |
0b85d816 HPN |
1334 | cris_pic_sympart_only++; |
1335 | cris_output_addr_const (file, x); | |
1336 | cris_pic_sympart_only--; | |
1337 | return; | |
1338 | ||
1339 | case 'P': | |
1340 | /* Print the PIC register. Applied to a GOT-less PIC symbol for | |
1341 | sanity. */ | |
3d556836 HPN |
1342 | if (! flag_pic || ! CONSTANT_P (x) || ! cris_gotless_symbol (x)) |
1343 | LOSE_AND_RETURN ("invalid operand for 'P' modifier", x); | |
0b85d816 HPN |
1344 | fprintf (file, "$%s", reg_names [PIC_OFFSET_TABLE_REGNUM]); |
1345 | return; | |
1346 | ||
1347 | case 'p': | |
1348 | /* Adjust a power of two to its log2. */ | |
1349 | if (GET_CODE (x) != CONST_INT || exact_log2 (INTVAL (x)) < 0 ) | |
3d556836 | 1350 | LOSE_AND_RETURN ("invalid operand for 'p' modifier", x); |
0b85d816 HPN |
1351 | fprintf (file, "%d", exact_log2 (INTVAL (x))); |
1352 | return; | |
1353 | ||
1354 | case 's': | |
1355 | /* For an integer, print 'b' or 'w' if <= 255 or <= 65535 | |
1356 | respectively. This modifier also terminates the inhibiting | |
1357 | effects of the 'x' modifier. */ | |
1358 | cris_output_insn_is_bound = 0; | |
1359 | if (GET_MODE (x) == VOIDmode && GET_CODE (x) == CONST_INT) | |
1360 | { | |
1361 | if (INTVAL (x) >= 0) | |
1362 | { | |
1363 | if (INTVAL (x) <= 255) | |
1364 | putc ('b', file); | |
1365 | else if (INTVAL (x) <= 65535) | |
1366 | putc ('w', file); | |
1367 | else | |
1368 | putc ('d', file); | |
1369 | } | |
1370 | else | |
1371 | putc ('d', file); | |
1372 | return; | |
1373 | } | |
1374 | ||
1375 | /* For a non-integer, print the size of the operand. */ | |
1376 | putc ((GET_MODE (x) == SImode || GET_MODE (x) == SFmode) | |
1377 | ? 'd' : GET_MODE (x) == HImode ? 'w' | |
1378 | : GET_MODE (x) == QImode ? 'b' | |
1379 | /* If none of the above, emit an erroneous size letter. */ | |
1380 | : 'X', | |
1381 | file); | |
1382 | return; | |
1383 | ||
1384 | case 'z': | |
1385 | /* Const_int: print b for -127 <= x <= 255, | |
1386 | w for -32768 <= x <= 65535, else abort. */ | |
1387 | if (GET_CODE (x) != CONST_INT | |
1388 | || INTVAL (x) < -32768 || INTVAL (x) > 65535) | |
3d556836 | 1389 | LOSE_AND_RETURN ("invalid operand for 'z' modifier", x); |
0b85d816 HPN |
1390 | putc (INTVAL (x) >= -128 && INTVAL (x) <= 255 ? 'b' : 'w', file); |
1391 | return; | |
1392 | ||
1393 | case '#': | |
1394 | /* Output a 'nop' if there's nothing for the delay slot. | |
1395 | This method stolen from the sparc files. */ | |
1396 | if (dbr_sequence_length () == 0) | |
1397 | fputs ("\n\tnop", file); | |
1398 | return; | |
1399 | ||
1400 | case 'H': | |
1401 | /* Print high (most significant) part of something. */ | |
1402 | switch (GET_CODE (operand)) | |
1403 | { | |
1404 | case CONST_INT: | |
60ffa0e5 RH |
1405 | if (HOST_BITS_PER_WIDE_INT == 32) |
1406 | /* Sign-extension from a normal int to a long long. */ | |
1407 | fprintf (file, INTVAL (operand) < 0 ? "-1" : "0"); | |
1408 | else | |
1409 | fprintf (file, "0x%x", (unsigned int)(INTVAL (x) >> 31 >> 1)); | |
0b85d816 HPN |
1410 | return; |
1411 | ||
1412 | case CONST_DOUBLE: | |
1413 | /* High part of a long long constant. */ | |
1414 | if (GET_MODE (operand) == VOIDmode) | |
1415 | { | |
1416 | fprintf (file, "0x%x", CONST_DOUBLE_HIGH (x)); | |
1417 | return; | |
1418 | } | |
1419 | else | |
3d556836 | 1420 | LOSE_AND_RETURN ("invalid operand for 'H' modifier", x); |
0b85d816 HPN |
1421 | |
1422 | case REG: | |
1423 | /* Print reg + 1. Check that there's not an attempt to print | |
1424 | high-parts of registers like stack-pointer or higher. */ | |
1425 | if (REGNO (operand) > STACK_POINTER_REGNUM - 2) | |
3d556836 | 1426 | LOSE_AND_RETURN ("bad register", operand); |
0b85d816 HPN |
1427 | fprintf (file, "$%s", reg_names[REGNO (operand) + 1]); |
1428 | return; | |
1429 | ||
1430 | case MEM: | |
1431 | /* Adjust memory address to high part. */ | |
1432 | { | |
1433 | rtx adj_mem = operand; | |
1434 | int size | |
1435 | = GET_MODE_BITSIZE (GET_MODE (operand)) / BITS_PER_UNIT; | |
1436 | ||
1437 | /* Adjust so we can use two SImode in DImode. | |
1438 | Calling adj_offsettable_operand will make sure it is an | |
1439 | offsettable address. Don't do this for a postincrement | |
1440 | though; it should remain as it was. */ | |
1441 | if (GET_CODE (XEXP (adj_mem, 0)) != POST_INC) | |
1442 | adj_mem | |
1443 | = adjust_address (adj_mem, GET_MODE (adj_mem), size / 2); | |
1444 | ||
1445 | output_address (XEXP (adj_mem, 0)); | |
1446 | return; | |
1447 | } | |
1448 | ||
1449 | default: | |
3d556836 | 1450 | LOSE_AND_RETURN ("invalid operand for 'H' modifier", x); |
0b85d816 HPN |
1451 | } |
1452 | ||
1453 | case 'L': | |
1454 | /* Strip the MEM expression. */ | |
1455 | operand = XEXP (operand, 0); | |
1456 | break; | |
1457 | ||
1458 | case 'e': | |
1459 | /* Print 's' if operand is SIGN_EXTEND or 'u' if ZERO_EXTEND unless | |
1460 | cris_output_insn_is_bound is nonzero. */ | |
1461 | if (GET_CODE (operand) != SIGN_EXTEND | |
1462 | && GET_CODE (operand) != ZERO_EXTEND | |
1463 | && GET_CODE (operand) != CONST_INT) | |
3d556836 | 1464 | LOSE_AND_RETURN ("invalid operand for 'e' modifier", x); |
0b85d816 HPN |
1465 | |
1466 | if (cris_output_insn_is_bound) | |
1467 | { | |
1468 | cris_output_insn_is_bound = 0; | |
1469 | return; | |
1470 | } | |
1471 | ||
1472 | putc (GET_CODE (operand) == SIGN_EXTEND | |
1473 | || (GET_CODE (operand) == CONST_INT && INTVAL (operand) < 0) | |
1474 | ? 's' : 'u', file); | |
1475 | return; | |
1476 | ||
1477 | case 'm': | |
1478 | /* Print the size letter of the inner element. We can do it by | |
1479 | calling ourselves with the 's' modifier. */ | |
1480 | if (GET_CODE (operand) != SIGN_EXTEND && GET_CODE (operand) != ZERO_EXTEND) | |
3d556836 | 1481 | LOSE_AND_RETURN ("invalid operand for 'm' modifier", x); |
0b85d816 HPN |
1482 | cris_print_operand (file, XEXP (operand, 0), 's'); |
1483 | return; | |
1484 | ||
1485 | case 'M': | |
1486 | /* Print the least significant part of operand. */ | |
1487 | if (GET_CODE (operand) == CONST_DOUBLE) | |
1488 | { | |
1489 | fprintf (file, "0x%x", CONST_DOUBLE_LOW (x)); | |
1490 | return; | |
1491 | } | |
60ffa0e5 RH |
1492 | else if (HOST_BITS_PER_WIDE_INT > 32 && GET_CODE (operand) == CONST_INT) |
1493 | { | |
4a085d2e HPN |
1494 | fprintf (file, "0x%x", |
1495 | INTVAL (x) & ((unsigned int) 0x7fffffff * 2 + 1)); | |
60ffa0e5 RH |
1496 | return; |
1497 | } | |
1498 | /* Otherwise the least significant part equals the normal part, | |
1499 | so handle it normally. */ | |
0b85d816 HPN |
1500 | break; |
1501 | ||
1502 | case 'A': | |
1503 | /* When emitting an add for the high part of a DImode constant, we | |
1504 | want to use addq for 0 and adds.w for -1. */ | |
1505 | if (GET_CODE (operand) != CONST_INT) | |
3d556836 | 1506 | LOSE_AND_RETURN ("invalid operand for 'A' modifier", x); |
0b85d816 HPN |
1507 | fprintf (file, INTVAL (operand) < 0 ? "adds.w" : "addq"); |
1508 | return; | |
1509 | ||
1510 | case 'D': | |
1511 | /* When emitting an sub for the high part of a DImode constant, we | |
1512 | want to use subq for 0 and subs.w for -1. */ | |
1513 | if (GET_CODE (operand) != CONST_INT) | |
3d556836 | 1514 | LOSE_AND_RETURN ("invalid operand for 'D' modifier", x); |
0b85d816 HPN |
1515 | fprintf (file, INTVAL (operand) < 0 ? "subs.w" : "subq"); |
1516 | return; | |
1517 | ||
1518 | case 'S': | |
1519 | /* Print the operand as the index-part of an address. | |
1520 | Easiest way out is to use cris_print_index. */ | |
1521 | cris_print_index (operand, file); | |
1522 | return; | |
1523 | ||
1524 | case 'T': | |
1525 | /* Print the size letter for an operand to a MULT, which must be a | |
1526 | const_int with a suitable value. */ | |
1527 | if (GET_CODE (operand) != CONST_INT || INTVAL (operand) > 4) | |
3d556836 | 1528 | LOSE_AND_RETURN ("invalid operand for 'T' modifier", x); |
0b85d816 HPN |
1529 | fprintf (file, "%s", mults[INTVAL (operand)]); |
1530 | return; | |
1531 | ||
1532 | case 0: | |
e5837c07 | 1533 | /* No code, print as usual. */ |
0b85d816 HPN |
1534 | break; |
1535 | ||
1536 | default: | |
3d556836 | 1537 | LOSE_AND_RETURN ("invalid operand modifier letter", x); |
0b85d816 HPN |
1538 | } |
1539 | ||
e5837c07 | 1540 | /* Print an operand as without a modifier letter. */ |
0b85d816 HPN |
1541 | switch (GET_CODE (operand)) |
1542 | { | |
1543 | case REG: | |
1544 | if (REGNO (operand) > 15) | |
c725bd79 | 1545 | internal_error ("internal error: bad register: %d", REGNO (operand)); |
0b85d816 HPN |
1546 | fprintf (file, "$%s", reg_names[REGNO (operand)]); |
1547 | return; | |
1548 | ||
1549 | case MEM: | |
1550 | output_address (XEXP (operand, 0)); | |
1551 | return; | |
1552 | ||
1553 | case CONST_DOUBLE: | |
1554 | if (GET_MODE (operand) == VOIDmode) | |
1555 | /* A long long constant. */ | |
1556 | output_addr_const (file, operand); | |
1557 | else | |
1558 | { | |
1559 | /* Only single precision is allowed as plain operands the | |
1560 | moment. FIXME: REAL_VALUE_FROM_CONST_DOUBLE isn't | |
1561 | documented. */ | |
1562 | REAL_VALUE_TYPE r; | |
1563 | long l; | |
1564 | ||
1565 | /* FIXME: Perhaps check overflow of the "single". */ | |
1566 | REAL_VALUE_FROM_CONST_DOUBLE (r, operand); | |
1567 | REAL_VALUE_TO_TARGET_SINGLE (r, l); | |
1568 | ||
1569 | fprintf (file, "0x%lx", l); | |
1570 | } | |
1571 | return; | |
1572 | ||
1573 | case UNSPEC: | |
1574 | ASSERT_PLT_UNSPEC (operand); | |
1575 | /* Fall through. */ | |
1576 | ||
1577 | case CONST: | |
1578 | cris_output_addr_const (file, operand); | |
1579 | return; | |
1580 | ||
1581 | case MULT: | |
1582 | case ASHIFT: | |
1583 | { | |
1584 | /* For a (MULT (reg X) const_int) we output "rX.S". */ | |
1585 | int i = GET_CODE (XEXP (operand, 1)) == CONST_INT | |
1586 | ? INTVAL (XEXP (operand, 1)) : INTVAL (XEXP (operand, 0)); | |
1587 | rtx reg = GET_CODE (XEXP (operand, 1)) == CONST_INT | |
1588 | ? XEXP (operand, 0) : XEXP (operand, 1); | |
1589 | ||
1590 | if (GET_CODE (reg) != REG | |
1591 | || (GET_CODE (XEXP (operand, 0)) != CONST_INT | |
1592 | && GET_CODE (XEXP (operand, 1)) != CONST_INT)) | |
3d556836 | 1593 | LOSE_AND_RETURN ("unexpected multiplicative operand", x); |
0b85d816 HPN |
1594 | |
1595 | cris_print_base (reg, file); | |
1596 | fprintf (file, ".%c", | |
1597 | i == 0 || (i == 1 && GET_CODE (operand) == MULT) ? 'b' | |
1598 | : i == 4 ? 'd' | |
1599 | : (i == 2 && GET_CODE (operand) == MULT) || i == 1 ? 'w' | |
1600 | : 'd'); | |
1601 | return; | |
1602 | } | |
1603 | ||
1604 | default: | |
1605 | /* No need to handle all strange variants, let output_addr_const | |
1606 | do it for us. */ | |
1607 | if (CONSTANT_P (operand)) | |
1608 | { | |
1609 | cris_output_addr_const (file, operand); | |
1610 | return; | |
1611 | } | |
1612 | ||
3d556836 | 1613 | LOSE_AND_RETURN ("unexpected operand", x); |
0b85d816 HPN |
1614 | } |
1615 | } | |
1616 | ||
1617 | /* The PRINT_OPERAND_ADDRESS worker. */ | |
1618 | ||
1619 | void | |
1620 | cris_print_operand_address (file, x) | |
1621 | FILE *file; | |
1622 | rtx x; | |
1623 | { | |
1624 | /* All these were inside MEM:s so output indirection characters. */ | |
1625 | putc ('[', file); | |
1626 | ||
1627 | if (CONSTANT_ADDRESS_P (x)) | |
1628 | cris_output_addr_const (file, x); | |
1629 | else if (BASE_OR_AUTOINCR_P (x)) | |
1630 | cris_print_base (x, file); | |
1631 | else if (GET_CODE (x) == PLUS) | |
1632 | { | |
1633 | rtx x1, x2; | |
1634 | ||
1635 | x1 = XEXP (x, 0); | |
1636 | x2 = XEXP (x, 1); | |
1637 | if (BASE_P (x1)) | |
1638 | { | |
1639 | cris_print_base (x1, file); | |
1640 | cris_print_index (x2, file); | |
1641 | } | |
1642 | else if (BASE_P (x2)) | |
1643 | { | |
1644 | cris_print_base (x2, file); | |
1645 | cris_print_index (x1, file); | |
1646 | } | |
1647 | else | |
3d556836 | 1648 | LOSE_AND_RETURN ("unrecognized address", x); |
0b85d816 HPN |
1649 | } |
1650 | else if (GET_CODE (x) == MEM) | |
1651 | { | |
1652 | /* A DIP. Output more indirection characters. */ | |
1653 | putc ('[', file); | |
1654 | cris_print_base (XEXP (x, 0), file); | |
1655 | putc (']', file); | |
1656 | } | |
1657 | else | |
3d556836 | 1658 | LOSE_AND_RETURN ("unrecognized address", x); |
0b85d816 HPN |
1659 | |
1660 | putc (']', file); | |
1661 | } | |
1662 | ||
1663 | /* The RETURN_ADDR_RTX worker. | |
1664 | We mark that the return address is used, either by EH or | |
1665 | __builtin_return_address, for use by the function prologue and | |
1666 | epilogue. FIXME: This isn't optimal; we just use the mark in the | |
1667 | prologue and epilogue to say that the return address is to be stored | |
1668 | in the stack frame. We could return SRP for leaf-functions and use the | |
1669 | initial-value machinery. */ | |
1670 | ||
1671 | rtx | |
1672 | cris_return_addr_rtx (count, frameaddr) | |
1673 | int count; | |
1674 | rtx frameaddr ATTRIBUTE_UNUSED; | |
1675 | { | |
1676 | cfun->machine->needs_return_address_on_stack = 1; | |
1677 | ||
1678 | /* The return-address is stored just above the saved frame-pointer (if | |
1679 | present). Apparently we can't eliminate from the frame-pointer in | |
1680 | that direction, so use the incoming args (maybe pretended) pointer. */ | |
1681 | return count == 0 | |
1682 | ? gen_rtx_MEM (Pmode, plus_constant (virtual_incoming_args_rtx, -4)) | |
1683 | : NULL_RTX; | |
1684 | } | |
1685 | ||
1686 | /* This used to be the INITIAL_FRAME_POINTER_OFFSET worker; now only | |
1687 | handles FP -> SP elimination offset. */ | |
1688 | ||
1689 | static int | |
1690 | cris_initial_frame_pointer_offset () | |
1691 | { | |
1692 | int regno; | |
1693 | ||
f710504c | 1694 | /* Initial offset is 0 if we don't have a frame pointer. */ |
0b85d816 HPN |
1695 | int offs = 0; |
1696 | ||
1697 | /* And 4 for each register pushed. */ | |
1698 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
1699 | if ((((regs_ever_live[regno] | |
1700 | && !call_used_regs[regno]) | |
053d3344 | 1701 | || (regno == (int) PIC_OFFSET_TABLE_REGNUM |
0b85d816 HPN |
1702 | && (current_function_uses_pic_offset_table |
1703 | /* It is saved anyway, if there would be a gap. */ | |
1704 | || (flag_pic | |
1705 | && regs_ever_live[regno + 1] | |
1706 | && !call_used_regs[regno + 1])))) | |
1707 | && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
1708 | && regno != CRIS_SRP_REGNUM) | |
1709 | || (current_function_calls_eh_return | |
1710 | && (regno == EH_RETURN_DATA_REGNO (0) | |
1711 | || regno == EH_RETURN_DATA_REGNO (1) | |
1712 | || regno == EH_RETURN_DATA_REGNO (2) | |
1713 | || regno == EH_RETURN_DATA_REGNO (3)))) | |
1714 | offs += 4; | |
1715 | ||
1716 | /* And then, last, we add the locals allocated. */ | |
1717 | offs += get_frame_size (); | |
1718 | ||
1719 | /* And more; the accumulated args size. */ | |
1720 | offs += current_function_outgoing_args_size; | |
1721 | ||
1722 | /* Then round it off, in case we use aligned stack. */ | |
1723 | if (TARGET_STACK_ALIGN) | |
1724 | offs = TARGET_ALIGN_BY_32 ? (offs + 3) & ~3 : (offs + 1) & ~1; | |
1725 | ||
1726 | return offs; | |
1727 | } | |
1728 | ||
1729 | /* The INITIAL_ELIMINATION_OFFSET worker. | |
1730 | Calculate the difference between imaginary registers such as frame | |
1731 | pointer and the stack pointer. Used to eliminate the frame pointer | |
1732 | and imaginary arg pointer. */ | |
1733 | ||
1734 | int | |
1735 | cris_initial_elimination_offset (fromreg, toreg) | |
1736 | int fromreg; | |
1737 | int toreg; | |
1738 | { | |
1739 | int fp_sp_offset | |
1740 | = cris_initial_frame_pointer_offset (); | |
1741 | ||
1742 | /* We should be able to use regs_ever_live and related prologue | |
1743 | information here, or alpha should not as well. */ | |
1744 | int return_address_on_stack | |
1745 | = regs_ever_live[CRIS_SRP_REGNUM] | |
1746 | || cfun->machine->needs_return_address_on_stack != 0; | |
1747 | ||
1748 | /* Here we act as if the frame-pointer is needed. */ | |
1749 | int ap_fp_offset = 4 + (return_address_on_stack ? 4 : 0); | |
1750 | ||
1751 | if (fromreg == ARG_POINTER_REGNUM | |
1752 | && toreg == FRAME_POINTER_REGNUM) | |
1753 | return ap_fp_offset; | |
1754 | ||
1755 | /* Between the frame pointer and the stack are only "normal" stack | |
1756 | variables and saved registers. */ | |
1757 | if (fromreg == FRAME_POINTER_REGNUM | |
1758 | && toreg == STACK_POINTER_REGNUM) | |
1759 | return fp_sp_offset; | |
1760 | ||
e5837c07 | 1761 | /* We need to balance out the frame pointer here. */ |
0b85d816 HPN |
1762 | if (fromreg == ARG_POINTER_REGNUM |
1763 | && toreg == STACK_POINTER_REGNUM) | |
1764 | return ap_fp_offset + fp_sp_offset - 4; | |
1765 | ||
1766 | abort (); | |
1767 | } | |
1768 | ||
1769 | /* This function looks into the pattern to see how this insn affects | |
1770 | condition codes. | |
1771 | ||
1772 | Used when to eliminate test insns before a condition-code user, | |
1773 | such as a "scc" insn or a conditional branch. This includes | |
1774 | checking if the entities that cc was updated by, are changed by the | |
1775 | operation. | |
1776 | ||
1777 | Currently a jumble of the old peek-inside-the-insn and the newer | |
1778 | check-cc-attribute methods. */ | |
1779 | ||
1780 | void | |
1781 | cris_notice_update_cc (exp, insn) | |
1782 | rtx exp; | |
1783 | rtx insn; | |
1784 | { | |
1785 | /* Check if user specified "-mcc-init" as a bug-workaround. FIXME: | |
1786 | TARGET_CCINIT does not work; we must set CC_REVERSED as below. | |
1787 | Several test-cases will otherwise fail, for example | |
1788 | gcc.c-torture/execute/20000217-1.c -O0 and -O1. */ | |
1789 | if (TARGET_CCINIT) | |
1790 | { | |
1791 | CC_STATUS_INIT; | |
1792 | return; | |
1793 | } | |
1794 | ||
1795 | /* Slowly, we're converting to using attributes to control the setting | |
1796 | of condition-code status. */ | |
1797 | switch (get_attr_cc (insn)) | |
1798 | { | |
1799 | case CC_NONE: | |
1800 | /* Even if it is "none", a setting may clobber a previous | |
1801 | cc-value, so check. */ | |
1802 | if (GET_CODE (exp) == SET) | |
1803 | { | |
1804 | if (cc_status.value1 | |
1805 | && cris_reg_overlap_mentioned_p (SET_DEST (exp), | |
1806 | cc_status.value1)) | |
1807 | cc_status.value1 = 0; | |
1808 | ||
1809 | if (cc_status.value2 | |
1810 | && cris_reg_overlap_mentioned_p (SET_DEST (exp), | |
1811 | cc_status.value2)) | |
1812 | cc_status.value2 = 0; | |
1813 | } | |
1814 | return; | |
1815 | ||
1816 | case CC_CLOBBER: | |
1817 | CC_STATUS_INIT; | |
1818 | break; | |
1819 | ||
1820 | case CC_NORMAL: | |
1821 | /* Which means, for: | |
1822 | (set (cc0) (...)): | |
1823 | CC is (...). | |
1824 | ||
1825 | (set (reg) (...)): | |
1826 | CC is (reg) and (...) - unless (...) is 0, then CC does not change. | |
1827 | CC_NO_OVERFLOW unless (...) is reg or mem. | |
1828 | ||
1829 | (set (mem) (...)): | |
1830 | CC does not change. | |
1831 | ||
1832 | (set (pc) (...)): | |
1833 | CC does not change. | |
1834 | ||
1835 | (parallel | |
1836 | (set (reg1) (mem (bdap/biap))) | |
1837 | (set (reg2) (bdap/biap))): | |
1838 | CC is (reg1) and (mem (reg2)) | |
1839 | ||
1840 | (parallel | |
1841 | (set (mem (bdap/biap)) (reg1)) [or 0] | |
1842 | (set (reg2) (bdap/biap))): | |
1843 | CC does not change. | |
1844 | ||
1845 | (where reg and mem includes strict_low_parts variants thereof) | |
1846 | ||
1847 | For all others, assume CC is clobbered. | |
1848 | Note that we do not have to care about setting CC_NO_OVERFLOW, | |
1849 | since the overflow flag is set to 0 (i.e. right) for | |
1850 | instructions where it does not have any sane sense, but where | |
1851 | other flags have meanings. (This includes shifts; the carry is | |
1852 | not set by them). | |
1853 | ||
1854 | Note that there are other parallel constructs we could match, | |
1855 | but we don't do that yet. */ | |
1856 | ||
1857 | if (GET_CODE (exp) == SET) | |
1858 | { | |
1859 | /* FIXME: Check when this happens. It looks like we should | |
1860 | actually do a CC_STATUS_INIT here to be safe. */ | |
1861 | if (SET_DEST (exp) == pc_rtx) | |
1862 | return; | |
1863 | ||
1864 | /* Record CC0 changes, so we do not have to output multiple | |
e5837c07 | 1865 | test insns. */ |
0b85d816 HPN |
1866 | if (SET_DEST (exp) == cc0_rtx) |
1867 | { | |
1868 | cc_status.value1 = SET_SRC (exp); | |
1869 | cc_status.value2 = 0; | |
1870 | ||
e5837c07 | 1871 | /* Handle flags for the special btstq on one bit. */ |
0b85d816 HPN |
1872 | if (GET_CODE (SET_SRC (exp)) == ZERO_EXTRACT |
1873 | && XEXP (SET_SRC (exp), 1) == const1_rtx) | |
1874 | { | |
1875 | if (GET_CODE (XEXP (SET_SRC (exp), 0)) == CONST_INT) | |
1876 | /* Using cmpq. */ | |
1877 | cc_status.flags = CC_INVERTED; | |
1878 | else | |
1879 | /* A one-bit btstq. */ | |
1880 | cc_status.flags = CC_Z_IN_NOT_N; | |
1881 | } | |
1882 | else | |
1883 | cc_status.flags = 0; | |
1884 | ||
1885 | if (GET_CODE (SET_SRC (exp)) == COMPARE) | |
1886 | { | |
1887 | if (!REG_P (XEXP (SET_SRC (exp), 0)) | |
1888 | && XEXP (SET_SRC (exp), 1) != const0_rtx) | |
1889 | /* For some reason gcc will not canonicalize compare | |
1890 | operations, reversing the sign by itself if | |
e5837c07 | 1891 | operands are in wrong order. */ |
0b85d816 HPN |
1892 | /* (But NOT inverted; eq is still eq.) */ |
1893 | cc_status.flags = CC_REVERSED; | |
1894 | ||
1895 | /* This seems to be overlooked by gcc. FIXME: Check again. | |
1896 | FIXME: Is it really safe? */ | |
1897 | cc_status.value2 | |
1898 | = gen_rtx_MINUS (GET_MODE (SET_SRC (exp)), | |
1899 | XEXP (SET_SRC (exp), 0), | |
1900 | XEXP (SET_SRC (exp), 1)); | |
1901 | } | |
1902 | return; | |
1903 | } | |
1904 | else if (REG_P (SET_DEST (exp)) | |
1905 | || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART | |
1906 | && REG_P (XEXP (SET_DEST (exp), 0)))) | |
1907 | { | |
1908 | /* A register is set; normally CC is set to show that no | |
e5837c07 | 1909 | test insn is needed. Catch the exceptions. */ |
0b85d816 HPN |
1910 | |
1911 | /* If not to cc0, then no "set"s in non-natural mode give | |
1912 | ok cc0... */ | |
1913 | if (GET_MODE_SIZE (GET_MODE (SET_DEST (exp))) > UNITS_PER_WORD | |
1914 | || GET_MODE_CLASS (GET_MODE (SET_DEST (exp))) == MODE_FLOAT) | |
1915 | { | |
e5837c07 | 1916 | /* ... except add:s and sub:s in DImode. */ |
0b85d816 HPN |
1917 | if (GET_MODE (SET_DEST (exp)) == DImode |
1918 | && (GET_CODE (SET_SRC (exp)) == PLUS | |
1919 | || GET_CODE (SET_SRC (exp)) == MINUS)) | |
1920 | { | |
1921 | cc_status.flags = 0; | |
1922 | cc_status.value1 = SET_DEST (exp); | |
1923 | cc_status.value2 = SET_SRC (exp); | |
1924 | ||
1925 | if (cris_reg_overlap_mentioned_p (cc_status.value1, | |
1926 | cc_status.value2)) | |
1927 | cc_status.value2 = 0; | |
1928 | ||
1929 | /* Add and sub may set V, which gets us | |
1930 | unoptimizable results in "gt" and "le" condition | |
1931 | codes. */ | |
1932 | cc_status.flags |= CC_NO_OVERFLOW; | |
1933 | ||
1934 | return; | |
1935 | } | |
1936 | } | |
1937 | else if (SET_SRC (exp) == const0_rtx) | |
1938 | { | |
1939 | /* There's no CC0 change when clearing a register or | |
1940 | memory. Just check for overlap. */ | |
1941 | if ((cc_status.value1 | |
1942 | && cris_reg_overlap_mentioned_p (SET_DEST (exp), | |
1943 | cc_status.value1))) | |
1944 | cc_status.value1 = 0; | |
1945 | ||
1946 | if ((cc_status.value2 | |
1947 | && cris_reg_overlap_mentioned_p (SET_DEST (exp), | |
1948 | cc_status.value2))) | |
1949 | cc_status.value2 = 0; | |
1950 | ||
1951 | return; | |
1952 | } | |
1953 | else | |
1954 | { | |
1955 | cc_status.flags = 0; | |
1956 | cc_status.value1 = SET_DEST (exp); | |
1957 | cc_status.value2 = SET_SRC (exp); | |
1958 | ||
1959 | if (cris_reg_overlap_mentioned_p (cc_status.value1, | |
1960 | cc_status.value2)) | |
1961 | cc_status.value2 = 0; | |
1962 | ||
1963 | /* Some operations may set V, which gets us | |
1964 | unoptimizable results in "gt" and "le" condition | |
1965 | codes. */ | |
1966 | if (GET_CODE (SET_SRC (exp)) == PLUS | |
1967 | || GET_CODE (SET_SRC (exp)) == MINUS | |
1968 | || GET_CODE (SET_SRC (exp)) == NEG) | |
1969 | cc_status.flags |= CC_NO_OVERFLOW; | |
1970 | ||
1971 | return; | |
1972 | } | |
1973 | } | |
1974 | else if (GET_CODE (SET_DEST (exp)) == MEM | |
1975 | || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART | |
1976 | && GET_CODE (XEXP (SET_DEST (exp), 0)) == MEM)) | |
1977 | { | |
1978 | /* When SET to MEM, then CC is not changed (except for | |
1979 | overlap). */ | |
1980 | if ((cc_status.value1 | |
1981 | && cris_reg_overlap_mentioned_p (SET_DEST (exp), | |
1982 | cc_status.value1))) | |
1983 | cc_status.value1 = 0; | |
1984 | ||
1985 | if ((cc_status.value2 | |
1986 | && cris_reg_overlap_mentioned_p (SET_DEST (exp), | |
1987 | cc_status.value2))) | |
1988 | cc_status.value2 = 0; | |
1989 | ||
1990 | return; | |
1991 | } | |
1992 | } | |
1993 | else if (GET_CODE (exp) == PARALLEL) | |
1994 | { | |
1995 | if (GET_CODE (XVECEXP (exp, 0, 0)) == SET | |
1996 | && GET_CODE (XVECEXP (exp, 0, 1)) == SET | |
1997 | && REG_P (XEXP (XVECEXP (exp, 0, 1), 0))) | |
1998 | { | |
1999 | if (REG_P (XEXP (XVECEXP (exp, 0, 0), 0)) | |
2000 | && GET_CODE (XEXP (XVECEXP (exp, 0, 0), 1)) == MEM) | |
2001 | { | |
2002 | /* For "move.S [rx=ry+o],rz", say CC reflects | |
2003 | value1=rz and value2=[rx] */ | |
2004 | cc_status.value1 = XEXP (XVECEXP (exp, 0, 0), 0); | |
2005 | cc_status.value2 | |
2006 | = gen_rtx_MEM (GET_MODE (XEXP (XVECEXP (exp, 0, 0), 0)), | |
2007 | XEXP (XVECEXP (exp, 0, 1), 0)); | |
2008 | cc_status.flags = 0; | |
2009 | ||
2010 | /* Huh? A side-effect cannot change the destination | |
2011 | register. */ | |
2012 | if (cris_reg_overlap_mentioned_p (cc_status.value1, | |
2013 | cc_status.value2)) | |
c725bd79 | 2014 | internal_error ("internal error: sideeffect-insn affecting main effect"); |
0b85d816 HPN |
2015 | return; |
2016 | } | |
2017 | else if ((REG_P (XEXP (XVECEXP (exp, 0, 0), 1)) | |
2018 | || XEXP (XVECEXP (exp, 0, 0), 1) == const0_rtx) | |
2019 | && GET_CODE (XEXP (XVECEXP (exp, 0, 0), 0)) == MEM) | |
2020 | { | |
2021 | /* For "move.S rz,[rx=ry+o]" and "clear.S [rx=ry+o]", | |
2022 | say flags are not changed, except for overlap. */ | |
d3295e25 HPN |
2023 | if (cc_status.value1 |
2024 | && cris_reg_overlap_mentioned_p (XEXP | |
2025 | (XVECEXP | |
2026 | (exp, 0, 0), 0), | |
2027 | cc_status.value1)) | |
2028 | cc_status.value1 = 0; | |
2029 | ||
2030 | if (cc_status.value1 | |
2031 | && cris_reg_overlap_mentioned_p (XEXP | |
2032 | (XVECEXP | |
2033 | (exp, 0, 1), 0), | |
2034 | cc_status.value1)) | |
2035 | cc_status.value1 = 0; | |
2036 | ||
2037 | if (cc_status.value2 | |
2038 | && cris_reg_overlap_mentioned_p (XEXP | |
2039 | (XVECEXP | |
2040 | (exp, 0, 0), 0), | |
2041 | cc_status.value2)) | |
2042 | cc_status.value2 = 0; | |
2043 | ||
2044 | if (cc_status.value2 | |
2045 | && cris_reg_overlap_mentioned_p (XEXP | |
2046 | (XVECEXP | |
2047 | (exp, 0, 1), 0), | |
2048 | cc_status.value2)) | |
2049 | cc_status.value2 = 0; | |
2050 | ||
0b85d816 HPN |
2051 | return; |
2052 | } | |
2053 | } | |
2054 | } | |
2055 | break; | |
2056 | ||
2057 | default: | |
2058 | /* Unknown cc_attr value. */ | |
2059 | abort (); | |
2060 | } | |
2061 | ||
2062 | CC_STATUS_INIT; | |
2063 | } | |
2064 | ||
2065 | /* Return != 0 if the return sequence for the current function is short, | |
2066 | like "ret" or "jump [sp+]". Prior to reloading, we can't tell how | |
2067 | many registers must be saved, so return 0 then. */ | |
2068 | ||
2069 | int | |
2070 | cris_simple_epilogue () | |
2071 | { | |
2072 | int regno; | |
2073 | int reglimit = STACK_POINTER_REGNUM; | |
2074 | int lastreg = -1; | |
2075 | ||
2076 | if (! reload_completed | |
2077 | || frame_pointer_needed | |
2078 | || get_frame_size () != 0 | |
2079 | || current_function_pretend_args_size | |
2080 | || current_function_args_size | |
2081 | || current_function_outgoing_args_size | |
2082 | || current_function_calls_eh_return | |
2083 | ||
2084 | /* If we're not supposed to emit prologue and epilogue, we must | |
2085 | not emit return-type instructions. */ | |
2086 | || !TARGET_PROLOGUE_EPILOGUE) | |
2087 | return 0; | |
2088 | ||
2089 | /* We allow a "movem [sp+],rN" to sit in front if the "jump [sp+]" or | |
2090 | in the delay-slot of the "ret". */ | |
2091 | for (regno = 0; regno < reglimit; regno++) | |
2092 | if ((regs_ever_live[regno] && ! call_used_regs[regno]) | |
053d3344 | 2093 | || (regno == (int) PIC_OFFSET_TABLE_REGNUM |
0b85d816 HPN |
2094 | && (current_function_uses_pic_offset_table |
2095 | /* It is saved anyway, if there would be a gap. */ | |
2096 | || (flag_pic | |
2097 | && regs_ever_live[regno + 1] | |
2098 | && !call_used_regs[regno + 1])))) | |
2099 | { | |
2100 | if (lastreg != regno - 1) | |
2101 | return 0; | |
2102 | lastreg = regno; | |
2103 | } | |
2104 | ||
2105 | return 1; | |
2106 | } | |
2107 | ||
3c50106f RH |
2108 | /* Compute a (partial) cost for rtx X. Return true if the complete |
2109 | cost has been computed, and false if subexpressions should be | |
2110 | scanned. In either case, *TOTAL contains the cost result. */ | |
2111 | ||
2112 | static bool | |
2113 | cris_rtx_costs (x, code, outer_code, total) | |
2114 | rtx x; | |
2115 | int code, outer_code; | |
2116 | int *total; | |
2117 | { | |
2118 | switch (code) | |
2119 | { | |
2120 | case CONST_INT: | |
2121 | { | |
2122 | HOST_WIDE_INT val = INTVAL (x); | |
2123 | if (val == 0) | |
2124 | *total = 0; | |
2125 | else if (val < 32 && val >= -32) | |
2126 | *total = 1; | |
2127 | /* Eight or 16 bits are a word and cycle more expensive. */ | |
2128 | else if (val <= 32767 && val >= -32768) | |
2129 | *total = 2; | |
2130 | /* A 32 bit constant (or very seldom, unsigned 16 bits) costs | |
2131 | another word. FIXME: This isn't linear to 16 bits. */ | |
2132 | else | |
2133 | *total = 4; | |
2134 | return true; | |
2135 | } | |
2136 | ||
2137 | case LABEL_REF: | |
2138 | *total = 6; | |
2139 | return true; | |
2140 | ||
2141 | case CONST: | |
2142 | case SYMBOL_REF: | |
2143 | /* For PIC, we need a prefix (if it isn't already there), | |
2144 | and the PIC register. For a global PIC symbol, we also | |
2145 | need a read of the GOT. */ | |
2146 | if (flag_pic) | |
5b296d93 HPN |
2147 | { |
2148 | if (cris_got_symbol (x)) | |
2149 | *total = 2 + 4 + 6; | |
2150 | else | |
2151 | *total = 2 + 6; | |
2152 | } | |
3c50106f RH |
2153 | else |
2154 | *total = 6; | |
2155 | return true; | |
2156 | ||
2157 | case CONST_DOUBLE: | |
2158 | if (x != CONST0_RTX (GET_MODE (x) == VOIDmode ? DImode : GET_MODE (x))) | |
2159 | *total = 12; | |
2160 | else | |
2161 | /* Make 0.0 cheap, else test-insns will not be used. */ | |
2162 | *total = 0; | |
2163 | return true; | |
2164 | ||
2165 | case MULT: | |
2166 | /* Identify values that are no powers of two. Powers of 2 are | |
2167 | taken care of already and those values should not be changed. */ | |
2168 | if (GET_CODE (XEXP (x, 1)) != CONST_INT | |
2169 | || exact_log2 (INTVAL (XEXP (x, 1)) < 0)) | |
2170 | { | |
2171 | /* If we have a multiply insn, then the cost is between | |
2172 | 1 and 2 "fast" instructions. */ | |
2173 | if (TARGET_HAS_MUL_INSNS) | |
2174 | { | |
2175 | *total = COSTS_N_INSNS (1) + COSTS_N_INSNS (1) / 2; | |
2176 | return true; | |
2177 | } | |
2178 | ||
2179 | /* Estimate as 4 + 4 * #ofbits. */ | |
2180 | *total = COSTS_N_INSNS (132); | |
2181 | return true; | |
2182 | } | |
2183 | return false; | |
2184 | ||
2185 | case UDIV: | |
2186 | case MOD: | |
2187 | case UMOD: | |
2188 | case DIV: | |
2189 | if (GET_CODE (XEXP (x, 1)) != CONST_INT | |
5b296d93 | 2190 | || exact_log2 (INTVAL (XEXP (x, 1)) < 0)) |
3c50106f RH |
2191 | { |
2192 | /* Estimate this as 4 + 8 * #of bits. */ | |
2193 | *total = COSTS_N_INSNS (260); | |
2194 | return true; | |
2195 | } | |
2196 | return false; | |
2197 | ||
2198 | case AND: | |
2199 | if (GET_CODE (XEXP (x, 1)) == CONST_INT | |
2200 | /* Two constants may actually happen before optimization. */ | |
2201 | && GET_CODE (XEXP (x, 0)) != CONST_INT | |
2202 | && !CONST_OK_FOR_LETTER_P (INTVAL (XEXP (x, 1)), 'I')) | |
2203 | { | |
2204 | *total = (rtx_cost (XEXP (x, 0), outer_code) + 2 | |
2205 | + 2 * GET_MODE_NUNITS (GET_MODE (XEXP (x, 0)))); | |
2206 | return true; | |
2207 | } | |
2208 | return false; | |
2209 | ||
2210 | case ZERO_EXTEND: case SIGN_EXTEND: | |
2211 | *total = rtx_cost (XEXP (x, 0), outer_code); | |
2212 | return true; | |
2213 | ||
2214 | default: | |
2215 | return false; | |
2216 | } | |
2217 | } | |
2218 | ||
0b85d816 HPN |
2219 | /* The ADDRESS_COST worker. */ |
2220 | ||
75642f32 | 2221 | static int |
0b85d816 HPN |
2222 | cris_address_cost (x) |
2223 | rtx x; | |
2224 | { | |
2225 | /* The metric to use for the cost-macros is unclear. | |
2226 | The metric used here is (the number of cycles needed) / 2, | |
2227 | where we consider equal a cycle for a word of code and a cycle to | |
2228 | read memory. */ | |
2229 | ||
2230 | /* The cheapest addressing modes get 0, since nothing extra is needed. */ | |
2231 | if (BASE_OR_AUTOINCR_P (x)) | |
2232 | return 0; | |
2233 | ||
2234 | /* An indirect mem must be a DIP. This means two bytes extra for code, | |
2235 | and 4 bytes extra for memory read, i.e. (2 + 4) / 2. */ | |
2236 | if (GET_CODE (x) == MEM) | |
2237 | return (2 + 4) / 2; | |
2238 | ||
2239 | /* Assume (2 + 4) / 2 for a single constant; a dword, since it needs | |
2240 | an extra DIP prefix and 4 bytes of constant in most cases. | |
2241 | For PIC and a symbol with a GOT entry, we double the cost since we | |
2242 | add a [rPIC+...] offset. A GOT-less symbol uses a BDAP prefix | |
2243 | equivalent to the DIP prefix for non-PIC, hence the same cost. */ | |
2244 | if (CONSTANT_P (x)) | |
2245 | return flag_pic && cris_got_symbol (x) ? 2 * (2 + 4) / 2 : (2 + 4) / 2; | |
2246 | ||
2247 | /* Handle BIAP and BDAP prefixes. */ | |
2248 | if (GET_CODE (x) == PLUS) | |
2249 | { | |
2250 | rtx tem1 = XEXP (x, 0); | |
2251 | rtx tem2 = XEXP (x, 1); | |
2252 | ||
2253 | /* A BIAP is 2 extra bytes for the prefix insn, nothing more. We | |
2254 | recognize the typical MULT which is always in tem1 because of | |
2255 | insn canonicalization. */ | |
2256 | if ((GET_CODE (tem1) == MULT && BIAP_INDEX_P (tem1)) | |
2257 | || REG_P (tem1)) | |
2258 | return 2 / 2; | |
2259 | ||
2260 | /* A BDAP (quick) is 2 extra bytes. Any constant operand to the | |
2261 | PLUS is always found in tem2. */ | |
2262 | if (GET_CODE (tem2) == CONST_INT | |
2263 | && INTVAL (tem2) < 128 && INTVAL (tem2) >= -128) | |
2264 | return 2 / 2; | |
2265 | ||
2266 | /* A BDAP -32768 .. 32767 is like BDAP quick, but with 2 extra | |
2267 | bytes. */ | |
2268 | if (GET_CODE (tem2) == CONST_INT | |
2269 | && CONST_OK_FOR_LETTER_P (INTVAL (tem2), 'L')) | |
2270 | return (2 + 2) / 2; | |
2271 | ||
2272 | /* A BDAP with some other constant is 2 bytes extra. */ | |
2273 | if (CONSTANT_P (tem2)) | |
2274 | return (2 + 2 + 2) / 2; | |
2275 | ||
2276 | /* BDAP with something indirect should have a higher cost than | |
2277 | BIAP with register. FIXME: Should it cost like a MEM or more? */ | |
2278 | /* Don't need to check it, it's the only one left. | |
2279 | FIXME: There was a REG test missing, perhaps there are others. | |
2280 | Think more. */ | |
2281 | return (2 + 2 + 2) / 2; | |
2282 | } | |
2283 | ||
2284 | /* What else? Return a high cost. It matters only for valid | |
2285 | addressing modes. */ | |
2286 | return 10; | |
2287 | } | |
2288 | ||
2289 | /* Check various objections to the side-effect. Used in the test-part | |
2290 | of an anonymous insn describing an insn with a possible side-effect. | |
2291 | Returns nonzero if the implied side-effect is ok. | |
2292 | ||
2293 | code : PLUS or MULT | |
2294 | ops : An array of rtx:es. lreg, rreg, rval, | |
2295 | The variables multop and other_op are indexes into this, | |
2296 | or -1 if they are not applicable. | |
2297 | lreg : The register that gets assigned in the side-effect. | |
2298 | rreg : One register in the side-effect expression | |
2299 | rval : The other register, or an int. | |
2300 | multop : An integer to multiply rval with. | |
2301 | other_op : One of the entities of the main effect, | |
2302 | whose mode we must consider. */ | |
2303 | ||
2304 | int | |
2305 | cris_side_effect_mode_ok (code, ops, lreg, rreg, rval, multop, other_op) | |
2306 | enum rtx_code code; | |
2307 | rtx *ops; | |
2308 | int lreg, rreg, rval, multop, other_op; | |
2309 | { | |
2310 | /* Find what value to multiply with, for rx =ry + rz * n. */ | |
2311 | int mult = multop < 0 ? 1 : INTVAL (ops[multop]); | |
2312 | ||
2313 | rtx reg_rtx = ops[rreg]; | |
2314 | rtx val_rtx = ops[rval]; | |
2315 | ||
2316 | /* The operands may be swapped. Canonicalize them in reg_rtx and | |
2317 | val_rtx, where reg_rtx always is a reg (for this constraint to | |
2318 | match). */ | |
2319 | if (! BASE_P (reg_rtx)) | |
2320 | reg_rtx = val_rtx, val_rtx = ops[rreg]; | |
2321 | ||
2322 | /* Don't forget to check that reg_rtx really is a reg. If it isn't, | |
2323 | we have no business. */ | |
2324 | if (! BASE_P (reg_rtx)) | |
2325 | return 0; | |
2326 | ||
2327 | /* Don't do this when -mno-split. */ | |
2328 | if (!TARGET_SIDE_EFFECT_PREFIXES) | |
2329 | return 0; | |
2330 | ||
2331 | /* The mult expression may be hidden in lreg. FIXME: Add more | |
2332 | commentary about that. */ | |
2333 | if (GET_CODE (val_rtx) == MULT) | |
2334 | { | |
2335 | mult = INTVAL (XEXP (val_rtx, 1)); | |
2336 | val_rtx = XEXP (val_rtx, 0); | |
2337 | code = MULT; | |
2338 | } | |
2339 | ||
2340 | /* First check the "other operand". */ | |
2341 | if (other_op >= 0) | |
2342 | { | |
2343 | if (GET_MODE_SIZE (GET_MODE (ops[other_op])) > UNITS_PER_WORD) | |
2344 | return 0; | |
2345 | ||
2346 | /* Check if the lvalue register is the same as the "other | |
2347 | operand". If so, the result is undefined and we shouldn't do | |
2348 | this. FIXME: Check again. */ | |
2349 | if ((BASE_P (ops[lreg]) | |
2350 | && BASE_P (ops[other_op]) | |
2351 | && REGNO (ops[lreg]) == REGNO (ops[other_op])) | |
2352 | || rtx_equal_p (ops[other_op], ops[lreg])) | |
2353 | return 0; | |
2354 | } | |
2355 | ||
2356 | /* Do not accept frame_pointer_rtx as any operand. */ | |
2357 | if (ops[lreg] == frame_pointer_rtx || ops[rreg] == frame_pointer_rtx | |
2358 | || ops[rval] == frame_pointer_rtx | |
2359 | || (other_op >= 0 && ops[other_op] == frame_pointer_rtx)) | |
2360 | return 0; | |
2361 | ||
2362 | if (code == PLUS | |
2363 | && ! BASE_P (val_rtx)) | |
2364 | { | |
2365 | ||
2366 | /* Do not allow rx = rx + n if a normal add or sub with same size | |
2367 | would do. */ | |
2368 | if (rtx_equal_p (ops[lreg], reg_rtx) | |
2369 | && GET_CODE (val_rtx) == CONST_INT | |
2370 | && (INTVAL (val_rtx) <= 63 && INTVAL (val_rtx) >= -63)) | |
2371 | return 0; | |
2372 | ||
2373 | /* Check allowed cases, like [r(+)?].[bwd] and const. | |
2374 | A symbol is not allowed with PIC. */ | |
2375 | if (CONSTANT_P (val_rtx)) | |
2376 | return flag_pic == 0 || cris_symbol (val_rtx) == 0; | |
2377 | ||
2378 | if (GET_CODE (val_rtx) == MEM | |
2379 | && BASE_OR_AUTOINCR_P (XEXP (val_rtx, 0))) | |
2380 | return 1; | |
2381 | ||
2382 | if (GET_CODE (val_rtx) == SIGN_EXTEND | |
2383 | && GET_CODE (XEXP (val_rtx, 0)) == MEM | |
2384 | && BASE_OR_AUTOINCR_P (XEXP (XEXP (val_rtx, 0), 0))) | |
2385 | return 1; | |
2386 | ||
2387 | /* If we got here, it's not a valid addressing mode. */ | |
2388 | return 0; | |
2389 | } | |
2390 | else if (code == MULT | |
2391 | || (code == PLUS && BASE_P (val_rtx))) | |
2392 | { | |
2393 | /* Do not allow rx = rx + ry.S, since it doesn't give better code. */ | |
2394 | if (rtx_equal_p (ops[lreg], reg_rtx) | |
2395 | || (mult == 1 && rtx_equal_p (ops[lreg], val_rtx))) | |
2396 | return 0; | |
2397 | ||
2398 | /* Do not allow bad multiply-values. */ | |
2399 | if (mult != 1 && mult != 2 && mult != 4) | |
2400 | return 0; | |
2401 | ||
2402 | /* Only allow r + ... */ | |
2403 | if (! BASE_P (reg_rtx)) | |
2404 | return 0; | |
2405 | ||
2406 | /* If we got here, all seems ok. | |
2407 | (All checks need to be done above). */ | |
2408 | return 1; | |
2409 | } | |
2410 | ||
2411 | /* If we get here, the caller got its initial tests wrong. */ | |
c725bd79 | 2412 | internal_error ("internal error: cris_side_effect_mode_ok with bad operands"); |
0b85d816 HPN |
2413 | } |
2414 | ||
2415 | /* The function reg_overlap_mentioned_p in CVS (still as of 2001-05-16) | |
2416 | does not handle the case where the IN operand is strict_low_part; it | |
2417 | does handle it for X. Test-case in Axis-20010516. This function takes | |
2418 | care of that for THIS port. FIXME: strict_low_part is going away | |
2419 | anyway. */ | |
2420 | ||
2421 | static int | |
2422 | cris_reg_overlap_mentioned_p (x, in) | |
2423 | rtx x, in; | |
2424 | { | |
2425 | /* The function reg_overlap_mentioned now handles when X is | |
2426 | strict_low_part, but not when IN is a STRICT_LOW_PART. */ | |
2427 | if (GET_CODE (in) == STRICT_LOW_PART) | |
2428 | in = XEXP (in, 0); | |
2429 | ||
2430 | return reg_overlap_mentioned_p (x, in); | |
2431 | } | |
2432 | ||
2433 | /* The TARGET_ASM_NAMED_SECTION worker. | |
2434 | We just dispatch to the functions for ELF and a.out. */ | |
2435 | ||
2436 | void | |
2437 | cris_target_asm_named_section (name, flags) | |
2438 | const char *name; | |
2439 | unsigned int flags; | |
2440 | { | |
2441 | if (! TARGET_ELF) | |
2442 | default_no_named_section (name, flags); | |
2443 | else | |
2444 | default_elf_asm_named_section (name, flags); | |
2445 | } | |
2446 | ||
2447 | /* The LEGITIMATE_PIC_OPERAND_P worker. */ | |
2448 | ||
2449 | int | |
2450 | cris_legitimate_pic_operand (x) | |
2451 | rtx x; | |
2452 | { | |
2453 | /* The PIC representation of a symbol with a GOT entry will be (for | |
2454 | example; relocations differ): | |
2455 | sym => [rPIC+sym:GOT] | |
2456 | and for a GOT-less symbol it will be (for example, relocation differ): | |
2457 | sym => rPIC+sym:GOTOFF | |
2458 | so only a symbol with a GOT is by itself a valid operand, and it | |
2459 | can't be a sum of a symbol and an offset. */ | |
2460 | return ! cris_symbol (x) || cris_got_symbol (x); | |
2461 | } | |
2462 | ||
825dda42 | 2463 | /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this |
0b85d816 HPN |
2464 | CONSTANT_P. */ |
2465 | ||
2466 | int | |
2467 | cris_symbol (x) | |
2468 | rtx x; | |
2469 | { | |
2470 | switch (GET_CODE (x)) | |
2471 | { | |
2472 | case SYMBOL_REF: | |
2473 | case LABEL_REF: | |
2474 | return 1; | |
2475 | ||
2476 | case UNSPEC: | |
2477 | /* A PLT reference. */ | |
2478 | ASSERT_PLT_UNSPEC (x); | |
2479 | return 1; | |
2480 | ||
2481 | case CONST: | |
2482 | return cris_symbol (XEXP (x, 0)); | |
2483 | ||
2484 | case PLUS: | |
2485 | case MINUS: | |
2486 | return cris_symbol (XEXP (x, 0)) || cris_symbol (XEXP (x, 1)); | |
2487 | ||
2488 | case CONST_INT: | |
2489 | case CONST_DOUBLE: | |
2490 | case CONSTANT_P_RTX: | |
2491 | return 0; | |
2492 | ||
2493 | default: | |
c725bd79 | 2494 | fatal_insn ("unrecognized supposed constant", x); |
0b85d816 HPN |
2495 | } |
2496 | ||
2497 | return 1; | |
2498 | } | |
2499 | ||
825dda42 | 2500 | /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this |
0b85d816 HPN |
2501 | CONSTANT_P, and the symbol does not need a GOT entry. Also set |
2502 | current_function_uses_pic_offset_table if we're generating PIC and ever | |
2503 | see something that would need one. */ | |
2504 | ||
2505 | int | |
2506 | cris_gotless_symbol (x) | |
2507 | rtx x; | |
2508 | { | |
2509 | switch (GET_CODE (x)) | |
2510 | { | |
2511 | case UNSPEC: | |
2512 | ASSERT_PLT_UNSPEC (x); | |
2513 | return 1; | |
2514 | ||
2515 | case SYMBOL_REF: | |
2516 | if (flag_pic && cfun != NULL) | |
2517 | current_function_uses_pic_offset_table = 1; | |
2518 | return SYMBOL_REF_FLAG (x); | |
2519 | ||
2520 | case LABEL_REF: | |
2521 | /* We don't set current_function_uses_pic_offset_table for | |
2522 | LABEL_REF:s in here, since they are almost always originating | |
2523 | from some branch. The only time it does not come from a label is | |
2524 | when GCC does something like __builtin_setjmp. Then we get the | |
2525 | LABEL_REF from the movsi expander, so we mark it there as a | |
2526 | special case. */ | |
2527 | return 1; | |
2528 | ||
2529 | case CONST: | |
2530 | return cris_gotless_symbol (XEXP (x, 0)); | |
2531 | ||
2532 | case PLUS: | |
2533 | case MINUS: | |
2534 | { | |
2535 | int x0 = cris_gotless_symbol (XEXP (x, 0)) != 0; | |
2536 | int x1 = cris_gotless_symbol (XEXP (x, 1)) != 0; | |
2537 | ||
2538 | /* One and only one of them must be a local symbol. Neither must | |
2539 | be some other, more general kind of symbol. */ | |
2540 | return | |
2541 | (x0 ^ x1) | |
2542 | && ! (x0 == 0 && cris_symbol (XEXP (x, 0))) | |
2543 | && ! (x1 == 0 && cris_symbol (XEXP (x, 1))); | |
2544 | } | |
2545 | ||
2546 | case CONST_INT: | |
2547 | case CONST_DOUBLE: | |
2548 | case CONSTANT_P_RTX: | |
2549 | return 0; | |
2550 | ||
2551 | default: | |
c725bd79 | 2552 | fatal_insn ("unrecognized supposed constant", x); |
0b85d816 HPN |
2553 | } |
2554 | ||
2555 | return 1; | |
2556 | } | |
2557 | ||
825dda42 | 2558 | /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this |
0b85d816 HPN |
2559 | CONSTANT_P, and the symbol needs a GOT entry. */ |
2560 | ||
2561 | int | |
2562 | cris_got_symbol (x) | |
2563 | rtx x; | |
2564 | { | |
2565 | switch (GET_CODE (x)) | |
2566 | { | |
2567 | case UNSPEC: | |
2568 | ASSERT_PLT_UNSPEC (x); | |
2569 | return 0; | |
2570 | ||
2571 | case SYMBOL_REF: | |
2572 | if (flag_pic && cfun != NULL) | |
2573 | current_function_uses_pic_offset_table = 1; | |
2574 | return ! SYMBOL_REF_FLAG (x); | |
2575 | ||
2576 | case CONST: | |
2577 | return cris_got_symbol (XEXP (x, 0)); | |
2578 | ||
2579 | case LABEL_REF: | |
2580 | /* A LABEL_REF is never visible as a symbol outside the local | |
2581 | function. */ | |
2582 | case PLUS: | |
2583 | case MINUS: | |
2584 | /* Nope, can't access the GOT for "symbol + offset". */ | |
2585 | return 0; | |
2586 | ||
2587 | case CONST_INT: | |
2588 | case CONST_DOUBLE: | |
2589 | case CONSTANT_P_RTX: | |
2590 | return 0; | |
2591 | ||
2592 | default: | |
c725bd79 | 2593 | fatal_insn ("unrecognized supposed constant in cris_global_pic_symbol", |
0b85d816 HPN |
2594 | x); |
2595 | } | |
2596 | ||
2597 | return 1; | |
2598 | } | |
2599 | ||
2600 | /* The OVERRIDE_OPTIONS worker. | |
2601 | As is the norm, this also parses -mfoo=bar type parameters. */ | |
2602 | ||
2603 | void | |
2604 | cris_override_options () | |
2605 | { | |
2606 | if (cris_max_stackframe_str) | |
2607 | { | |
2608 | cris_max_stackframe = atoi (cris_max_stackframe_str); | |
2609 | ||
2610 | /* Do some sanity checking. */ | |
2611 | if (cris_max_stackframe < 0 || cris_max_stackframe > 0x20000000) | |
2612 | internal_error ("-max-stackframe=%d is not usable, not between 0 and %d", | |
2613 | cris_max_stackframe, 0x20000000); | |
2614 | } | |
2615 | ||
2616 | /* Let "-metrax4" and "-metrax100" change the cpu version. */ | |
2617 | if (TARGET_SVINTO && cris_cpu_version < CRIS_CPU_SVINTO) | |
2618 | cris_cpu_version = CRIS_CPU_SVINTO; | |
2619 | else if (TARGET_ETRAX4_ADD && cris_cpu_version < CRIS_CPU_ETRAX4) | |
2620 | cris_cpu_version = CRIS_CPU_ETRAX4; | |
2621 | ||
2622 | /* Parse -march=... and its synonym, the deprecated -mcpu=... */ | |
2623 | if (cris_cpu_str) | |
2624 | { | |
2625 | cris_cpu_version | |
2626 | = (*cris_cpu_str == 'v' ? atoi (cris_cpu_str + 1) : -1); | |
2627 | ||
2628 | if (strcmp ("etrax4", cris_cpu_str) == 0) | |
2629 | cris_cpu_version = 3; | |
2630 | ||
2631 | if (strcmp ("svinto", cris_cpu_str) == 0 | |
2632 | || strcmp ("etrax100", cris_cpu_str) == 0) | |
2633 | cris_cpu_version = 8; | |
2634 | ||
2635 | if (strcmp ("ng", cris_cpu_str) == 0 | |
2636 | || strcmp ("etrax100lx", cris_cpu_str) == 0) | |
2637 | cris_cpu_version = 10; | |
2638 | ||
2639 | if (cris_cpu_version < 0 || cris_cpu_version > 10) | |
c725bd79 | 2640 | error ("unknown CRIS version specification in -march= or -mcpu= : %s", |
0b85d816 HPN |
2641 | cris_cpu_str); |
2642 | ||
2643 | /* Set the target flags. */ | |
2644 | if (cris_cpu_version >= CRIS_CPU_ETRAX4) | |
2645 | target_flags |= TARGET_MASK_ETRAX4_ADD; | |
2646 | ||
2647 | /* If this is Svinto or higher, align for 32 bit accesses. */ | |
2648 | if (cris_cpu_version >= CRIS_CPU_SVINTO) | |
2649 | target_flags | |
2650 | |= (TARGET_MASK_SVINTO | TARGET_MASK_ALIGN_BY_32 | |
2651 | | TARGET_MASK_STACK_ALIGN | TARGET_MASK_CONST_ALIGN | |
2652 | | TARGET_MASK_DATA_ALIGN); | |
2653 | ||
2654 | /* Note that we do not add new flags when it can be completely | |
2655 | described with a macro that uses -mcpu=X. So | |
2656 | TARGET_HAS_MUL_INSNS is (cris_cpu_version >= CRIS_CPU_NG). */ | |
2657 | } | |
2658 | ||
2659 | if (cris_tune_str) | |
2660 | { | |
2661 | int cris_tune | |
2662 | = (*cris_tune_str == 'v' ? atoi (cris_tune_str + 1) : -1); | |
2663 | ||
2664 | if (strcmp ("etrax4", cris_tune_str) == 0) | |
2665 | cris_tune = 3; | |
2666 | ||
2667 | if (strcmp ("svinto", cris_tune_str) == 0 | |
2668 | || strcmp ("etrax100", cris_tune_str) == 0) | |
2669 | cris_tune = 8; | |
2670 | ||
2671 | if (strcmp ("ng", cris_tune_str) == 0 | |
2672 | || strcmp ("etrax100lx", cris_tune_str) == 0) | |
2673 | cris_tune = 10; | |
2674 | ||
2675 | if (cris_tune < 0 || cris_tune > 10) | |
c725bd79 | 2676 | error ("unknown CRIS cpu version specification in -mtune= : %s", |
0b85d816 HPN |
2677 | cris_tune_str); |
2678 | ||
2679 | if (cris_tune >= CRIS_CPU_SVINTO) | |
2680 | /* We have currently nothing more to tune than alignment for | |
2681 | memory accesses. */ | |
2682 | target_flags | |
2683 | |= (TARGET_MASK_STACK_ALIGN | TARGET_MASK_CONST_ALIGN | |
2684 | | TARGET_MASK_DATA_ALIGN | TARGET_MASK_ALIGN_BY_32); | |
2685 | } | |
2686 | ||
2687 | if (flag_pic) | |
2688 | { | |
2689 | /* Use error rather than warning, so invalid use is easily | |
2690 | detectable. Still change to the values we expect, to avoid | |
2691 | further errors. */ | |
2692 | if (! TARGET_LINUX) | |
2693 | { | |
1a05e874 | 2694 | error ("-fPIC and -fpic are not supported in this configuration"); |
0b85d816 HPN |
2695 | flag_pic = 0; |
2696 | } | |
2697 | ||
2698 | /* Turn off function CSE. We need to have the addresses reach the | |
2699 | call expanders to get PLT-marked, as they could otherwise be | |
2700 | compared against zero directly or indirectly. After visiting the | |
2701 | call expanders they will then be cse:ed, as the call expanders | |
2702 | force_reg the addresses, effectively forcing flag_no_function_cse | |
2703 | to 0. */ | |
2704 | flag_no_function_cse = 1; | |
2705 | } | |
2706 | ||
2707 | if ((write_symbols == DWARF_DEBUG | |
2708 | || write_symbols == DWARF2_DEBUG) && ! TARGET_ELF) | |
2709 | { | |
c725bd79 | 2710 | warning ("that particular -g option is invalid with -maout and -melinux"); |
0b85d816 HPN |
2711 | write_symbols = DBX_DEBUG; |
2712 | } | |
2713 | ||
2714 | /* Set the per-function-data initializer. */ | |
2715 | init_machine_status = cris_init_machine_status; | |
2716 | } | |
2717 | ||
eb0424da | 2718 | /* The TARGET_ASM_OUTPUT_MI_THUNK worker. */ |
0b85d816 | 2719 | |
c590b625 | 2720 | static void |
3961e8fe | 2721 | cris_asm_output_mi_thunk (stream, thunkdecl, delta, vcall_offset, funcdecl) |
0b85d816 HPN |
2722 | FILE *stream; |
2723 | tree thunkdecl ATTRIBUTE_UNUSED; | |
eb0424da | 2724 | HOST_WIDE_INT delta; |
3961e8fe | 2725 | HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED; |
0b85d816 HPN |
2726 | tree funcdecl; |
2727 | { | |
2728 | if (delta > 0) | |
eb0424da MM |
2729 | { |
2730 | fprintf (stream, "\tadd%s ", ADDITIVE_SIZE_MODIFIER (delta)); | |
2731 | fprintf (stream, HOST_WIDE_INT_PRINT_DEC, delta); | |
2732 | fprintf (stream, ",$%s\n", reg_names[CRIS_FIRST_ARG_REG]); | |
2733 | } | |
0b85d816 | 2734 | else if (delta < 0) |
eb0424da MM |
2735 | { |
2736 | fprintf (stream, "\tsub%s ", ADDITIVE_SIZE_MODIFIER (-delta)); | |
2737 | fprintf (stream, HOST_WIDE_INT_PRINT_DEC, -delta); | |
2738 | fprintf (stream, ",$%s\n", reg_names[CRIS_FIRST_ARG_REG]); | |
2739 | } | |
0b85d816 HPN |
2740 | |
2741 | if (flag_pic) | |
2742 | { | |
2743 | const char *name = XSTR (XEXP (DECL_RTL (funcdecl), 0), 0); | |
2744 | ||
772c5265 | 2745 | name = (* targetm.strip_name_encoding) (name); |
0b85d816 HPN |
2746 | fprintf (stream, "add.d "); |
2747 | assemble_name (stream, name); | |
2748 | fprintf (stream, "%s,$pc\n", CRIS_PLT_PCOFFSET_SUFFIX); | |
2749 | } | |
2750 | else | |
2751 | { | |
2752 | fprintf (stream, "jump "); | |
2753 | assemble_name (stream, XSTR (XEXP (DECL_RTL (funcdecl), 0), 0)); | |
2754 | fprintf (stream, "\n"); | |
2755 | } | |
2756 | } | |
2757 | ||
2758 | /* The EXPAND_BUILTIN_VA_ARG worker. This is modified from the | |
2759 | "standard" implementation of va_arg: read the value from the current | |
2760 | address and increment by the size of one or two registers. The | |
2761 | important difference for CRIS is that if the type is | |
2762 | pass-by-reference, then perform an indirection. */ | |
2763 | ||
2764 | rtx | |
2765 | cris_expand_builtin_va_arg (valist, type) | |
2766 | tree valist; | |
2767 | tree type; | |
2768 | { | |
2769 | tree addr_tree, t; | |
2770 | rtx addr; | |
4a085d2e HPN |
2771 | tree passed_size = size_zero_node; |
2772 | tree type_size = NULL; | |
2773 | tree size3 = size_int (3); | |
2774 | tree size4 = size_int (4); | |
2775 | tree size8 = size_int (8); | |
2776 | tree rounded_size; | |
0b85d816 HPN |
2777 | |
2778 | /* Get AP. */ | |
2779 | addr_tree = valist; | |
2780 | ||
4a085d2e HPN |
2781 | if (type == error_mark_node |
2782 | || (type_size = TYPE_SIZE_UNIT (TYPE_MAIN_VARIANT (type))) == NULL | |
2783 | || TREE_OVERFLOW (type_size)) | |
053d3344 | 2784 | /* Presumably an error; the size isn't computable. A message has |
4a085d2e HPN |
2785 | supposedly been emitted elsewhere. */ |
2786 | rounded_size = size_zero_node; | |
2787 | else | |
2788 | rounded_size | |
2789 | = fold (build (MULT_EXPR, sizetype, | |
2790 | fold (build (TRUNC_DIV_EXPR, sizetype, | |
2791 | fold (build (PLUS_EXPR, sizetype, | |
2792 | type_size, size3)), | |
2793 | size4)), | |
2794 | size4)); | |
2795 | ||
2796 | if (!integer_zerop (rounded_size)) | |
0b85d816 | 2797 | { |
053d3344 HPN |
2798 | /* Check if the type is passed by value or by reference. Values up |
2799 | to 8 bytes are passed by-value, padded to register-size (4 | |
2800 | bytes). Larger values and varying-size types are passed | |
2801 | by reference. */ | |
4a085d2e | 2802 | passed_size |
053d3344 HPN |
2803 | = (!really_constant_p (type_size) |
2804 | ? size4 | |
2805 | : fold (build (COND_EXPR, sizetype, | |
2806 | fold (build (GT_EXPR, sizetype, | |
2807 | rounded_size, | |
2808 | size8)), | |
2809 | size4, | |
2810 | rounded_size))); | |
4a085d2e HPN |
2811 | |
2812 | addr_tree | |
053d3344 HPN |
2813 | = (!really_constant_p (type_size) |
2814 | ? build1 (INDIRECT_REF, build_pointer_type (type), addr_tree) | |
2815 | : fold (build (COND_EXPR, TREE_TYPE (addr_tree), | |
2816 | fold (build (GT_EXPR, sizetype, | |
2817 | rounded_size, | |
2818 | size8)), | |
2819 | build1 (INDIRECT_REF, build_pointer_type (type), | |
2820 | addr_tree), | |
2821 | addr_tree))); | |
0b85d816 | 2822 | } |
0b85d816 HPN |
2823 | |
2824 | addr = expand_expr (addr_tree, NULL_RTX, Pmode, EXPAND_NORMAL); | |
2825 | addr = copy_to_reg (addr); | |
2826 | ||
4a085d2e HPN |
2827 | if (!integer_zerop (rounded_size)) |
2828 | { | |
2829 | /* Compute new value for AP. */ | |
2830 | t = build (MODIFY_EXPR, TREE_TYPE (valist), valist, | |
2831 | build (PLUS_EXPR, TREE_TYPE (valist), valist, | |
2832 | passed_size)); | |
2833 | TREE_SIDE_EFFECTS (t) = 1; | |
2834 | expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); | |
2835 | } | |
0b85d816 HPN |
2836 | |
2837 | return addr; | |
2838 | } | |
2839 | ||
2840 | /* The INIT_EXPANDERS worker sets the per-function-data initializer and | |
2841 | mark functions. */ | |
2842 | ||
2843 | void | |
2844 | cris_init_expanders () | |
2845 | { | |
2846 | /* Nothing here at the moment. */ | |
2847 | } | |
2848 | ||
2849 | /* Zero initialization is OK for all current fields. */ | |
2850 | ||
e2500fed GK |
2851 | static struct machine_function * |
2852 | cris_init_machine_status () | |
0b85d816 | 2853 | { |
e2500fed | 2854 | return ggc_alloc_cleared (sizeof (struct machine_function)); |
0b85d816 HPN |
2855 | } |
2856 | ||
2857 | /* Split a 2 word move (DI or presumably DF) into component parts. | |
2858 | Originally a copy of gen_split_move_double in m32r.c. */ | |
2859 | ||
2860 | rtx | |
2861 | cris_split_movdx (operands) | |
2862 | rtx *operands; | |
2863 | { | |
2864 | enum machine_mode mode = GET_MODE (operands[0]); | |
2865 | rtx dest = operands[0]; | |
2866 | rtx src = operands[1]; | |
2867 | rtx val; | |
2868 | ||
3d556836 HPN |
2869 | /* We used to have to handle (SUBREG (MEM)) here, but that should no |
2870 | longer happen; after reload there are no SUBREGs any more, and we're | |
2871 | only called after reload. */ | |
2872 | if (GET_CODE (dest) == SUBREG || GET_CODE (src) == SUBREG) | |
2873 | abort (); | |
0b85d816 HPN |
2874 | |
2875 | start_sequence (); | |
2876 | if (GET_CODE (dest) == REG) | |
2877 | { | |
2878 | int dregno = REGNO (dest); | |
2879 | ||
2880 | /* Reg-to-reg copy. */ | |
2881 | if (GET_CODE (src) == REG) | |
2882 | { | |
2883 | int sregno = REGNO (src); | |
2884 | ||
2885 | int reverse = (dregno == sregno + 1); | |
2886 | ||
2887 | /* We normally copy the low-numbered register first. However, if | |
2888 | the first register operand 0 is the same as the second register of | |
2889 | operand 1, we must copy in the opposite order. */ | |
2890 | emit_insn (gen_rtx_SET (VOIDmode, | |
2891 | operand_subword (dest, reverse, TRUE, mode), | |
2892 | operand_subword (src, reverse, TRUE, mode))); | |
2893 | ||
2894 | emit_insn (gen_rtx_SET (VOIDmode, | |
2895 | operand_subword (dest, !reverse, TRUE, mode), | |
2896 | operand_subword (src, !reverse, TRUE, mode))); | |
2897 | } | |
2898 | /* Constant-to-reg copy. */ | |
2899 | else if (GET_CODE (src) == CONST_INT || GET_CODE (src) == CONST_DOUBLE) | |
2900 | { | |
2901 | rtx words[2]; | |
2902 | split_double (src, &words[0], &words[1]); | |
2903 | emit_insn (gen_rtx_SET (VOIDmode, | |
2904 | operand_subword (dest, 0, TRUE, mode), | |
2905 | words[0])); | |
2906 | ||
2907 | emit_insn (gen_rtx_SET (VOIDmode, | |
2908 | operand_subword (dest, 1, TRUE, mode), | |
2909 | words[1])); | |
2910 | } | |
2911 | /* Mem-to-reg copy. */ | |
2912 | else if (GET_CODE (src) == MEM) | |
2913 | { | |
2914 | /* If the high-address word is used in the address, we must load it | |
2915 | last. Otherwise, load it first. */ | |
2916 | rtx addr = XEXP (src, 0); | |
2917 | int reverse | |
2918 | = (refers_to_regno_p (dregno, dregno + 1, addr, NULL) != 0); | |
2919 | ||
2920 | /* The original code imples that we can't do | |
2921 | move.x [rN+],rM move.x [rN],rM+1 | |
2922 | when rN is dead, because of REG_NOTES damage. That is | |
2923 | consistent with what I've seen, so don't try it. | |
2924 | ||
2925 | We have two different cases here; if the addr is POST_INC, | |
2926 | just pass it through, otherwise add constants. */ | |
2927 | ||
2928 | if (GET_CODE (addr) == POST_INC) | |
2929 | { | |
117b0c0a | 2930 | emit_insn (gen_rtx_SET (VOIDmode, |
0b85d816 HPN |
2931 | operand_subword (dest, 0, TRUE, mode), |
2932 | change_address (src, SImode, addr))); | |
2933 | emit_insn (gen_rtx_SET (VOIDmode, | |
117b0c0a | 2934 | operand_subword (dest, 1, TRUE, mode), |
0b85d816 HPN |
2935 | change_address (src, SImode, addr))); |
2936 | } | |
2937 | else | |
2938 | { | |
2939 | /* Make sure we don't get any other addresses with | |
2940 | embedded postincrements. They should be stopped in | |
2941 | GO_IF_LEGITIMATE_ADDRESS, but we're here for your | |
2942 | safety. */ | |
2943 | if (side_effects_p (addr)) | |
c725bd79 | 2944 | fatal_insn ("unexpected side-effects in address", addr); |
0b85d816 HPN |
2945 | |
2946 | emit_insn (gen_rtx_SET | |
2947 | (VOIDmode, | |
2948 | operand_subword (dest, reverse, TRUE, mode), | |
2949 | change_address | |
2950 | (src, SImode, | |
2951 | plus_constant (addr, | |
2952 | reverse * UNITS_PER_WORD)))); | |
2953 | emit_insn (gen_rtx_SET | |
2954 | (VOIDmode, | |
2955 | operand_subword (dest, ! reverse, TRUE, mode), | |
2956 | change_address | |
2957 | (src, SImode, | |
2958 | plus_constant (addr, | |
2959 | (! reverse) * | |
2960 | UNITS_PER_WORD)))); | |
2961 | } | |
2962 | } | |
2963 | else | |
2964 | abort (); | |
2965 | } | |
2966 | /* Reg-to-mem copy or clear mem. */ | |
2967 | else if (GET_CODE (dest) == MEM | |
2968 | && (GET_CODE (src) == REG | |
2969 | || src == const0_rtx | |
2970 | || src == CONST0_RTX (DFmode))) | |
2971 | { | |
2972 | rtx addr = XEXP (dest, 0); | |
2973 | ||
2974 | if (GET_CODE (addr) == POST_INC) | |
2975 | { | |
2976 | emit_insn (gen_rtx_SET (VOIDmode, | |
2977 | change_address (dest, SImode, addr), | |
2978 | operand_subword (src, 0, TRUE, mode))); | |
2979 | emit_insn (gen_rtx_SET (VOIDmode, | |
2980 | change_address (dest, SImode, addr), | |
2981 | operand_subword (src, 1, TRUE, mode))); | |
2982 | } | |
2983 | else | |
2984 | { | |
2985 | /* Make sure we don't get any other addresses with embedded | |
2986 | postincrements. They should be stopped in | |
2987 | GO_IF_LEGITIMATE_ADDRESS, but we're here for your safety. */ | |
2988 | if (side_effects_p (addr)) | |
c725bd79 | 2989 | fatal_insn ("unexpected side-effects in address", addr); |
0b85d816 HPN |
2990 | |
2991 | emit_insn (gen_rtx_SET | |
2992 | (VOIDmode, | |
2993 | change_address (dest, SImode, addr), | |
2994 | operand_subword (src, 0, TRUE, mode))); | |
2995 | ||
2996 | emit_insn (gen_rtx_SET | |
2997 | (VOIDmode, | |
2998 | change_address (dest, SImode, | |
2999 | plus_constant (addr, | |
3000 | UNITS_PER_WORD)), | |
3001 | operand_subword (src, 1, TRUE, mode))); | |
3002 | } | |
3003 | } | |
3004 | ||
3005 | else | |
3006 | abort (); | |
3007 | ||
2f937369 | 3008 | val = get_insns (); |
0b85d816 HPN |
3009 | end_sequence (); |
3010 | return val; | |
3011 | } | |
3012 | ||
3013 | /* This is in essence a copy of output_addr_const altered to output | |
3014 | symbolic operands as PIC. | |
3015 | ||
3016 | FIXME: Add hooks similar to ASM_OUTPUT_SYMBOL_REF to get this effect in | |
3017 | the "real" output_addr_const. All we need is one for LABEL_REF (and | |
3018 | one for CODE_LABEL?). */ | |
3019 | ||
3020 | void | |
3021 | cris_output_addr_const (file, x) | |
3022 | FILE *file; | |
3023 | rtx x; | |
3024 | { | |
3025 | int is_plt = 0; | |
3026 | ||
3027 | restart: | |
3028 | switch (GET_CODE (x)) | |
3029 | { | |
3030 | case UNSPEC: | |
3031 | ASSERT_PLT_UNSPEC (x); | |
3032 | x = XVECEXP (x, 0, 0); | |
3033 | is_plt = 1; | |
3034 | ||
3035 | /* Fall through. */ | |
3036 | case SYMBOL_REF: | |
3037 | if (flag_pic) | |
3038 | { | |
3039 | const char *origstr = XSTR (x, 0); | |
3040 | const char *str; | |
3041 | ||
772c5265 | 3042 | str = (* targetm.strip_name_encoding) (origstr); |
0b85d816 HPN |
3043 | |
3044 | if (is_plt) | |
3045 | { | |
3046 | if (cris_pic_sympart_only) | |
3047 | { | |
3048 | assemble_name (file, str); | |
3049 | fprintf (file, ":PLTG"); | |
3050 | } | |
3051 | else | |
3052 | { | |
3053 | if (TARGET_AVOID_GOTPLT) | |
3054 | /* We shouldn't get here. */ | |
3055 | abort (); | |
3056 | ||
3057 | fprintf (file, "[$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]); | |
3058 | assemble_name (file, XSTR (x, 0)); | |
3059 | ||
3060 | if (flag_pic == 1) | |
3061 | fprintf (file, ":GOTPLT16]"); | |
3062 | else | |
3063 | fprintf (file, ":GOTPLT]"); | |
3064 | } | |
3065 | } | |
3066 | else if (cris_gotless_symbol (x)) | |
3067 | { | |
3068 | if (! cris_pic_sympart_only) | |
3069 | fprintf (file, "$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]); | |
3070 | assemble_name (file, str); | |
3071 | fprintf (file, ":GOTOFF"); | |
3072 | } | |
3073 | else if (cris_got_symbol (x)) | |
3074 | { | |
3075 | if (cris_pic_sympart_only) | |
3076 | abort (); | |
3077 | fprintf (file, "[$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]); | |
3078 | assemble_name (file, XSTR (x, 0)); | |
3079 | ||
3080 | if (flag_pic == 1) | |
3081 | fprintf (file, ":GOT16]"); | |
3082 | else | |
3083 | fprintf (file, ":GOT]"); | |
3084 | } | |
3085 | else | |
3d556836 | 3086 | LOSE_AND_RETURN ("unexpected PIC symbol", x); |
0b85d816 HPN |
3087 | |
3088 | /* Sanity check. */ | |
3089 | if (! current_function_uses_pic_offset_table) | |
3d556836 | 3090 | output_operand_lossage ("PIC register isn't set up"); |
0b85d816 HPN |
3091 | } |
3092 | else | |
3093 | assemble_name (file, XSTR (x, 0)); | |
3094 | break; | |
3095 | ||
3096 | case LABEL_REF: | |
3097 | /* If we get one of those here, it should be dressed as PIC. Branch | |
3098 | labels are normally output with the 'l' specifier, which means it | |
3099 | will go directly to output_asm_label and not end up here. */ | |
3100 | if (GET_CODE (XEXP (x, 0)) != CODE_LABEL | |
3101 | && (GET_CODE (XEXP (x, 0)) != NOTE | |
3102 | || NOTE_LINE_NUMBER (XEXP (x, 0)) != NOTE_INSN_DELETED_LABEL)) | |
c725bd79 | 3103 | fatal_insn ("unexpected address expression", x); |
0b85d816 HPN |
3104 | |
3105 | if (flag_pic) | |
3106 | { | |
3107 | if (cris_gotless_symbol (x)) | |
3108 | { | |
3109 | if (! cris_pic_sympart_only) | |
3110 | fprintf (file, "$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]); | |
3111 | cris_output_addr_const (file, XEXP (x, 0)); | |
3112 | ||
3113 | fprintf (file, ":GOTOFF"); | |
3114 | } | |
3115 | else | |
3116 | /* Labels are never marked as global symbols. */ | |
c725bd79 | 3117 | fatal_insn ("unexpected PIC symbol", x); |
0b85d816 HPN |
3118 | |
3119 | /* Sanity check. */ | |
3120 | if (! current_function_uses_pic_offset_table) | |
c725bd79 | 3121 | internal_error ("emitting PIC operand, but PIC register isn't set up"); |
0b85d816 HPN |
3122 | break; |
3123 | } | |
3124 | ||
3125 | output_addr_const (file, x); | |
3126 | break; | |
3127 | ||
3128 | case NOTE: | |
3129 | if (NOTE_LINE_NUMBER (x) != NOTE_INSN_DELETED_LABEL) | |
c725bd79 | 3130 | fatal_insn ("unexpected NOTE as addr_const:", x); |
0b85d816 HPN |
3131 | case CODE_LABEL: |
3132 | case CONST_INT: | |
3133 | case CONST_DOUBLE: | |
3134 | case ZERO_EXTEND: | |
3135 | case SIGN_EXTEND: | |
3136 | output_addr_const (file, x); | |
3137 | break; | |
3138 | ||
3139 | case CONST: | |
3140 | /* This used to output parentheses around the expression, | |
3141 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
3142 | cris_output_addr_const (file, XEXP (x, 0)); | |
3143 | break; | |
3144 | ||
3145 | case PLUS: | |
3146 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
3147 | if (GET_CODE (XEXP (x, 0)) == CONST_INT) | |
3148 | { | |
3149 | cris_output_addr_const (file, XEXP (x, 1)); | |
3150 | if (INTVAL (XEXP (x, 0)) >= 0) | |
3151 | fprintf (file, "+"); | |
3152 | output_addr_const (file, XEXP (x, 0)); | |
3153 | } | |
3154 | else | |
3155 | { | |
3156 | cris_output_addr_const (file, XEXP (x, 0)); | |
3157 | if (GET_CODE (XEXP (x, 1)) != CONST_INT | |
3158 | || INTVAL (XEXP (x, 1)) >= 0) | |
3159 | fprintf (file, "+"); | |
3160 | cris_output_addr_const (file, XEXP (x, 1)); | |
3161 | } | |
3162 | break; | |
3163 | ||
3164 | case MINUS: | |
3165 | /* Avoid outputting things like x-x or x+5-x, | |
3166 | since some assemblers can't handle that. */ | |
3167 | x = simplify_subtraction (x); | |
3168 | if (GET_CODE (x) != MINUS) | |
3169 | goto restart; | |
3170 | ||
3171 | cris_output_addr_const (file, XEXP (x, 0)); | |
3172 | fprintf (file, "-"); | |
3173 | if ((GET_CODE (XEXP (x, 1)) == CONST_INT | |
3174 | && INTVAL (XEXP (x, 1)) < 0) | |
3175 | || GET_CODE (XEXP (x, 1)) != CONST_INT) | |
3176 | { | |
3177 | fprintf (file, "%s", targetm.asm_out.open_paren); | |
3178 | cris_output_addr_const (file, XEXP (x, 1)); | |
3179 | fprintf (file, "%s", targetm.asm_out.close_paren); | |
3180 | } | |
3181 | else | |
3182 | output_addr_const (file, XEXP (x, 1)); | |
3183 | break; | |
3184 | ||
3185 | default: | |
3d556836 | 3186 | LOSE_AND_RETURN ("unexpected address expression", x); |
0b85d816 HPN |
3187 | } |
3188 | } | |
3189 | ||
fb49053f RH |
3190 | /* Code-in whether we can get away without a GOT entry (needed for |
3191 | externally visible objects but not for functions) into | |
3192 | SYMBOL_REF_FLAG and add the PLT suffix for global functions. */ | |
0b85d816 | 3193 | |
fb49053f | 3194 | static void |
b2003250 | 3195 | cris_encode_section_info (exp, first) |
0b85d816 | 3196 | tree exp; |
b2003250 | 3197 | int first ATTRIBUTE_UNUSED; |
0b85d816 HPN |
3198 | { |
3199 | if (flag_pic) | |
3200 | { | |
47754fd5 RH |
3201 | rtx rtl = DECL_P (exp) ? DECL_RTL (exp) : TREE_CST_RTL (exp); |
3202 | ||
3203 | if (GET_CODE (rtl) == MEM && GET_CODE (XEXP (rtl, 0)) == SYMBOL_REF) | |
3204 | SYMBOL_REF_FLAG (XEXP (rtl, 0)) = (*targetm.binds_local_p) (exp); | |
0b85d816 HPN |
3205 | } |
3206 | } | |
3207 | ||
3208 | #if 0 | |
3209 | /* Various small functions to replace macros. Only called from a | |
3210 | debugger. They might collide with gcc functions or system functions, | |
3211 | so only emit them when '#if 1' above. */ | |
3212 | ||
3213 | enum rtx_code Get_code PARAMS ((rtx)); | |
3214 | ||
3215 | enum rtx_code | |
3216 | Get_code (x) | |
3217 | rtx x; | |
3218 | { | |
3219 | return GET_CODE (x); | |
3220 | } | |
3221 | ||
3222 | const char *Get_mode PARAMS ((rtx)); | |
3223 | ||
3224 | const char * | |
3225 | Get_mode (x) | |
3226 | rtx x; | |
3227 | { | |
3228 | return GET_MODE_NAME (GET_MODE (x)); | |
3229 | } | |
3230 | ||
3231 | rtx Xexp PARAMS ((rtx, int)); | |
3232 | ||
3233 | rtx | |
3234 | Xexp (x, n) | |
3235 | rtx x; | |
3236 | int n; | |
3237 | { | |
3238 | return XEXP (x, n); | |
3239 | } | |
3240 | ||
3241 | rtx Xvecexp PARAMS ((rtx, int, int)); | |
3242 | ||
3243 | rtx | |
3244 | Xvecexp (x, n, m) | |
3245 | rtx x; | |
3246 | int n; | |
117b0c0a | 3247 | { |
0b85d816 HPN |
3248 | return XVECEXP (x, n, m); |
3249 | } | |
3250 | ||
3251 | int Get_rtx_len PARAMS ((rtx)); | |
3252 | ||
3253 | int | |
3254 | Get_rtx_len (x) | |
3255 | rtx x; | |
3256 | { | |
3257 | return GET_RTX_LENGTH (GET_CODE (x)); | |
3258 | } | |
3259 | ||
3260 | /* Use upper-case to distinguish from local variables that are sometimes | |
3261 | called next_insn and prev_insn. */ | |
3262 | ||
3263 | rtx Next_insn PARAMS ((rtx)); | |
3264 | ||
3265 | rtx | |
3266 | Next_insn (insn) | |
3267 | rtx insn; | |
3268 | { | |
3269 | return NEXT_INSN (insn); | |
3270 | } | |
3271 | ||
3272 | rtx Prev_insn PARAMS ((rtx)); | |
3273 | ||
3274 | rtx | |
3275 | Prev_insn (insn) | |
3276 | rtx insn; | |
3277 | { | |
3278 | return PREV_INSN (insn); | |
3279 | } | |
3280 | #endif | |
3281 | ||
e2500fed GK |
3282 | #include "gt-cris.h" |
3283 | ||
0b85d816 HPN |
3284 | /* |
3285 | * Local variables: | |
3286 | * eval: (c-set-style "gnu") | |
3287 | * indent-tabs-mode: t | |
3288 | * End: | |
3289 | */ |