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0b85d816 1/* Definitions for GCC. Part of the machine description for CRIS.
3be639f7 2 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008,
c5387660 3 2009, 2010 Free Software Foundation, Inc.
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4 Contributed by Axis Communications. Written by Hans-Peter Nilsson.
5
6This file is part of GCC.
7
8GCC is free software; you can redistribute it and/or modify
9it under the terms of the GNU General Public License as published by
2f83c7d6 10the Free Software Foundation; either version 3, or (at your option)
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11any later version.
12
13GCC is distributed in the hope that it will be useful,
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
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19along with GCC; see the file COPYING3. If not see
20<http://www.gnu.org/licenses/>. */
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21
22/* After the first "Node:" comment comes all preprocessor directives and
23 attached declarations described in the info files, the "Using and
24 Porting GCC" manual (uapgcc), in the same order as found in the "Target
25 macros" section in the gcc-2.9x CVS edition of 2000-03-17. FIXME: Not
26 really, but needs an update anyway.
27
28 There is no generic copy-of-uapgcc comment, you'll have to see uapgcc
29 for that. If applicable, there is a CRIS-specific comment. The order
30 of macro definitions follow the order in the manual. Every section in
31 the manual (node in the info pages) has an introductory `Node:
32 <subchapter>' comment. If no macros are defined for a section, only
33 the section-comment is present. */
34
35/* Note that other header files (e.g. config/elfos.h, config/linux.h,
36 config/cris/linux.h and config/cris/aout.h) are responsible for lots of
37 settings not repeated below. This file contains general CRIS
38 definitions and definitions for the cris-*-elf subtarget. */
39
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40/* We don't want to use gcc_assert for everything, as that can be
41 compiled out. */
42#define CRIS_ASSERT(x) \
43 do { if (!(x)) internal_error ("CRIS-port assertion failed: " #x); } while (0)
44
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45/* Replacement for REG_P since it does not match SUBREGs. Happens for
46 testcase Axis-20000320 with gcc-2.9x. */
47#define REG_S_P(x) \
48 (REG_P (x) || (GET_CODE (x) == SUBREG && REG_P (XEXP (x, 0))))
49
50/* Last register in main register bank r0..r15. */
51#define CRIS_LAST_GENERAL_REGISTER 15
52
53/* Descriptions of registers used for arguments. */
54#define CRIS_FIRST_ARG_REG 10
55#define CRIS_MAX_ARGS_IN_REGS 4
56
f60c7155 57/* See also *_REGNUM constants in cris.md. */
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58
59/* Most of the time, we need the index into the register-names array.
f60c7155 60 When passing debug-info, we need the real hardware register number. */
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61#define CRIS_CANONICAL_SRP_REGNUM (16 + 11)
62#define CRIS_CANONICAL_MOF_REGNUM (16 + 7)
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63/* We have CCR in all models including v10, but that's 16 bits, so let's
64 prefer the DCCR number, which is a DMA pointer in pre-v8, so we'll
65 never clash with it for GCC purposes. */
66#define CRIS_CANONICAL_CC0_REGNUM (16 + 13)
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67
68/* When generating PIC, these suffixes are added to the names of non-local
69 functions when being output. Contrary to other ports, we have offsets
70 relative to the GOT, not the PC. We might implement PC-relative PLT
71 semantics later for the general case; they are used in some cases right
72 now, such as MI thunks. */
73#define CRIS_GOTPLT_SUFFIX ":GOTPLT"
74#define CRIS_PLT_GOTOFFSET_SUFFIX ":PLTG"
75#define CRIS_PLT_PCOFFSET_SUFFIX ":PLT"
76
77#define CRIS_FUNCTION_ARG_SIZE(MODE, TYPE) \
78 ((MODE) != BLKmode ? GET_MODE_SIZE (MODE) \
79 : (unsigned) int_size_in_bytes (TYPE))
80
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81/* Which CPU version this is. The parsed and adjusted cris_cpu_str. */
82extern int cris_cpu_version;
83
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84/* Changing the order used to be necessary to put the fourth __make_dp
85 argument (a DImode parameter) in registers, to fit with the libfunc
86 parameter passing scheme used for intrinsic functions. FIXME: Check
87 performance and maybe remove definition from TARGET_LIBGCC2_CFLAGS now
88 that it isn't strictly necessary. We used to do this through
89 TARGET_LIBGCC2_CFLAGS, but that became increasingly difficult as the
90 parenthesis (that needed quoting) travels through several layers of
91 make and shell invocations. */
92#ifdef IN_LIBGCC2
93#define __make_dp(a,b,c,d) __cris_make_dp(d,a,b,c)
94#endif
95
96
97/* Node: Driver */
98
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99/* Also provide canonical vN definitions when user specifies an alias.
100 Note that -melf overrides -maout. */
101
0b85d816 102#define CPP_SPEC \
c555b47f 103 "%{mtune=*:-D__tune_%* %{mtune=v*:-D__CRIS_arch_tune=%*}\
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104 %{mtune=etrax4:-D__tune_v3 -D__CRIS_arch_tune=3}\
105 %{mtune=etrax100:-D__tune_v8 -D__CRIS_arch_tune=8}\
106 %{mtune=svinto:-D__tune_v8 -D__CRIS_arch_tune=8}\
107 %{mtune=etrax100lx:-D__tune_v10 -D__CRIS_arch_tune=10}\
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108 %{mtune=ng:-D__tune_v10 -D__CRIS_arch_tune=10}}\
109 %{mcpu=*:-D__arch_%* %{mcpu=v*:-D__CRIS_arch_version=%*}\
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110 %{mcpu=etrax4:-D__arch_v3 -D__CRIS_arch_version=3}\
111 %{mcpu=etrax100:-D__arch_v8 -D__CRIS_arch_version=8}\
112 %{mcpu=svinto:-D__arch_v8 -D__CRIS_arch_version=8}\
113 %{mcpu=etrax100lx:-D__arch_v10 -D__CRIS_arch_version=10}\
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114 %{mcpu=ng:-D__arch_v10 -D__CRIS_arch_version=10}}\
115 %{march=*:-D__arch_%* %{march=v*:-D__CRIS_arch_version=%*}\
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116 %{march=etrax4:-D__arch_v3 -D__CRIS_arch_version=3}\
117 %{march=etrax100:-D__arch_v8 -D__CRIS_arch_version=8}\
118 %{march=svinto:-D__arch_v8 -D__CRIS_arch_version=8}\
119 %{march=etrax100lx:-D__arch_v10 -D__CRIS_arch_version=10}\
c555b47f 120 %{march=ng:-D__arch_v10 -D__CRIS_arch_version=10}}\
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121 %{metrax100:-D__arch__v8 -D__CRIS_arch_version=8}\
122 %{metrax4:-D__arch__v3 -D__CRIS_arch_version=3}\
123 %(cpp_subtarget)"
124
125/* For the cris-*-elf subtarget. */
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126
127#define CRIS_DEFAULT_TUNE "10"
128#define CRIS_ARCH_CPP_DEFAULT
129#define CRIS_DEFAULT_ASM_ARCH_OPTION ""
130
131#ifdef TARGET_CPU_DEFAULT
132#if TARGET_CPU_DEFAULT != 32 && TARGET_CPU_DEFAULT != 10
133 #error "Due to '()'; e.g. '#define TARGET_CPU_DEFAULT (10)', stringize TARGET_CPU_DEFAULT isn't useful: update manually."
134#endif
135
136#if TARGET_CPU_DEFAULT == 32
137#undef CRIS_DEFAULT_TUNE
138#define CRIS_DEFAULT_TUNE "32"
139/* To enable use of "generic" cris-axis-elf binutils, always pass the
140 architecture option to GAS. (We don't do this for non-v32.) */
141#undef CRIS_DEFAULT_ASM_ARCH_OPTION
142#define CRIS_DEFAULT_ASM_ARCH_OPTION "--march=v32"
143#endif
144
145#undef CRIS_ARCH_CPP_DEFAULT
146#define CRIS_ARCH_CPP_DEFAULT \
147 "%{!march=*:\
148 %{!metrax*:\
149 %{!mcpu=*:\
150 %{!mtune=*:-D__tune_v" CRIS_DEFAULT_TUNE "}\
151 -D__arch_v"CRIS_DEFAULT_TUNE\
152 " -D__CRIS_arch_version=" CRIS_DEFAULT_TUNE "}}}"
153#endif
154
0b85d816 155#define CRIS_CPP_SUBTARGET_SPEC \
a6e464ae 156 "%{mbest-lib-options:\
0b85d816 157 %{!moverride-best-lib-options:\
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158 %{!march=*:%{!metrax*:%{!mcpu=*:\
159 -D__tune_v" CRIS_DEFAULT_TUNE \
160 " -D__CRIS_arch_tune=" CRIS_DEFAULT_TUNE "}}}}}"\
161 CRIS_ARCH_CPP_DEFAULT
0b85d816 162
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163/* Override previous definitions (linux.h). */
164#undef CC1_SPEC
165#define CC1_SPEC \
baf3ead6 166 "%{metrax4:-march=v3}\
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167 %{metrax100:-march=v8}\
168 %(cc1_subtarget)"
169
170/* For the cris-*-elf subtarget. */
171#define CRIS_CC1_SUBTARGET_SPEC \
172 "-melf\
173 %{mbest-lib-options:\
174 %{!moverride-best-lib-options:\
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175 %{!march=*:%{!mcpu=*:-mtune=v" CRIS_DEFAULT_TUNE\
176 " -D__CRIS_arch_tune=" CRIS_DEFAULT_TUNE "}}\
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177 %{!finhibit-size-directive:\
178 %{!fno-function-sections: -ffunction-sections}\
179 %{!fno-data-sections: -fdata-sections}}}}"
180
6c660aeb 181/* This adds to CC1_SPEC. */
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182#define CC1PLUS_SPEC ""
183
43537bf6 184#ifdef HAVE_AS_NO_MUL_BUG_ABORT_OPTION
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185#define MAYBE_AS_NO_MUL_BUG_ABORT \
186 "%{mno-mul-bug-workaround:-no-mul-bug-abort} "
187#else
188#define MAYBE_AS_NO_MUL_BUG_ABORT
189#endif
190
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191/* Override previous definitions (linux.h). */
192#undef ASM_SPEC
193#define ASM_SPEC \
86da66b5 194 MAYBE_AS_NO_MUL_BUG_ABORT \
0b85d816 195 "%{v:-v}\
6725c402 196 %(asm_subtarget)\
d8a07487 197 %{march=*:%{cpu=*:%edo not specify both -march=... and -mcpu=...}}\
6725c402 198 %{march=v32:--march=v32} %{mcpu=v32:--march=v32}"
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199
200/* For the cris-*-elf subtarget. */
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201#define CRIS_ASM_SUBTARGET_SPEC \
202 "--em=criself %{!march=*:%{!cpu=*:" CRIS_DEFAULT_ASM_ARCH_OPTION "}}"
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203
204/* FIXME: We should propagate the -melf option to make the criself
205 "emulation" unless a linker script is provided (-T*), but I don't know
206 how to do that if either of -Ttext, -Tdata or -Tbss is given but no
207 linker script, as is usually the case. Leave it to the user for the
208 time being.
209
210 Note that -melf overrides -maout except that a.out-compiled libraries
211 are linked in (multilibbing). The somewhat cryptic -rpath-link pair is
212 to avoid *only* picking up the linux multilib subdir from the "-B./"
213 option during build, while still giving it preference. We'd need some
f5143c46 214 %s-variant that checked for existence of some specific file. */
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215/* Override previous definitions (svr4.h). */
216#undef LINK_SPEC
217#define LINK_SPEC \
218 "%{v:--verbose}\
d3295e25 219 %(link_subtarget)"
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220
221/* For the cris-*-elf subtarget. */
222#define CRIS_LINK_SUBTARGET_SPEC \
223 "-mcriself\
224 %{sim2:%{!T*:-Tdata 0x4000000 -Tbss 0x8000000}}\
349ccf2e 225 %{!r:%{O2|O3: --gc-sections}}"
0b85d816 226
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227/* Which library to get. The simulator uses a different library for
228 the low-level syscalls (implementing the Linux syscall ABI instead
229 of direct-iron accesses). Default everything with the stub "nosys"
230 library. */
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231/* Override previous definitions (linux.h). */
232#undef LIB_SPEC
233#define LIB_SPEC \
fe04ce06 234 "%{sim*:--start-group -lc -lsyslinux --end-group}\
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235 %{!sim*:%{g*:-lg}\
236 %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} -lbsp}\
237 -lnosys"
238
239/* Linker startfile options; crt0 flavors.
fe04ce06 240 We need to remove any previous definition (elfos.h). */
e16b32fc 241#undef STARTFILE_SPEC
0b85d816 242#define STARTFILE_SPEC \
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243 "%{sim*:crt1.o%s}%{!sim*:crt0.o%s}\
244 crti.o%s crtbegin.o%s"
0b85d816 245
e16b32fc 246#undef ENDFILE_SPEC
fe04ce06 247#define ENDFILE_SPEC "crtend.o%s crtn.o%s"
aa97fdf3 248
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249#define EXTRA_SPECS \
250 {"cpp_subtarget", CRIS_CPP_SUBTARGET_SPEC}, \
251 {"cc1_subtarget", CRIS_CC1_SUBTARGET_SPEC}, \
252 {"asm_subtarget", CRIS_ASM_SUBTARGET_SPEC}, \
253 {"link_subtarget", CRIS_LINK_SUBTARGET_SPEC}, \
254 CRIS_SUBTARGET_EXTRA_SPECS
255
256#define CRIS_SUBTARGET_EXTRA_SPECS
257
258
259/* Node: Run-time Target */
260
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261#define TARGET_CPU_CPP_BUILTINS() \
262 do \
263 { \
264 builtin_define_std ("cris"); \
265 builtin_define_std ("CRIS"); \
266 builtin_define_std ("GNU_CRIS"); \
267 builtin_define ("__CRIS_ABI_version=2"); \
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268 builtin_assert ("cpu=cris"); \
269 builtin_assert ("machine=cris"); \
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270 } \
271 while (0)
272
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273/* Previously controlled by target_flags. */
274#define TARGET_ELF 1
0b85d816 275
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276/* Previously controlled by target_flags. Note that this is *not* set
277 for -melinux. */
278#define TARGET_LINUX 0
0b85d816 279
0b85d816 280/* For the cris-*-elf subtarget. */
2a186d97 281#define CRIS_SUBTARGET_DEFAULT 0
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282
283#define CRIS_CPU_BASE 0
284#define CRIS_CPU_ETRAX4 3 /* Just lz added. */
285#define CRIS_CPU_SVINTO 8 /* Added swap, jsrc & Co., 32-bit accesses. */
286#define CRIS_CPU_NG 10 /* Added mul[su]. */
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287#define CRIS_CPU_V32 32 /* Major changes. */
288
289#ifndef TARGET_CPU_DEFAULT
290#define TARGET_CPU_DEFAULT CRIS_CPU_BASE
291#endif
292
293/* Default target_flags if no switches specified. */
294#ifndef TARGET_DEFAULT
295# if TARGET_CPU_DEFAULT == 32
296# define TARGET_DEFAULT \
297 (MASK_STACK_ALIGN \
298 + MASK_CONST_ALIGN + MASK_DATA_ALIGN \
299 + MASK_PROLOGUE_EPILOGUE)
300# else /* 10 */
301# define TARGET_DEFAULT \
302 (MASK_SIDE_EFFECT_PREFIXES + MASK_STACK_ALIGN \
303 + MASK_CONST_ALIGN + MASK_DATA_ALIGN \
304 + MASK_PROLOGUE_EPILOGUE + MASK_MUL_BUG)
305# endif
306#endif
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307
308/* Local, providing a default for cris_cpu_version. */
6725c402 309#define CRIS_DEFAULT_CPU_VERSION TARGET_CPU_DEFAULT
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310
311#define TARGET_HAS_MUL_INSNS (cris_cpu_version >= CRIS_CPU_NG)
e636e508 312#define TARGET_HAS_LZ (cris_cpu_version >= CRIS_CPU_ETRAX4)
df638b27 313#define TARGET_HAS_SWAP (cris_cpu_version >= CRIS_CPU_SVINTO)
6725c402 314#define TARGET_V32 (cris_cpu_version >= CRIS_CPU_V32)
0b85d816 315
2a186d97 316#define CRIS_SUBTARGET_HANDLE_OPTION(x, y, z)
0b85d816 317
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318/* Node: Storage Layout */
319
320#define BITS_BIG_ENDIAN 0
321
322#define BYTES_BIG_ENDIAN 0
323
324/* WORDS_BIG_ENDIAN is not defined in the hardware, but for consistency,
325 we use little-endianness, and we may also be able to use
326 post-increment on DImode indirect. */
327#define WORDS_BIG_ENDIAN 0
328
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329#define UNITS_PER_WORD 4
330
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331#define CRIS_PROMOTED_MODE(MODE, UNSIGNEDP, TYPE) \
332 (GET_MODE_CLASS (MODE) == MODE_INT && GET_MODE_SIZE (MODE) < 4) \
333 ? SImode : MODE
334
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335/* We will be using prototype promotion, so they will be 32 bit. */
336#define PARM_BOUNDARY 32
337
338/* Stack boundary is guided by -mstack-align, -mno-stack-align,
339 -malign.
340 Old comment: (2.1: still valid in 2.7.2?)
341 Note that to make this macro affect the alignment of stack
342 locals, a fix was required, and special precautions when handling
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343 the stack pointer in various other macros (TARGET_ASM_FUNCTION_PROLOGUE
344 et al) were required. See file "function.c". If you would just define
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345 this macro, it would only affect the builtin alloca and variable
346 local data (non-ANSI, non-K&R, Gnu C extension). */
347#define STACK_BOUNDARY \
348 (TARGET_STACK_ALIGN ? (TARGET_ALIGN_BY_32 ? 32 : 16) : 8)
349
350#define FUNCTION_BOUNDARY 16
351
352/* Do not change BIGGEST_ALIGNMENT (when optimizing), as it will affect
e5837c07 353 strange places, at least in 2.1. */
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354#define BIGGEST_ALIGNMENT 8
355
356/* If -m16bit, -m16-bit, -malign or -mdata-align,
e5837c07 357 align everything to 16 bit. */
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358#define DATA_ALIGNMENT(TYPE, BASIC_ALIGN) \
359 (TARGET_DATA_ALIGN \
360 ? (TARGET_ALIGN_BY_32 \
361 ? (BASIC_ALIGN < 32 ? 32 : BASIC_ALIGN) \
362 : (BASIC_ALIGN < 16 ? 16 : BASIC_ALIGN)) : BASIC_ALIGN)
363
364/* Note that CONSTANT_ALIGNMENT has the effect of making gcc believe that
365 ALL references to constant stuff (in code segment, like strings) has
366 this alignment. That is a rather rushed assumption. Luckily we do not
367 care about the "alignment" operand to builtin memcpy (only place where
368 it counts), so it doesn't affect any bad spots. */
369#define CONSTANT_ALIGNMENT(CONSTANT, BASIC_ALIGN) \
370 (TARGET_CONST_ALIGN \
371 ? (TARGET_ALIGN_BY_32 \
372 ? (BASIC_ALIGN < 32 ? 32 : BASIC_ALIGN) \
373 : (BASIC_ALIGN < 16 ? 16 : BASIC_ALIGN)) : BASIC_ALIGN)
374
375/* FIXME: Define LOCAL_ALIGNMENT for word and dword or arrays and
376 structures (if -mstack-align=), and check that it is good. */
377
378#define EMPTY_FIELD_BOUNDARY 8
379
380#define STRUCTURE_SIZE_BOUNDARY 8
381
382#define STRICT_ALIGNMENT 0
383
384/* Remove any previous definition (elfos.h).
385 ??? If it wasn't for all the other stuff that affects layout of
386 structures and bit-fields, this could presumably cause incompatibility
387 with other GNU/Linux ports (i.e. elfos.h users). */
388#undef PCC_BITFIELD_TYPE_MATTERS
389
390/* This is only used for non-scalars. Strange stuff happens to structs
391 (FIXME: What?) if we use anything larger than largest actually used
392 datum size, so lets make it 32. The type "long long" will still work
393 as usual. We can still have DImode insns, but they will only be used
394 for scalar data (i.e. long long). */
395#define MAX_FIXED_MODE_SIZE 32
396
397
398/* Node: Type Layout */
399
400/* Note that DOUBLE_TYPE_SIZE is not defined anymore, since the default
401 value gives a 64-bit double, which is what we now use. */
402
403/* For compatibility and historical reasons, a char should be signed. */
404#define DEFAULT_SIGNED_CHAR 1
405
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406/* Note that WCHAR_TYPE_SIZE is used in cexp.y,
407 where TARGET_SHORT is not available. */
408#undef WCHAR_TYPE
409#define WCHAR_TYPE "long int"
410
411#undef WCHAR_TYPE_SIZE
412#define WCHAR_TYPE_SIZE 32
413
414
415/* Node: Register Basics */
416
f60c7155 417/* We count all 16 non-special registers, SRP, a faked argument
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418 pointer register, MOF and CCR/DCCR. */
419#define FIRST_PSEUDO_REGISTER (16 + 1 + 1 + 1 + 1)
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420
421/* For CRIS, these are r15 (pc) and r14 (sp). Register r8 is used as a
422 frame-pointer, but is not fixed. SRP is not included in general
423 registers and will not be used automatically. All other special
424 registers are fixed at the moment. The faked argument pointer register
425 is fixed too. */
426#define FIXED_REGISTERS \
f9968e3e 427 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0}
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428
429/* Register r9 is used for structure-address, r10-r13 for parameters,
430 r10- for return values. */
431#define CALL_USED_REGISTERS \
f9968e3e 432 {0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1}
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433
434#define CONDITIONAL_REGISTER_USAGE cris_conditional_register_usage ()
435
436
437/* Node: Allocation Order */
438
439/* We need this on CRIS, because call-used regs should be used first,
f710504c 440 (so we don't need to push). Else start using registers from r0 and up.
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441 This preference is mainly because if we put call-used-regs from r0
442 and up, then we can't use movem to push the rest, (which have to be
443 saved if we use them, and movem has to start with r0).
444 Change here if you change which registers to use as call registers.
445
446 The actual need to explicitly prefer call-used registers improved the
447 situation a lot for 2.1, but might not actually be needed anymore.
448 Still, this order reflects what GCC should find out by itself, so it
449 probably does not hurt.
450
451 Order of preference: Call-used-regs first, then r0 and up, last fp &
452 sp & pc as fillers.
453 Call-used regs in opposite order, so they will cause less conflict if
454 a function has few args (<= 3) and it wants a scratch reg.
455 Use struct-return address first, since very few functions use
456 structure return values so it is likely to be available. */
457#define REG_ALLOC_ORDER \
f9968e3e 458 {9, 13, 12, 11, 10, 0, 1, 2, 3, 4, 5, 6, 7, 8, 14, 15, 17, 16, 18, 19}
0b85d816 459
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460/* Use MOF and ACR. Prefer ACR before any other register. Prefer MOF
461 then SRP after saved registers. The *after* is because they're only
462 useful for storage, not for things being computed, which is
463 apparently more common. */
464#define REG_ALLOC_ORDER_V32 \
465 {15, 9, 13, 12, 11, 10, 0, 1, 2, 3, 4, 5, 6, 7, 8, 17, 16, 14, 18, 19}
466
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467
468/* Node: Values in Registers */
469
470/* The VOIDmode test is so we can omit mode on anonymous insns. FIXME:
471 Still needed in 2.9x, at least for Axis-20000319. */
472#define HARD_REGNO_NREGS(REGNO, MODE) \
473 (MODE == VOIDmode \
474 ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
475
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476/* CRIS permits all registers to hold all modes. Well, except for the
477 condition-code register. And we can't hold larger-than-register size
478 modes in the last special register that can hold a full 32 bits. */
479#define HARD_REGNO_MODE_OK(REGNO, MODE) \
480 (((MODE) == CCmode \
481 || (REGNO) != CRIS_CC0_REGNUM) \
482 && (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD \
6725c402 483 || ((REGNO) != CRIS_MOF_REGNUM && (REGNO) != CRIS_ACR_REGNUM)))
0b85d816 484
f9968e3e
HPN
485/* Because CCmode isn't covered by the "narrower mode" statement in
486 tm.texi, we can still say all modes are tieable despite not having an
487 always 1 HARD_REGNO_MODE_OK. */
488#define MODES_TIEABLE_P(MODE1, MODE2) 1
0b85d816
HPN
489
490
491/* Node: Leaf Functions */
492/* (no definitions) */
493
494/* Node: Stack Registers */
495/* (no definitions) */
496
497
498/* Node: Register Classes */
499
6725c402
HPN
500/* FIXME: A separate class for the return register would make sense.
501
502 We need a separate register class to handle register allocation for
503 ACR, since it can't be used for post-increment.
504
505 It's not obvious, but having subunions of all movable-between
506 register classes does really help register allocation. */
507enum reg_class
f60c7155
HPN
508 {
509 NO_REGS,
6725c402
HPN
510 ACR_REGS, MOF_REGS, CC0_REGS, SPECIAL_REGS,
511 SPEC_ACR_REGS, GENNONACR_REGS,
512 SPEC_GENNONACR_REGS, GENERAL_REGS,
513 ALL_REGS,
f60c7155
HPN
514 LIM_REG_CLASSES
515 };
0b85d816
HPN
516
517#define N_REG_CLASSES (int) LIM_REG_CLASSES
518
6725c402
HPN
519#define REG_CLASS_NAMES \
520 {"NO_REGS", \
521 "ACR_REGS", "MOF_REGS", "CC0_REGS", "SPECIAL_REGS", \
522 "SPEC_ACR_REGS", "GENNONACR_REGS", "SPEC_GENNONACR_REGS", \
523 "GENERAL_REGS", "ALL_REGS"}
0b85d816 524
f60c7155 525#define CRIS_SPECIAL_REGS_CONTENTS \
f9968e3e 526 ((1 << CRIS_SRP_REGNUM) | (1 << CRIS_MOF_REGNUM) | (1 << CRIS_CC0_REGNUM))
0b85d816
HPN
527
528/* Count in the faked argument register in GENERAL_REGS. Keep out SRP. */
f60c7155
HPN
529#define REG_CLASS_CONTENTS \
530 { \
531 {0}, \
6725c402 532 {1 << CRIS_ACR_REGNUM}, \
f60c7155 533 {1 << CRIS_MOF_REGNUM}, \
f9968e3e 534 {1 << CRIS_CC0_REGNUM}, \
f60c7155 535 {CRIS_SPECIAL_REGS_CONTENTS}, \
6725c402
HPN
536 {CRIS_SPECIAL_REGS_CONTENTS \
537 | (1 << CRIS_ACR_REGNUM)}, \
538 {(0xffff | (1 << CRIS_AP_REGNUM)) \
539 & ~(1 << CRIS_ACR_REGNUM)}, \
540 {(0xffff | (1 << CRIS_AP_REGNUM) \
541 | CRIS_SPECIAL_REGS_CONTENTS) \
542 & ~(1 << CRIS_ACR_REGNUM)}, \
f9968e3e
HPN
543 {0xffff | (1 << CRIS_AP_REGNUM)}, \
544 {0xffff | (1 << CRIS_AP_REGNUM) \
545 | CRIS_SPECIAL_REGS_CONTENTS} \
f60c7155
HPN
546 }
547
548#define REGNO_REG_CLASS(REGNO) \
6725c402
HPN
549 ((REGNO) == CRIS_ACR_REGNUM ? ACR_REGS : \
550 (REGNO) == CRIS_MOF_REGNUM ? MOF_REGS : \
f9968e3e 551 (REGNO) == CRIS_CC0_REGNUM ? CC0_REGS : \
f60c7155
HPN
552 (REGNO) == CRIS_SRP_REGNUM ? SPECIAL_REGS : \
553 GENERAL_REGS)
0b85d816
HPN
554
555#define BASE_REG_CLASS GENERAL_REGS
556
6725c402
HPN
557#define MODE_CODE_BASE_REG_CLASS(MODE, OCODE, ICODE) \
558 ((OCODE) != POST_INC ? BASE_REG_CLASS : GENNONACR_REGS)
559
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560#define INDEX_REG_CLASS GENERAL_REGS
561
e53c2677
HPN
562#define IRA_COVER_CLASSES { GENERAL_REGS, SPECIAL_REGS, LIM_REG_CLASSES }
563
f60c7155
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564#define REG_CLASS_FROM_LETTER(C) \
565 ( \
6725c402 566 (C) == 'a' ? ACR_REGS : \
fe82487e 567 (C) == 'b' ? GENNONACR_REGS : \
f60c7155
HPN
568 (C) == 'h' ? MOF_REGS : \
569 (C) == 'x' ? SPECIAL_REGS : \
f9968e3e 570 (C) == 'c' ? CC0_REGS : \
f60c7155
HPN
571 NO_REGS \
572 )
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573
574/* Since it uses reg_renumber, it is safe only once reg_renumber
575 has been allocated, which happens in local-alloc.c. */
576#define REGNO_OK_FOR_BASE_P(REGNO) \
577 ((REGNO) <= CRIS_LAST_GENERAL_REGISTER \
578 || (REGNO) == ARG_POINTER_REGNUM \
579 || (unsigned) reg_renumber[REGNO] <= CRIS_LAST_GENERAL_REGISTER \
580 || (unsigned) reg_renumber[REGNO] == ARG_POINTER_REGNUM)
581
6725c402
HPN
582/* REGNO_OK_FOR_BASE_P seems to be obsolete wrt. this one, but not yet
583 documented as such. */
584#define REGNO_MODE_CODE_OK_FOR_BASE_P(REGNO, MODE, OCODE, ICODE) \
585 (REGNO_OK_FOR_BASE_P (REGNO) \
586 && ((OCODE) != POST_INC \
587 || !((REGNO) == CRIS_ACR_REGNUM \
588 || (unsigned) reg_renumber[REGNO] == CRIS_ACR_REGNUM)))
589
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590/* See REGNO_OK_FOR_BASE_P. */
591#define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO)
592
593/* It seems like gcc (2.7.2 and 2.9x of 2000-03-22) may send "NO_REGS" as
594 the class for a constant (testcase: __Mul in arit.c). To avoid forcing
595 out a constant into the constant pool, we will trap this case and
f60c7155
HPN
596 return something a bit more sane. FIXME: Check if this is a bug.
597 Beware that we must not "override" classes that can be specified as
598 constraint letters, or else asm operands using them will fail when
599 they need to be reloaded. FIXME: Investigate whether that constitutes
600 a bug. */
601#define PREFERRED_RELOAD_CLASS(X, CLASS) \
6725c402
HPN
602 ((CLASS) != ACR_REGS \
603 && (CLASS) != MOF_REGS \
f9968e3e 604 && (CLASS) != CC0_REGS \
f60c7155
HPN
605 && (CLASS) != SPECIAL_REGS \
606 ? GENERAL_REGS : (CLASS))
607
608/* We can't move special registers to and from memory in smaller than
83907fdd
HPN
609 word_mode. We also can't move between special registers. Luckily,
610 -1, as returned by true_regnum for non-sub/registers, is valid as a
611 parameter to our REGNO_REG_CLASS, returning GENERAL_REGS, so we get
612 the effect that any X that isn't a special-register is treated as
613 a non-empty intersection with GENERAL_REGS. */
614#define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
615 ((((CLASS) == SPECIAL_REGS || (CLASS) == MOF_REGS) \
616 && ((GET_MODE_SIZE (MODE) < 4 && MEM_P (X)) \
617 || !reg_classes_intersect_p (REGNO_REG_CLASS (true_regnum (X)), \
618 GENERAL_REGS))) \
619 ? GENERAL_REGS : NO_REGS)
0b85d816 620
6725c402
HPN
621/* FIXME: Fix regrename.c; it should check validity of replacements,
622 not just with a silly pass-specific macro. We may miss some
623 opportunities, but we must stop regrename from creating acr++. */
624#define HARD_REGNO_RENAME_OK(FROM, TO) ((TO) != CRIS_ACR_REGNUM)
625
0b85d816
HPN
626/* For CRIS, this is always the size of MODE in words,
627 since all registers are the same size. To use omitted modes in
628 patterns with reload constraints, you must say the widest size
629 which is allowed for VOIDmode.
630 FIXME: Does that still apply for gcc-2.9x? Keep poisoned until such
631 patterns are added back. News: 2001-03-16: Happens as early as the
632 underscore-test. */
633#define CLASS_MAX_NREGS(CLASS, MODE) \
634 ((MODE) == VOIDmode \
635 ? 1 /* + cris_fatal ("CLASS_MAX_NREGS with VOIDmode") */ \
636 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
637
638/* We are now out of letters; we could use ten more. This forces us to
639 use C-code in the 'md' file. FIXME: Use some EXTRA_CONSTRAINTS. */
f49e46d8 640#define CRIS_CONST_OK_FOR_LETTER_P(VALUE, C) \
0b85d816
HPN
641 ( \
642 /* MOVEQ, CMPQ, ANDQ, ORQ. */ \
643 (C) == 'I' ? (VALUE) >= -32 && (VALUE) <= 31 : \
644 /* ADDQ, SUBQ. */ \
645 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
646 /* ASRQ, BTSTQ, LSRQ, LSLQ. */ \
647 (C) == 'K' ? (VALUE) >= 0 && (VALUE) <= 31 : \
648 /* A 16-bit signed number. */ \
649 (C) == 'L' ? (VALUE) >= -32768 && (VALUE) <= 32767 : \
650 /* The constant 0 for CLEAR. */ \
651 (C) == 'M' ? (VALUE) == 0 : \
652 /* A negative ADDQ or SUBQ. */ \
653 (C) == 'N' ? (VALUE) >= -63 && (VALUE) < 0 : \
654 /* Quickened ints, QI and HI. */ \
655 (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 65535 \
656 && ((VALUE) >= (65535-31) \
657 || ((VALUE) >= (255-31) \
658 && (VALUE) <= 255 )) : \
659 /* A 16-bit number signed *or* unsigned. */ \
660 (C) == 'P' ? (VALUE) >= -32768 && (VALUE) <= 65535 : \
661 0)
662
f49e46d8
HPN
663#define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, S) \
664 ( \
665 ((C) != 'K' || (S)[1] == 'c') \
666 ? CRIS_CONST_OK_FOR_LETTER_P (VALUE, C) : \
667 ((C) == 'K' && (S)[1] == 'p') \
668 ? exact_log2 (VALUE) >= 0 : \
669 0)
670
671#define CONSTRAINT_LEN(C, S) ((C) == 'K' ? 2 : DEFAULT_CONSTRAINT_LEN (C, S))
672
0b85d816 673/* It is really simple to make up a 0.0; it is the same as int-0 in
e5837c07 674 IEEE754. */
0b85d816
HPN
675#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
676 ((C) == 'G' && ((VALUE) == CONST0_RTX (DFmode) \
677 || (VALUE) == CONST0_RTX (SFmode)))
678
679/* We need this on cris to distinguish delay-slottable addressing modes. */
680#define EXTRA_CONSTRAINT(X, C) \
681 ( \
682 /* Slottable address mode? */ \
683 (C) == 'Q' ? EXTRA_CONSTRAINT_Q (X) : \
684 /* Operand to BDAP or BIAP? */ \
685 (C) == 'R' ? EXTRA_CONSTRAINT_R (X) : \
686 /* A local PIC symbol? */ \
687 (C) == 'S' ? EXTRA_CONSTRAINT_S (X) : \
688 /* A three-address addressing-mode? */ \
689 (C) == 'T' ? EXTRA_CONSTRAINT_T (X) : \
6725c402
HPN
690 /* A PLT symbol? */ \
691 (C) == 'U' ? EXTRA_CONSTRAINT_U (X) : \
0b85d816
HPN
692 0)
693
23369bef
HPN
694#define EXTRA_MEMORY_CONSTRAINT(X, STR) ((X) == 'Q')
695
0b85d816
HPN
696#define EXTRA_CONSTRAINT_Q(X) \
697 ( \
23369bef
HPN
698 /* Just an indirect register (happens to also be \
699 "all" slottable memory addressing modes not \
700 covered by other constraints, i.e. '>'). */ \
991c42ac 701 MEM_P (X) && BASE_P (XEXP (X, 0)) \
0b85d816
HPN
702 )
703
704#define EXTRA_CONSTRAINT_R(X) \
705 ( \
706 /* An operand to BDAP or BIAP: \
707 A BIAP; r.S? */ \
708 BIAP_INDEX_P (X) \
709 /* A [reg] or (int) [reg], maybe with post-increment. */ \
710 || BDAP_INDEX_P (X) \
711 || CONSTANT_INDEX_P (X) \
712 )
713
0b85d816
HPN
714#define EXTRA_CONSTRAINT_T(X) \
715 ( \
d3295e25 716 /* Memory three-address operand. All are indirect-memory: */ \
991c42ac
JBG
717 MEM_P (X) \
718 && ((MEM_P (XEXP (X, 0)) \
d3295e25
HPN
719 /* Double indirect: [[reg]] or [[reg+]]? */ \
720 && (BASE_OR_AUTOINCR_P (XEXP (XEXP (X, 0), 0)))) \
45b677bc 721 /* Just an explicit indirect reference: [const]? */ \
0b85d816
HPN
722 || CONSTANT_P (XEXP (X, 0)) \
723 /* Something that is indexed; [...+...]? */ \
724 || (GET_CODE (XEXP (X, 0)) == PLUS \
725 /* A BDAP constant: [reg+(8|16|32)bit offset]? */ \
726 && ((BASE_P (XEXP (XEXP (X, 0), 0)) \
727 && CONSTANT_INDEX_P (XEXP (XEXP (X, 0), 1))) \
0b85d816
HPN
728 /* A BDAP register: [reg+[reg(+)].S]? */ \
729 || (BASE_P (XEXP (XEXP (X, 0), 0)) \
730 && BDAP_INDEX_P(XEXP(XEXP(X, 0), 1))) \
39fbb17b
HPN
731 /* Same, but with swapped arguments (no canonical \
732 ordering between e.g. REG and MEM as of LAST_UPDATED \
733 "Thu May 12 03:59:11 UTC 2005"). */ \
0b85d816
HPN
734 || (BASE_P (XEXP (XEXP (X, 0), 1)) \
735 && BDAP_INDEX_P (XEXP (XEXP (X, 0), 0))) \
39fbb17b 736 /* A BIAP: [reg+reg.S] (MULT comes first). */ \
0b85d816
HPN
737 || (BASE_P (XEXP (XEXP (X, 0), 1)) \
738 && BIAP_INDEX_P (XEXP (XEXP (X, 0), 0)))))) \
739 )
740
c00fc5cf 741/* PIC-constructs for symbols. */
d29b4b1b 742#define EXTRA_CONSTRAINT_S(X) \
6725c402
HPN
743 (flag_pic && GET_CODE (X) == CONST && cris_valid_pic_const (X, false))
744
745#define EXTRA_CONSTRAINT_U(X) \
746 (flag_pic \
747 && CONSTANT_P (X) \
748 && cris_nonmemory_operand_or_callable_symbol (X, VOIDmode))
0b85d816
HPN
749
750
751/* Node: Frame Layout */
752
753#define STACK_GROWS_DOWNWARD
f62c8a5c 754#define FRAME_GROWS_DOWNWARD 1
0b85d816
HPN
755
756/* It seems to be indicated in the code (at least 2.1) that this is
757 better a constant, and best 0. */
758#define STARTING_FRAME_OFFSET 0
759
760#define FIRST_PARM_OFFSET(FNDECL) 0
761
762#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
763 cris_return_addr_rtx (COUNT, FRAMEADDR)
764
f1c25d3b 765#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, CRIS_SRP_REGNUM)
0b85d816
HPN
766
767/* FIXME: Any __builtin_eh_return callers must not return anything and
768 there must not be collisions with incoming parameters. Luckily the
769 number of __builtin_eh_return callers is limited. For now return
770 parameter registers in reverse order and hope for the best. */
771#define EH_RETURN_DATA_REGNO(N) \
2b371d25 772 (IN_RANGE ((N), 0, 3) ? (CRIS_FIRST_ARG_REG + 3 - (N)) : INVALID_REGNUM)
0b85d816
HPN
773
774/* Store the stack adjustment in the structure-return-address register. */
a2fef3a4 775#define CRIS_STACKADJ_REG CRIS_STRUCT_VALUE_REGNUM
0b85d816
HPN
776#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, CRIS_STACKADJ_REG)
777
778#define EH_RETURN_HANDLER_RTX \
779 cris_return_addr_rtx (0, NULL)
780
781#define INIT_EXPANDERS cris_init_expanders ()
782
783/* FIXME: Move this to right node (it's not documented properly yet). */
784#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (CRIS_SRP_REGNUM)
785
786/* FIXME: Move this to right node (it's not documented properly yet).
787 FIXME: Check what alignment we can assume regarding
788 TARGET_STACK_ALIGN and TARGET_ALIGN_BY_32. */
789#define DWARF_CIE_DATA_ALIGNMENT -1
790
a338be44
KG
791/* If we would ever need an exact mapping between canonical register
792 number and dwarf frame register, we would either need to include all
839a4992 793 registers in the gcc description (with some marked fixed of course), or
a338be44
KG
794 an inverse mapping from dwarf register to gcc register. There is one
795 need in dwarf2out.c:expand_builtin_init_dwarf_reg_sizes. Right now, I
796 don't see that we need exact correspondence between DWARF *frame*
797 registers and DBX_REGISTER_NUMBER, so map them onto GCC registers. */
798#define DWARF_FRAME_REGNUM(REG) (REG)
799
0b85d816
HPN
800/* Node: Stack Checking */
801/* (no definitions) FIXME: Check. */
802
803/* Node: Frame Registers */
804
f60c7155 805#define STACK_POINTER_REGNUM CRIS_SP_REGNUM
0b85d816
HPN
806
807/* Register used for frame pointer. This is also the last of the saved
e5837c07 808 registers, when a frame pointer is not used. */
f60c7155 809#define FRAME_POINTER_REGNUM CRIS_FP_REGNUM
0b85d816
HPN
810
811/* Faked register, is always eliminated. We need it to eliminate
812 allocating stack slots for the return address and the frame pointer. */
f60c7155 813#define ARG_POINTER_REGNUM CRIS_AP_REGNUM
0b85d816 814
f60c7155 815#define STATIC_CHAIN_REGNUM CRIS_STATIC_CHAIN_REGNUM
0b85d816
HPN
816
817
818/* Node: Elimination */
819
0b85d816
HPN
820#define ELIMINABLE_REGS \
821 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
822 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
823 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
824
0b85d816
HPN
825#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
826 (OFFSET) = cris_initial_elimination_offset (FROM, TO)
827
828
829/* Node: Stack Arguments */
830
831/* Since many parameters take up one register each in any case,
a2fef3a4
KH
832 defining TARGET_PROMOTE_PROTOTYPES that always returns true would
833 seem like a good idea, but measurements indicate that a combination
834 using PROMOTE_MODE is better. */
0b85d816
HPN
835
836#define ACCUMULATE_OUTGOING_ARGS 1
837
0b85d816
HPN
838
839/* Node: Register Arguments */
840
0b85d816
HPN
841/* Contrary to what you'd believe, defining FUNCTION_ARG_CALLEE_COPIES
842 seems like a (small total) loss, at least for gcc-2.7.2 compiling and
843 running gcc-2.1 (small win in size, small loss running -- 100.1%),
844 and similarly for size for products (.1 .. .3% bloat, sometimes win).
845 Due to the empirical likeliness of making slower code, it is not
846 defined. */
847
848/* This no longer *needs* to be a structure; but keeping it as such should
849 not hurt (and hacking the ABI is simpler). */
850#define CUMULATIVE_ARGS struct cum_args
851struct cum_args {int regs;};
852
853/* The regs member is an integer, the number of arguments got into
fa5848c7 854 registers so far. */
0f6937fe 855#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
0b85d816
HPN
856 ((CUM).regs = 0)
857
0b85d816
HPN
858#define FUNCTION_ARG_REGNO_P(REGNO) \
859 ((REGNO) >= CRIS_FIRST_ARG_REG \
860 && (REGNO) < CRIS_FIRST_ARG_REG + (CRIS_MAX_ARGS_IN_REGS))
861
862
863/* Node: Scalar Return */
864
4d696ad0 865#define FUNCTION_VALUE_REGNO_P(N) cris_function_value_regno_p (N)
0b85d816 866
0b85d816
HPN
867
868
869/* Node: Aggregate Return */
870
a2fef3a4 871#define CRIS_STRUCT_VALUE_REGNUM ((CRIS_FIRST_ARG_REG) - 1)
0b85d816
HPN
872
873
874/* Node: Caller Saves */
875/* (no definitions) */
876
877/* Node: Function entry */
878
879/* See cris.c for TARGET_ASM_FUNCTION_PROLOGUE and
880 TARGET_ASM_FUNCTION_EPILOGUE. */
881
0b85d816
HPN
882/* Node: Profiling */
883
884#define FUNCTION_PROFILER(FILE, LABELNO) \
c725bd79 885 error ("no FUNCTION_PROFILER for CRIS")
0b85d816 886
0b85d816
HPN
887/* FIXME: Some of the undefined macros might be mandatory. If so, fix
888 documentation. */
889
890
0b85d816
HPN
891/* Node: Trampolines */
892
6725c402 893#define TRAMPOLINE_SIZE (TARGET_V32 ? 58 : 32)
0b85d816 894
3e322b77 895/* CRIS wants instructions on word-boundary. */
0b85d816
HPN
896#define TRAMPOLINE_ALIGNMENT 16
897
0b85d816
HPN
898/* Node: Library Calls */
899
0b85d816
HPN
900/* If you change this, you have to check whatever libraries and systems
901 that use it. */
902#define TARGET_EDOM 33
903
904
905/* Node: Addressing Modes */
906
907#define HAVE_POST_INCREMENT 1
908
6725c402
HPN
909/* Must be a compile-time constant, so we go with the highest value
910 among all CRIS variants. */
0b85d816
HPN
911#define MAX_REGS_PER_ADDRESS 2
912
913/* There are helper macros defined here which are used only in
914 GO_IF_LEGITIMATE_ADDRESS.
915
916 Note that you *have to* reject invalid addressing modes for mode
917 MODE, even if it is legal for normal addressing modes. You cannot
918 rely on the constraints to do this work. They can only be used to
919 doublecheck your intentions. One example is that you HAVE TO reject
920 (mem:DI (plus:SI (reg:SI x) (reg:SI y))) because for some reason
921 this cannot be reloaded. (Which of course you can argue that gcc
922 should have done.) FIXME: Strange. Check. */
923
924/* No symbol can be used as an index (or more correct, as a base) together
925 with a register with PIC; the PIC register must be there. */
926#define CONSTANT_INDEX_P(X) \
6725c402 927 (CONSTANT_P (X) && (!flag_pic || cris_valid_pic_const (X, true)))
0b85d816
HPN
928
929/* True if X is a valid base register. */
930#define BASE_P(X) \
931 (REG_P (X) && REG_OK_FOR_BASE_P (X))
932
933/* True if X is a valid base register with or without autoincrement. */
6725c402
HPN
934#define BASE_OR_AUTOINCR_P(X) \
935 (BASE_P (X) \
936 || (GET_CODE (X) == POST_INC \
937 && BASE_P (XEXP (X, 0)) \
938 && REGNO (XEXP (X, 0)) != CRIS_ACR_REGNUM))
0b85d816
HPN
939
940/* True if X is a valid (register) index for BDAP, i.e. [Rs].S or [Rs+].S. */
941#define BDAP_INDEX_P(X) \
991c42ac 942 ((MEM_P (X) && GET_MODE (X) == SImode \
0b85d816
HPN
943 && BASE_OR_AUTOINCR_P (XEXP (X, 0))) \
944 || (GET_CODE (X) == SIGN_EXTEND \
991c42ac 945 && MEM_P (XEXP (X, 0)) \
0b85d816
HPN
946 && (GET_MODE (XEXP (X, 0)) == HImode \
947 || GET_MODE (XEXP (X, 0)) == QImode) \
948 && BASE_OR_AUTOINCR_P (XEXP (XEXP (X, 0), 0))))
949
950/* True if X is a valid (register) index for BIAP, i.e. Rd.m. */
951#define BIAP_INDEX_P(X) \
952 ((BASE_P (X) && REG_OK_FOR_INDEX_P (X)) \
953 || (GET_CODE (X) == MULT \
954 && BASE_P (XEXP (X, 0)) \
955 && REG_OK_FOR_INDEX_P (XEXP (X, 0)) \
991c42ac 956 && CONST_INT_P (XEXP (X, 1)) \
0b85d816
HPN
957 && (INTVAL (XEXP (X, 1)) == 2 \
958 || INTVAL (XEXP (X, 1)) == 4)))
959
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HPN
960/* A PIC operand looks like a normal symbol here. At output we dress it
961 in "[rPIC+symbol:GOT]" (global symbol) or "rPIC+symbol:GOTOFF" (local
962 symbol) so we exclude all addressing modes where we can't replace a
963 plain "symbol" with that. A global PIC symbol does not fit anywhere
964 here (but is thankfully a general_operand in itself). A local PIC
965 symbol is valid for the plain "symbol + offset" case. */
966#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
967 { \
968 rtx x1, x2; \
6725c402 969 if (BASE_OR_AUTOINCR_P (X)) \
0b85d816 970 goto ADDR; \
6725c402
HPN
971 else if (TARGET_V32) \
972 /* Nothing else is valid then. */ \
973 ; \
974 else if (CONSTANT_INDEX_P (X)) \
0b85d816
HPN
975 goto ADDR; \
976 /* Indexed? */ \
6725c402 977 else if (GET_CODE (X) == PLUS) \
0b85d816
HPN
978 { \
979 x1 = XEXP (X, 0); \
980 x2 = XEXP (X, 1); \
981 /* BDAP o, Rd. */ \
982 if ((BASE_P (x1) && CONSTANT_INDEX_P (x2)) \
983 || (BASE_P (x2) && CONSTANT_INDEX_P (x1)) \
984 /* BDAP Rs[+], Rd. */ \
985 || (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD \
986 && ((BASE_P (x1) && BDAP_INDEX_P (x2)) \
987 || (BASE_P (x2) && BDAP_INDEX_P (x1)) \
988 /* BIAP.m Rs, Rd */ \
989 || (BASE_P (x1) && BIAP_INDEX_P (x2)) \
990 || (BASE_P (x2) && BIAP_INDEX_P (x1))))) \
991 goto ADDR; \
992 } \
991c42ac 993 else if (MEM_P (X)) \
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HPN
994 { \
995 /* DIP (Rs). Reject [[reg+]] and [[reg]] for \
996 DImode (long long). */ \
997 if (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD \
998 && (BASE_P (XEXP (X, 0)) \
999 || BASE_OR_AUTOINCR_P (XEXP (X, 0)))) \
1000 goto ADDR; \
1001 } \
1002 }
1003
1004#ifndef REG_OK_STRICT
1005 /* Nonzero if X is a hard reg that can be used as a base reg
1006 or if it is a pseudo reg. */
1007# define REG_OK_FOR_BASE_P(X) \
1008 (REGNO (X) <= CRIS_LAST_GENERAL_REGISTER \
1009 || REGNO (X) == ARG_POINTER_REGNUM \
1010 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1011#else
1012 /* Nonzero if X is a hard reg that can be used as a base reg. */
1013# define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1014#endif
1015
1016#ifndef REG_OK_STRICT
1017 /* Nonzero if X is a hard reg that can be used as an index
1018 or if it is a pseudo reg. */
1019# define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1020#else
1021 /* Nonzero if X is a hard reg that can be used as an index. */
1022# define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1023#endif
1024
15883505
HPN
1025/* Fix reloads known to cause suboptimal spilling. */
1026#define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, INDL, WIN) \
1027 do \
1028 { \
1029 if (cris_reload_address_legitimized (X, MODE, OPNUM, TYPE, INDL)) \
1030 goto WIN; \
1031 } \
1032 while (0)
1033
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HPN
1034#define LEGITIMATE_CONSTANT_P(X) 1
1035
1036
1037/* Node: Condition Code */
1038
1039#define NOTICE_UPDATE_CC(EXP, INSN) cris_notice_update_cc (EXP, INSN)
1040
1041/* FIXME: Maybe define CANONICALIZE_COMPARISON later, when playing with
1042 optimizations. It is needed; currently we do this with instruction
1043 patterns and NOTICE_UPDATE_CC. */
1044
1045
1046/* Node: Costs */
1047
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HPN
1048/* Regardless of the presence of delay slots, the default value of 1 for
1049 BRANCH_COST is the best in the range (1, 2, 3), tested with gcc-2.7.2
1050 with testcases ipps and gcc, giving smallest and fastest code. */
1051
1052#define SLOW_BYTE_ACCESS 0
1053
1054/* This is the threshold *below* which inline move sequences of
1055 word-length sizes will be emitted. The "9" will translate to
1056 (9 - 1) * 4 = 32 bytes maximum moved, but using 16 instructions
1057 (8 instruction sequences) or less. */
e04ad03d 1058#define MOVE_RATIO(speed) 9
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HPN
1059
1060
1061/* Node: Sections */
1062
1063#define TEXT_SECTION_ASM_OP "\t.text"
1064
1065#define DATA_SECTION_ASM_OP "\t.data"
1066
1067#define FORCE_EH_FRAME_INFO_IN_DATA_SECTION (! TARGET_ELF)
1068
1069/* The jump table is immediately connected to the preceding insn. */
1070#define JUMP_TABLES_IN_TEXT_SECTION 1
1071
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HPN
1072
1073/* Node: PIC */
1074
c00fc5cf
HPN
1075/* Helper type. */
1076
1077enum cris_pic_symbol_type
1078 {
1079 cris_no_symbol = 0,
1080 cris_got_symbol = 1,
6725c402 1081 cris_rel_symbol = 2,
c00fc5cf
HPN
1082 cris_got_symbol_needing_fixup = 3,
1083 cris_invalid_pic_symbol = 4
1084 };
1085
f60c7155 1086#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? CRIS_GOT_REGNUM : INVALID_REGNUM)
0b85d816
HPN
1087
1088#define LEGITIMATE_PIC_OPERAND_P(X) cris_legitimate_pic_operand (X)
1089
1090
1091/* Node: File Framework */
1092
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HPN
1093/* We don't want an .ident for gcc. To avoid that but still support
1094 #ident, we override ASM_OUTPUT_IDENT and, since the gcc .ident is its
1095 only use besides ASM_OUTPUT_IDENT, undef IDENT_ASM_OP from elfos.h. */
1096#undef IDENT_ASM_OP
1097#undef ASM_OUTPUT_IDENT
1098#define ASM_OUTPUT_IDENT(FILE, NAME) \
1099 fprintf (FILE, "%s\"%s\"\n", "\t.ident\t", NAME);
1100
1101#define ASM_APP_ON "#APP\n"
1102
1103#define ASM_APP_OFF "#NO_APP\n"
1104
1105
1106/* Node: Data Output */
1107
453bd0f5
HPN
1108#define OUTPUT_ADDR_CONST_EXTRA(STREAM, X, FAIL) \
1109 do { if (!cris_output_addr_const_extra (STREAM, X)) goto FAIL; } while (0)
1110
980d8882 1111#define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) (C) == '@'
0b85d816 1112
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HPN
1113/* Node: Uninitialized Data */
1114
1115/* Remember to round off odd values if we want data alignment,
1116 since we cannot do that with an .align directive.
1117
1118 Using .comm causes the space not to be reserved in .bss, but by
1119 tricks with the symbol type. Not good if other tools than binutils
1120 are used on the object files. Since ".global ... .lcomm ..." works, we
1121 use that. Use .._ALIGNED_COMMON, since gcc whines when we only have
d6a7951f 1122 ..._COMMON, and we prefer to whine ourselves; BIGGEST_ALIGNMENT is not
0b85d816
HPN
1123 the one to check. This done for a.out only. */
1124/* FIXME: I suspect a bug in gcc with alignment. Do not warn until
1125 investigated; it mucks up the testsuite results. */
1126#define CRIS_ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN, LOCAL) \
1127 do \
1128 { \
1129 int align_ = (ALIGN) / BITS_PER_UNIT; \
1130 if (TARGET_DATA_ALIGN && TARGET_ALIGN_BY_32 && align_ < 4) \
1131 align_ = 4; \
1132 else if (TARGET_DATA_ALIGN && align_ < 2) \
1133 align_ = 2; \
1134 /* FIXME: Do we need this? */ \
1135 else if (align_ < 1) \
1136 align_ = 1; \
1137 \
1138 if (TARGET_ELF) \
1139 { \
1140 if (LOCAL) \
1141 { \
1142 fprintf ((FILE), "%s", LOCAL_ASM_OP); \
1143 assemble_name ((FILE), (NAME)); \
1144 fprintf ((FILE), "\n"); \
1145 } \
1146 fprintf ((FILE), "%s", COMMON_ASM_OP); \
1147 assemble_name ((FILE), (NAME)); \
58e15542 1148 fprintf ((FILE), ",%u,%u\n", (int)(SIZE), align_); \
0b85d816
HPN
1149 } \
1150 else \
1151 { \
1152 /* We can't tell a one-only or weak COMM from a "global \
1153 COMM" so just make all non-locals weak. */ \
1154 if (! (LOCAL)) \
1155 ASM_WEAKEN_LABEL (FILE, NAME); \
1156 fputs ("\t.lcomm ", (FILE)); \
1157 assemble_name ((FILE), (NAME)); \
1158 fprintf ((FILE), ",%u\n", \
58e15542 1159 ((int)(SIZE) + (align_ - 1)) & ~(align_ - 1)); \
0b85d816
HPN
1160 } \
1161 } \
1162 while (0)
1163
1164#define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \
1165 CRIS_ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN, 0)
1166
1167#undef ASM_OUTPUT_ALIGNED_DECL_LOCAL
1168#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \
1169 CRIS_ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN, 1)
1170
0b85d816
HPN
1171/* Node: Label Output */
1172
506a61b1
KG
1173/* Globalizing directive for a label. */
1174#define GLOBAL_ASM_OP "\t.global "
0b85d816
HPN
1175
1176#define SUPPORTS_WEAK 1
1177
453bd0f5
HPN
1178#define ASM_OUTPUT_SYMBOL_REF(STREAM, SYM) \
1179 cris_asm_output_symbol_ref (STREAM, SYM)
1180
1181#define ASM_OUTPUT_LABEL_REF(STREAM, BUF) \
1182 cris_asm_output_label_ref (STREAM, BUF)
1183
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HPN
1184/* Remove any previous definition (elfos.h). */
1185#undef ASM_GENERATE_INTERNAL_LABEL
1186#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1187 sprintf (LABEL, "*%s%s%ld", LOCAL_LABEL_PREFIX, PREFIX, (long) NUM)
1188
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HPN
1189/* Node: Initialization */
1190/* (no definitions) */
1191
1192/* Node: Macros for Initialization */
44a4ca5e 1193/* (no definitions) */
0b85d816
HPN
1194
1195/* Node: Instruction Output */
1196
1197#define REGISTER_NAMES \
1198 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", \
6725c402 1199 "r9", "r10", "r11", "r12", "r13", "sp", "acr", "srp", "mof", "faked_ap", "dccr"}
0b85d816
HPN
1200
1201#define ADDITIONAL_REGISTER_NAMES \
6725c402 1202 {{"r14", 14}, {"r15", 15}, {"pc", 15}}
0b85d816 1203
0b85d816
HPN
1204/* Output an empty line to illustrate the presence of the delay slot. */
1205#define DBR_OUTPUT_SEQEND(FILE) \
1206 fprintf (FILE, "\n")
1207
1208#define LOCAL_LABEL_PREFIX (TARGET_ELF ? "." : "")
1209
1210/* cppinit.c initializes a const array from this, so it must be constant,
1211 can't have it different based on options. Luckily, the prefix is
1212 always allowed, so let's have it on all GCC-generated code. Note that
1213 we have this verbatim everywhere in the back-end, not using %R or %s or
1214 such. */
1215#define REGISTER_PREFIX "$"
1216
1217/* Remove any previous definition (elfos.h). */
1218/* We use -fno-leading-underscore to remove it, when necessary. */
1219#undef USER_LABEL_PREFIX
1220#define USER_LABEL_PREFIX "_"
1221
6725c402
HPN
1222#define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1223 fprintf (FILE, \
1224 TARGET_V32 \
1225 ? "\tsubq 4,$sp\n\tmove $%s,[$sp]\n" : "\tpush $%s\n", \
1226 reg_names[REGNO])
0b85d816
HPN
1227
1228#define ASM_OUTPUT_REG_POP(FILE, REGNO) \
6725c402 1229 fprintf (FILE, "\tmove [$sp+],$%s\n", reg_names[REGNO])
0b85d816
HPN
1230
1231
1232/* Node: Dispatch Tables */
1233
6725c402
HPN
1234#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1235 do \
1236 { \
1237 if (TARGET_V32) \
1238 asm_fprintf (FILE, "\t.word %LL%d-.\n", VALUE); \
1239 else \
1240 asm_fprintf (FILE, "\t.word %LL%d-%LL%d\n", VALUE, REL); \
1241 } \
1242 while (0)
0b85d816
HPN
1243
1244#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1245 asm_fprintf (FILE, "\t.dword %LL%d\n", VALUE)
1246
1247/* Defined to also emit an .align in elfos.h. We don't want that. */
1248#undef ASM_OUTPUT_CASE_LABEL
1249
1250/* Since the "bound" insn loads the comparison value if the compared<
1251 value (register) is out of bounds (0..comparison value-1), we need
1252 to output another case to catch it.
1253 The way to find it is to look for the label_ref at the else-arm inside
1254 the expanded casesi core-insn.
1255 FIXME: Check this construct when changing to new version of gcc. */
1256#define ASM_OUTPUT_CASE_END(STREAM, NUM, TABLE) \
6725c402 1257 cris_asm_output_case_end (STREAM, NUM, TABLE)
0b85d816
HPN
1258
1259
1260/* Node: Exception Region Output */
1261/* (no definitions) */
1262/* FIXME: Fill in with our own optimized layout. */
1263
1264/* Node: Alignment Output */
1265
1266#define ASM_OUTPUT_ALIGN(FILE, LOG) \
1267 fprintf (FILE, "\t.align %d\n", (LOG))
1268
1269
1270/* Node: All Debuggers */
1271
f60c7155
HPN
1272#define DBX_REGISTER_NUMBER(REGNO) \
1273 ((REGNO) == CRIS_SRP_REGNUM ? CRIS_CANONICAL_SRP_REGNUM : \
1274 (REGNO) == CRIS_MOF_REGNUM ? CRIS_CANONICAL_MOF_REGNUM : \
f9968e3e 1275 (REGNO) == CRIS_CC0_REGNUM ? CRIS_CANONICAL_CC0_REGNUM : \
f60c7155 1276 (REGNO))
0b85d816
HPN
1277
1278/* FIXME: Investigate DEBUGGER_AUTO_OFFSET, DEBUGGER_ARG_OFFSET. */
1279
1280
1281/* Node: DBX Options */
1282
e5837c07 1283/* Is this correct? Check later. */
0b85d816
HPN
1284#define DBX_NO_XREFS
1285
1286#define DBX_CONTIN_LENGTH 0
1287
1288/* FIXME: Is this needed when we have 0 DBX_CONTIN_LENGTH? */
1289#define DBX_CONTIN_CHAR '?'
1290
1291
1292/* Node: DBX Hooks */
1293/* (no definitions) */
1294
1295/* Node: File names and DBX */
1296/* (no definitions) */
1297
1298
1299/* Node: SDB and DWARF */
d94084f7 1300/* (no definitions) */
0b85d816 1301
0b85d816
HPN
1302/* Node: Misc */
1303
0b85d816
HPN
1304/* A combination of the bound (umin) insn together with a
1305 sign-extended add via the table to PC seems optimal.
1306 If the table overflows, the assembler will take care of it.
1307 Theoretically, in extreme cases (uncertain if they occur), an error
1308 will be emitted, so FIXME: Check how large case-tables are emitted,
1309 possible add an option to emit SImode case-tables. */
1310#define CASE_VECTOR_MODE HImode
1311
1312#define CASE_VECTOR_PC_RELATIVE 1
1313
1314/* FIXME: Investigate CASE_VECTOR_SHORTEN_MODE to make sure HImode is not
109b748d 1315 used when broken-.word could possibly fail (plus testcase). */
0b85d816 1316
0b85d816
HPN
1317#define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1318
0b85d816
HPN
1319/* This is the number of bytes that can be moved in one
1320 reasonably fast instruction sequence. For CRIS, this is two
1321 instructions: mem => reg, reg => mem. */
1322#define MOVE_MAX 4
1323
1324/* Maybe SHIFT_COUNT_TRUNCATED is safe to define? FIXME: Check later. */
1325
1326#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1327
e636e508 1328#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
9ef4a0cd 1329#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
e636e508 1330
0b85d816
HPN
1331#define Pmode SImode
1332
1333#define FUNCTION_MODE QImode
1334
1335#define NO_IMPLICIT_EXTERN_C
1336
c3271cd2
HPN
1337/* No specific purpose other than warningless compatibility. */
1338#define HANDLE_PRAGMA_PACK_PUSH_POP 1
1339
0b85d816
HPN
1340/*
1341 * Local variables:
1342 * eval: (c-set-style "gnu")
1343 * indent-tabs-mode: t
1344 * End:
1345 */