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cc7232b9 1/* Declarations for the C-SKY back end.
a5544970 2 Copyright (C) 2018-2019 Free Software Foundation, Inc.
cc7232b9
J		 3 Contributed by C-SKY Microsystems and Mentor Graphics.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21
22#ifndef GCC_CSKY_H
23#define GCC_CSKY_H
24
25/* In some places e.g. csky_secondary_reload, we use -1 to indicate an
26 invalid register. In other places where N is unsigned the comparison
27 to zero would give an error, so explicitly cast to int here. */
28#define CSKY_GENERAL_REGNO_P(N) \
29 ((N) < CSKY_NGPR_REGS && (int)(N) >= 0)
30
31#define CSKY_VREG_P(N) \
32 ((N) >= CSKY_FIRST_VFP_REGNUM && (N) <= CSKY_LAST_VFP_REGNUM)
33
34#define CSKY_HILO_REG_P(N) \
35 ((N) == CSKY_HI_REGNUM || (N) == CSKY_LO_REGNUM)
36
37/* Helper macros for constant constraints and predicates. */
38#define CSKY_VALUE_BETWEEN(VALUE, LOW, HIGH) \
39 ((VALUE) >= (LOW) && (VALUE) <= (HIGH))
40
41#define CSKY_CONST_OK_FOR_I(VALUE) \
42 CSKY_VALUE_BETWEEN (VALUE, 0, 65535)
43
44#define CSKY_CONST_OK_FOR_J(VALUE) \
45 CSKY_VALUE_BETWEEN (VALUE, 1, 32)
46
47#define CSKY_CONST_OK_FOR_K(VALUE) \
48 CSKY_VALUE_BETWEEN (VALUE, 0, 31)
49
50#define CSKY_CONST_OK_FOR_L(VALUE) \
51 CSKY_VALUE_BETWEEN (VALUE, 1, 8)
52
53#define CSKY_CONST_OK_FOR_M(VALUE) \
54 CSKY_VALUE_BETWEEN (VALUE, 1, 4096)
55
56#define CSKY_CONST_OK_FOR_N(VALUE) \
57 CSKY_VALUE_BETWEEN (VALUE, 1, 256)
58
59#define CSKY_CONST_OK_FOR_O(VALUE) \
60 CSKY_VALUE_BETWEEN (VALUE, 0, 4095)
61
62#define CSKY_CONST_OK_FOR_P(VALUE) \
63 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, 4, 508))
64
65#define CSKY_CONST_OK_FOR_T(VALUE) \
66 CSKY_VALUE_BETWEEN (VALUE, -256, -1)
67
68#define CSKY_CONST_OK_FOR_Ub(VALUE) \
69 (exact_log2 (VALUE & 0xFFFFFFFF) >= 0)
70
71#define CSKY_CONST_OK_FOR_Uc(VALUE) \
72 ((VALUE) == (HOST_WIDE_INT) -1 \
73 || (exact_log2 ((VALUE) + 1) >= 0 \
74 && exact_log2 ((VALUE) + 1) <= 31))
75
76#define CSKY_CONST_OK_FOR_Ud(VALUE) \
77 ((CSKY_CONST_OK_FOR_I ((VALUE) & 0xffffffff) \
78 || CSKY_CONST_OK_FOR_Ub ((VALUE)) \
79 || CSKY_CONST_OK_FOR_Uc (((VALUE) << 32) >> 32)) \
80 && (CSKY_CONST_OK_FOR_I ((VALUE) >> 32) \
81 || CSKY_CONST_OK_FOR_Ub ((VALUE) >> 32) \
82 || CSKY_CONST_OK_FOR_Uc ((VALUE) >> 32))) \
83
84#define CSKY_CONST_OK_FOR_Ug(VALUE) \
85 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, -508, -4))
86
87#define CSKY_CONST_OK_FOR_Uh(VALUE) \
88 CSKY_VALUE_BETWEEN (VALUE, -31, 0)
89
90#define CSKY_CONST_OK_FOR_Uj(VALUE) \
91 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, 1, 1024))
92
93#define CSKY_CONST_OK_FOR_Uk(VALUE) \
94 CSKY_VALUE_BETWEEN (VALUE, 1, 65536)
95
96#define CSKY_CONST_OK_FOR_Ul(VALUE) \
97 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, -1024, -4))
98
99#define CSKY_CONST_OK_FOR_Um(VALUE) \
100 CSKY_VALUE_BETWEEN (VALUE, -4096, -1)
101
102#define CSKY_CONST_OK_FOR_US(VALUE) \
103 CSKY_VALUE_BETWEEN (VALUE, -8, -1)
104
105#define CSKY_CONST_OK_FOR_MOVIH(VALUE) \
106 (((VALUE) & 0xFFFF) == 0)
107
108#ifndef TARGET_CPU_DEFAULT
109#define TARGET_CPU_DEFAULT CSKY_TARGET_CORE_GET(ck810f)
110#endif
111
112/* Options that are enabled by default are specified as such in the
113 .opt file. */
114#define TARGET_DEFAULT 0
115
116/* The highest CSKY architecture version supported by the target. */
117#define CSKY_TARGET_ARCH(arch) \
118 (csky_base_arch == CSKY_TARGET_ARCH_GET (arch))
119
120/* Define some macros for target code generation options. */
121#define TARGET_SOFT_FPU \
122 (csky_fpu_index == TARGET_FPU_fpv2_sf)
123#define TARGET_CASESI \
124 (optimize_size && TARGET_CONSTANT_POOL \
125 && (CSKY_TARGET_ARCH (CK801) || CSKY_TARGET_ARCH (CK802)))
126#define TARGET_TLS \
127 (CSKY_TARGET_ARCH (CK807) || CSKY_TARGET_ARCH (CK810))
128
129/* Number of loads/stores handled by ldm/stm. */
130#define CSKY_MIN_MULTIPLE_STLD 3
131#define CSKY_MAX_MULTIPLE_STLD 12
132
133/* Pull in enums and defines for processor/arch variants. This makes
134 it possible to use CSKY_TARGET_ARCH in macros defined in this file. */
135#include "csky_opts.h"
136extern enum csky_base_architecture csky_base_arch;
137
138/* Pull in enums and defines for ISA features. Likewise required to
139 support use of CSKY_ISA_FEATURE in this file.
140 Note that the CSKY_ISA_FEATURE macro tests properties of the
141 particular processor we're compiling for, not code generation
142 options that may have dependencies on those features. The latter
143 are handled by TARGET_xxxx macros/variables instead. See csky.opt. */
144#include "csky_isa.h"
145extern int csky_arch_isa_features[];
146#define CSKY_ISA_FEATURE(IDENT) \
147 csky_arch_isa_features[CSKY_ISA_FEATURE_GET (IDENT)]
148
149/******************************************************************
150 * Storage Layout *
151 ******************************************************************/
152
153
154/* Define this if most significant bit is lowest numbered
155 in instructions that operate on numbered bit-fields. */
156#define BITS_BIG_ENDIAN 0
157
158/* If the most significant byte of a word is the lowest numbered. */
159#define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
160
161/* If the most significant word of a multiword number is the lowest. */
162#define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN)
163
164/* Width of a word, in units (bytes). */
165#define UNITS_PER_WORD 4
166
167/* Define this macro if it is advisable to hold scalars in registers
168 in a wider mode than that declared by the program. In such cases,
169 the value is constrained to be within the bounds of the declared
170 type, but kept valid in the wider mode. The signedness of the
171 extension may differ from that of the type. */
172#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
173 if (GET_MODE_CLASS (MODE) == MODE_INT \
174 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
175 (MODE) = SImode;
176
177
178/* Allocation boundary (in *bits*) for storing arguments in argument list. */
179#define PARM_BOUNDARY 32
180
181/* Boundary (in *bits*) on which stack pointer should be aligned.
182 Per C-SKY, the published V2 ABI document is incorrect and the proper
183 alignment is on a 4-byte boundary rather than 8 bytes. */
184#define STACK_BOUNDARY 32
185
186/* Align definitions of arrays, unions and structures so that
187 initializations and copies can be made more efficient. This is not
188 ABI-changing, so it only affects places where we can see the
189 definition. Increasing the alignment tends to introduce padding,
190 so don't do this when optimizing for size/conserving stack space. */
191#define CSKY_EXPAND_ALIGNMENT(COND, EXP, ALIGN) \
192 (((COND) && ((ALIGN) < BITS_PER_WORD) \
193 && (TREE_CODE (EXP) == ARRAY_TYPE \
194 || TREE_CODE (EXP) == UNION_TYPE \
195 || TREE_CODE (EXP) == RECORD_TYPE)) \
196 ? BITS_PER_WORD : (ALIGN))
197
198/* Align global data. */
199#define DATA_ALIGNMENT(EXP, ALIGN) \
200 CSKY_EXPAND_ALIGNMENT (!optimize_size, EXP, ALIGN)
201
202/* Similarly, make sure that objects on the stack are sensibly aligned. */
203#define LOCAL_ALIGNMENT(EXP, ALIGN) \
204 CSKY_EXPAND_ALIGNMENT (!flag_conserve_stack, EXP, ALIGN)
205
206/* No data type wants to be aligned rounder than this. */
207#define BIGGEST_ALIGNMENT 32
208
209/* Every structures size must be a multiple of 8 bits. */
210#define STRUCTURE_SIZE_BOUNDARY 8
211
212/* Look at the fundamental type that is used for a bit-field and use
213 that to impose alignment on the enclosing structure.
214 struct s {int a:8}; should have same alignment as "int", not "char". */
215#define PCC_BITFIELD_TYPE_MATTERS 1
216
217/* Largest integer machine mode for structures. If undefined, the default
218 is GET_MODE_SIZE(DImode). */
219#define MAX_FIXED_MODE_SIZE 64
220
221/* Allocation boundary (in *bits*) for the code of a function.
222 Optimize ck801 and ck802 a little harder for size. */
223#define FUNCTION_BOUNDARY \
224 (((CSKY_TARGET_ARCH (CK801) || CSKY_TARGET_ARCH (CK802)) \
225 && optimize_size) \
226 ? 16 : 32)
227
228/* C-SKY does not support unaligned access. */
229#define STRICT_ALIGNMENT 1
230
231#undef SIZE_TYPE
232#define SIZE_TYPE "unsigned int"
233
234#undef PTRDIFF_TYPE
235#define PTRDIFF_TYPE "int"
236
237#undef WCHAR_TYPE
238#define WCHAR_TYPE "long int"
239
240#undef UINT_LEAST32_TYPE
241#define UINT_LEAST32_TYPE "unsigned int"
242
243#undef INT_LEAST32_TYPE
244#define INT_LEAST32_TYPE "int"
245
246#undef WCHAR_TYPE_SIZE
247#define WCHAR_TYPE_SIZE BITS_PER_WORD
248
249/******************************************************************
250 * Layout of Source Language Data Types *
251 ******************************************************************/
252
253
254/* 'char' is unsigned by default for backward compatibility. */
255#define DEFAULT_SIGNED_CHAR 0
256
257
258/******************************************************************
259 * Stack Layout and Calling Conventions *
260 ******************************************************************/
261
262
263/* Basic Stack Layout */
264
265
266/* Define this if pushing a word on the stack
267 makes the stack pointer a smaller address. */
268#define STACK_GROWS_DOWNWARD 1
269
270/* Define this to nonzero if the nominal address of the stack frame
271 is at the high-address end of the local variables;
272 that is, each additional local variable allocated
273 goes at a more negative offset in the frame. */
274#define FRAME_GROWS_DOWNWARD 1
275
276/* Offset of first parameter from the argument pointer register value. */
277#define FIRST_PARM_OFFSET(FNDECL) 0
278
279/* A C expression whose value is RTL representing the value of the return
280 address for the frame COUNT steps up from the current frame. */
281#define RETURN_ADDR_RTX(COUNT, FRAME) \
282 csky_return_addr (COUNT, FRAME)
283
284/* Pick up the return address upon entry to a procedure. Used for
285 dwarf2 unwind information. This also enables the table driven
286 mechanism. */
287#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, CSKY_LR_REGNUM)
288
289
290/* Exception Handling Support */
291
292/* The register that holds the return address in exception handlers. */
293#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, CSKY_EH_STACKADJ_REGNUM)
294
917ecacc
XQ		 295/* Select a format to encode pointers in exception handling data. */
296#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
297 (((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4)
cc7232b9
J		 298
299/* Registers That Address the Stack Frame */
300
301
302/* Register to use for pushing function arguments. */
303#define STACK_POINTER_REGNUM CSKY_SP_REGNUM
304
305/* Base register for access to local variables of the function. */
306#define FRAME_POINTER_REGNUM 8
307
308/* Base register for access to arguments of the function. This is a fake
309 register that is always eliminated. */
310#define ARG_POINTER_REGNUM 32
311
312/* Static chain register.
313 Register use is more restricted on CK801. */
314#define STATIC_CHAIN_REGNUM (CSKY_TARGET_ARCH (CK801) ? 13 : 12)
315
316
317/* Eliminating Frame Pointer and Arg Pointer */
318
319
320/* Definitions for register eliminations.
321
322 This is an array of structures. Each structure initializes one pair
323 of eliminable registers. The "from" register number is given first,
324 followed by "to". Eliminations of the same "from" register are listed
325 in order of preference.
326
327 We have two registers that can be eliminated on the CSKY. First, the
328 arg pointer register can often be eliminated in favor of the stack
329 pointer register. Secondly, the pseudo frame pointer register can always
330 be eliminated; it is replaced with the stack pointer. */
331#define ELIMINABLE_REGS \
332{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM },\
333 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM },\
334 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
335
336/* Define the offset between two registers, one to be eliminated, and the
337 other its replacement, at the start of a routine. */
338#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
339 (OFFSET) = csky_initial_elimination_offset (FROM, TO)
340
341
342/* Passing Function Arguments on the Stack */
343
344
345/* Define this if the maximum size of all the outgoing args is to be
346 accumulated and pushed during the prologue. The amount can be
347 found in the variable crtl->outgoing_args_size. */
348#define ACCUMULATE_OUTGOING_ARGS 1
349
350
351/* Passing Arguments in Registers */
352
353
354/* A C type for declaring a variable that is used as the first argument of
355 TARGET_ FUNCTION_ARG and other related values. */
356#define CUMULATIVE_ARGS int
357
358/* Initialize a variable CUM of type CUMULATIVE_ARGS
359 for a call to a function whose data type is FNTYPE.
360 For a library call, FNTYPE is 0.
361
362 On CSKY, the offset always starts at 0: the first parm reg is always
363 the same reg. */
364#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
365 ((CUM) = 0)
366
367/* True if N is a possible register number for function argument passing.
368 On the CSKY, r0-r3 are used to pass args.
369 The int cast is to prevent a complaint about unsigned comparison to
370 zero, since CSKY_FIRST_PARM_REGNUM is zero. */
371#define FUNCTION_ARG_REGNO_P(REGNO) \
372 (((int)(REGNO) >= CSKY_FIRST_PARM_REGNUM) && \
373 ((REGNO) < (CSKY_NPARM_REGS + CSKY_FIRST_PARM_REGNUM)))
374
375/* How Large Values Are Returned */
376
377
378/* Define DEFAULT_PCC_STRUCT_RETURN to 1 if all structure and union return
379 values must be in memory. On the CSKY, small
380 structures (eight bytes or fewer) are returned in
381 the register pair r0/r1. */
382#define DEFAULT_PCC_STRUCT_RETURN 0
383
384/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
385 the stack pointer does not matter. The value is tested only in
386 functions that have frame pointers.
387 No definition is equivalent to always zero.
388
389 On the CSKY, the function epilogue recovers the stack pointer from the
390 frame. */
391#define EXIT_IGNORE_STACK 1
392
393
394/******************************************************************
395 * Register Usage & Register Classes *
396 ******************************************************************/
397
398
399#define FIRST_PSEUDO_REGISTER 71
400
401/* 1 for registers that have pervasive standard uses
402 and are not available for the register allocator.
403 On C-SKY, r14 is SP, r26 is used by linker,
404 r27 is used by assembler, r28 is data base address,
405 r29 is GOT base address, r30 is handler base address,
406 r31 is TLS register. */
407#define FIXED_REGISTERS \
408 /* r0 r1 r2 r3 r4 r5 r6 r7 */ \
409{ 0, 0, 0, 0, 0, 0, 0, 0, \
410 /* r8 r9 r10 r11 r12 r13 r14 r15 */ \
411 0, 0, 0, 0, 0, 0, 1, 0, \
412 /* r16 r17 r18 r19 r20 r21 r22 r23 */ \
413 0, 0, 0, 0, 0, 0, 0, 0, \
414 /* r24 r25 r26 r27 r28 r29 r30 tls */ \
415 0, 0, 1, 1, 1, 1, 1, 1, \
416 /* reserved c hi lo */ \
417 1, 1, 0, 0, \
418 /* reserved */ \
419 1, 1, 1, 1, 1, 1, 1, 1, \
420 1, 1, 1, 1, 1, 1, 1, 1, \
421 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \
422 0, 0, 0, 0, 0, 0, 0, 0, \
423 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \
424 0, 0, 0, 0, 0, 0, 0, 0 , \
425 /* reserved */ \
426 1, 1, \
427 /* epc */ \
428 1 \
429}
430
431/* 1 for registers that is clobbered (in general) by function calls.
432 If a register has 0, the compiler automatically saves it on
433 function entry and restores it on function exit, if the register
434 is used within the function. */
435#define CALL_USED_REGISTERS \
436 /* r0 r1 r2 r3 r4 r5 r6 r7 */ \
437{ 1, 1, 1, 1, 0, 0, 0, 0, \
438 /* r8 r9 r10 r11 r12 r13 r14 r15 */ \
439 0, 0, 0, 0, 1, 1, 1, 0, \
440 /* r16 r17 r18 r19 r20 r21 r22 r23 */ \
441 0, 0, 1, 1, 1, 1, 1, 1, \
442 /* r24 r25 r26 r27 r28 r29 r30 r31 */ \
443 1, 1, 1, 1, 1, 1, 1, 1, \
444 /* reserved c hi lo */ \
445 1, 1, 1, 1, \
446 /* reserved */ \
447 1, 1, 1, 1, 1, 1, 1, 1, \
448 1, 1, 1, 1, 1, 1, 1, 1, \
449 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \
450 1, 1, 1, 1, 1, 1, 1, 1, \
451 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \
452 1, 1, 1, 1, 1, 1, 1, 1, \
453 /* reserved */ \
454 1, 1, \
455 /* epc */ \
456 1 \
457}
458
459/* Like `CALL_USED_REGISTERS' but used to overcome a historical
460 problem which makes CALL_USED_REGISTERS *always* include
461 all the FIXED_REGISTERS. Until this problem has been
462 resolved this macro can be used to overcome this situation.
463 In particular, block_propagate() requires this list
464 be accurate, or we can remove registers which should be live.
465 This macro is used in get_csky_live_regs(). */
466#define CALL_REALLY_USED_REGISTERS \
467 /* r0 r1 r2 r3 r4 r5 r6 r7 */ \
468{ 1, 1, 1, 1, 0, 0, 0, 0, \
469 /* r8 r9 r10 r11 r12 r13 r14 r15 */ \
470 0, 0, 0, 0, 1, 1, 1, 0, \
471 /* r16 r17 r18 r19 r20 r21 r22 r23 */ \
472 0, 0, 1, 1, 1, 1, 1, 1, \
473 /* r24 r25 r26 r27 r28 r29 r30 r31 */ \
474 1, 1, 1, 1, 1, 1, 1, 1, \
475 /* reserved c hi lo */ \
476 1, 1, 1, 1, \
477 /* reserved */ \
478 1, 1, 1, 1, 1, 1, 1, 1, \
479 1, 1, 1, 1, 1, 1, 1, 1, \
480 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \
481 1, 1, 1, 1, 1, 1, 1, 1, \
482 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \
483 1, 1, 1, 1, 1, 1, 1, 1, \
484 /* reserved */ \
485 1, 1, \
486 /* epc */ \
487 1 \
488}
489
490#define REGISTER_NAMES \
491{ \
492 "a0", "a1", "a2", "a3", "l0", "l1", "l2", "l3", \
493 "l4", "l5", "l6", "l7", "t0", "t1", "sp", "lr", \
494 "l8", "l9", "t2", "t3", "t4", "t5", "t6", "t7", \
495 "t8", "t9", "r26", "r27", "gb", "r29", "svbr", "r31", \
496 /* reserved */ \
497 "reserved", \
498 /* CC register: 33 */ \
499 "c", \
500 /* DSP instruction register: 34, 35 */ \
501 "hi", "lo", \
502 "reserved", "reserved", "reserved", "reserved", "reserved", \
503 "reserved", "reserved", "reserved", "reserved", "reserved", \
504 "reserved", "reserved", "reserved", "reserved", "reserved", \
505 "reserved", \
506 /* V registers: 52~67 */ \
507 "vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7", \
508 "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15", \
509 "reserved", "reserved", \
510 "epc" \
511}
512
513/* Table of additional register names to use in user input. */
514#define ADDITIONAL_REGISTER_NAMES \
515{ \
516 {"r0", 0}, \
517 {"r1", 1}, \
518 {"r2", 2}, \
519 {"r3", 3}, \
520 {"r4", 4}, \
521 {"r5", 5}, \
522 {"r6", 6}, \
523 {"r7", 7}, \
524 {"r8", 8}, \
525 {"r9", 9}, \
526 {"r10", 10}, \
527 {"r11", 11}, \
528 {"r12", 12}, \
529 {"r13", 13}, \
530 {"r14", 14}, \
531 {"r15", 15}, \
532 {"r16", 16}, \
533 {"r17", 17}, \
534 {"r18", 18}, \
535 {"r19", 19}, \
536 {"r20", 20}, \
537 {"r21", 21}, \
538 {"r22", 22}, \
539 {"r23", 23}, \
540 {"r24", 24}, \
541 {"r25", 25}, \
542 {"r26", 26}, \
543 {"r27", 27}, \
544 {"r28", 28}, \
545 {"r29", 29}, \
546 {"r30", 30}, \
547 {"r31", 31}, \
548}
549
550/* The order in which registers should be allocated.
551 It is better to use the registers the caller need not save.
552 Allocate r0 through r3 in reverse order since r3 is least likely
553 to contain a function parameter; in addition results are returned
554 in r0. It is quite good to use lr since other calls may clobber
555 it anyway. */
556#define REG_ALLOC_ORDER \
557/* r3 r2 r1 r0 r12 r13 r18 r19 */ \
558 { 3, 2, 1, 0, 12, 13, 18, 19, \
559/* r20 r21 r22 r23 r24 r25 */ \
560 20, 21, 22, 23, 24, 25, \
561/* r15 r4 r5 r6 r7 r8 r9 r10 r11 */ \
562 15, 4, 5, 6, 7, 8, 9, 10, 11, \
563/* r16 r17 r26 r27 r28 r29 r30 hi lo */ \
564 16, 17, 26, 27, 28, 29, 30, 34, 35, \
565/* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \
566 52, 53, 54, 55, 56, 57, 58, 59, \
567/* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \
568 60, 61, 62, 63, 64, 65, 66, 67, \
569/* reserved */ \
570 36, 37, 38, 39, 40, 41, 42, 43, \
571 44, 45, 46, 47, 48, 49, 50, 51, \
572/* sp tls reserved c reserved epc */ \
573 14, 31, 32, 33, 68, 69, 70 }
574
575/* Register classes. */
576enum reg_class
577{
578 NO_REGS,
579 MINI_REGS,
580 SP_REGS,
581 LOW_REGS,
582 GENERAL_REGS,
583 C_REGS,
584 HI_REGS,
585 LO_REGS,
586 HILO_REGS,
587 V_REGS,
588 OTHER_REGS,
589 RESERVE_REGS,
590 ALL_REGS,
591 LIM_REG_CLASSES
592};
593
594#define N_REG_CLASSES (int) LIM_REG_CLASSES
595
596/* Give names of register classes as strings for dump file. */
597#define REG_CLASS_NAMES \
598{ \
599 "NO_REGS", \
600 "MINI_REGS", \
601 "SP_REGS", \
602 "LOW_REGS", \
603 "GENERAL_REGS", \
604 "C_REGS", \
605 "HI_REGS", \
606 "LO_REGS", \
607 "HILO_REGS", \
608 "V_REGS", \
609 "OTHER_REGS", \
610 "RESERVE_REGS", \
611 "ALL_REGS", \
612}
613
614/* Define which registers fit in which classes. This is an initializer
615 for a vector of HARD_REG_SET of length N_REG_CLASSES. */
616#define REG_CLASS_CONTENTS \
617{ \
618 {0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \
619 {0x000000FF, 0x00000000, 0x00000000 }, /* MINI_REGS */ \
620 {0x00004000, 0x00000000, 0x00000000 }, /* SP_REGS */ \
621 {0x0000FFFF, 0x00000000, 0x00000000 }, /* LOW_REGS */ \
622 {0xFFFFFFFF, 0x00000000, 0x00000000 }, /* GENERAL_REGS */ \
623 {0x00000000, 0x00000002, 0x00000000 }, /* C_REGS */ \
624 {0x00000000, 0x00000004, 0x00000000 }, /* HI_REG */ \
625 {0x00000000, 0x00000008, 0x00000000 }, /* LO_REG */ \
626 {0x00000000, 0x0000000c, 0x00000000 }, /* HILO_REGS */ \
627 {0x00000000, 0xFFF00000, 0x0000000F }, /* V_REGS */ \
628 {0x00000000, 0x00000000, 0x00000040 }, /* OTHER_REGS */ \
629 {0x00000000, 0x0FF00001, 0x00000030 }, /* RESERVE_REGS */ \
630 {0xFFFFFFFF, 0xFFFFFFFF, 0x0000007F }, /* ALL_REGS */ \
631}
632
633/* Return register class from regno. */
634extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
635#define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO]
636
637/* The class value for index registers, and the one for base regs. */
638#define INDEX_REG_CLASS (CSKY_ISA_FEATURE (2E3) ? GENERAL_REGS : NO_REGS)
639#define BASE_REG_CLASS GENERAL_REGS
640
641/* TODO is it necessary to set it to MINI_REGS to emit more 16-bit
642 instructions? */
643#define MODE_BASE_REG_CLASS(MODE) GENERAL_REGS
644
645/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
646 and check its validity for a certain class.
647 We have two alternate definitions for each of them.
648 The usual definition accepts all pseudo regs; the other rejects
649 them unless they have been allocated suitable hard regs.
650 The symbol REG_OK_STRICT causes the latter definition to be used.
651
652 Most source files want to accept pseudo regs in the hope that
653 they will get allocated to the class that the insn wants them to be in.
654 Source files for reload pass need to be strict.
655 After reload, it makes no difference, since pseudo regs have
656 been eliminated by then.
657
658 The reg_renumber is used to map pseudo regs into hardware
659 regs, it is set up as a result of register allocation. */
660#ifdef REG_OK_STRICT
661#define REGNO_OK_FOR_BASE_P(REGNO) \
662 (CSKY_GENERAL_REGNO_P (REGNO) \
663 || CSKY_GENERAL_REGNO_P (reg_renumber[(REGNO)]) )
664#else
665#define REGNO_OK_FOR_BASE_P(REGNO) \
666 (CSKY_GENERAL_REGNO_P (REGNO) \
667 || (REGNO) >= FIRST_PSEUDO_REGISTER)
668#endif
669
670
671#ifdef REG_OK_STRICT
672#define REGNO_OK_FOR_INDEX_P(REGNO) \
673 (CSKY_GENERAL_REGNO_P (REGNO) \
674 || CSKY_GENERAL_REGNO_P (reg_renumber[(REGNO)]) )
675#else
676#define REGNO_OK_FOR_INDEX_P(REGNO) \
677 (CSKY_GENERAL_REGNO_P (REGNO) \
678 || (REGNO) >= FIRST_PSEUDO_REGISTER)
679#endif
680
681
682/******************************************************************
683 * Addressing Modes *
684 ******************************************************************/
685
686
687/* Recognize any constant value that is a valid address. */
688#define CONSTANT_ADDRESS_P(X) \
689 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF)
690
691/* Maximum number of registers that can appear in a valid memory address.
692 Shifts in addresses can't be by a register. */
693#define MAX_REGS_PER_ADDRESS 2
694
695
696/******************************************************************
697 * Run-time Target *
698 ******************************************************************/
699
700
701#define TARGET_CPU_CPP_BUILTINS() \
702 csky_cpu_cpp_builtins (pfile)
703
704/******************************************************************
705 * Per-function Data *
706 ******************************************************************/
707
708
709/* Initialize data used by insn expanders. This is called from insn_emit,
710 once for every function before code is generated. */
711#define INIT_EXPANDERS csky_init_expanders ()
712
713
714/******************************************************************
715 * Dividing the Output into Sections (Texts, Data, . . . ) *
716 ******************************************************************/
717
718
719/* Switch to the text or data segment. */
720#define TEXT_SECTION_ASM_OP "\t.text"
721#define DATA_SECTION_ASM_OP "\t.data"
722
723/* The subroutine calls in the .init and .fini sections create literal
724 pools which must be jumped around... */
725#define FORCE_CODE_SECTION_ALIGN \
726 asm ("br 1f ; .literals ; .align 2 ; 1:");
727
728/* Define this macro to be an expression with a nonzero value if
729 jump tables (for tablejump insns) should be output in the text section,
730 along with the assembler instructions. */
731#define JUMP_TABLES_IN_TEXT_SECTION TARGET_CASESI
732
733
734/******************************************************************
735 * Assembler Format *
736 ******************************************************************/
737
738
739/* A C string constant for text to be output before(after) each asm
740 statement or group of consecutive ones. */
741#undef ASM_APP_ON
742#define ASM_APP_ON "// inline asm begin\n"
743#undef ASM_APP_OFF
744#define ASM_APP_OFF "// inline asm end\n"
745
746/* A C string constant describing how to begin a comment in the target
747 assembler language. */
748#define ASM_COMMENT_START "\t//"
749
750/* This says how to output an assembler line
751 to define a global common symbol, with alignment information. */
752#undef ASM_OUTPUT_ALIGNED_COMMON
753#define ASM_OUTPUT_ALIGNED_COMMON(STREAM, NAME, SIZE, ALIGN) \
754 do \
755 { \
756 fputs ("\t.comm\t", STREAM); \
757 assemble_name (STREAM, NAME); \
758 fprintf (STREAM, ",%lu, %u\n", (unsigned long)(SIZE), \
759 (ALIGN) / BITS_PER_UNIT); \
760 } \
761while (0)
762
763/* Define a local common symbol whose alignment we wish to specify.
764 ALIGN comes in as bits, we have to turn it into bytes. */
765#undef ASM_OUTPUT_ALIGNED_LOCAL
766#define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
767 do \
768{ \
769 fputs ("\t.bss\t", (STREAM)); \
770 assemble_name ((STREAM), (NAME)); \
771 fprintf ((STREAM), ",%d, %d\n", (int)(SIZE), \
772 (ALIGN) / BITS_PER_UNIT); \
773} \
774while (0)
775
776/* Globalizing directive for a label. */
777#define GLOBAL_ASM_OP "\t.global\t"
778
779/* Output a reference to a label. */
780#undef ASM_OUTPUT_LABELREF
781#define ASM_OUTPUT_LABELREF(STREAM, NAME) \
782 fprintf (STREAM, "%s%s", user_label_prefix, \
783 (* targetm.strip_name_encoding) (NAME))
784
785/* Make an internal label into a string. */
786#undef ASM_GENERATE_INTERNAL_LABEL
787#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
788 sprintf (STRING, "*.%s%ld", PREFIX, (long) NUM)
789
790/* This is how to output an insn to push a register on the stack.
791 It need not be very fast code. */
792#define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
793 fprintf (STREAM, "\tsubi\t %s,%d\n\tst.w\t %s,(%s)\n", \
794 reg_names[STACK_POINTER_REGNUM], \
795 (STACK_BOUNDARY / BITS_PER_UNIT), \
796 reg_names[REGNO], \
797 reg_names[STACK_POINTER_REGNUM])
798
799/* This is how to output an insn to pop a register from the stack. */
800#define ASM_OUTPUT_REG_POP(STREAM,REGNO) \
801 fprintf (STREAM, "\tld.w\t %s,(%s)\n\taddi\t %s,%d\n", \
802 reg_names[REGNO], \
803 reg_names[STACK_POINTER_REGNUM], \
804 reg_names[STACK_POINTER_REGNUM], \
805 (STACK_BOUNDARY / BITS_PER_UNIT))
806
807/* Output an element of a dispatch table. */
808#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE) \
809 fprintf (STREAM, "\t.long\t.L%d\n", VALUE)
810
811/* This is how to output an assembler line
812 that says to advance the location counter by SIZE bytes. */
813#undef ASM_OUTPUT_SKIP
814#define ASM_OUTPUT_SKIP(STREAM,SIZE) \
815 fprintf (STREAM, "\t.fill %d, 1\n", (int)(SIZE))
816
817/* Align output to a power of two. Note ".align 0" is redundant,
818 and also GAS will treat it as ".align 2" which we do not want. */
819#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
820 do \
821 { \
822 if ((POWER) > 0) \
823 fprintf (STREAM, "\t.align\t%d\n", POWER); \
824 } \
825 while (0)
826
827
828/******************************************************************
829 * Controlling the Compilation Driver *
830 ******************************************************************/
831
832
833/* Define this macro as a C expression for the initializer of an
834 array of string to tell the driver program which options are
835 defaults for this target and thus do not need to be handled
836 specially when using MULTILIB_OPTIONS. */
837#undef MULTILIB_DEFAULTS
838#define MULTILIB_DEFAULTS \
839 {"mlittle-endian", "mcpu=ck810f", "msoft-float"}
840
841/* Support for a compile-time default CPU, et cetera. The rules are:
842 --with-arch is ignored if -march or -mcpu are specified.
843 --with-cpu is ignored if -march or -mcpu are specified, and is overridden
844 by --with-arch. */
845#define OPTION_DEFAULT_SPECS \
846 {"arch", "%{!march=*:%{!mcpu=*:-march=%(VALUE)}}" }, \
847 {"cpu", "%{!march=*:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
848 {"endian", "%{!mbig-endian:%{!mlittle-endian:-m%(VALUE)-endian}}" }, \
849 {"float", "%{!msoft-float:%{!mhard-float:-m%(VALUE)-float}}" },
850
851
852/******************************************************************
853 * Position Independent Code *
854 ******************************************************************/
855
856/* Define the global table register. */
857#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? CSKY_GB_REGNUM : INVALID_REGNUM)
858
859/* Nonzero if x is a legitimate immediate operand on the target machine
860 when generating position-independent code. */
861#define LEGITIMATE_PIC_OPERAND_P(X) \
862 csky_legitimate_pic_operand_p (X)
863
864
865/******************************************************************
866 * Controlling Debugging Information Format *
867 ******************************************************************/
868
869
870/* Define this macro if GCC should produce dwarf version 2 format debugging
871 output in response to the `-g' option. */
872#define DWARF2_DEBUGGING_INFO 1
873
874/* Define this macro to 0 if your target supports DWARF 2 frame unwind
875 information, but it does not yet work with exception handling. */
876#define DWARF2_UNWIND_INFO 1
877
878/* Define this if you have arranged for GCC to support
879 more than one format of debugging output.
880 The value of this macro only affects the default debugging output. */
881#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
882
883/* Define this macro if the target’s representation
884 for dwarf registers used in .eh_frame or .debug_frame
885 is different from that used in other debug info sections.
886 Given a GCC hard register number,
887 this macro should return the .eh_frame register number.*/
888#define DWARF_FRAME_REGNUM(REG) DBX_REGISTER_NUMBER (REG)
889
890/* If INCOMING_RETURN_ADDR_RTX is defined & the RTL is REG,
891 define DWARF_FRAME_RETURN_COLUMN to DWARF_FRAME_REGNUM. */
892#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (CSKY_LR_REGNUM)
893
894/* Use r0 and r1 to pass exception handling information. */
895#define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? N : INVALID_REGNUM)
896
897/* How to renumber registers for dbx and gdb. */
898extern const int csky_dbx_regno[];
899#define DBX_REGISTER_NUMBER(REGNO) ((unsigned int) csky_dbx_regno[REGNO])
900
901
902/******************************************************************
903 * Miscellaneous Parameters *
904 ******************************************************************/
905
906
907/* Specify the machine mode that this machine uses
908 for the index in the tablejump instruction. */
909#define CASE_VECTOR_MODE SImode
910
911/* Define if operations between registers always perform the operation
912 on the full register even if a narrower mode is specified. */
913#define WORD_REGISTER_OPERATIONS 1
914
915/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
916 will either zero-extend or sign-extend. The value of this macro should
917 be the code that says which one of the two operations is implicitly
918 done, UNKNOWN if none. */
919#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
920
921/* Max number of bytes we can move from memory to memory
922 in one reasonably fast instruction. */
923#define MOVE_MAX 4
924
925/* Shift counts are truncated to 6-bits (0 to 63) instead of the expected
926 5-bits, so we can not define SHIFT_COUNT_TRUNCATED to true for this
927 target. */
928#define SHIFT_COUNT_TRUNCATED 0
929
930#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
931
932/* The machine modes of pointers and functions. */
933#define Pmode SImode
934#define FUNCTION_MODE Pmode
935
936/* Define this macro to be a C expression to indicate when jump-tables
937 should contain relative addresses. */
938#define CASE_VECTOR_PC_RELATIVE \
939 (optimize_size && TARGET_CONSTANT_POOL \
940 && (CSKY_TARGET_ARCH (CK802) || CSKY_TARGET_ARCH (CK801)))
941
942/* Return the preferred mode for an addr_diff_vec when the minimum
943 and maximum offset are known. */
944#define CASE_VECTOR_SHORTEN_MODE(min, max, body) \
945 (min >= 0 && max < 512 \
946 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 1, QImode) \
947 : min >= -256 && max < 256 \
948 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 0, QImode) \
949 : min >= 0 && max < 8192 \
950 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 1, HImode) \
951 : min >= -4096 && max < 4096 \
952 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 0, HImode) \
953 : SImode)
954
955/* This is how to output an element of a case-vector that is relative. */
956#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
957 do \
958 { \
959 if (optimize_size && TARGET_CONSTANT_POOL \
960 && (CSKY_TARGET_ARCH (CK802) || CSKY_TARGET_ARCH (CK801))) \
961 { \
962 switch (GET_MODE (BODY)) \
963 { \
964 case E_QImode: \
965 asm_fprintf (STREAM, "\t.byte\t(.L%d-.L%d)/2\n", \
966 VALUE, REL); \
967 break; \
968 case E_HImode: /* TBH */ \
969 asm_fprintf (STREAM, "\t.short\t(.L%d-.L%d)/2\n", \
970 VALUE, REL); \
971 break; \
972 case E_SImode: \
973 asm_fprintf (STREAM, "\t.long\t.L%d-.L%d\n", \
974 VALUE, REL); \
975 break; \
976 default: \
977 gcc_unreachable (); \
978 } \
979 } \
980 else \
981 asm_fprintf (STREAM, "\t.long\t.L%d@GOTOFF\n", VALUE); \
982 } while (0)
983
984/* This macro is not documented yet.
985 But we do need it to make jump table vector aligned. */
986#define ADDR_VEC_ALIGN(JUMPTABLE) 0
987
988/* We have to undef this first to override the version from elfos.h. */
989#undef ASM_OUTPUT_CASE_LABEL
990#define ASM_OUTPUT_CASE_LABEL(stream, prefix, num, table) \
991 do \
992 { \
993 if (GET_MODE (PATTERN (table)) == SImode) \
994 ASM_OUTPUT_ALIGN (stream, 2); \
995 (*targetm.asm_out.internal_label) (stream, prefix, num); \
996 } while (0)
997
998/* Make sure subsequent insns are aligned after a byte-sized jump offset
999 table. */
1000#define ASM_OUTPUT_CASE_END(stream, num, table) \
1001 do \
1002 { \
1003 if (GET_MODE (PATTERN (table)) == QImode) \
1004 ASM_OUTPUT_ALIGN (stream, 1); \
1005 } while (0)
1006
1007
1008
1009
1010/******************************************************************
1011 * Trampolines for Nested Functions *
1012 ******************************************************************/
1013
1014
1015/* Length in units of the trampoline for entering a nested function. */
1016#define TRAMPOLINE_SIZE (CSKY_ISA_FEATURE (2E3) ? 16 : 20)
1017
1018/* Alignment required for a trampoline in bits. */
1019#define TRAMPOLINE_ALIGNMENT 32
1020
1021
1022/******************************************************************
1023 * Describing Relative Costs of Operations *
1024 ******************************************************************/
1025
1026
1027/* Nonzero if access to memory by bytes is slow and undesirable.
1028 For RISC chips, it means that access to memory by bytes is no
1029 better than access by words when possible, so grab a whole word
1030 and maybe make use of that. */
1031#define SLOW_BYTE_ACCESS 0
1032
1033/* On C-SKY, function CSE would allow use of 16-bit jsr instructions
1034 instead of normal 32-bit calls. But it also needs a separate constant
1035 pool entry for the function address and an instruction to load it, and
1036 may cause additional spills due to increased register pressure, etc.
1037 It doesn't seem like a good idea overall. */
1038#define NO_FUNCTION_CSE 1
1039
1040/* Try to generate sequences that don't involve branches, we can then use
1041 conditional instructions. */
1042#define BRANCH_COST(speed_p, predictable_p) \
1043 csky_default_branch_cost (speed_p, predictable_p)
1044
1045/* False if short circuit operation is preferred. */
1046#define LOGICAL_OP_NON_SHORT_CIRCUIT \
1047 (csky_default_logical_op_non_short_circuit ())
1048
1049
1050/******************************************************************
1051 * Generating Code for Profiling *
1052 ******************************************************************/
1053
1054
1055#define FUNCTION_PROFILER(FILE, LABELNO)
1056
1057#endif /* GCC_CSKY_H */
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