[thirdparty/gcc.git] / gcc / config / csky / csky_insn_fpu.md

;; C-SKY FPU instruction descriptions.
;; Copyright (C) 2018-2024 Free Software Foundation, Inc.
;; Contributed by C-SKY Microsystems and Mentor Graphics.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful, but
;; WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
;; General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3.  If not see
;; <http://www.gnu.org/licenses/>.  */

(define_c_enum "unspec" [
  UNSPEC_FLOOR
  UNSPEC_CEIL
  UNSPEC_BTRUNC
  UNSPEC_RINT
])

(define_c_enum "unspecv" [
  VUNSPEC_GET_FCR     ; Represent fetch of FCR content.
  VUNSPEC_SET_FCR     ; Represent assign of FCR content.
  VUNSPEC_INS_FCR     ; Represent insert of FCR content.
])

(define_mode_iterator F3ANY [HF SF DF])
(define_mode_attr f3t [(HF "16") (SF "32") (DF "64")])

(define_mode_iterator SFDF [SF DF])
(define_mode_attr f2t [(SF "32") (DF "64")])

(define_code_iterator FCMPZ [ne ge lt gt le])
(define_code_attr zero_inst [(ne "nez") (ge "hsz") (lt "ltz") (gt "hz") (le "lsz")])

(define_code_iterator FCMP [ne ge lt])
(define_code_attr reg_inst [(ne "ne") (ge "hs") (lt "lt")])

(define_code_iterator FIX_SU [fix unsigned_fix])
(define_code_attr fixsuop [(fix "")  (unsigned_fix "uns")])
(define_code_attr fixsu   [(fix "s") (unsigned_fix "u")])

(define_code_iterator FLOAT_SU [float unsigned_float])
(define_code_attr floatsuop [(float "")  (unsigned_float "uns")])
(define_code_attr floatsu   [(float "s") (unsigned_float "u")])

(define_int_iterator FRM  [UNSPEC_FLOOR
			   UNSPEC_CEIL UNSPEC_RINT])

(define_int_iterator FRMF [UNSPEC_FLOOR
			   UNSPEC_CEIL UNSPEC_BTRUNC])

(define_int_attr frm_pattern [(UNSPEC_FLOOR "floor")
			      (UNSPEC_CEIL "ceil")   (UNSPEC_BTRUNC "btrunc")
			      (UNSPEC_RINT "rint")])

(define_int_attr rm [(UNSPEC_FLOOR ".rni")
		     (UNSPEC_CEIL ".rpi")  (UNSPEC_BTRUNC ".rz")
		     (UNSPEC_RINT "")])


;; -------------------------------------------------------------------------
;; Float mov instructions
;; -------------------------------------------------------------------------

(define_expand "movhf"
  [(set (match_operand:HF 0 "general_operand" "")
	(match_operand:HF 1 "general_operand" ""))]
  "CSKY_ISA_FEATURE(fpv3_hf)"
  "
  {
    if (GET_CODE(operands[0]) == MEM && can_create_pseudo_p ())
      {
	operands[1] = force_reg (HFmode, operands[1]);
      }
  }
")

(define_expand "mov<mode>"
  [(set (match_operand:SFDF 0 "general_operand" "")
	(match_operand:SFDF 1 "general_operand" ""))]
  "CSKY_ISA_FEATURE(fpv2_<mode>)
   || CSKY_ISA_FEATURE(fpv3_<mode>)"
  "
  {
    if (GET_CODE(operands[0]) == MEM && can_create_pseudo_p ())
      {
	operands[1] = force_reg (<MODE>mode, operands[1]);
      }
  }
")

;; Move float value with general register.

(define_insn "*e2_movsf"
  [(set (match_operand:SF 0 "nonimmediate_operand" "=b,r,r,r, m")
       (match_operand:SF 1 "general_operand"      " b,r,m,mF,r"))]
  "CSKY_ISA_FEATURE (E2)
   && !CSKY_ISA_FEATURE (fpv2_sf)
   && !CSKY_ISA_FEATURE (fpv3_sf)"
  "* return csky_output_move (insn, operands, SFmode);"
 [(set_attr "length" "2,4,4,4,4")
  (set_attr "type" "alu,alu,load,load,store")]
)

(define_insn "*e2_movdf"
  [(set (match_operand:DF 0 "nonimmediate_operand" "=b,r,r,r, m")
       (match_operand:DF 1 "general_operand"      " b,r,m,mF,r"))]
  "CSKY_ISA_FEATURE (E2)
   && !CSKY_ISA_FEATURE (fpv2_df)
   && !CSKY_ISA_FEATURE (fpv3_df)"
  "* return csky_output_movedouble (operands, DFmode);"
 [(set_attr "length" "4,8,8,8,8")
  (set_attr "type" "alu,alu,load,load,store")]
)

(define_insn "*e1_movsf"
  [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,r, m")
	(match_operand:SF 1 "general_operand"      " r,m,mF,r"))]
  "CSKY_ISA_FEATURE (E1)"
  "* return csky_output_ck801_move (insn, operands, SFmode);"
  [(set_attr "length" "2,4,4,4")
   (set_attr "type" "alu,load,load,store")]
)

(define_insn "*e1_movdf"
  [(set (match_operand:DF 0 "nonimmediate_operand" "=r,r,r, m")
	(match_operand:DF 1 "general_operand"      " r,m,mF,r"))]
  "CSKY_ISA_FEATURE (E1)"
  "* return csky_output_ck801_movedouble (operands, DFmode);"
  [(set_attr "length" "4,8,8,8")
   (set_attr "type" "alu,load,load,store")]
)

;; -------------------------------------------------------------------------
;; Float Mul instructions
;; -------------------------------------------------------------------------

(define_expand "mulhf3"
  [(set (match_operand:HF	    0 "register_operand" "=v")
	(mult:HF (match_operand:HF   1 "register_operand" "v")
		 (match_operand:HF   2 "register_operand" "v")))]
  "CSKY_ISA_FEATURE(fpv3_hf)"
  "")

(define_expand "mul<mode>3"
  [(set (match_operand:SFDF	    0 "register_operand" "=v")
	(mult:SFDF (match_operand:SFDF   1 "register_operand" "v")
		 (match_operand:SFDF   2 "register_operand" "v")))]
  "CSKY_ISA_FEATURE(fpv2_<mode>)
  || CSKY_ISA_FEATURE(fpv3_<mode>)"
  "")

(define_expand "fma<mode>4"
  [(set (match_operand:F3ANY	    0 "register_operand" "=v")
	(fma:F3ANY (match_operand:F3ANY  1 "register_operand" "v")
		   (match_operand:F3ANY  2 "register_operand" "v")
		   (match_operand:F3ANY  3 "register_operand" "0")))]
  "CSKY_ISA_FEATURE(fpv3_<mode>)"
  "")

;; -------------------------------------------------------------------------
;; Float ADD SUB NEG ABS instructions
;; -------------------------------------------------------------------------

(define_expand "addhf3"
  [(set (match_operand:HF	   0 "register_operand" "")
	(plus:HF (match_operand:HF  1 "register_operand" "")
		 (match_operand:HF  2 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv3_hf)"
  ""
)

(define_expand "add<mode>3"
  [(set (match_operand:SFDF	     0 "register_operand" "")
	(plus:SFDF (match_operand:SFDF  1 "register_operand" "")
		   (match_operand:SFDF  2 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv2_<mode>) || CSKY_ISA_FEATURE(fpv3_<mode>)"
  ""
)

(define_expand "subhf3"
  [(set (match_operand:HF	    0 "register_operand" "")
	(minus:HF (match_operand:HF  1 "register_operand" "")
		  (match_operand:HF  2 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv3_hf)"
  ""
)

(define_expand "sub<mode>3"
  [(set (match_operand:SFDF	      0 "register_operand" "")
	(minus:SFDF (match_operand:SFDF  1 "register_operand" "")
		    (match_operand:SFDF  2 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv2_<mode>) || CSKY_ISA_FEATURE(fpv3_<mode>)"
  ""
)

(define_expand "abshf2"
  [(set (match_operand:HF	   0 "register_operand" "")
	(abs:HF (match_operand:HF   1 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv3_hf)"
  ""
)

(define_expand "abs<mode>2"
  [(set (match_operand:SFDF	     0 "register_operand" "")
	(abs:SFDF (match_operand:SFDF   1 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv2_<mode>) || CSKY_ISA_FEATURE(fpv3_<mode>)"
  ""
)

(define_expand "neghf2"
  [(set (match_operand:HF	   0 "register_operand" "")
	(neg:HF (match_operand:HF   1 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv3_hf)"
  ""
)

(define_expand "neg<mode>2"
  [(set (match_operand:SFDF	   0 "register_operand" "")
	(neg:SFDF (match_operand:SFDF 1 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv2_<mode>) || CSKY_ISA_FEATURE(fpv3_<mode>)"
  ""
)

(define_expand "sqrthf2"
  [(set (match_operand:HF	   0 "register_operand" "")
	(sqrt:HF (match_operand:HF  1 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv3_hf)"
  ""
)

(define_expand "sqrt<mode>2"
  [(set (match_operand:SFDF	    0 "register_operand" "")
	(sqrt:SFDF (match_operand:SFDF 1 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv2_<mode>) || CSKY_ISA_FEATURE(fpv3_<mode>)"
  ""
)

;; -------------------------------------------------------------------------
;; Float div instructions
;; -------------------------------------------------------------------------

(define_expand "div<mode>3"
  [(set (match_operand:SFDF	   0 "register_operand" "")
	(div:SFDF (match_operand:SFDF 1 "csky_arith_float1_operand" "")
		  (match_operand:SFDF 2 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv2_<mode>) || CSKY_ISA_FEATURE(fpv3_<mode>)"
  "")

(define_expand "divhf3"
 [(set (match_operand:HF 0 "register_operand" "")
       (div:HF (match_operand:HF 1 "csky_arith_float1_operand" "")
	       (match_operand:HF 2 "register_operand" "")))]
 "CSKY_ISA_FEATURE(fpv3_hf)"
 "")

;; -------------------------------------------------------------------------
;; Float compare instructions
;; -------------------------------------------------------------------------

(define_expand "cbranch<mode>4"
  [(set (pc) (if_then_else (match_operator 0 "csky_float_comparison_operator"
			    [(match_operand:SFDF 1 "register_operand")
			     (match_operand:SFDF 2 "csky_compare_operand_float")])
			   (label_ref (match_operand 3 ""))
			   (pc)))]
"CSKY_ISA_FEATURE(fpv2_<mode>) || CSKY_ISA_FEATURE(fpv3_<mode>)"
"{
  enum rtx_code code = GET_CODE (operands[0]);
  bool invert;

  invert = csky_emit_compare_float (code, operands[1], operands[2]);

  if (invert)
    emit_jump_insn (gen_csky_jbf (operands[3]));
  else
    emit_jump_insn (gen_csky_jbt (operands[3]));

  DONE;

}")

(define_expand "cbranchhf4"
  [(set (pc) (if_then_else (match_operator 0 "csky_float_comparison_operator"
			    [(match_operand:HF 1 "register_operand")
			     (match_operand:HF 2 "csky_compare_operand_float")])
			   (label_ref (match_operand 3 ""))
			   (pc)))]
"CSKY_ISA_FEATURE(fpv3_hf)"
"{
  enum rtx_code code = GET_CODE (operands[0]);
  bool invert;

  invert = csky_emit_compare_float (code, operands[1], operands[2]);

  if (invert)
    emit_jump_insn (gen_csky_jbf (operands[3]));
  else
    emit_jump_insn (gen_csky_jbt (operands[3]));

  DONE;

}")

;; -------------------------------------------------------------------------
;; Instructions for float cstore
;; -------------------------------------------------------------------------

(define_expand "cstore<mode>4"
  [(set (match_operand:SI 0 "register_operand" "")
	(match_operator   1 "csky_float_comparison_operator"
	  [(match_operand:SFDF 2 "register_operand" "")
	   (match_operand:SFDF 3 "csky_compare_operand_float" "")]))]
  "CSKY_ISA_FEATURE (fpv2_<mode>) || CSKY_ISA_FEATURE(fpv3_<mode>)"
  "{
    bool invert;

    invert = csky_emit_compare_float (GET_CODE (operands[1]),
				 operands[2], operands[3]);
    if(invert)
      emit_insn (gen_mvcv (operands[0]));
    else
      emit_insn (gen_mvc (operands[0]));
    DONE;
  }"
)

(define_expand "cstorehf4"
  [(set (match_operand:SI 0 "register_operand" "")
	(match_operator   1 "csky_float_comparison_operator"
	  [(match_operand:HF 2 "register_operand" "")
	   (match_operand:HF 3 "csky_compare_operand_float" "")]))]
  "CSKY_ISA_FEATURE(fpv3_hf)"
  "{
    bool invert;

    invert = csky_emit_compare_float (GET_CODE (operands[1]),
				 operands[2], operands[3]);
    if(invert)
      emit_insn (gen_mvcv (operands[0]));
    else
      emit_insn (gen_mvc (operands[0]));
    DONE;
  }"
)

;; -------------------------------------------------------------------------
;; Float convert instructions
;; -------------------------------------------------------------------------

;; SF <- HF
(define_expand "extendhfsf2"
  [(set (match_operand:SF		  0 "register_operand" "")
	(float_extend:SF (match_operand:HF 1 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv3_hf)"
  "")

;; HF <- SF
(define_expand "truncsfhf2"
  [(set (match_operand:HF		     0 "register_operand" "")
	(float_truncate:HF (match_operand:SF 1 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv3_hf)"
  "")

;; DF <- SF
(define_expand "extendsfdf2"
  [(set (match_operand:DF		  0 "register_operand" "")
	(float_extend:DF (match_operand:SF 1 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv2_df) || CSKY_ISA_FEATURE(fpv3_df)"
  "")

;; SF <- DF
(define_expand "truncdfsf2"
  [(set (match_operand:SF		    0 "register_operand" "")
	(float_truncate:SF (match_operand:DF 1 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv2_df) || CSKY_ISA_FEATURE(fpv3_df)"
  "")

;; HF <- unsigned SI,SI
(define_expand "float<floatsuop>sihf2"
  [(set (match_operand:HF	   0 "register_operand" "")
	(FLOAT_SU:HF (match_operand:SI 1 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv3_hf)"
  "")

;; DF,SF <- unsigned SI,SI
(define_expand "float<floatsuop>si<mode>2"
  [(set (match_operand:SFDF		    0 "register_operand" "")
	(FLOAT_SU:SFDF (match_operand:SI 1 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv2_<mode>) || CSKY_ISA_FEATURE(fpv3_<mode>)"
  "")

;; HF <- unsigned HI,HI
(define_expand "float<floatsuop>hihf2"
  [(set (match_operand:HF	   0 "register_operand" "")
	(FLOAT_SU:HF (match_operand:HI 1 "register_operand" "")))]
  "CSKY_ISA_FEATURE(fpv3_hi) && CSKY_ISA_FEATURE(fpv3_hf)"
  "")

;; unsigned SI,SI <- HF
(define_expand "fix<fixsuop>_trunchfsi2"
  [(set (match_operand:SI	    0 "register_operand" "")
	(FIX_SU:SI (fix:HF (match_operand:HF 1 "register_operand" ""))))]
  "CSKY_ISA_FEATURE(fpv3_hf)"
  "")

;; unsigned SI,SI <- DF,SF
(define_expand "fix<fixsuop>_trunc<mode>si2"
  [(set (match_operand:SI	    0 "register_operand" "")
	(FIX_SU:SI (fix:SFDF (match_operand:SFDF 1 "register_operand" ""))))]
  "CSKY_ISA_FEATURE(fpv2_<mode>) || CSKY_ISA_FEATURE(fpv3_<mode>)"
  "")

(include "csky_insn_fpuv3.md")
(include "csky_insn_fpuv2.md")
Commit	Line	Data
cc7232b9	1	;; C-SKY FPU instruction descriptions.
a945c346	2	;; Copyright (C) 2018-2024 Free Software Foundation, Inc.
cc7232b9 J	3	;; Contributed by C-SKY Microsystems and Mentor Graphics.
	4	;;
	5	;; This file is part of GCC.
	6	;;
	7	;; GCC is free software; you can redistribute it and/or modify it
	8	;; under the terms of the GNU General Public License as published by
	9	;; the Free Software Foundation; either version 3, or (at your option)
	10	;; any later version.
	11	;;
	12	;; GCC is distributed in the hope that it will be useful, but
	13	;; WITHOUT ANY WARRANTY; without even the implied warranty of
	14	;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	;; General Public License for more details.
	16	;;
	17	;; You should have received a copy of the GNU General Public License
	18	;; along with GCC; see the file COPYING3. If not see
	19	;; <http://www.gnu.org/licenses/>. */
	20
db92bd22 GQ	21	(define_c_enum "unspec" [
	22	UNSPEC_FLOOR
	23	UNSPEC_CEIL
	24	UNSPEC_BTRUNC
	25	UNSPEC_RINT
	26	])
cc7232b9	27
db92bd22 GQ	28	(define_c_enum "unspecv" [
	29	VUNSPEC_GET_FCR ; Represent fetch of FCR content.
	30	VUNSPEC_SET_FCR ; Represent assign of FCR content.
	31	VUNSPEC_INS_FCR ; Represent insert of FCR content.
	32	])
cc7232b9	33
db92bd22 GQ	34	(define_mode_iterator F3ANY [HF SF DF])
db92bd22 GQ	35	(define_mode_attr f3t [(HF "16") (SF "32") (DF "64")])
cc7232b9	36
db92bd22 GQ	37	(define_mode_iterator SFDF [SF DF])
db92bd22 GQ	38	(define_mode_attr f2t [(SF "32") (DF "64")])
cc7232b9	39
db92bd22 GQ	40	(define_code_iterator FCMPZ [ne ge lt gt le])
db92bd22 GQ	41	(define_code_attr zero_inst [(ne "nez") (ge "hsz") (lt "ltz") (gt "hz") (le "lsz")])
cc7232b9	42
db92bd22 GQ	43	(define_code_iterator FCMP [ne ge lt])
db92bd22 GQ	44	(define_code_attr reg_inst [(ne "ne") (ge "hs") (lt "lt")])
cc7232b9	45
db92bd22 GQ	46	(define_code_iterator FIX_SU [fix unsigned_fix])
	47	(define_code_attr fixsuop [(fix "") (unsigned_fix "uns")])
	48	(define_code_attr fixsu [(fix "s") (unsigned_fix "u")])
cc7232b9	49
db92bd22 GQ	50	(define_code_iterator FLOAT_SU [float unsigned_float])
	51	(define_code_attr floatsuop [(float "") (unsigned_float "uns")])
	52	(define_code_attr floatsu [(float "s") (unsigned_float "u")])
cc7232b9	53
db92bd22 GQ	54	(define_int_iterator FRM [UNSPEC_FLOOR
db92bd22 GQ	55	UNSPEC_CEIL UNSPEC_RINT])
cc7232b9	56
db92bd22 GQ	57	(define_int_iterator FRMF [UNSPEC_FLOOR
db92bd22 GQ	58	UNSPEC_CEIL UNSPEC_BTRUNC])
cc7232b9	59
db92bd22 GQ	60	(define_int_attr frm_pattern [(UNSPEC_FLOOR "floor")
	61	(UNSPEC_CEIL "ceil") (UNSPEC_BTRUNC "btrunc")
	62	(UNSPEC_RINT "rint")])
	63
	64	(define_int_attr rm [(UNSPEC_FLOOR ".rni")
	65	(UNSPEC_CEIL ".rpi") (UNSPEC_BTRUNC ".rz")
	66	(UNSPEC_RINT "")])
cc7232b9 J	67
	68
	69	;; -------------------------------------------------------------------------
db92bd22	70	;; Float mov instructions
cc7232b9 J	71	;; -------------------------------------------------------------------------
cc7232b9 J	72
db92bd22 GQ	73	(define_expand "movhf"
	74	[(set (match_operand:HF 0 "general_operand" "")
	75	(match_operand:HF 1 "general_operand" ""))]
	76	"CSKY_ISA_FEATURE(fpv3_hf)"
	77	"
	78	{
	79	if (GET_CODE(operands[0]) == MEM && can_create_pseudo_p ())
	80	{
	81	operands[1] = force_reg (HFmode, operands[1]);
	82	}
	83	}
	84	")
	85
	86	(define_expand "mov<mode>"
	87	[(set (match_operand:SFDF 0 "general_operand" "")
	88	(match_operand:SFDF 1 "general_operand" ""))]
	89	"CSKY_ISA_FEATURE(fpv2_<mode>)
	90	\|\| CSKY_ISA_FEATURE(fpv3_<mode>)"
	91	"
	92	{
	93	if (GET_CODE(operands[0]) == MEM && can_create_pseudo_p ())
	94	{
	95	operands[1] = force_reg (<MODE>mode, operands[1]);
	96	}
	97	}
	98	")
	99
	100	;; Move float value with general register.
	101
	102	(define_insn "*e2_movsf"
	103	[(set (match_operand:SF 0 "nonimmediate_operand" "=b,r,r,r, m")
	104	(match_operand:SF 1 "general_operand" " b,r,m,mF,r"))]
	105	"CSKY_ISA_FEATURE (E2)
	106	&& !CSKY_ISA_FEATURE (fpv2_sf)
	107	&& !CSKY_ISA_FEATURE (fpv3_sf)"
	108	"* return csky_output_move (insn, operands, SFmode);"
	109	[(set_attr "length" "2,4,4,4,4")
	110	(set_attr "type" "alu,alu,load,load,store")]
	111	)
	112
	113	(define_insn "*e2_movdf"
	114	[(set (match_operand:DF 0 "nonimmediate_operand" "=b,r,r,r, m")
	115	(match_operand:DF 1 "general_operand" " b,r,m,mF,r"))]
	116	"CSKY_ISA_FEATURE (E2)
	117	&& !CSKY_ISA_FEATURE (fpv2_df)
	118	&& !CSKY_ISA_FEATURE (fpv3_df)"
	119	"* return csky_output_movedouble (operands, DFmode);"
	120	[(set_attr "length" "4,8,8,8,8")
	121	(set_attr "type" "alu,alu,load,load,store")]
	122	)
cc7232b9	123
db92bd22 GQ	124	(define_insn "*e1_movsf"
	125	[(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,r, m")
	126	(match_operand:SF 1 "general_operand" " r,m,mF,r"))]
	127	"CSKY_ISA_FEATURE (E1)"
	128	"* return csky_output_ck801_move (insn, operands, SFmode);"
	129	[(set_attr "length" "2,4,4,4")
	130	(set_attr "type" "alu,load,load,store")]
	131	)
cc7232b9	132
db92bd22 GQ	133	(define_insn "*e1_movdf"
	134	[(set (match_operand:DF 0 "nonimmediate_operand" "=r,r,r, m")
	135	(match_operand:DF 1 "general_operand" " r,m,mF,r"))]
	136	"CSKY_ISA_FEATURE (E1)"
	137	"* return csky_output_ck801_movedouble (operands, DFmode);"
	138	[(set_attr "length" "4,8,8,8")
	139	(set_attr "type" "alu,load,load,store")]
	140	)
cc7232b9 J	141
cc7232b9 J	142	;; -------------------------------------------------------------------------
db92bd22	143	;; Float Mul instructions
cc7232b9 J	144	;; -------------------------------------------------------------------------
cc7232b9 J	145
db92bd22 GQ	146	(define_expand "mulhf3"
	147	[(set (match_operand:HF 0 "register_operand" "=v")
	148	(mult:HF (match_operand:HF 1 "register_operand" "v")
	149	(match_operand:HF 2 "register_operand" "v")))]
	150	"CSKY_ISA_FEATURE(fpv3_hf)"
	151	"")
cc7232b9	152
db92bd22 GQ	153	(define_expand "mul<mode>3"
	154	[(set (match_operand:SFDF 0 "register_operand" "=v")
	155	(mult:SFDF (match_operand:SFDF 1 "register_operand" "v")
	156	(match_operand:SFDF 2 "register_operand" "v")))]
	157	"CSKY_ISA_FEATURE(fpv2_<mode>)
	158	\|\| CSKY_ISA_FEATURE(fpv3_<mode>)"
	159	"")
cc7232b9	160
db92bd22 GQ	161	(define_expand "fma<mode>4"
	162	[(set (match_operand:F3ANY 0 "register_operand" "=v")
	163	(fma:F3ANY (match_operand:F3ANY 1 "register_operand" "v")
	164	(match_operand:F3ANY 2 "register_operand" "v")
	165	(match_operand:F3ANY 3 "register_operand" "0")))]
	166	"CSKY_ISA_FEATURE(fpv3_<mode>)"
	167	"")
cc7232b9 J	168
cc7232b9 J	169	;; -------------------------------------------------------------------------
db92bd22	170	;; Float ADD SUB NEG ABS instructions
cc7232b9 J	171	;; -------------------------------------------------------------------------
cc7232b9 J	172
db92bd22 GQ	173	(define_expand "addhf3"
	174	[(set (match_operand:HF 0 "register_operand" "")
	175	(plus:HF (match_operand:HF 1 "register_operand" "")
	176	(match_operand:HF 2 "register_operand" "")))]
	177	"CSKY_ISA_FEATURE(fpv3_hf)"
	178	""
	179	)
	180
	181	(define_expand "add<mode>3"
	182	[(set (match_operand:SFDF 0 "register_operand" "")
	183	(plus:SFDF (match_operand:SFDF 1 "register_operand" "")
	184	(match_operand:SFDF 2 "register_operand" "")))]
	185	"CSKY_ISA_FEATURE(fpv2_<mode>) \|\| CSKY_ISA_FEATURE(fpv3_<mode>)"
	186	""
	187	)
cc7232b9	188
db92bd22 GQ	189	(define_expand "subhf3"
	190	[(set (match_operand:HF 0 "register_operand" "")
	191	(minus:HF (match_operand:HF 1 "register_operand" "")
	192	(match_operand:HF 2 "register_operand" "")))]
	193	"CSKY_ISA_FEATURE(fpv3_hf)"
	194	""
	195	)
cc7232b9	196
db92bd22 GQ	197	(define_expand "sub<mode>3"
	198	[(set (match_operand:SFDF 0 "register_operand" "")
	199	(minus:SFDF (match_operand:SFDF 1 "register_operand" "")
	200	(match_operand:SFDF 2 "register_operand" "")))]
	201	"CSKY_ISA_FEATURE(fpv2_<mode>) \|\| CSKY_ISA_FEATURE(fpv3_<mode>)"
	202	""
	203	)
cc7232b9	204
db92bd22 GQ	205	(define_expand "abshf2"
	206	[(set (match_operand:HF 0 "register_operand" "")
	207	(abs:HF (match_operand:HF 1 "register_operand" "")))]
	208	"CSKY_ISA_FEATURE(fpv3_hf)"
	209	""
	210	)
cc7232b9	211
db92bd22 GQ	212	(define_expand "abs<mode>2"
	213	[(set (match_operand:SFDF 0 "register_operand" "")
	214	(abs:SFDF (match_operand:SFDF 1 "register_operand" "")))]
	215	"CSKY_ISA_FEATURE(fpv2_<mode>) \|\| CSKY_ISA_FEATURE(fpv3_<mode>)"
	216	""
	217	)
cc7232b9	218
db92bd22 GQ	219	(define_expand "neghf2"
	220	[(set (match_operand:HF 0 "register_operand" "")
	221	(neg:HF (match_operand:HF 1 "register_operand" "")))]
	222	"CSKY_ISA_FEATURE(fpv3_hf)"
	223	""
	224	)
cc7232b9	225
db92bd22 GQ	226	(define_expand "neg<mode>2"
	227	[(set (match_operand:SFDF 0 "register_operand" "")
	228	(neg:SFDF (match_operand:SFDF 1 "register_operand" "")))]
	229	"CSKY_ISA_FEATURE(fpv2_<mode>) \|\| CSKY_ISA_FEATURE(fpv3_<mode>)"
	230	""
	231	)
cc7232b9	232
db92bd22 GQ	233	(define_expand "sqrthf2"
	234	[(set (match_operand:HF 0 "register_operand" "")
	235	(sqrt:HF (match_operand:HF 1 "register_operand" "")))]
	236	"CSKY_ISA_FEATURE(fpv3_hf)"
	237	""
	238	)
	239
	240	(define_expand "sqrt<mode>2"
	241	[(set (match_operand:SFDF 0 "register_operand" "")
	242	(sqrt:SFDF (match_operand:SFDF 1 "register_operand" "")))]
	243	"CSKY_ISA_FEATURE(fpv2_<mode>) \|\| CSKY_ISA_FEATURE(fpv3_<mode>)"
	244	""
	245	)
cc7232b9 J	246
cc7232b9 J	247	;; -------------------------------------------------------------------------
db92bd22	248	;; Float div instructions
cc7232b9 J	249	;; -------------------------------------------------------------------------
cc7232b9 J	250
db92bd22 GQ	251	(define_expand "div<mode>3"
	252	[(set (match_operand:SFDF 0 "register_operand" "")
	253	(div:SFDF (match_operand:SFDF 1 "csky_arith_float1_operand" "")
	254	(match_operand:SFDF 2 "register_operand" "")))]
	255	"CSKY_ISA_FEATURE(fpv2_<mode>) \|\| CSKY_ISA_FEATURE(fpv3_<mode>)"
	256	"")
cc7232b9	257
db92bd22 GQ	258	(define_expand "divhf3"
	259	[(set (match_operand:HF 0 "register_operand" "")
	260	(div:HF (match_operand:HF 1 "csky_arith_float1_operand" "")
	261	(match_operand:HF 2 "register_operand" "")))]
	262	"CSKY_ISA_FEATURE(fpv3_hf)"
	263	"")
cc7232b9 J	264
	265	;; -------------------------------------------------------------------------
	266	;; Float compare instructions
	267	;; -------------------------------------------------------------------------
	268
db92bd22	269	(define_expand "cbranch<mode>4"
cc7232b9	270	[(set (pc) (if_then_else (match_operator 0 "csky_float_comparison_operator"
db92bd22 GQ	271	[(match_operand:SFDF 1 "register_operand")
db92bd22 GQ	272	(match_operand:SFDF 2 "csky_compare_operand_float")])
cc7232b9 J	273	(label_ref (match_operand 3 ""))
cc7232b9 J	274	(pc)))]
db92bd22 GQ	275	"CSKY_ISA_FEATURE(fpv2_<mode>) \|\| CSKY_ISA_FEATURE(fpv3_<mode>)"
	276	"{
	277	enum rtx_code code = GET_CODE (operands[0]);
	278	bool invert;
cc7232b9	279
db92bd22	280	invert = csky_emit_compare_float (code, operands[1], operands[2]);
cc7232b9	281
db92bd22 GQ	282	if (invert)
	283	emit_jump_insn (gen_csky_jbf (operands[3]));
	284	else
	285	emit_jump_insn (gen_csky_jbt (operands[3]));
cc7232b9	286
db92bd22	287	DONE;
cc7232b9	288
cc7232b9 J	289	}")
cc7232b9 J	290
db92bd22 GQ	291	(define_expand "cbranchhf4"
	292	[(set (pc) (if_then_else (match_operator 0 "csky_float_comparison_operator"
	293	[(match_operand:HF 1 "register_operand")
	294	(match_operand:HF 2 "csky_compare_operand_float")])
	295	(label_ref (match_operand 3 ""))
	296	(pc)))]
	297	"CSKY_ISA_FEATURE(fpv3_hf)"
	298	"{
	299	enum rtx_code code = GET_CODE (operands[0]);
	300	bool invert;
cc7232b9	301
db92bd22	302	invert = csky_emit_compare_float (code, operands[1], operands[2]);
cc7232b9	303
db92bd22 GQ	304	if (invert)
	305	emit_jump_insn (gen_csky_jbf (operands[3]));
	306	else
	307	emit_jump_insn (gen_csky_jbt (operands[3]));
cc7232b9	308
db92bd22	309	DONE;
cc7232b9	310
db92bd22	311	}")
cc7232b9 J	312
cc7232b9 J	313	;; -------------------------------------------------------------------------
db92bd22	314	;; Instructions for float cstore
cc7232b9 J	315	;; -------------------------------------------------------------------------
cc7232b9 J	316
db92bd22	317	(define_expand "cstore<mode>4"
cc7232b9	318	[(set (match_operand:SI 0 "register_operand" "")
db92bd22 GQ	319	(match_operator 1 "csky_float_comparison_operator"
	320	[(match_operand:SFDF 2 "register_operand" "")
	321	(match_operand:SFDF 3 "csky_compare_operand_float" "")]))]
	322	"CSKY_ISA_FEATURE (fpv2_<mode>) \|\| CSKY_ISA_FEATURE(fpv3_<mode>)"
	323	"{
	324	bool invert;
	325
	326	invert = csky_emit_compare_float (GET_CODE (operands[1]),
	327	operands[2], operands[3]);
	328	if(invert)
cc7232b9 J	329	emit_insn (gen_mvcv (operands[0]));
	330	else
	331	emit_insn (gen_mvc (operands[0]));
	332	DONE;
	333	}"
	334	)
	335
db92bd22	336	(define_expand "cstorehf4"
cc7232b9	337	[(set (match_operand:SI 0 "register_operand" "")
db92bd22 GQ	338	(match_operator 1 "csky_float_comparison_operator"
	339	[(match_operand:HF 2 "register_operand" "")
	340	(match_operand:HF 3 "csky_compare_operand_float" "")]))]
	341	"CSKY_ISA_FEATURE(fpv3_hf)"
	342	"{
	343	bool invert;
	344
	345	invert = csky_emit_compare_float (GET_CODE (operands[1]),
	346	operands[2], operands[3]);
	347	if(invert)
cc7232b9 J	348	emit_insn (gen_mvcv (operands[0]));
	349	else
	350	emit_insn (gen_mvc (operands[0]));
	351	DONE;
	352	}"
	353	)
db92bd22 GQ	354
	355	;; -------------------------------------------------------------------------
	356	;; Float convert instructions
	357	;; -------------------------------------------------------------------------
	358
	359	;; SF <- HF
	360	(define_expand "extendhfsf2"
	361	[(set (match_operand:SF 0 "register_operand" "")
	362	(float_extend:SF (match_operand:HF 1 "register_operand" "")))]
	363	"CSKY_ISA_FEATURE(fpv3_hf)"
	364	"")
	365
	366	;; HF <- SF
	367	(define_expand "truncsfhf2"
	368	[(set (match_operand:HF 0 "register_operand" "")
	369	(float_truncate:HF (match_operand:SF 1 "register_operand" "")))]
	370	"CSKY_ISA_FEATURE(fpv3_hf)"
	371	"")
	372
	373	;; DF <- SF
	374	(define_expand "extendsfdf2"
	375	[(set (match_operand:DF 0 "register_operand" "")
	376	(float_extend:DF (match_operand:SF 1 "register_operand" "")))]
	377	"CSKY_ISA_FEATURE(fpv2_df) \|\| CSKY_ISA_FEATURE(fpv3_df)"
	378	"")
	379
	380	;; SF <- DF
	381	(define_expand "truncdfsf2"
	382	[(set (match_operand:SF 0 "register_operand" "")
	383	(float_truncate:SF (match_operand:DF 1 "register_operand" "")))]
	384	"CSKY_ISA_FEATURE(fpv2_df) \|\| CSKY_ISA_FEATURE(fpv3_df)"
	385	"")
	386
	387	;; HF <- unsigned SI,SI
	388	(define_expand "float<floatsuop>sihf2"
	389	[(set (match_operand:HF 0 "register_operand" "")
	390	(FLOAT_SU:HF (match_operand:SI 1 "register_operand" "")))]
	391	"CSKY_ISA_FEATURE(fpv3_hf)"
	392	"")
	393
	394	;; DF,SF <- unsigned SI,SI
	395	(define_expand "float<floatsuop>si<mode>2"
	396	[(set (match_operand:SFDF 0 "register_operand" "")
	397	(FLOAT_SU:SFDF (match_operand:SI 1 "register_operand" "")))]
	398	"CSKY_ISA_FEATURE(fpv2_<mode>) \|\| CSKY_ISA_FEATURE(fpv3_<mode>)"
	399	"")
	400
	401	;; HF <- unsigned HI,HI
	402	(define_expand "float<floatsuop>hihf2"
	403	[(set (match_operand:HF 0 "register_operand" "")
	404	(FLOAT_SU:HF (match_operand:HI 1 "register_operand" "")))]
	405	"CSKY_ISA_FEATURE(fpv3_hi) && CSKY_ISA_FEATURE(fpv3_hf)"
	406	"")
	407
	408	;; unsigned SI,SI <- HF
	409	(define_expand "fix<fixsuop>_trunchfsi2"
	410	[(set (match_operand:SI 0 "register_operand" "")
	411	(FIX_SU:SI (fix:HF (match_operand:HF 1 "register_operand" ""))))]
	412	"CSKY_ISA_FEATURE(fpv3_hf)"
	413	"")
	414
	415	;; unsigned SI,SI <- DF,SF
	416	(define_expand "fix<fixsuop>_trunc<mode>si2"
	417	[(set (match_operand:SI 0 "register_operand" "")
418	(FIX_SU:SI (fix:SFDF (match_operand:SFDF 1 "register_operand" ""))))]
419	"CSKY_ISA_FEATURE(fpv2_<mode>) \|\| CSKY_ISA_FEATURE(fpv3_<mode>)"
420	"")
421
422	(include "csky_insn_fpuv3.md")
423	(include "csky_insn_fpuv2.md")