[thirdparty/gcc.git] / gcc / config / csky / csky_insn_fpuv2.md


;; -------------------------------------------------------------------------
;; Float Abs instructions
;; -------------------------------------------------------------------------

(define_insn "*fpuv2_abssf2"
  [(set (match_operand:SF	 0 "register_operand" "=v,a,r")
	(abs:SF (match_operand:SF 1 "register_operand" "v, 0,r")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "@
    fabss\t%0, %1
    bclri\t%0, %1, 31
    bclri\t%0, %1, 31"
  [(set_attr "length" "4,2,4")])

(define_insn "*fpuv2_absdf2"
  [(set (match_operand:DF	 0 "register_operand" "=v")
	(abs:DF (match_operand:DF 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fabsd\t%0, %1")


;; -------------------------------------------------------------------------
;; Float Neg instructions
;; -------------------------------------------------------------------------

(define_insn "*fpuv2_negsf2"
  [(set (match_operand:SF	 0 "register_operand" "=v")
	(neg:SF (match_operand:SF 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fnegs\t%0, %1")

(define_insn "*fpuv2_negdf2"
  [(set (match_operand:DF	 0 "register_operand" "=v")
	(neg:DF (match_operand:DF 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fnegd\t%0, %1")


;; -------------------------------------------------------------------------
;; Float Sqrt instructions
;; -------------------------------------------------------------------------

(define_insn "*fpuv2_sqrtsf2"
  [(set (match_operand:SF	  0 "register_operand" "=v")
	(sqrt:SF (match_operand:SF 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fsqrts\t%0, %1")

(define_insn "*fpuv2_sqrtdf2"
  [(set (match_operand:DF	  0 "register_operand" "=v")
	(sqrt:DF (match_operand:DF 1 "register_operand" "v")))]
 "CSKY_ISA_FEATURE (fpv2_divd)"
 "fsqrtd\t%0, %1")


;; -------------------------------------------------------------------------
;; Float Add instructions
;; -------------------------------------------------------------------------

(define_insn "*fpuv2_addsf3"
  [(set (match_operand:SF	  0 "register_operand" "=v")
	(plus:SF (match_operand:SF 1 "register_operand" "v")
		 (match_operand:SF 2 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fadds\t%0, %1, %2")

(define_insn "*fpuv2_adddf3"
  [(set (match_operand:DF	  0 "register_operand" "=v")
	(plus:DF (match_operand:DF 1 "register_operand" "v")
		 (match_operand:DF 2 "register_operand" "v")))]
 "CSKY_ISA_FEATURE (fpv2_df)"
 "faddd\t%0, %1, %2")


;; -------------------------------------------------------------------------
;; Float Sub instructions
;; -------------------------------------------------------------------------

(define_insn "*fpuv2_subsf3"
  [(set (match_operand:SF	   0 "register_operand" "=v")
	(minus:SF (match_operand:SF 1 "register_operand" "v")
		  (match_operand:SF 2 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fsubs\t%0, %1, %2")

(define_insn "*fpuv2_subdf3"
  [(set (match_operand:DF	   0 "register_operand" "=v")
	(minus:DF (match_operand:DF 1 "register_operand" "v")
		  (match_operand:DF 2 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fsubd\t%0, %1, %2")


;; -------------------------------------------------------------------------
;; Float Mul instructions
;; -------------------------------------------------------------------------

(define_insn "*fpv2_mulsf3"
  [(set (match_operand:SF	  0 "register_operand" "=v")
	(mult:SF (match_operand:SF 1 "register_operand" "v")
		 (match_operand:SF 2 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fmuls\t%0, %1, %2")

(define_insn "*fpv2_muldf3"
  [(set (match_operand:DF	  0 "register_operand" "=v")
	(mult:DF (match_operand:DF 1 "register_operand" "v")
		 (match_operand:DF 2 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fmuld\t%0, %1, %2")

(define_insn "*fpuv2_nmulsf3_1"
  [(set (match_operand:SF		  0 "register_operand" "=v")
	(mult:SF (neg:SF (match_operand:SF 1 "register_operand" "%v"))
		 (match_operand:SF	 2 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_sf) && !flag_rounding_math"
  "fnmuls\t%0, %1, %2")

(define_insn "*fpuv2_nmulsf3_2"
  [(set (match_operand:SF		  0 "register_operand" "=v")
	(neg:SF (mult:SF (match_operand:SF 1 "register_operand" "v")
			 (match_operand:SF 2 "register_operand" "v"))))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fnmuls\t%0, %1, %2")

(define_insn "*fpuv2_nmuldf3_1"
  [(set (match_operand:DF		  0 "register_operand" "=v")
	(mult:DF (neg:DF (match_operand:DF 1 "register_operand" "%v"))
		 (match_operand:DF	 2 "register_operand" "v")))]
 "CSKY_ISA_FEATURE (fpv2_df) && !flag_rounding_math"
 "fnmuld\t%0, %1, %2")

(define_insn "*fpuv2_nmuldf3_2"
  [(set (match_operand:DF		  0 "register_operand" "=v")
	(neg:DF (mult:DF (match_operand:DF 1 "register_operand" "v")
			 (match_operand:DF 2 "register_operand" "v"))))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fnmuld\t%0, %1, %2")


;; -------------------------------------------------------------------------
;; Float Div instructions
;; -------------------------------------------------------------------------

(define_insn "*fpuv2_divsf3"
  [(set (match_operand:SF	 0 "register_operand" "=v")
	(div:SF (match_operand:SF 1 "register_operand" "v")
		(match_operand:SF 2 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fdivs\t%0, %1, %2")

(define_insn "*fpuv2_1_divsf3"
  [(set (match_operand:SF	 0 "register_operand"	  "=v")
	(div:SF (match_operand:SF 1 "csky_const_float1_operand" "i")
		(match_operand:SF 2 "register_operand"	  "v")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "frecips\t%0, %2")

(define_insn "*fpuv2_divdf3"
  [(set (match_operand:DF	 0 "register_operand" "=v")
	(div:DF (match_operand:DF 1 "register_operand" "v")
		(match_operand:DF 2 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_divd)"
  "fdivd\t%0, %1, %2")

(define_insn "*fpuv2_1_divdf3"
  [(set (match_operand:DF	 0 "register_operand"	  "=v")
	(div:DF (match_operand:DF 1 "csky_const_float1_operand" "i")
		(match_operand:DF 2 "register_operand"	  "v")))]
  "CSKY_ISA_FEATURE (fpv2_divd)"
  "frecipd\t%0, %2")


;; -------------------------------------------------------------------------
;; Float add(sub) with mult instructions
;; -------------------------------------------------------------------------

;; vrz <= vrz + vrx * vry
(define_insn "*fpuv2_fmacs"
  [(set (match_operand:SF		   0 "register_operand" "=v")
	(plus:SF (mult:SF (match_operand:SF 1 "register_operand" "v")
			  (match_operand:SF 2 "register_operand" "v"))
		 (match_operand:SF	  3 "register_operand" "0")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fmacs\t%0, %1, %2")

(define_insn "*fpuv2_fmacd"
  [(set (match_operand:DF		   0 "register_operand" "=v")
	(plus:DF (mult:DF (match_operand:DF 1 "register_operand" "v")
			  (match_operand:DF 2 "register_operand" "v"))
		 (match_operand:DF	  3 "register_operand" "0")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fmacd\t%0, %1, %2")

;; vrz <= vrz - vrx * vry
(define_insn "*fpuv2_fnmacs"
  [(set (match_operand:SF		    0 "register_operand" "=v")
	(minus:SF (match_operand:SF	  1 "register_operand" "0")
		  (mult:SF (match_operand:SF 2 "register_operand" "v")
			   (match_operand:SF 3 "register_operand" "v"))))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fnmacs\t%0, %2, %3")

(define_insn "*fpuv2_fnmacd"
  [(set (match_operand:DF		    0 "register_operand" "=v")
	(minus:DF (match_operand:DF	  1 "register_operand" "0")
		  (mult:DF (match_operand:DF 2 "register_operand" "v")
			   (match_operand:DF 3 "register_operand" "v"))))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fnmacd\t%0, %2, %3")

;; vrz <= vrx * vry - vrz
(define_insn "*fpuv2_fmscs"
  [(set (match_operand:SF		    0 "register_operand" "=v")
	(minus:SF (mult:SF (match_operand:SF 1 "register_operand" "v")
			   (match_operand:SF 2 "register_operand" "v"))
		  (match_operand:SF	  3 "register_operand" "0")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fmscs\t%0, %1, %2")

(define_insn "*fpuv2_fmscd"
  [(set (match_operand:DF 0 "register_operand" "=v")
	(minus:DF (mult:DF (match_operand:DF 1 "register_operand" "v")
			   (match_operand:DF 2 "register_operand" "v"))
		  (match_operand:DF 3 "register_operand" "0")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fmscd\t%0, %1, %2")

;; vrz = - (vrz + vrx * vry)
(define_insn "*fpuv2_fnmscs_1"
  [(set (match_operand:SF			    0 "register_operand" "=v")
	(minus:SF (mult:SF (neg:SF (match_operand:SF 1 "register_operand" "%v"))
			   (match_operand:SF	 2 "register_operand" "v"))
		  (match_operand:SF		  3 "register_operand" "0")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fnmscs\t%0, %1, %2")

(define_insn "*fpuv2_fnmscs_2"
  [(set (match_operand:SF			   0 "register_operand" "=v")
	(neg:SF (plus:SF (mult:SF (match_operand:SF 1 "register_operand" "v")
				  (match_operand:SF 2 "register_operand" "v"))
			 (match_operand:SF	  3 "register_operand" "0"))))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fnmscs\t%0, %1, %2")

(define_insn "*fpuv2_fnmscd_1"
  [(set (match_operand:DF 0 "register_operand" "=v")
	(minus:DF (mult:DF (neg:DF (match_operand:DF 1 "register_operand" "%v"))
			   (match_operand:DF 2 "register_operand" "v"))
		  (match_operand:DF 3 "register_operand" "0")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fnmscd\t%0, %1, %2")

(define_insn "*fpuv2_fnmscd_2"
  [(set (match_operand:DF 0 "register_operand" "=v")
	(neg:DF (plus:DF (mult:DF (match_operand:DF 1 "register_operand" "v")
				  (match_operand:DF 2 "register_operand" "v"))
			 (match_operand:DF 3 "register_operand" "0"))))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fnmscd\t%0, %1, %2")


;; -------------------------------------------------------------------------
;; Float compare instructions
;; -------------------------------------------------------------------------

(define_insn "*fpuv2_unordered"
  [(set (reg:CC 33) (unordered:CC (match_operand:SF 0 "register_operand" "v")
				  (match_operand:SF 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fcmpuos\t%0, %1")

(define_insn "*fpuv2_unordered_zero"
  [(set (reg:CC 33) (unordered:CC (match_operand:SF 0 "register_operand" "v")
				  (match_operand:SF 1 "csky_const_float0_operand" "i")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fcmpuos\t%0, %0")

(define_insn "*fpuv2_ne"
  [(set (reg:CC 33) (ne:CC (match_operand:SF 0 "register_operand" "v")
			   (match_operand:SF 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fcmpnes\t%0, %1")

(define_insn "*fpuv2_gt"
  [(set (reg:CC 33) (gt:CC (match_operand:SF 0 "register_operand" "v")
			   (match_operand:SF 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fcmplts\t%1, %0")

(define_insn "*fpuv2_ge"
  [(set (reg:CC 33) (ge:CC (match_operand:SF 0 "register_operand" "v")
			   (match_operand:SF 1 "register_operand" "v")))]
 "CSKY_ISA_FEATURE (fpv2_sf)"
 "fcmphss\t%0, %1")

(define_insn "*fpuv2_lt"
  [(set (reg:CC 33) (lt:CC (match_operand:SF 0 "register_operand" "v")
			   (match_operand:SF 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fcmplts\t%0, %1")

(define_insn "*fpuv2_le"
  [(set (reg:CC 33) (le:CC (match_operand:SF 0 "register_operand" "v")
			   (match_operand:SF 1 "register_operand" "v")))]
 "CSKY_ISA_FEATURE (fpv2_sf)"
 "fcmphss\t%1, %0")

(define_insn "*fpuv2_gez"
  [(set (reg:CC 33) (ge:CC (match_operand:SF 0 "register_operand"	  "v")
			   (match_operand:SF 1 "csky_const_float0_operand" "i")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fcmpzhss\t%0")

(define_insn "*fpuv2_nez"
  [(set (reg:CC 33) (ne:CC (match_operand:SF 0 "register_operand"	  "v")
			   (match_operand:SF 1 "csky_const_float0_operand" "i")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fcmpznes\t%0")

(define_insn "*fpuv2_dunordered"
  [(set (reg:CC 33) (unordered:CC (match_operand:DF 0 "register_operand" "v")
				  (match_operand:DF 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fcmpuod\t%0, %1")

(define_insn "*fpuv2_dunordered_zero"
  [(set (reg:CC 33) (unordered:CC (match_operand:DF 0 "register_operand" "v")
				  (match_operand:DF 1 "csky_const_float0_operand" "i")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fcmpuod\t%0, %0")

(define_insn "*fpuv2_dne"
  [(set (reg:CC 33) (ne:CC (match_operand:DF 0 "register_operand" "v")
			   (match_operand:DF 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fcmpned\t%0, %1")

(define_insn "*fpuv2_dgt"
  [(set (reg:CC 33) (gt:CC (match_operand:DF 0 "register_operand" "v")
			   (match_operand:DF 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fcmpltd\t%1, %0")

(define_insn "*fpuv2_dge"
  [(set (reg:CC 33) (ge:CC (match_operand:DF 0 "register_operand" "v")
			   (match_operand:DF 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fcmphsd\t%0, %1")

(define_insn "*fpuv2_dlt"
  [(set (reg:CC 33) (lt:CC (match_operand:DF 0 "register_operand" "v")
			   (match_operand:DF 1 "register_operand" "v")))]
 "CSKY_ISA_FEATURE (fpv2_df)"
 "fcmpltd\t%0, %1")

(define_insn "*fpuv2_dle"
  [(set (reg:CC 33) (le:CC (match_operand:DF 0 "register_operand" "v")
			   (match_operand:DF 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fcmphsd\t%1, %0")

(define_insn "*fpuv2_dgez"
  [(set (reg:CC 33) (ge:CC (match_operand:DF 0 "register_operand"	  "v")
			   (match_operand:DF 1 "csky_const_float0_operand" "i")))]
 "CSKY_ISA_FEATURE (fpv2_df)"
 "fcmpzhsd\t%0")

(define_insn "*fpuv2_dnez"
  [(set (reg:CC 33) (ne:CC (match_operand:DF 0 "register_operand"	  "v")
			   (match_operand:DF 1 "csky_const_float0_operand" "i")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fcmpzned\t%0")


;; -------------------------------------------------------------------------
;; Float convert instructions
;; -------------------------------------------------------------------------

;; DF <- SF
(define_insn "*fpuv2_extendsfdf2"
  [(set (match_operand:DF		  0 "register_operand" "=v")
	(float_extend:DF (match_operand:SF 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fstod\t%0, %1")

;; SF <- DF
(define_insn "*fpuv2_truncdfsf2"
  [(set (match_operand:SF		    0 "register_operand" "=v")
	(float_truncate:SF (match_operand:DF 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fdtos\t%0, %1")

;; SF <- SI
(define_insn "*fpuv2_floatsisf2"
  [(set (match_operand:SF	   0 "register_operand" "=v")
	(float:SF (match_operand:SI 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fsitos\t%0, %1")

;; DF <- SI
(define_insn "*fpuv2_floatsidf2"
  [(set (match_operand:DF	   0 "register_operand" "=v")
	(float:DF (match_operand:SI 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fsitod\t%0, %1")

;; SF <- unsigned SI
(define_insn "*fpuv2_floatunssisf2"
  [(set (match_operand:SF		    0 "register_operand" "=v")
	(unsigned_float:SF (match_operand:SI 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fuitos\t%0, %1")

;; DF <- unsigned SI
(define_insn "*fpuv2_floatunssidf2"
  [(set (match_operand:DF		    0 "register_operand" "=v")
	(unsigned_float:DF (match_operand:SI 1 "register_operand" "v")))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fuitod\t%0, %1")

;; SI <- SF
(define_insn "*fpuv2_fix_truncsfsi2"
  [(set (match_operand:SI	 0 "register_operand" "=v")
	(fix:SI (fix:SF (match_operand:SF 1 "register_operand" "v"))))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fstosi.rz\t%0, %1")

;; SI <- DF
(define_insn "*fpuv2_fix_truncdfsi2"
  [(set (match_operand:SI	 0 "register_operand" "=v")
	(fix:SI (fix:DF (match_operand:DF 1 "register_operand" "v"))))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fdtosi.rz\t%0, %1")

;; unsigned SI <- SF
(define_insn "*fpuv2_fixuns_truncsfsi2"
  [(set (match_operand:SI		  0 "register_operand" "=v")
	(unsigned_fix:SI (fix:SF (match_operand:SF 1 "register_operand" "v"))))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "fstoui.rz\t%0, %1")

;; unsigned SI <- DF
(define_insn "*fpuv2_fixuns_truncdfsi2"
  [(set (match_operand:SI		  0 "register_operand" "=v")
	(unsigned_fix:SI (fix:DF (match_operand:DF 1 "register_operand" "v"))))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "fdtoui.rz\t%0, %1")


;; -------------------------------------------------------------------------
;; Float mov instructions
;; -------------------------------------------------------------------------

(define_insn "*fpuv2_movsf"
  [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r, r,m,v,r,Q,v,v,v")
	(match_operand:SF 1 "general_operand"      " r,m,mF,r,r,v,v,Q,v,W"))]
  "CSKY_ISA_FEATURE (fpv2_sf)"
  "* return csky_output_move(insn, operands, SFmode);"
)

(define_insn "*fpuv2_movdf"
  [(set (match_operand:DF 0 "nonimmediate_operand" "=r,r, r,m, v,?r,Q,v,v,v")
	(match_operand:DF 1 "general_operand"      " r,m,mF,r,?r, v,v,Q,v,m"))]
  "CSKY_ISA_FEATURE (fpv2_df)"
  "* return csky_output_movedouble(operands, DFmode);"
  [(set (attr "length")
	(symbol_ref "csky_get_movedouble_length (operands)"))]
)
Commit	Line	Data
db92bd22 GQ	1
	2	;; -------------------------------------------------------------------------
	3	;; Float Abs instructions
	4	;; -------------------------------------------------------------------------
	5
	6	(define_insn "*fpuv2_abssf2"
	7	[(set (match_operand:SF 0 "register_operand" "=v,a,r")
	8	(abs:SF (match_operand:SF 1 "register_operand" "v, 0,r")))]
	9	"CSKY_ISA_FEATURE (fpv2_sf)"
	10	"@
	11	fabss\t%0, %1
	12	bclri\t%0, %1, 31
	13	bclri\t%0, %1, 31"
	14	[(set_attr "length" "4,2,4")])
	15
	16	(define_insn "*fpuv2_absdf2"
	17	[(set (match_operand:DF 0 "register_operand" "=v")
	18	(abs:DF (match_operand:DF 1 "register_operand" "v")))]
	19	"CSKY_ISA_FEATURE (fpv2_df)"
	20	"fabsd\t%0, %1")
	21
	22
	23	;; -------------------------------------------------------------------------
	24	;; Float Neg instructions
	25	;; -------------------------------------------------------------------------
	26
	27	(define_insn "*fpuv2_negsf2"
	28	[(set (match_operand:SF 0 "register_operand" "=v")
	29	(neg:SF (match_operand:SF 1 "register_operand" "v")))]
	30	"CSKY_ISA_FEATURE (fpv2_sf)"
	31	"fnegs\t%0, %1")
	32
	33	(define_insn "*fpuv2_negdf2"
	34	[(set (match_operand:DF 0 "register_operand" "=v")
	35	(neg:DF (match_operand:DF 1 "register_operand" "v")))]
	36	"CSKY_ISA_FEATURE (fpv2_df)"
	37	"fnegd\t%0, %1")
	38
	39
	40	;; -------------------------------------------------------------------------
	41	;; Float Sqrt instructions
	42	;; -------------------------------------------------------------------------
	43
	44	(define_insn "*fpuv2_sqrtsf2"
	45	[(set (match_operand:SF 0 "register_operand" "=v")
	46	(sqrt:SF (match_operand:SF 1 "register_operand" "v")))]
	47	"CSKY_ISA_FEATURE (fpv2_sf)"
	48	"fsqrts\t%0, %1")
	49
	50	(define_insn "*fpuv2_sqrtdf2"
	51	[(set (match_operand:DF 0 "register_operand" "=v")
	52	(sqrt:DF (match_operand:DF 1 "register_operand" "v")))]
	53	"CSKY_ISA_FEATURE (fpv2_divd)"
	54	"fsqrtd\t%0, %1")
	55
	56
	57	;; -------------------------------------------------------------------------
	58	;; Float Add instructions
	59	;; -------------------------------------------------------------------------
	60
	61	(define_insn "*fpuv2_addsf3"
	62	[(set (match_operand:SF 0 "register_operand" "=v")
	63	(plus:SF (match_operand:SF 1 "register_operand" "v")
	64	(match_operand:SF 2 "register_operand" "v")))]
65	"CSKY_ISA_FEATURE (fpv2_sf)"
66	"fadds\t%0, %1, %2")
67
68	(define_insn "*fpuv2_adddf3"
69	[(set (match_operand:DF 0 "register_operand" "=v")
70	(plus:DF (match_operand:DF 1 "register_operand" "v")
71	(match_operand:DF 2 "register_operand" "v")))]
72	"CSKY_ISA_FEATURE (fpv2_df)"
73	"faddd\t%0, %1, %2")
74
75
76	;; -------------------------------------------------------------------------
77	;; Float Sub instructions
78	;; -------------------------------------------------------------------------
79
80	(define_insn "*fpuv2_subsf3"
81	[(set (match_operand:SF 0 "register_operand" "=v")
82	(minus:SF (match_operand:SF 1 "register_operand" "v")
83	(match_operand:SF 2 "register_operand" "v")))]
84	"CSKY_ISA_FEATURE (fpv2_sf)"
85	"fsubs\t%0, %1, %2")
86
87	(define_insn "*fpuv2_subdf3"
88	[(set (match_operand:DF 0 "register_operand" "=v")
89	(minus:DF (match_operand:DF 1 "register_operand" "v")
90	(match_operand:DF 2 "register_operand" "v")))]
91	"CSKY_ISA_FEATURE (fpv2_df)"
92	"fsubd\t%0, %1, %2")
93
94
95	;; -------------------------------------------------------------------------
96	;; Float Mul instructions
97	;; -------------------------------------------------------------------------
98
99	(define_insn "*fpv2_mulsf3"
100	[(set (match_operand:SF 0 "register_operand" "=v")
101	(mult:SF (match_operand:SF 1 "register_operand" "v")
102	(match_operand:SF 2 "register_operand" "v")))]
103	"CSKY_ISA_FEATURE (fpv2_sf)"
104	"fmuls\t%0, %1, %2")
105
106	(define_insn "*fpv2_muldf3"
107	[(set (match_operand:DF 0 "register_operand" "=v")
108	(mult:DF (match_operand:DF 1 "register_operand" "v")
109	(match_operand:DF 2 "register_operand" "v")))]
110	"CSKY_ISA_FEATURE (fpv2_df)"
111	"fmuld\t%0, %1, %2")
112
113	(define_insn "*fpuv2_nmulsf3_1"
114	[(set (match_operand:SF 0 "register_operand" "=v")
115	(mult:SF (neg:SF (match_operand:SF 1 "register_operand" "%v"))
116	(match_operand:SF 2 "register_operand" "v")))]
117	"CSKY_ISA_FEATURE (fpv2_sf) && !flag_rounding_math"
118	"fnmuls\t%0, %1, %2")
119
120	(define_insn "*fpuv2_nmulsf3_2"
121	[(set (match_operand:SF 0 "register_operand" "=v")
122	(neg:SF (mult:SF (match_operand:SF 1 "register_operand" "v")
123	(match_operand:SF 2 "register_operand" "v"))))]
124	"CSKY_ISA_FEATURE (fpv2_sf)"
125	"fnmuls\t%0, %1, %2")
126
127	(define_insn "*fpuv2_nmuldf3_1"
128	[(set (match_operand:DF 0 "register_operand" "=v")
129	(mult:DF (neg:DF (match_operand:DF 1 "register_operand" "%v"))
130	(match_operand:DF 2 "register_operand" "v")))]
131	"CSKY_ISA_FEATURE (fpv2_df) && !flag_rounding_math"
132	"fnmuld\t%0, %1, %2")
133
134	(define_insn "*fpuv2_nmuldf3_2"
135	[(set (match_operand:DF 0 "register_operand" "=v")
136	(neg:DF (mult:DF (match_operand:DF 1 "register_operand" "v")
137	(match_operand:DF 2 "register_operand" "v"))))]
138	"CSKY_ISA_FEATURE (fpv2_df)"
139	"fnmuld\t%0, %1, %2")
140
141
142	;; -------------------------------------------------------------------------
143	;; Float Div instructions
144	;; -------------------------------------------------------------------------
145
146	(define_insn "*fpuv2_divsf3"
147	[(set (match_operand:SF 0 "register_operand" "=v")
148	(div:SF (match_operand:SF 1 "register_operand" "v")
149	(match_operand:SF 2 "register_operand" "v")))]
150	"CSKY_ISA_FEATURE (fpv2_sf)"
151	"fdivs\t%0, %1, %2")
152
153	(define_insn "*fpuv2_1_divsf3"
154	[(set (match_operand:SF 0 "register_operand" "=v")
155	(div:SF (match_operand:SF 1 "csky_const_float1_operand" "i")
156	(match_operand:SF 2 "register_operand" "v")))]
157	"CSKY_ISA_FEATURE (fpv2_sf)"
158	"frecips\t%0, %2")
159
160	(define_insn "*fpuv2_divdf3"
161	[(set (match_operand:DF 0 "register_operand" "=v")
162	(div:DF (match_operand:DF 1 "register_operand" "v")
163	(match_operand:DF 2 "register_operand" "v")))]
164	"CSKY_ISA_FEATURE (fpv2_divd)"
165	"fdivd\t%0, %1, %2")
166
167	(define_insn "*fpuv2_1_divdf3"
168	[(set (match_operand:DF 0 "register_operand" "=v")
169	(div:DF (match_operand:DF 1 "csky_const_float1_operand" "i")
170	(match_operand:DF 2 "register_operand" "v")))]
171	"CSKY_ISA_FEATURE (fpv2_divd)"
172	"frecipd\t%0, %2")
173
174
175	;; -------------------------------------------------------------------------
176	;; Float add(sub) with mult instructions
177	;; -------------------------------------------------------------------------
178
179	;; vrz <= vrz + vrx * vry
180	(define_insn "*fpuv2_fmacs"
181	[(set (match_operand:SF 0 "register_operand" "=v")
182	(plus:SF (mult:SF (match_operand:SF 1 "register_operand" "v")
183	(match_operand:SF 2 "register_operand" "v"))
184	(match_operand:SF 3 "register_operand" "0")))]
185	"CSKY_ISA_FEATURE (fpv2_sf)"
186	"fmacs\t%0, %1, %2")
187
188	(define_insn "*fpuv2_fmacd"
189	[(set (match_operand:DF 0 "register_operand" "=v")
190	(plus:DF (mult:DF (match_operand:DF 1 "register_operand" "v")
191	(match_operand:DF 2 "register_operand" "v"))
192	(match_operand:DF 3 "register_operand" "0")))]
193	"CSKY_ISA_FEATURE (fpv2_df)"
194	"fmacd\t%0, %1, %2")
195
196	;; vrz <= vrz - vrx * vry
197	(define_insn "*fpuv2_fnmacs"
198	[(set (match_operand:SF 0 "register_operand" "=v")
199	(minus:SF (match_operand:SF 1 "register_operand" "0")
200	(mult:SF (match_operand:SF 2 "register_operand" "v")
201	(match_operand:SF 3 "register_operand" "v"))))]
202	"CSKY_ISA_FEATURE (fpv2_sf)"
203	"fnmacs\t%0, %2, %3")
204
205	(define_insn "*fpuv2_fnmacd"
206	[(set (match_operand:DF 0 "register_operand" "=v")
207	(minus:DF (match_operand:DF 1 "register_operand" "0")
208	(mult:DF (match_operand:DF 2 "register_operand" "v")
209	(match_operand:DF 3 "register_operand" "v"))))]
210	"CSKY_ISA_FEATURE (fpv2_df)"
211	"fnmacd\t%0, %2, %3")
212
213	;; vrz <= vrx * vry - vrz
214	(define_insn "*fpuv2_fmscs"
215	[(set (match_operand:SF 0 "register_operand" "=v")
216	(minus:SF (mult:SF (match_operand:SF 1 "register_operand" "v")
217	(match_operand:SF 2 "register_operand" "v"))
218	(match_operand:SF 3 "register_operand" "0")))]
219	"CSKY_ISA_FEATURE (fpv2_sf)"
220	"fmscs\t%0, %1, %2")
221
222	(define_insn "*fpuv2_fmscd"
223	[(set (match_operand:DF 0 "register_operand" "=v")
224	(minus:DF (mult:DF (match_operand:DF 1 "register_operand" "v")
225	(match_operand:DF 2 "register_operand" "v"))
226	(match_operand:DF 3 "register_operand" "0")))]
227	"CSKY_ISA_FEATURE (fpv2_df)"
228	"fmscd\t%0, %1, %2")
229
230	;; vrz = - (vrz + vrx * vry)
231	(define_insn "*fpuv2_fnmscs_1"
232	[(set (match_operand:SF 0 "register_operand" "=v")
233	(minus:SF (mult:SF (neg:SF (match_operand:SF 1 "register_operand" "%v"))
234	(match_operand:SF 2 "register_operand" "v"))
235	(match_operand:SF 3 "register_operand" "0")))]
236	"CSKY_ISA_FEATURE (fpv2_sf)"
237	"fnmscs\t%0, %1, %2")
238
239	(define_insn "*fpuv2_fnmscs_2"
240	[(set (match_operand:SF 0 "register_operand" "=v")
241	(neg:SF (plus:SF (mult:SF (match_operand:SF 1 "register_operand" "v")
242	(match_operand:SF 2 "register_operand" "v"))
243	(match_operand:SF 3 "register_operand" "0"))))]
244	"CSKY_ISA_FEATURE (fpv2_sf)"
245	"fnmscs\t%0, %1, %2")
246
247	(define_insn "*fpuv2_fnmscd_1"
248	[(set (match_operand:DF 0 "register_operand" "=v")
249	(minus:DF (mult:DF (neg:DF (match_operand:DF 1 "register_operand" "%v"))
250	(match_operand:DF 2 "register_operand" "v"))
251	(match_operand:DF 3 "register_operand" "0")))]
252	"CSKY_ISA_FEATURE (fpv2_df)"
253	"fnmscd\t%0, %1, %2")
254
255	(define_insn "*fpuv2_fnmscd_2"
256	[(set (match_operand:DF 0 "register_operand" "=v")
257	(neg:DF (plus:DF (mult:DF (match_operand:DF 1 "register_operand" "v")
258	(match_operand:DF 2 "register_operand" "v"))
259	(match_operand:DF 3 "register_operand" "0"))))]
260	"CSKY_ISA_FEATURE (fpv2_df)"
261	"fnmscd\t%0, %1, %2")
262
263
264	;; -------------------------------------------------------------------------
265	;; Float compare instructions
266	;; -------------------------------------------------------------------------
267
268	(define_insn "*fpuv2_unordered"
269	[(set (reg:CC 33) (unordered:CC (match_operand:SF 0 "register_operand" "v")
270	(match_operand:SF 1 "register_operand" "v")))]
271	"CSKY_ISA_FEATURE (fpv2_sf)"
272	"fcmpuos\t%0, %1")
273
274	(define_insn "*fpuv2_unordered_zero"
275	[(set (reg:CC 33) (unordered:CC (match_operand:SF 0 "register_operand" "v")
276	(match_operand:SF 1 "csky_const_float0_operand" "i")))]
277	"CSKY_ISA_FEATURE (fpv2_sf)"
278	"fcmpuos\t%0, %0")
279
280	(define_insn "*fpuv2_ne"
281	[(set (reg:CC 33) (ne:CC (match_operand:SF 0 "register_operand" "v")
282	(match_operand:SF 1 "register_operand" "v")))]
283	"CSKY_ISA_FEATURE (fpv2_sf)"
284	"fcmpnes\t%0, %1")
285
286	(define_insn "*fpuv2_gt"
287	[(set (reg:CC 33) (gt:CC (match_operand:SF 0 "register_operand" "v")
288	(match_operand:SF 1 "register_operand" "v")))]
289	"CSKY_ISA_FEATURE (fpv2_sf)"
290	"fcmplts\t%1, %0")
291
292	(define_insn "*fpuv2_ge"
293	[(set (reg:CC 33) (ge:CC (match_operand:SF 0 "register_operand" "v")
294	(match_operand:SF 1 "register_operand" "v")))]
295	"CSKY_ISA_FEATURE (fpv2_sf)"
296	"fcmphss\t%0, %1")
297
298	(define_insn "*fpuv2_lt"
299	[(set (reg:CC 33) (lt:CC (match_operand:SF 0 "register_operand" "v")
300	(match_operand:SF 1 "register_operand" "v")))]
301	"CSKY_ISA_FEATURE (fpv2_sf)"
302	"fcmplts\t%0, %1")
303
304	(define_insn "*fpuv2_le"
305	[(set (reg:CC 33) (le:CC (match_operand:SF 0 "register_operand" "v")
306	(match_operand:SF 1 "register_operand" "v")))]
307	"CSKY_ISA_FEATURE (fpv2_sf)"
308	"fcmphss\t%1, %0")
309
310	(define_insn "*fpuv2_gez"
311	[(set (reg:CC 33) (ge:CC (match_operand:SF 0 "register_operand" "v")
312	(match_operand:SF 1 "csky_const_float0_operand" "i")))]
313	"CSKY_ISA_FEATURE (fpv2_sf)"
314	"fcmpzhss\t%0")
315
316	(define_insn "*fpuv2_nez"
317	[(set (reg:CC 33) (ne:CC (match_operand:SF 0 "register_operand" "v")
318	(match_operand:SF 1 "csky_const_float0_operand" "i")))]
319	"CSKY_ISA_FEATURE (fpv2_sf)"
320	"fcmpznes\t%0")
321
322	(define_insn "*fpuv2_dunordered"
323	[(set (reg:CC 33) (unordered:CC (match_operand:DF 0 "register_operand" "v")
324	(match_operand:DF 1 "register_operand" "v")))]
325	"CSKY_ISA_FEATURE (fpv2_df)"
326	"fcmpuod\t%0, %1")
327
328	(define_insn "*fpuv2_dunordered_zero"
329	[(set (reg:CC 33) (unordered:CC (match_operand:DF 0 "register_operand" "v")
330	(match_operand:DF 1 "csky_const_float0_operand" "i")))]
331	"CSKY_ISA_FEATURE (fpv2_df)"
332	"fcmpuod\t%0, %0")
333
334	(define_insn "*fpuv2_dne"
335	[(set (reg:CC 33) (ne:CC (match_operand:DF 0 "register_operand" "v")
336	(match_operand:DF 1 "register_operand" "v")))]
337	"CSKY_ISA_FEATURE (fpv2_df)"
338	"fcmpned\t%0, %1")
339
340	(define_insn "*fpuv2_dgt"
341	[(set (reg:CC 33) (gt:CC (match_operand:DF 0 "register_operand" "v")
342	(match_operand:DF 1 "register_operand" "v")))]
343	"CSKY_ISA_FEATURE (fpv2_df)"
344	"fcmpltd\t%1, %0")
345
346	(define_insn "*fpuv2_dge"
347	[(set (reg:CC 33) (ge:CC (match_operand:DF 0 "register_operand" "v")
348	(match_operand:DF 1 "register_operand" "v")))]
349	"CSKY_ISA_FEATURE (fpv2_df)"
350	"fcmphsd\t%0, %1")
351
352	(define_insn "*fpuv2_dlt"
353	[(set (reg:CC 33) (lt:CC (match_operand:DF 0 "register_operand" "v")
354	(match_operand:DF 1 "register_operand" "v")))]
355	"CSKY_ISA_FEATURE (fpv2_df)"
356	"fcmpltd\t%0, %1")
357
358	(define_insn "*fpuv2_dle"
359	[(set (reg:CC 33) (le:CC (match_operand:DF 0 "register_operand" "v")
360	(match_operand:DF 1 "register_operand" "v")))]
361	"CSKY_ISA_FEATURE (fpv2_df)"
362	"fcmphsd\t%1, %0")
363
364	(define_insn "*fpuv2_dgez"
365	[(set (reg:CC 33) (ge:CC (match_operand:DF 0 "register_operand" "v")
366	(match_operand:DF 1 "csky_const_float0_operand" "i")))]
367	"CSKY_ISA_FEATURE (fpv2_df)"
368	"fcmpzhsd\t%0")
369
370	(define_insn "*fpuv2_dnez"
371	[(set (reg:CC 33) (ne:CC (match_operand:DF 0 "register_operand" "v")
372	(match_operand:DF 1 "csky_const_float0_operand" "i")))]
373	"CSKY_ISA_FEATURE (fpv2_df)"
374	"fcmpzned\t%0")
375
376
377	;; -------------------------------------------------------------------------
378	;; Float convert instructions
379	;; -------------------------------------------------------------------------
380
381	;; DF <- SF
382	(define_insn "*fpuv2_extendsfdf2"
383	[(set (match_operand:DF 0 "register_operand" "=v")
384	(float_extend:DF (match_operand:SF 1 "register_operand" "v")))]
385	"CSKY_ISA_FEATURE (fpv2_df)"
386	"fstod\t%0, %1")
387
388	;; SF <- DF
389	(define_insn "*fpuv2_truncdfsf2"
390	[(set (match_operand:SF 0 "register_operand" "=v")
391	(float_truncate:SF (match_operand:DF 1 "register_operand" "v")))]
392	"CSKY_ISA_FEATURE (fpv2_df)"
393	"fdtos\t%0, %1")
394
395	;; SF <- SI
396	(define_insn "*fpuv2_floatsisf2"
397	[(set (match_operand:SF 0 "register_operand" "=v")
398	(float:SF (match_operand:SI 1 "register_operand" "v")))]
399	"CSKY_ISA_FEATURE (fpv2_sf)"
400	"fsitos\t%0, %1")
401
402	;; DF <- SI
403	(define_insn "*fpuv2_floatsidf2"
404	[(set (match_operand:DF 0 "register_operand" "=v")
405	(float:DF (match_operand:SI 1 "register_operand" "v")))]
406	"CSKY_ISA_FEATURE (fpv2_df)"
407	"fsitod\t%0, %1")
408
409	;; SF <- unsigned SI
410	(define_insn "*fpuv2_floatunssisf2"
411	[(set (match_operand:SF 0 "register_operand" "=v")
412	(unsigned_float:SF (match_operand:SI 1 "register_operand" "v")))]
413	"CSKY_ISA_FEATURE (fpv2_sf)"
414	"fuitos\t%0, %1")
415
416	;; DF <- unsigned SI
417	(define_insn "*fpuv2_floatunssidf2"
418	[(set (match_operand:DF 0 "register_operand" "=v")
419	(unsigned_float:DF (match_operand:SI 1 "register_operand" "v")))]
420	"CSKY_ISA_FEATURE (fpv2_df)"
421	"fuitod\t%0, %1")
422
423	;; SI <- SF
424	(define_insn "*fpuv2_fix_truncsfsi2"
425	[(set (match_operand:SI 0 "register_operand" "=v")
426	(fix:SI (fix:SF (match_operand:SF 1 "register_operand" "v"))))]
427	"CSKY_ISA_FEATURE (fpv2_sf)"
428	"fstosi.rz\t%0, %1")
429
430	;; SI <- DF
431	(define_insn "*fpuv2_fix_truncdfsi2"
432	[(set (match_operand:SI 0 "register_operand" "=v")
433	(fix:SI (fix:DF (match_operand:DF 1 "register_operand" "v"))))]
434	"CSKY_ISA_FEATURE (fpv2_df)"
435	"fdtosi.rz\t%0, %1")
436
437	;; unsigned SI <- SF
438	(define_insn "*fpuv2_fixuns_truncsfsi2"
439	[(set (match_operand:SI 0 "register_operand" "=v")
440	(unsigned_fix:SI (fix:SF (match_operand:SF 1 "register_operand" "v"))))]
441	"CSKY_ISA_FEATURE (fpv2_sf)"
442	"fstoui.rz\t%0, %1")
443
444	;; unsigned SI <- DF
445	(define_insn "*fpuv2_fixuns_truncdfsi2"
446	[(set (match_operand:SI 0 "register_operand" "=v")
447	(unsigned_fix:SI (fix:DF (match_operand:DF 1 "register_operand" "v"))))]
448	"CSKY_ISA_FEATURE (fpv2_df)"
449	"fdtoui.rz\t%0, %1")
450
451
452	;; -------------------------------------------------------------------------
453	;; Float mov instructions
454	;; -------------------------------------------------------------------------
455
456	(define_insn "*fpuv2_movsf"
457	[(set (match_operand:SF 0 "nonimmediate_operand" "=r,r, r,m,v,r,Q,v,v,v")
458	(match_operand:SF 1 "general_operand" " r,m,mF,r,r,v,v,Q,v,W"))]
459	"CSKY_ISA_FEATURE (fpv2_sf)"
460	"* return csky_output_move(insn, operands, SFmode);"
461	)
462
463	(define_insn "*fpuv2_movdf"
464	[(set (match_operand:DF 0 "nonimmediate_operand" "=r,r, r,m, v,?r,Q,v,v,v")
465	(match_operand:DF 1 "general_operand" " r,m,mF,r,?r, v,v,Q,v,m"))]
466	"CSKY_ISA_FEATURE (fpv2_df)"
467	"* return csky_output_movedouble(operands, DFmode);"
468	[(set (attr "length")
469	(symbol_ref "csky_get_movedouble_length (operands)"))]
470	)