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8fbb495f 1/*{{{ Comment. */
4b15dc3c 2
3/* Definitions of FR30 target.
f1717362 4 Copyright (C) 1998-2016 Free Software Foundation, Inc.
4b15dc3c 5 Contributed by Cygnus Solutions.
6
187b36cf 7This file is part of GCC.
4b15dc3c 8
187b36cf 9GCC is free software; you can redistribute it and/or modify
4b15dc3c 10it under the terms of the GNU General Public License as published by
038d1e19 11the Free Software Foundation; either version 3, or (at your option)
4b15dc3c 12any later version.
13
187b36cf 14GCC is distributed in the hope that it will be useful,
4b15dc3c 15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License
038d1e19 20along with GCC; see the file COPYING3. If not see
21<http://www.gnu.org/licenses/>. */
4b15dc3c 22
4b15dc3c 23/*}}}*/ \f
8fbb495f 24/*{{{ Run-time target specifications. */
4b15dc3c 25
26#undef ASM_SPEC
570d39ec 27#define ASM_SPEC ""
4b15dc3c 28
29/* Define this to be a string constant containing `-D' options to define the
30 predefined macros that identify this machine and system. These macros will
1d60d981 31 be predefined unless the `-ansi' option is specified. */
4b15dc3c 32
08a444cb 33#define TARGET_CPU_CPP_BUILTINS() \
34 do \
35 { \
36 builtin_define_std ("fr30"); \
37 builtin_assert ("machine=fr30"); \
38 } \
39 while (0)
4b15dc3c 40
4b15dc3c 41#undef STARTFILE_SPEC
42#define STARTFILE_SPEC "crt0.o%s crti.o%s crtbegin.o%s"
43
44/* Include the OS stub library, so that the code can be simulated.
45 This is not the right way to do this. Ideally this kind of thing
46 should be done in the linker script - but I have not worked out how
47 to specify the location of a linker script in a gcc command line yet... */
48#undef ENDFILE_SPEC
49#define ENDFILE_SPEC "%{!mno-lsim:-lsim} crtend.o%s crtn.o%s"
50
ecf20f53 51#undef LIB_SPEC
52#define LIB_SPEC "-lc"
53
54#undef LINK_SPEC
55#define LINK_SPEC "%{h*} %{v:-V} \
56 %{static:-Bstatic} %{shared:-shared} %{symbolic:-Bsymbolic}"
57
4b15dc3c 58/*}}}*/ \f
8fbb495f 59/*{{{ Storage Layout. */
4b15dc3c 60
4b15dc3c 61#define BITS_BIG_ENDIAN 1
62
4b15dc3c 63#define BYTES_BIG_ENDIAN 1
64
4b15dc3c 65#define WORDS_BIG_ENDIAN 1
66
4b15dc3c 67#define UNITS_PER_WORD 4
68
8fbb495f 69#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
70 do \
71 { \
72 if (GET_MODE_CLASS (MODE) == MODE_INT \
73 && GET_MODE_SIZE (MODE) < 4) \
74 (MODE) = SImode; \
75 } \
76 while (0)
4b15dc3c 77
4b15dc3c 78#define PARM_BOUNDARY 32
79
4b15dc3c 80#define STACK_BOUNDARY 32
81
4b15dc3c 82#define FUNCTION_BOUNDARY 32
83
4b15dc3c 84#define BIGGEST_ALIGNMENT 32
85
4b15dc3c 86#define DATA_ALIGNMENT(TYPE, ALIGN) \
87 (TREE_CODE (TYPE) == ARRAY_TYPE \
88 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
89 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
90
4b15dc3c 91#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
92 (TREE_CODE (EXP) == STRING_CST \
93 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
94
4b15dc3c 95#define STRICT_ALIGNMENT 1
96
4b15dc3c 97#define PCC_BITFIELD_TYPE_MATTERS 1
98
4b15dc3c 99/*}}}*/ \f
8fbb495f 100/*{{{ Layout of Source Language Data Types. */
4b15dc3c 101
4b15dc3c 102#define SHORT_TYPE_SIZE 16
103#define INT_TYPE_SIZE 32
104#define LONG_TYPE_SIZE 32
105#define LONG_LONG_TYPE_SIZE 64
106#define FLOAT_TYPE_SIZE 32
107#define DOUBLE_TYPE_SIZE 64
108#define LONG_DOUBLE_TYPE_SIZE 64
109
4b15dc3c 110#define DEFAULT_SIGNED_CHAR 1
111
ecf20f53 112#undef SIZE_TYPE
113#define SIZE_TYPE "unsigned int"
114
115#undef PTRDIFF_TYPE
116#define PTRDIFF_TYPE "int"
117
118#undef WCHAR_TYPE
119#define WCHAR_TYPE "long int"
120
121#undef WCHAR_TYPE_SIZE
122#define WCHAR_TYPE_SIZE BITS_PER_WORD
123
4b15dc3c 124/*}}}*/ \f
8fbb495f 125/*{{{ REGISTER BASICS. */
4b15dc3c 126
127/* Number of hardware registers known to the compiler. They receive numbers 0
128 through `FIRST_PSEUDO_REGISTER-1'; thus, the first pseudo register's number
129 really is assigned the number `FIRST_PSEUDO_REGISTER'. */
130#define FIRST_PSEUDO_REGISTER 21
131
132/* Fixed register assignments: */
133
134/* Here we do a BAD THING - reserve a register for use by the machine
135 description file. There are too many places in compiler where it
136 assumes that it can issue a branch or jump instruction without
137 providing a scratch register for it, and reload just cannot cope, so
138 we keep a register back for these situations. */
139#define COMPILER_SCRATCH_REGISTER 0
140
141/* The register that contains the result of a function call. */
142#define RETURN_VALUE_REGNUM 4
143
144/* The first register that can contain the arguments to a function. */
145#define FIRST_ARG_REGNUM 4
146
147/* A call-used register that can be used during the function prologue. */
148#define PROLOGUE_TMP_REGNUM COMPILER_SCRATCH_REGISTER
149
150/* Register numbers used for passing a function's static chain pointer. If
151 register windows are used, the register number as seen by the called
152 function is `STATIC_CHAIN_INCOMING_REGNUM', while the register number as
153 seen by the calling function is `STATIC_CHAIN_REGNUM'. If these registers
154 are the same, `STATIC_CHAIN_INCOMING_REGNUM' need not be defined.
155
156 The static chain register need not be a fixed register.
157
158 If the static chain is passed in memory, these macros should not be defined;
159 instead, the next two macros should be defined. */
160#define STATIC_CHAIN_REGNUM 12
161/* #define STATIC_CHAIN_INCOMING_REGNUM */
162
163/* An FR30 specific hardware register. */
164#define ACCUMULATOR_REGNUM 13
165
166/* The register number of the frame pointer register, which is used to access
167 automatic variables in the stack frame. On some machines, the hardware
168 determines which register this is. On other machines, you can choose any
169 register you wish for this purpose. */
170#define FRAME_POINTER_REGNUM 14
171
172/* The register number of the stack pointer register, which must also be a
173 fixed register according to `FIXED_REGISTERS'. On most machines, the
174 hardware determines which register this is. */
175#define STACK_POINTER_REGNUM 15
176
177/* The following a fake hard registers that describe some of the dedicated
178 registers on the FR30. */
179#define CONDITION_CODE_REGNUM 16
180#define RETURN_POINTER_REGNUM 17
181#define MD_HIGH_REGNUM 18
182#define MD_LOW_REGNUM 19
183
184/* An initializer that says which registers are used for fixed purposes all
185 throughout the compiled code and are therefore not available for general
186 allocation. These would include the stack pointer, the frame pointer
187 (except on machines where that can be used as a general register when no
188 frame pointer is needed), the program counter on machines where that is
189 considered one of the addressable registers, and any other numbered register
190 with a standard use.
191
192 This information is expressed as a sequence of numbers, separated by commas
193 and surrounded by braces. The Nth number is 1 if register N is fixed, 0
194 otherwise.
195
196 The table initialized from this macro, and the table initialized by the
197 following one, may be overridden at run time either automatically, by the
b2d7ede1 198 actions of the macro `TARGET_CONDITIONAL_REGISTER_USAGE', or by the user
199 with the command options `-ffixed-REG', `-fcall-used-REG' and
200 `-fcall-saved-REG'. */
4b15dc3c 201#define FIXED_REGISTERS \
202 { 1, 0, 0, 0, 0, 0, 0, 0, /* 0 - 7 */ \
203 0, 0, 0, 0, 0, 0, 0, 1, /* 8 - 15 */ \
204 1, 1, 1, 1, 1 } /* 16 - 20 */
205
206/* XXX - MDL and MDH set as fixed for now - this is until I can get the
207 mul patterns working. */
208
209/* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered (in
210 general) by function calls as well as for fixed registers. This macro
211 therefore identifies the registers that are not available for general
212 allocation of values that must live across function calls.
213
214 If a register has 0 in `CALL_USED_REGISTERS', the compiler automatically
215 saves it on function entry and restores it on function exit, if the register
216 is used within the function. */
217#define CALL_USED_REGISTERS \
218 { 1, 1, 1, 1, 1, 1, 1, 1, /* 0 - 7 */ \
219 0, 0, 0, 0, 1, 1, 0, 1, /* 8 - 15 */ \
220 1, 1, 1, 1, 1 } /* 16 - 20 */
221
222/* A C initializer containing the assembler's names for the machine registers,
223 each one as a C string constant. This is what translates register numbers
224 in the compiler into assembler language. */
225#define REGISTER_NAMES \
226{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
227 "r8", "r9", "r10", "r11", "r12", "ac", "fp", "sp", \
228 "cc", "rp", "mdh", "mdl", "ap" \
229}
230
231/* If defined, a C initializer for an array of structures containing a name and
232 a register number. This macro defines additional names for hard registers,
233 thus allowing the `asm' option in declarations to refer to registers using
234 alternate names. */
235#define ADDITIONAL_REGISTER_NAMES \
236{ \
237 {"r13", 13}, {"r14", 14}, {"r15", 15}, {"usp", 15}, {"ps", 16}\
238}
239
240/*}}}*/ \f
8fbb495f 241/*{{{ How Values Fit in Registers. */
4b15dc3c 242
243/* A C expression for the number of consecutive hard registers, starting at
244 register number REGNO, required to hold a value of mode MODE. */
245
246#define HARD_REGNO_NREGS(REGNO, MODE) \
247 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
248
249/* A C expression that is nonzero if it is permissible to store a value of mode
250 MODE in hard register number REGNO (or in several registers starting with
251 that one). */
252
253#define HARD_REGNO_MODE_OK(REGNO, MODE) 1
254
255/* A C expression that is nonzero if it is desirable to choose register
256 allocation so as to avoid move instructions between a value of mode MODE1
257 and a value of mode MODE2.
258
259 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are
260 ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be
261 zero. */
262#define MODES_TIEABLE_P(MODE1, MODE2) 1
263
4b15dc3c 264/*}}}*/ \f
8fbb495f 265/*{{{ Register Classes. */
4b15dc3c 266
267/* An enumeral type that must be defined with all the register class names as
268 enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last
269 register class, followed by one more enumeral value, `LIM_REG_CLASSES',
270 which is not a register class but rather tells how many classes there are.
271
272 Each register class has a number, which is the value of casting the class
273 name to type `int'. The number serves as an index in many of the tables
274 described below. */
275enum reg_class
276{
277 NO_REGS,
278 MULTIPLY_32_REG, /* the MDL register as used by the MULH, MULUH insns */
279 MULTIPLY_64_REG, /* the MDH,MDL register pair as used by MUL and MULU */
280 LOW_REGS, /* registers 0 through 7 */
281 HIGH_REGS, /* registers 8 through 15 */
a361b456 282 REAL_REGS, /* i.e. all the general hardware registers on the FR30 */
4b15dc3c 283 ALL_REGS,
284 LIM_REG_CLASSES
285};
286
287#define GENERAL_REGS REAL_REGS
288#define N_REG_CLASSES ((int) LIM_REG_CLASSES)
289
290/* An initializer containing the names of the register classes as C string
291 constants. These names are used in writing some of the debugging dumps. */
292#define REG_CLASS_NAMES \
293{ \
294 "NO_REGS", \
295 "MULTIPLY_32_REG", \
296 "MULTIPLY_64_REG", \
297 "LOW_REGS", \
298 "HIGH_REGS", \
299 "REAL_REGS", \
300 "ALL_REGS" \
301 }
302
303/* An initializer containing the contents of the register classes, as integers
304 which are bit masks. The Nth integer specifies the contents of class N.
305 The way the integer MASK is interpreted is that register R is in the class
306 if `MASK & (1 << R)' is 1.
307
308 When the machine has more than 32 registers, an integer does not suffice.
309 Then the integers are replaced by sub-initializers, braced groupings
310 containing several integers. Each sub-initializer must be suitable as an
311 initializer for the type `HARD_REG_SET' which is defined in
312 `hard-reg-set.h'. */
4a8d2895 313#define REG_CLASS_CONTENTS \
314{ \
315 { 0 }, \
316 { 1 << MD_LOW_REGNUM }, \
317 { (1 << MD_LOW_REGNUM) | (1 << MD_HIGH_REGNUM) }, \
318 { (1 << 8) - 1 }, \
319 { ((1 << 8) - 1) << 8 }, \
320 { (1 << CONDITION_CODE_REGNUM) - 1 }, \
321 { (1 << FIRST_PSEUDO_REGISTER) - 1 } \
4b15dc3c 322}
323
324/* A C expression whose value is a register class containing hard register
325 REGNO. In general there is more than one such class; choose a class which
326 is "minimal", meaning that no smaller class also contains the register. */
327#define REGNO_REG_CLASS(REGNO) \
328 ( (REGNO) < 8 ? LOW_REGS \
329 : (REGNO) < CONDITION_CODE_REGNUM ? HIGH_REGS \
330 : (REGNO) == MD_LOW_REGNUM ? MULTIPLY_32_REG \
331 : (REGNO) == MD_HIGH_REGNUM ? MULTIPLY_64_REG \
332 : ALL_REGS)
333
334/* A macro whose definition is the name of the class to which a valid base
335 register must belong. A base register is one used in an address which is
336 the register value plus a displacement. */
337#define BASE_REG_CLASS REAL_REGS
338
339/* A macro whose definition is the name of the class to which a valid index
340 register must belong. An index register is one used in an address where its
341 value is either multiplied by a scale factor or added to another register
342 (as well as added to a displacement). */
343#define INDEX_REG_CLASS REAL_REGS
344
4b15dc3c 345/* A C expression which is nonzero if register number NUM is suitable for use
346 as a base register in operand addresses. It may be either a suitable hard
347 register or a pseudo register that has been allocated such a hard register. */
348#define REGNO_OK_FOR_BASE_P(NUM) 1
349
350/* A C expression which is nonzero if register number NUM is suitable for use
351 as an index register in operand addresses. It may be either a suitable hard
352 register or a pseudo register that has been allocated such a hard register.
353
354 The difference between an index register and a base register is that the
355 index register may be scaled. If an address involves the sum of two
356 registers, neither one of them scaled, then either one may be labeled the
357 "base" and the other the "index"; but whichever labeling is used must fit
358 the machine's constraints of which registers may serve in each capacity.
359 The compiler will try both labelings, looking for one that is valid, and
360 will reload one or both registers only if neither labeling works. */
361#define REGNO_OK_FOR_INDEX_P(NUM) 1
362
4b15dc3c 363/* A C expression for the maximum number of consecutive registers of
364 class CLASS needed to hold a value of mode MODE.
365
366 This is closely related to the macro `HARD_REGNO_NREGS'. In fact, the value
367 of the macro `CLASS_MAX_NREGS (CLASS, MODE)' should be the maximum value of
368 `HARD_REGNO_NREGS (REGNO, MODE)' for all REGNO values in the class CLASS.
369
370 This macro helps control the handling of multiple-word values in
371 the reload pass. */
372#define CLASS_MAX_NREGS(CLASS, MODE) HARD_REGNO_NREGS (0, MODE)
373
4b15dc3c 374/*}}}*/ \f
8fbb495f 375/*{{{ Basic Stack Layout. */
4b15dc3c 376
377/* Define this macro if pushing a word onto the stack moves the stack pointer
378 to a smaller address. */
379#define STACK_GROWS_DOWNWARD 1
380
3ce7ff97 381/* Define this to macro nonzero if the addresses of local variable slots
d28d5017 382 are at negative offsets from the frame pointer. */
4b15dc3c 383#define FRAME_GROWS_DOWNWARD 1
384
4b15dc3c 385/* Offset from the frame pointer to the first local variable slot to be
386 allocated.
387
388 If `FRAME_GROWS_DOWNWARD', find the next slot's offset by subtracting the
389 first slot's length from `STARTING_FRAME_OFFSET'. Otherwise, it is found by
390 adding the length of the first slot to the value `STARTING_FRAME_OFFSET'. */
391/* #define STARTING_FRAME_OFFSET -4 */
392#define STARTING_FRAME_OFFSET 0
393
394/* Offset from the stack pointer register to the first location at which
395 outgoing arguments are placed. If not specified, the default value of zero
396 is used. This is the proper value for most machines.
397
398 If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first
399 location at which outgoing arguments are placed. */
400#define STACK_POINTER_OFFSET 0
401
402/* Offset from the argument pointer register to the first argument's address.
403 On some machines it may depend on the data type of the function.
404
405 If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first
406 argument's address. */
407#define FIRST_PARM_OFFSET(FUNDECL) 0
408
4b15dc3c 409/* A C expression whose value is RTL representing the location of the incoming
410 return address at the beginning of any function, before the prologue. This
411 RTL is either a `REG', indicating that the return value is saved in `REG',
412 or a `MEM' representing a location in the stack.
413
414 You only need to define this macro if you want to support call frame
415 debugging information like that provided by DWARF 2. */
416#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, RETURN_POINTER_REGNUM)
417
4b15dc3c 418/*}}}*/ \f
419/*{{{ Register That Address the Stack Frame. */
420
4b15dc3c 421/* The register number of the arg pointer register, which is used to access the
422 function's argument list. On some machines, this is the same as the frame
423 pointer register. On some machines, the hardware determines which register
424 this is. On other machines, you can choose any register you wish for this
425 purpose. If this is not the same register as the frame pointer register,
426 then you must mark it as a fixed register according to `FIXED_REGISTERS', or
427 arrange to be able to eliminate it. */
428#define ARG_POINTER_REGNUM 20
429
4b15dc3c 430/*}}}*/ \f
8fbb495f 431/*{{{ Eliminating the Frame Pointer and the Arg Pointer. */
4b15dc3c 432
4b15dc3c 433/* If defined, this macro specifies a table of register pairs used to eliminate
434 unneeded registers that point into the stack frame. If it is not defined,
435 the only elimination attempted by the compiler is to replace references to
436 the frame pointer with references to the stack pointer.
437
438 The definition of this macro is a list of structure initializations, each of
439 which specifies an original and replacement register.
440
441 On some machines, the position of the argument pointer is not known until
442 the compilation is completed. In such a case, a separate hard register must
443 be used for the argument pointer. This register can be eliminated by
444 replacing it with either the frame pointer or the argument pointer,
445 depending on whether or not the frame pointer has been eliminated.
446
447 In this case, you might specify:
448 #define ELIMINABLE_REGS \
449 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
450 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
451 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
452
453 Note that the elimination of the argument pointer with the stack pointer is
454 specified first since that is the preferred elimination. */
455
8fbb495f 456#define ELIMINABLE_REGS \
457{ \
458 {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
459 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
460 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
4b15dc3c 461}
462
4b15dc3c 463/* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It specifies the
464 initial difference between the specified pair of registers. This macro must
465 be defined if `ELIMINABLE_REGS' is defined. */
466#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
467 (OFFSET) = fr30_compute_frame_size (FROM, TO)
468
4b15dc3c 469/*}}}*/ \f
8fbb495f 470/*{{{ Passing Function Arguments on the Stack. */
4b15dc3c 471
4b15dc3c 472/* If defined, the maximum amount of space required for outgoing arguments will
473 be computed and placed into the variable
abe32cce 474 `crtl->outgoing_args_size'. No space will be pushed onto the
4b15dc3c 475 stack for each call; instead, the function prologue should increase the
476 stack frame size by this amount.
477
478 Defining both `PUSH_ROUNDING' and `ACCUMULATE_OUTGOING_ARGS' is not
479 proper. */
4448f543 480#define ACCUMULATE_OUTGOING_ARGS 1
4b15dc3c 481
4b15dc3c 482/*}}}*/ \f
8fbb495f 483/*{{{ Function Arguments in Registers. */
4b15dc3c 484
4b15dc3c 485/* The number of register assigned to holding function arguments. */
486
487#define FR30_NUM_ARG_REGS 4
488
4b15dc3c 489/* A C type for declaring a variable that is used as the first argument of
490 `FUNCTION_ARG' and other related values. For some target machines, the type
491 `int' suffices and can hold the number of bytes of argument so far.
492
493 There is no need to record in `CUMULATIVE_ARGS' anything about the arguments
494 that have been passed on the stack. The compiler has other variables to
495 keep track of that. For target machines on which all arguments are passed
496 on the stack, there is no need to store anything in `CUMULATIVE_ARGS';
497 however, the data structure must exist and should not be empty, so use
498 `int'. */
499/* On the FR30 this value is an accumulating count of the number of argument
500 registers that have been filled with argument values, as opposed to say,
501 the number of bytes of argument accumulated so far. */
c4eb7dfc 502#define CUMULATIVE_ARGS int
4b15dc3c 503
4b15dc3c 504/* A C statement (sans semicolon) for initializing the variable CUM for the
505 state at the beginning of the argument list. The variable has type
506 `CUMULATIVE_ARGS'. The value of FNTYPE is the tree node for the data type
507 of the function which will receive the args, or 0 if the args are to a
508 compiler support library function. The value of INDIRECT is nonzero when
509 processing an indirect call, for example a call through a function pointer.
510 The value of INDIRECT is zero for a call to an explicitly named function, a
511 library function call, or when `INIT_CUMULATIVE_ARGS' is used to find
512 arguments for the function being compiled.
513
514 When processing a call to a compiler support library function, LIBNAME
515 identifies which one. It is a `symbol_ref' rtx which contains the name of
516 the function, as a string. LIBNAME is 0 when an ordinary C function call is
517 being processed. Thus, each time this macro is called, either LIBNAME or
518 FNTYPE is nonzero, but never both of them at once. */
30c70355 519#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
520 (CUM) = 0
4b15dc3c 521
4b15dc3c 522/* A C expression that is nonzero if REGNO is the number of a hard register in
523 which function arguments are sometimes passed. This does *not* include
524 implicit arguments such as the static chain and the structure-value address.
525 On many machines, no registers can be used for this purpose since all
526 function arguments are pushed on the stack. */
527#define FUNCTION_ARG_REGNO_P(REGNO) \
528 ((REGNO) >= FIRST_ARG_REGNUM && ((REGNO) < FIRST_ARG_REGNUM + FR30_NUM_ARG_REGS))
529
4b15dc3c 530/*}}}*/ \f
8fbb495f 531/*{{{ How Large Values are Returned. */
4b15dc3c 532
533/* Define this macro to be 1 if all structure and union return values must be
534 in memory. Since this results in slower code, this should be defined only
535 if needed for compatibility with other compilers or with an ABI. If you
536 define this macro to be 0, then the conventions used for structure and union
22c61100 537 return values are decided by the `TARGET_RETURN_IN_MEMORY' macro.
4b15dc3c 538
539 If not defined, this defaults to the value 1. */
540#define DEFAULT_PCC_STRUCT_RETURN 1
541
4b15dc3c 542/*}}}*/ \f
543/*{{{ Generating Code for Profiling. */
544
545/* A C statement or compound statement to output to FILE some assembler code to
546 call the profiling subroutine `mcount'. Before calling, the assembler code
547 must load the address of a counter variable into a register where `mcount'
548 expects to find the address. The name of this variable is `LP' followed by
549 the number LABELNO, so you would generate the name using `LP%d' in a
550 `fprintf'.
551
552 The details of how the address should be passed to `mcount' are determined
187b36cf 553 by your operating system environment, not by GCC. To figure them out,
4b15dc3c 554 compile a small program for profiling using the system's installed C
555 compiler and look at the assembler code that results. */
556#define FUNCTION_PROFILER(FILE, LABELNO) \
557{ \
558 fprintf (FILE, "\t mov rp, r1\n" ); \
559 fprintf (FILE, "\t ldi:32 mcount, r0\n" ); \
560 fprintf (FILE, "\t call @r0\n" ); \
561 fprintf (FILE, ".word\tLP%d\n", LABELNO); \
562}
563
4b15dc3c 564/*}}}*/ \f
565/*{{{ Trampolines for Nested Functions. */
566
4b15dc3c 567/* A C expression for the size in bytes of the trampoline, as an integer. */
1b30c037 568#define TRAMPOLINE_SIZE 18
569
570/* We want the trampoline to be aligned on a 32bit boundary so that we can
571 make sure the location of the static chain & target function within
572 the trampoline is also aligned on a 32bit boundary. */
573#define TRAMPOLINE_ALIGNMENT 32
4b15dc3c 574
4b15dc3c 575/*}}}*/ \f
8fbb495f 576/*{{{ Addressing Modes. */
4b15dc3c 577
4b15dc3c 578/* A number, the maximum number of registers that can appear in a valid memory
579 address. Note that it is up to you to specify a value equal to the maximum
580 number that `GO_IF_LEGITIMATE_ADDRESS' would ever accept. */
581#define MAX_REGS_PER_ADDRESS 1
582
583/* A C compound statement with a conditional `goto LABEL;' executed if X (an
584 RTX) is a legitimate memory address on the target machine for a memory
7811991d 585 operand of mode MODE. */
4b15dc3c 586
587/* On the FR30 we only have one real addressing mode - an address in a
588 register. There are three special cases however:
589
590 * indexed addressing using small positive offsets from the stack pointer
591
592 * indexed addressing using small signed offsets from the frame pointer
593
f747aa2d 594 * register plus register addressing using R13 as the base register.
4b15dc3c 595
596 At the moment we only support the first two of these special cases. */
597
598#ifdef REG_OK_STRICT
599#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
600 do \
601 { \
602 if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
603 goto LABEL; \
604 if (GET_CODE (X) == PLUS \
605 && ((MODE) == SImode || (MODE) == SFmode) \
3688a7ee 606 && GET_CODE (XEXP (X, 0)) == REG \
607 && REGNO (XEXP (X, 0)) == STACK_POINTER_REGNUM \
4b15dc3c 608 && GET_CODE (XEXP (X, 1)) == CONST_INT \
609 && IN_RANGE (INTVAL (XEXP (X, 1)), 0, (1 << 6) - 4)) \
610 goto LABEL; \
611 if (GET_CODE (X) == PLUS \
612 && ((MODE) == SImode || (MODE) == SFmode) \
3688a7ee 613 && GET_CODE (XEXP (X, 0)) == REG \
614 && REGNO (XEXP (X, 0)) == FRAME_POINTER_REGNUM \
4b15dc3c 615 && GET_CODE (XEXP (X, 1)) == CONST_INT \
616 && IN_RANGE (INTVAL (XEXP (X, 1)), -(1 << 9), (1 << 9) - 4)) \
617 goto LABEL; \
618 } \
619 while (0)
620#else
621#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
622 do \
623 { \
624 if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
625 goto LABEL; \
626 if (GET_CODE (X) == PLUS \
627 && ((MODE) == SImode || (MODE) == SFmode) \
3688a7ee 628 && GET_CODE (XEXP (X, 0)) == REG \
629 && REGNO (XEXP (X, 0)) == STACK_POINTER_REGNUM \
4b15dc3c 630 && GET_CODE (XEXP (X, 1)) == CONST_INT \
631 && IN_RANGE (INTVAL (XEXP (X, 1)), 0, (1 << 6) - 4)) \
632 goto LABEL; \
633 if (GET_CODE (X) == PLUS \
634 && ((MODE) == SImode || (MODE) == SFmode) \
3688a7ee 635 && GET_CODE (XEXP (X, 0)) == REG \
636 && (REGNO (XEXP (X, 0)) == FRAME_POINTER_REGNUM \
637 || REGNO (XEXP (X, 0)) == ARG_POINTER_REGNUM) \
4b15dc3c 638 && GET_CODE (XEXP (X, 1)) == CONST_INT \
639 && IN_RANGE (INTVAL (XEXP (X, 1)), -(1 << 9), (1 << 9) - 4)) \
640 goto LABEL; \
641 } \
642 while (0)
643#endif
644
645/* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
646 use as a base register. For hard registers, it should always accept those
647 which the hardware permits and reject the others. Whether the macro accepts
648 or rejects pseudo registers must be controlled by `REG_OK_STRICT' as
649 described above. This usually requires two variant definitions, of which
650 `REG_OK_STRICT' controls the one actually used. */
651#ifdef REG_OK_STRICT
652#define REG_OK_FOR_BASE_P(X) (((unsigned) REGNO (X)) <= STACK_POINTER_REGNUM)
653#else
654#define REG_OK_FOR_BASE_P(X) 1
655#endif
656
657/* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
658 use as an index register.
659
660 The difference between an index register and a base register is that the
661 index register may be scaled. If an address involves the sum of two
662 registers, neither one of them scaled, then either one may be labeled the
663 "base" and the other the "index"; but whichever labeling is used must fit
664 the machine's constraints of which registers may serve in each capacity.
665 The compiler will try both labelings, looking for one that is valid, and
666 will reload one or both registers only if neither labeling works. */
667#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
668
4b15dc3c 669/*}}}*/ \f
670/*{{{ Describing Relative Costs of Operations */
671
4b15dc3c 672/* Define this macro as a C expression which is nonzero if accessing less than
673 a word of memory (i.e. a `char' or a `short') is no faster than accessing a
674 word of memory, i.e., if such access require more than one instruction or if
675 there is no difference in cost between byte and (aligned) word loads.
676
677 When this macro is not defined, the compiler will access a field by finding
678 the smallest containing object; when it is defined, a fullword load will be
679 used if alignment permits. Unless bytes accesses are faster than word
680 accesses, using word accesses is preferable since it may eliminate
681 subsequent memory access if subsequent accesses occur to other fields in the
682 same word of the structure, but to different bytes. */
683#define SLOW_BYTE_ACCESS 1
684
4b15dc3c 685/*}}}*/ \f
686/*{{{ Dividing the output into sections. */
687
688/* A C expression whose value is a string containing the assembler operation
689 that should precede instructions and read-only data. Normally `".text"' is
690 right. */
70b3688e 691#define TEXT_SECTION_ASM_OP "\t.text"
4b15dc3c 692
693/* A C expression whose value is a string containing the assembler operation to
694 identify the following data as writable initialized data. Normally
695 `".data"' is right. */
70b3688e 696#define DATA_SECTION_ASM_OP "\t.data"
4b15dc3c 697
64282dfc 698#define BSS_SECTION_ASM_OP "\t.section .bss"
4b15dc3c 699
4b15dc3c 700/*}}}*/ \f
701/*{{{ The Overall Framework of an Assembler File. */
702
4b15dc3c 703/* A C string constant describing how to begin a comment in the target
704 assembler language. The compiler assumes that the comment will end at the
705 end of the line. */
706#define ASM_COMMENT_START ";"
707
708/* A C string constant for text to be output before each `asm' statement or
709 group of consecutive ones. Normally this is `"#APP"', which is a comment
710 that has no effect on most assemblers but tells the GNU assembler that it
711 must check the lines that follow for all valid assembler constructs. */
712#define ASM_APP_ON "#APP\n"
713
714/* A C string constant for text to be output after each `asm' statement or
715 group of consecutive ones. Normally this is `"#NO_APP"', which tells the
716 GNU assembler to resume making the time-saving assumptions that are valid
717 for ordinary compiler output. */
718#define ASM_APP_OFF "#NO_APP\n"
719
4b15dc3c 720/*}}}*/ \f
721/*{{{ Output and Generation of Labels. */
722
0036ad94 723/* Globalizing directive for a label. */
724#define GLOBAL_ASM_OP "\t.globl "
4b15dc3c 725
4b15dc3c 726/*}}}*/ \f
727/*{{{ Output of Assembler Instructions. */
728
4b15dc3c 729/* A C compound statement to output to stdio stream STREAM the assembler syntax
730 for an instruction operand X. X is an RTL expression.
731
732 CODE is a value that can be used to specify one of several ways of printing
733 the operand. It is used when identical operands must be printed differently
734 depending on the context. CODE comes from the `%' specification that was
735 used to request printing of the operand. If the specification was just
736 `%DIGIT' then CODE is 0; if the specification was `%LTR DIGIT' then CODE is
737 the ASCII code for LTR.
738
739 If X is a register, this macro should print the register's name. The names
740 can be found in an array `reg_names' whose type is `char *[]'. `reg_names'
741 is initialized from `REGISTER_NAMES'.
742
743 When the machine description has a specification `%PUNCT' (a `%' followed by
744 a punctuation character), this macro is called with a null pointer for X and
745 the punctuation character for CODE. */
746#define PRINT_OPERAND(STREAM, X, CODE) fr30_print_operand (STREAM, X, CODE)
747
4b15dc3c 748/* A C expression which evaluates to true if CODE is a valid punctuation
749 character for use in the `PRINT_OPERAND' macro. If
750 `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no punctuation
751 characters (except for the standard one, `%') are used in this way. */
752#define PRINT_OPERAND_PUNCT_VALID_P(CODE) (CODE == '#')
753
754/* A C compound statement to output to stdio stream STREAM the assembler syntax
755 for an instruction operand that is a memory reference whose address is X. X
7811991d 756 is an RTL expression. */
4b15dc3c 757
4b15dc3c 758#define PRINT_OPERAND_ADDRESS(STREAM, X) fr30_print_operand_address (STREAM, X)
4b15dc3c 759
4b15dc3c 760#define REGISTER_PREFIX "%"
761#define LOCAL_LABEL_PREFIX "."
762#define USER_LABEL_PREFIX ""
763#define IMMEDIATE_PREFIX ""
764
4b15dc3c 765/*}}}*/ \f
8fbb495f 766/*{{{ Output of Dispatch Tables. */
4b15dc3c 767
768/* This macro should be provided on machines where the addresses in a dispatch
769 table are relative to the table's own address.
770
771 The definition should be a C statement to output to the stdio stream STREAM
772 an assembler pseudo-instruction to generate a difference between two labels.
773 VALUE and REL are the numbers of two internal labels. The definitions of
805e22b2 774 these labels are output using `(*targetm.asm_out.internal_label)', and they must be
4b15dc3c 775 printed in the same way here. For example,
776
777 fprintf (STREAM, "\t.word L%d-L%d\n", VALUE, REL) */
778#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
779fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL)
780
781/* This macro should be provided on machines where the addresses in a dispatch
782 table are absolute.
783
784 The definition should be a C statement to output to the stdio stream STREAM
785 an assembler pseudo-instruction to generate a reference to a label. VALUE
786 is the number of an internal label whose definition is output using
805e22b2 787 `(*targetm.asm_out.internal_label)'. For example,
4b15dc3c 788
789 fprintf (STREAM, "\t.word L%d\n", VALUE) */
790#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
791fprintf (STREAM, "\t.word .L%d\n", VALUE)
792
4b15dc3c 793/*}}}*/ \f
794/*{{{ Assembler Commands for Alignment. */
795
4b15dc3c 796/* A C statement to output to the stdio stream STREAM an assembler command to
797 advance the location counter to a multiple of 2 to the POWER bytes. POWER
798 will be a C expression of type `int'. */
799#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
800 fprintf ((STREAM), "\t.p2align %d\n", (POWER))
801
4b15dc3c 802/*}}}*/ \f
803/*{{{ Miscellaneous Parameters. */
804
805/* An alias for a machine mode name. This is the machine mode that elements of
806 a jump-table should have. */
807#define CASE_VECTOR_MODE SImode
808
4b15dc3c 809/* The maximum number of bytes that a single instruction can move quickly from
810 memory to memory. */
811#define MOVE_MAX 8
812
4b15dc3c 813/* A C expression which is nonzero if on this machine it is safe to "convert"
814 an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller
815 than INPREC) by merely operating on it as if it had only OUTPREC bits.
816
817 On many machines, this expression can be 1.
818
819 When `TRULY_NOOP_TRUNCATION' returns 1 for a pair of sizes for modes for
820 which `MODES_TIEABLE_P' is 0, suboptimal code can result. If this is the
821 case, making `TRULY_NOOP_TRUNCATION' return 0 in such cases may improve
822 things. */
823#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
824
4b15dc3c 825/* An alias for the machine mode for pointers. On most machines, define this
826 to be the integer mode corresponding to the width of a hardware pointer;
827 `SImode' on 32-bit machine or `DImode' on 64-bit machines. On some machines
828 you must define this to be one of the partial integer modes, such as
829 `PSImode'.
830
831 The width of `Pmode' must be at least as large as the value of
832 `POINTER_SIZE'. If it is not equal, you must define the macro
833 `POINTERS_EXTEND_UNSIGNED' to specify how pointers are extended to `Pmode'. */
834#define Pmode SImode
835
836/* An alias for the machine mode used for memory references to functions being
837 called, in `call' RTL expressions. On most machines this should be
838 `QImode'. */
839#define FUNCTION_MODE QImode
840
4b15dc3c 841/*}}}*/ \f
842
843/* Local Variables: */
844/* folded-file: t */
845/* End: */