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fef939d6
JB
1/* Target Code for ft32
2 Copyright (C) 2015 Free Software Foundation
3 Contributed by FTDI <support@ftdi.com>
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21#include "config.h"
22#include "system.h"
23#include "coretypes.h"
c7131fb2 24#include "backend.h"
e11c4407 25#include "target.h"
fef939d6 26#include "rtl.h"
e11c4407 27#include "tree.h"
c7131fb2 28#include "df.h"
e11c4407 29#include "tm_p.h"
fef939d6 30#include "regs.h"
e11c4407 31#include "emit-rtl.h"
fef939d6 32#include "diagnostic-core.h"
e11c4407 33#include "output.h"
fef939d6
JB
34#include "stor-layout.h"
35#include "calls.h"
36#include "expr.h"
fef939d6 37#include "builtins.h"
fef939d6 38
994c5d85
RS
39/* This file should be included last. */
40#include "target-def.h"
41
fef939d6
JB
42#include <stdint.h>
43
44#define LOSE_AND_RETURN(msgid, x) \
45 do \
46 { \
47 ft32_operand_lossage (msgid, x); \
48 return; \
49 } while (0)
50
51/* Worker function for TARGET_RETURN_IN_MEMORY. */
52
53static bool
54ft32_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
55{
56 const HOST_WIDE_INT size = int_size_in_bytes (type);
57 return (size == -1 || size > 2 * UNITS_PER_WORD);
58}
59
60/* Define how to find the value returned by a function.
61 VALTYPE is the data type of the value (as a tree).
62 If the precise function being called is known, FUNC is its
63 FUNCTION_DECL; otherwise, FUNC is 0.
64
65 We always return values in register $r0 for ft32. */
66
67static rtx
68ft32_function_value (const_tree valtype,
69 const_tree fntype_or_decl ATTRIBUTE_UNUSED,
70 bool outgoing ATTRIBUTE_UNUSED)
71{
72 return gen_rtx_REG (TYPE_MODE (valtype), FT32_R0);
73}
74
75/* Define how to find the value returned by a library function.
76
77 We always return values in register $r0 for ft32. */
78
79static rtx
80ft32_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED)
81{
82 return gen_rtx_REG (mode, FT32_R0);
83}
84
85/* Handle TARGET_FUNCTION_VALUE_REGNO_P.
86
87 We always return values in register $r0 for ft32. */
88
89static bool
90ft32_function_value_regno_p (const unsigned int regno)
91{
92 return (regno == FT32_R0);
93}
94
95/* Emit an error message when we're in an asm, and a fatal error for
96 "normal" insns. Formatted output isn't easily implemented, since we
97 use output_operand_lossage to output the actual message and handle the
98 categorization of the error. */
99
100static void
101ft32_operand_lossage (const char *msgid, rtx op)
102{
103 debug_rtx (op);
104 output_operand_lossage ("%s", msgid);
105}
106
107/* The PRINT_OPERAND_ADDRESS worker. */
108
109void
110ft32_print_operand_address (FILE * file, rtx x)
111{
112 switch (GET_CODE (x))
113 {
114 case REG:
115 fprintf (file, "%s,0", reg_names[REGNO (x)]);
116 break;
117
118 case PLUS:
119 switch (GET_CODE (XEXP (x, 1)))
120 {
121 case CONST_INT:
122 fprintf (file, "%s,%ld",
123 reg_names[REGNO (XEXP (x, 0))], INTVAL (XEXP (x, 1)));
124 break;
125 case SYMBOL_REF:
126 output_addr_const (file, XEXP (x, 1));
127 fprintf (file, "(%s)", reg_names[REGNO (XEXP (x, 0))]);
128 break;
129 case CONST:
130 {
131 rtx plus = XEXP (XEXP (x, 1), 0);
132 if (GET_CODE (XEXP (plus, 0)) == SYMBOL_REF
133 && CONST_INT_P (XEXP (plus, 1)))
134 {
135 output_addr_const (file, XEXP (plus, 0));
136 fprintf (file, "+%ld(%s)", INTVAL (XEXP (plus, 1)),
137 reg_names[REGNO (XEXP (x, 0))]);
138 }
139 else
140 abort ();
141 }
142 break;
143 default:
144 abort ();
145 }
146 break;
147
148 default:
149 output_addr_const (file, x);
150 break;
151 }
152}
153
154/* The PRINT_OPERAND worker. */
155
156void
157ft32_print_operand (FILE * file, rtx x, int code)
158{
159 rtx operand = x;
160
161 /* New code entries should just be added to the switch below. If
162 handling is finished, just return. If handling was just a
163 modification of the operand, the modified operand should be put in
164 "operand", and then do a break to let default handling
165 (zero-modifier) output the operand. */
166
167 switch (code)
168 {
169 case 0:
170 /* No code, print as usual. */
171 break;
172
173 case 'h':
174 if (GET_CODE (operand) != REG)
175 internal_error ("'h' applied to non-register operand");
176 fprintf (file, "%s", reg_names[REGNO (operand) + 1]);
177 return;
178
179 case 'm':
ed1332ee 180 fprintf (file, "%ld", (long) (- INTVAL(x)));
fef939d6
JB
181 return;
182
183 case 'd': // a DW spec, from an integer alignment (for BLKmode insns)
184 {
185 int i = INTVAL (x);
186 char dwspec;
187 switch (i)
188 {
189 case 1:
190 dwspec = 'b';
191 break;
192 case 2:
193 dwspec = 's';
194 break;
195 case 4:
196 dwspec = 'l';
197 break;
198 default:
199 if ((i % 4) != 0)
200 internal_error ("bad alignment: %d", i);
201 else
202 dwspec = 'l';
203 break;
204 }
205 fprintf (file, "%c", dwspec);
206 return;
207 }
208
209 case 'f':
210 {
211 int bf = ft32_as_bitfield (INTVAL (x));
212 fprintf (file, "512|(%d<<5)|%d", bf >> 5, bf & 31);
213 return;
214 }
215
216 case 'g':
217 {
218 int bf = ft32_as_bitfield (0xffffffff ^ INTVAL (x));
219 fprintf (file, "(%d<<5)|%d", bf >> 5, bf & 31);
220 return;
221 }
222
223 case 'b':
224 {
225 ft32_print_operand (file, XEXP (x, 0), 0);
226 return;
227 }
228
229 default:
230 LOSE_AND_RETURN ("invalid operand modifier letter", x);
231 }
232
233 /* Print an operand as without a modifier letter. */
234 switch (GET_CODE (operand))
235 {
236 case REG:
237 fprintf (file, "%s", reg_names[REGNO (operand)]);
238 return;
239
240 case MEM:
241 output_address (XEXP (operand, 0));
242 return;
243
244 default:
245 /* No need to handle all strange variants, let output_addr_const
246 do it for us. */
247 if (CONSTANT_P (operand))
248 {
249 output_addr_const (file, operand);
250 return;
251 }
252
253 LOSE_AND_RETURN ("unexpected operand", x);
254 }
255}
256
257const char *
258ft32_load_immediate (rtx dst, int32_t i)
259{
260 char pattern[100];
261
262 if ((-524288 <= i) && (i <= 524287))
263 {
264 sprintf (pattern, "ldk.l %%0,%d", i);
265 output_asm_insn (pattern, &dst);
266 }
267 else if ((-536870912 <= i) && (i <= 536870911))
268 {
269 ft32_load_immediate (dst, i >> 10);
270 sprintf (pattern, "ldl.l %%0,%%0,%d", i & 1023);
271 output_asm_insn (pattern, &dst);
272 }
273 else
274 {
275 int rd; // rotate distance
276 uint32_t u = i;
277 for (rd = 1; rd < 32; rd++)
278 {
279 u = ((u >> 31) & 1) | (u << 1);
280 if ((-524288 <= (int32_t) u) && ((int32_t) u <= 524287))
281 {
282 ft32_load_immediate (dst, (int32_t) u);
283 sprintf (pattern, "ror.l %%0,%%0,%d", rd);
284 output_asm_insn (pattern, &dst);
285 return "";
286 }
287 }
288 ft32_load_immediate (dst, i >> 10);
289 sprintf (pattern, "ldl.l %%0,%%0,%d", i & 1023);
290 output_asm_insn (pattern, &dst);
291 }
292
293 return "";
294}
295
296// x is a bit mask, for example:
297// 00000000000000000000001111111110
298// If x contains a single bit mask, return the bitfield spec.
299// in the above case it returns ((9 << 5) | 1)
300// Otherwise return -1.
301//
302
303#define NBITS(n) ((1U << (n)) - 1U)
304
305int
306ft32_as_bitfield (unsigned int x)
307{
308 int lobit, hibit;
309
310 if (x == 0)
311 return -1;
312
313 for (lobit = 0; lobit < 32; lobit++)
314 if (x & (1 << lobit))
315 break;
316 for (hibit = 31; hibit >= 0; hibit--)
317 if (x & (1 << hibit))
318 break;
319
320 int width = 1 + hibit - lobit;
321 if (width > 16)
322 return -1;
323
324 if (x != (NBITS (width) << lobit))
325 return -1; // not a clean bitfield
326
327 return ((width & 15) << 5) | lobit;
328}
329
330/* Per-function machine data. */
331struct GTY (()) machine_function
332{
333 /* Number of bytes saved on the stack for callee saved registers. */
334 int callee_saved_reg_size;
335
336 /* Number of bytes saved on the stack for local variables. */
337 int local_vars_size;
338
339 /* The sum of 2 sizes: locals vars and padding byte for saving the
340 * registers. Used in expand_prologue () and expand_epilogue (). */
341 int size_for_adjusting_sp;
342};
343
344/* Zero initialization is OK for all current fields. */
345
346static struct machine_function *
347ft32_init_machine_status (void)
348{
349 return ggc_cleared_alloc < machine_function > ();
350}
351
352
353/* The TARGET_OPTION_OVERRIDE worker.
354 All this curently does is set init_machine_status. */
355static void
356ft32_option_override (void)
357{
358 /* Set the per-function-data initializer. */
359 init_machine_status = ft32_init_machine_status;
360}
361
362/* Implement targetm.select_section. */
363static section *
364ft32_select_section (tree decl, int reloc, unsigned HOST_WIDE_INT align)
365{
366 /* Variables and constants defined in the __ea address space
367 go into a special section named "._ea". */
368 if (TREE_TYPE (decl) != error_mark_node
369 && TYPE_ADDR_SPACE (TREE_TYPE (decl)) == ADDR_SPACE_PM)
370 {
371 /* We might get called with string constants, but get_named_section
372 doesn't like them as they are not DECLs. Also, we need to set
373 flags in that case. */
374 if (!DECL_P (decl))
375 return get_section ("._pm", SECTION_WRITE | SECTION_DEBUG, NULL);
376
377 return get_named_section (decl, "._pm", reloc);
378 }
379
380 return default_elf_select_section (decl, reloc, align);
381}
382
383/* Compute the size of the local area and the size to be adjusted by the
384 * prologue and epilogue. */
385
386static void
387ft32_compute_frame (void)
388{
389 /* For aligning the local variables. */
390 int stack_alignment = STACK_BOUNDARY / BITS_PER_UNIT;
391 int padding_locals;
392 int regno;
393
394 /* Padding needed for each element of the frame. */
395 cfun->machine->local_vars_size = get_frame_size ();
396
397 /* Align to the stack alignment. */
398 padding_locals = cfun->machine->local_vars_size % stack_alignment;
399 if (padding_locals)
400 padding_locals = stack_alignment - padding_locals;
401
402 cfun->machine->local_vars_size += padding_locals;
403
404 cfun->machine->callee_saved_reg_size = 0;
405
406 /* Save callee-saved registers. */
407 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
408 if (df_regs_ever_live_p (regno) && (!call_used_regs[regno]))
409 cfun->machine->callee_saved_reg_size += 4;
410
411 cfun->machine->size_for_adjusting_sp =
412 crtl->args.pretend_args_size
413 + cfun->machine->local_vars_size
414 + (ACCUMULATE_OUTGOING_ARGS ? crtl->outgoing_args_size : 0);
415}
416
417// Must use LINK/UNLINK when...
418// the frame is bigger than 512 bytes so cannot just "SUB" from SP
419// the function actually uses $fp
420
421static int
422must_link (void)
423{
424 int bigframe = (cfun->machine->size_for_adjusting_sp >= 512);
425 return (bigframe || frame_pointer_needed || df_regs_ever_live_p (FT32_FP)
426 || df_regs_ever_live_p (FT32_FP));
427}
428
429void
430ft32_expand_prologue (void)
431{
432 int regno;
433 rtx insn;
434
435 ft32_compute_frame ();
436
ed1332ee
NC
437 if (flag_stack_usage_info)
438 current_function_static_stack_size = cfun->machine->size_for_adjusting_sp;
439
fef939d6
JB
440 if (!must_link () && (cfun->machine->callee_saved_reg_size == 4))
441 {
442 insn =
443 emit_insn (gen_link
444 (gen_rtx_REG (Pmode, FT32_R13),
445 GEN_INT (-cfun->machine->size_for_adjusting_sp)));
446 RTX_FRAME_RELATED_P (insn) = 1;
447 return;
448 }
449 /* Save callee-saved registers. */
450 if (optimize_size)
451 {
452 for (regno = FIRST_PSEUDO_REGISTER; regno-- > 0;)
453 {
454 if (!fixed_regs[regno] && !call_used_regs[regno]
455 && df_regs_ever_live_p (regno))
456 {
457 rtx preg = gen_rtx_REG (Pmode, regno);
458 emit_insn (gen_call_prolog (preg));
459 break;
460 }
461 }
462 }
463 else
464 {
465 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
466 {
467 if (!fixed_regs[regno] && df_regs_ever_live_p (regno)
468 && !call_used_regs[regno])
469 {
470 insn = emit_insn (gen_movsi_push (gen_rtx_REG (Pmode, regno)));
471 RTX_FRAME_RELATED_P (insn) = 1;
472 }
473 }
474 }
475
476 if (65536 <= cfun->machine->size_for_adjusting_sp)
477 {
478 error ("stack frame must be smaller than 64K");
479 return;
480 }
481 if (must_link ())
482 {
483 insn =
484 emit_insn (gen_link
485 (gen_rtx_REG (Pmode, FT32_FP),
486 GEN_INT (-cfun->machine->size_for_adjusting_sp)));
487 RTX_FRAME_RELATED_P (insn) = 1;
488 }
489 else if (cfun->machine->size_for_adjusting_sp > 0)
490 {
491 insn = emit_insn (gen_addsi3 (gen_rtx_REG (SImode, FT32_SP),
492 gen_rtx_REG (SImode, FT32_SP),
493 GEN_INT (-(cfun->machine->
494 size_for_adjusting_sp))));
495 RTX_FRAME_RELATED_P (insn) = 1;
496 }
497}
498
499void
500ft32_expand_epilogue (void)
501{
502 int regno;
503
504 if (!must_link ()
505 && (cfun->machine->size_for_adjusting_sp == 24)
506 && (cfun->machine->callee_saved_reg_size == 0))
507 {
508 emit_jump_insn (gen_returner24 ());
509 return;
510 }
511
512 // Set when the epilog code will also add 24 to $sp
513 int epilog24 = (!must_link ()
514 && (cfun->machine->size_for_adjusting_sp == 24)
515 && optimize_size);
516
517 if (must_link ())
518 {
519 emit_insn (gen_unlink ());
520 }
521 else if (!epilog24 && (cfun->machine->size_for_adjusting_sp > 0))
522 {
523 emit_insn (gen_addsi3 (gen_rtx_REG (SImode, FT32_SP),
524 gen_rtx_REG (SImode, FT32_SP),
525 GEN_INT (cfun->machine->size_for_adjusting_sp)));
526 }
527
528 if (cfun->machine->callee_saved_reg_size != 0)
529 {
530 for (regno = FIRST_PSEUDO_REGISTER; regno-- > 0;)
531 {
532 if (!fixed_regs[regno] && !call_used_regs[regno]
533 && df_regs_ever_live_p (regno))
534 {
535 rtx preg = gen_rtx_REG (Pmode, regno);
536 if (optimize_size)
537 {
538 if (epilog24)
539 emit_insn (gen_jump_epilog24 (preg));
540 else
541 emit_insn (gen_jump_epilog (preg));
542 return;
543 }
544 emit_insn (gen_movsi_pop (preg));
545 }
546 }
547 }
548
549 emit_jump_insn (gen_returner ());
550}
551
552#undef TARGET_FRAME_POINTER_REQUIRED
553#define TARGET_FRAME_POINTER_REQUIRED ft32_frame_pointer_required
554static bool
555ft32_frame_pointer_required (void)
556{
557 return cfun->calls_alloca;
558}
559
560#undef TARGET_CAN_ELIMINATE
561#define TARGET_CAN_ELIMINATE ft32_can_eliminate
562
563/* Return true if register FROM can be eliminated via register TO. */
564
565static bool
566ft32_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
567{
568 return 1;
569 return (to == FRAME_POINTER_REGNUM) || !ft32_frame_pointer_required ();
570}
571
572/* Implements the macro INITIAL_ELIMINATION_OFFSET, return the OFFSET. */
573
574int
575ft32_initial_elimination_offset (int from, int to)
576{
577 ft32_compute_frame ();
578
579 if (from == ARG_POINTER_REGNUM && to == FRAME_POINTER_REGNUM)
580 {
581 return cfun->machine->callee_saved_reg_size + 2 * UNITS_PER_WORD;
582 }
583
584 if (from == ARG_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
585 {
586 int arg_offset;
587 arg_offset = must_link ()? 2 : 1;
588 return ((cfun->machine->callee_saved_reg_size
589 + arg_offset * UNITS_PER_WORD)
590 + cfun->machine->size_for_adjusting_sp);
591 }
592
593 if ((from == FRAME_POINTER_REGNUM) && (to == STACK_POINTER_REGNUM))
594 {
595 return cfun->machine->size_for_adjusting_sp;
596 }
597
598 gcc_unreachable ();
599}
600
601/* Worker function for TARGET_SETUP_INCOMING_VARARGS. */
602
603static void
604ft32_setup_incoming_varargs (cumulative_args_t cum_v,
605 enum machine_mode mode ATTRIBUTE_UNUSED,
606 tree type ATTRIBUTE_UNUSED,
607 int *pretend_size, int no_rtl)
608{
609 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
610 int regno;
611 int regs = 8 - *cum;
612
613 *pretend_size = regs < 0 ? 0 : GET_MODE_SIZE (SImode) * regs;
614
615 if (no_rtl)
616 return;
617
618 for (regno = *cum; regno < 8; regno++)
619 {
620 rtx reg = gen_rtx_REG (SImode, regno);
621 rtx slot = gen_rtx_PLUS (Pmode,
622 gen_rtx_REG (SImode, ARG_POINTER_REGNUM),
623 GEN_INT (UNITS_PER_WORD * (regno - FT32_R0)));
624
625 emit_move_insn (gen_rtx_MEM (SImode, slot), reg);
626 }
627}
628
629
630/* Return the fixed registers used for condition codes. */
631
632static bool
633ft32_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2)
634{
635 *p1 = CC_REG;
636 *p2 = INVALID_REGNUM;
637 return true;
638}
639
640/* Return the next register to be used to hold a function argument or
641 NULL_RTX if there's no more space. */
642
643static rtx
644ft32_function_arg (cumulative_args_t cum_v, enum machine_mode mode,
645 const_tree type ATTRIBUTE_UNUSED,
646 bool named ATTRIBUTE_UNUSED)
647{
648 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
649
650 if (*cum < 8)
651 return gen_rtx_REG (mode, *cum);
652 else
653 return NULL_RTX;
654}
655
656#define FT32_FUNCTION_ARG_SIZE(MODE, TYPE) \
657 ((MODE) != BLKmode ? GET_MODE_SIZE (MODE) \
658 : (unsigned) int_size_in_bytes (TYPE))
659
660static void
661ft32_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode,
662 const_tree type, bool named ATTRIBUTE_UNUSED)
663{
664 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
665
666 *cum = (*cum < FT32_R6
667 ? *cum + ((3 + FT32_FUNCTION_ARG_SIZE (mode, type)) / 4) : *cum);
668}
669
670/* Return non-zero if the function argument described by TYPE is to be
671 passed by reference. */
672
673static bool
674ft32_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED,
675 enum machine_mode mode, const_tree type,
676 bool named ATTRIBUTE_UNUSED)
677{
678 unsigned HOST_WIDE_INT size;
679
680 if (type)
681 {
682 if (AGGREGATE_TYPE_P (type))
683 return true;
684 size = int_size_in_bytes (type);
685 }
686 else
687 size = GET_MODE_SIZE (mode);
688
689 return size > 4 * 6;
690}
691
692/* Some function arguments will only partially fit in the registers
693 that hold arguments. Given a new arg, return the number of bytes
694 that fit in argument passing registers. */
695
696static int
697ft32_arg_partial_bytes (cumulative_args_t cum_v,
698 enum machine_mode mode, tree type, bool named)
699{
700 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
701 int bytes_left, size;
702
703 if (*cum >= 8)
704 return 0;
705
706 if (ft32_pass_by_reference (cum_v, mode, type, named))
707 size = 4;
708 else if (type)
709 {
710 if (AGGREGATE_TYPE_P (type))
711 return 0;
712 size = int_size_in_bytes (type);
713 }
714 else
715 size = GET_MODE_SIZE (mode);
716
717 bytes_left = (4 * 6) - ((*cum - 2) * 4);
718
719 if (size > bytes_left)
720 return bytes_left;
721 else
722 return 0;
723}
724
725/* Used by constraints.md to distinguish between GENERIC and PM
726 memory addresses. */
727
728int
729ft32_is_mem_pm (rtx o)
730{
a481f93b
JB
731 return (MEM_P (o)
732 && !ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (o)));
fef939d6
JB
733}
734
735/* The Global `targetm' Variable. */
736
737/* Initialize the GCC target structure. */
738
739#undef TARGET_PROMOTE_PROTOTYPES
740#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
741
742#undef TARGET_RETURN_IN_MEMORY
743#define TARGET_RETURN_IN_MEMORY ft32_return_in_memory
744#undef TARGET_MUST_PASS_IN_STACK
745#define TARGET_MUST_PASS_IN_STACK must_pass_in_stack_var_size
746#undef TARGET_PASS_BY_REFERENCE
747#define TARGET_PASS_BY_REFERENCE ft32_pass_by_reference
748#undef TARGET_ARG_PARTIAL_BYTES
749#define TARGET_ARG_PARTIAL_BYTES ft32_arg_partial_bytes
750#undef TARGET_FUNCTION_ARG
751#define TARGET_FUNCTION_ARG ft32_function_arg
752#undef TARGET_FUNCTION_ARG_ADVANCE
753#define TARGET_FUNCTION_ARG_ADVANCE ft32_function_arg_advance
754
755
756#undef TARGET_SETUP_INCOMING_VARARGS
757#define TARGET_SETUP_INCOMING_VARARGS ft32_setup_incoming_varargs
758
759#undef TARGET_FIXED_CONDITION_CODE_REGS
760#define TARGET_FIXED_CONDITION_CODE_REGS ft32_fixed_condition_code_regs
761
762/* Define this to return an RTX representing the place where a
763 function returns or receives a value of data type RET_TYPE, a tree
026c3cfd 764 node representing a data type. */
fef939d6
JB
765#undef TARGET_FUNCTION_VALUE
766#define TARGET_FUNCTION_VALUE ft32_function_value
767#undef TARGET_LIBCALL_VALUE
768#define TARGET_LIBCALL_VALUE ft32_libcall_value
769#undef TARGET_FUNCTION_VALUE_REGNO_P
770#define TARGET_FUNCTION_VALUE_REGNO_P ft32_function_value_regno_p
771
772#undef TARGET_OPTION_OVERRIDE
773#define TARGET_OPTION_OVERRIDE ft32_option_override
774
775#undef TARGET_ASM_SELECT_SECTION
776#define TARGET_ASM_SELECT_SECTION ft32_select_section
777
778#undef TARGET_VALID_POINTER_MODE
779#define TARGET_VALID_POINTER_MODE ft32_valid_pointer_mode
780static bool
781ft32_valid_pointer_mode (enum machine_mode mode)
782{
783 if (mode == SImode)
784 return 1;
785 return 0;
786}
787
788#undef TARGET_ADDR_SPACE_POINTER_MODE
789#define TARGET_ADDR_SPACE_POINTER_MODE ft32_addr_space_pointer_mode
790static enum machine_mode
791ft32_addr_space_pointer_mode (addr_space_t addrspace ATTRIBUTE_UNUSED)
792{
793 return Pmode;
794}
795
796#undef TARGET_ADDR_SPACE_ADDRESS_MODE
797#define TARGET_ADDR_SPACE_ADDRESS_MODE ft32_addr_space_address_mode
798static enum machine_mode
799ft32_addr_space_address_mode (addr_space_t addrspace ATTRIBUTE_UNUSED)
800{
801 return Pmode;
802}
803
804#undef TARGET_ADDR_SPACE_SUBSET_P
805#define TARGET_ADDR_SPACE_SUBSET_P ft32_addr_space_subset_p
806static bool
807ft32_addr_space_subset_p (addr_space_t subset ATTRIBUTE_UNUSED,
808 addr_space_t superset ATTRIBUTE_UNUSED)
809{
810 return false;
811}
812
813#undef TARGET_CASE_VALUES_THRESHOLD
814#define TARGET_CASE_VALUES_THRESHOLD ft32_target_case_values_threshold
815
816static unsigned int
817ft32_target_case_values_threshold (void)
818{
819 return 4;
820}
821
822#undef TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P
823#define TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P \
824 ft32_addr_space_legitimate_address_p
825
826
827// Enabling LRA gives the infamous
828// internal compiler error: Max. number of generated reload insns per insn is achieved (90)
829// errors e.g. when compiling sieve.c
830
831static bool
832ft32_lra_p (void)
833{
834 return ft32_lra_flag;
835}
836
837#undef TARGET_LRA_P
838#define TARGET_LRA_P ft32_lra_p
839
840static bool
841reg_ok_for_base_p (rtx r, bool strict)
842{
843 int NUM = REGNO (r);
844 if (strict)
845 return (HARD_REGNO_OK_FOR_BASE_P (NUM)
846 || HARD_REGNO_OK_FOR_BASE_P (reg_renumber[(NUM)]));
847 else
848 return ((NUM) >= FIRST_PSEUDO_REGISTER || HARD_REGNO_OK_FOR_BASE_P (NUM));
849}
850
851static bool
852ft32_addr_space_legitimate_address_p (enum machine_mode mode, rtx x,
853 bool strict,
854 addr_space_t as ATTRIBUTE_UNUSED)
855{
856 if (mode != BLKmode)
857 {
858 if (GET_CODE (x) == PLUS)
859 {
860 rtx op1, op2;
861 op1 = XEXP (x, 0);
862 op2 = XEXP (x, 1);
863 if (GET_CODE (op1) == REG
864 && CONST_INT_P (op2)
865 && INTVAL (op2) >= -128
866 && INTVAL (op2) < 128 && reg_ok_for_base_p (op1, strict))
867 goto yes;
868 if (GET_CODE (op1) == SYMBOL_REF && CONST_INT_P (op2))
869 goto yes;
870 }
871 if (REG_P (x) && reg_ok_for_base_p (x, strict))
872 goto yes;
873 if (GET_CODE (x) == SYMBOL_REF
874 || GET_CODE (x) == LABEL_REF || CONST_INT_P (x))
875 goto yes;
876 }
877 else
878 {
879 if (REG_P (x) && reg_ok_for_base_p (x, strict))
880 goto yes;
881 }
882
883 return 0;
884yes:
885 return 1;
886}
887
888struct gcc_target targetm = TARGET_INITIALIZER;
889
890#include "gt-ft32.h"