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beed8fc0 AO |
1 | #!/bin/sh |
2 | # Generate mova.md, a file containing patterns that can be implemented | |
3 | # using the h8sx mova instruction. | |
4 | ||
5624e564 | 5 | # Copyright (C) 2004-2015 Free Software Foundation, Inc. |
ad41bd84 JM |
6 | # |
7 | # This file is part of GCC. | |
8 | # | |
9 | # GCC is free software; you can redistribute it and/or modify | |
10 | # it under the terms of the GNU General Public License as published by | |
11 | # the Free Software Foundation; either version 3, or (at your option) | |
12 | # any later version. | |
13 | # | |
14 | # GCC is distributed in the hope that it will be useful, | |
15 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | # GNU General Public License for more details. | |
18 | # | |
19 | # You should have received a copy of the GNU General Public License | |
20 | # along with GCC; see the file COPYING3. If not see | |
21 | # <http://www.gnu.org/licenses/>. | |
22 | ||
beed8fc0 AO |
23 | echo ";; -*- buffer-read-only: t -*-" |
24 | echo ";; Generated automatically from genmova.sh" | |
5624e564 | 25 | echo ";; Copyright (C) 2004-2015 Free Software Foundation, Inc." |
ad41bd84 JM |
26 | echo ";;" |
27 | echo ";; This file is part of GCC." | |
28 | echo ";;" | |
29 | echo ";; GCC is free software; you can redistribute it and/or modify" | |
30 | echo ";; it under the terms of the GNU General Public License as published by" | |
31 | echo ";; the Free Software Foundation; either version 3, or (at your option)" | |
32 | echo ";; any later version." | |
33 | echo ";;" | |
34 | echo ";; GCC is distributed in the hope that it will be useful," | |
35 | echo ";; but WITHOUT ANY WARRANTY; without even the implied warranty of" | |
36 | echo ";; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the" | |
37 | echo ";; GNU General Public License for more details." | |
38 | echo ";;" | |
39 | echo ";; You should have received a copy of the GNU General Public License" | |
40 | echo ";; along with GCC; see the file COPYING3. If not see" | |
41 | echo ";; <http://www.gnu.org/licenses/>." | |
beed8fc0 AO |
42 | |
43 | # Loop over modes for the source operand (the index). Only 8-bit and | |
44 | # 16-bit indices are allowed. | |
45 | for s in QI HI; do | |
46 | ||
47 | # Set $src to the operand syntax for this size of index. | |
48 | case $s in | |
49 | QI) src=%X1.b;; | |
50 | HI) src=%T1.w;; | |
51 | esac | |
52 | ||
53 | # A match_operand for the source. | |
54 | operand="(match_operand:$s 1 \"h8300_dst_operand\" \"0,rQ\")" | |
55 | ||
56 | # Loop over the destination register's mode. The QI and HI versions use | |
57 | # the same instructions as the SI ones, they just ignore the upper bits | |
58 | # of the result. | |
59 | for d in QI HI SI; do | |
60 | ||
61 | # If the destination is larger than the source, include a | |
62 | # zero_extend/plus pattern. We could also match zero extensions | |
63 | # of memory without the plus, but it's not any smaller or faster | |
64 | # than separate insns. | |
65 | case $d:$s in | |
66 | SI:QI | SI:HI | HI:QI) | |
67 | cat <<EOF | |
68 | (define_insn "" | |
69 | [(set (match_operand:$d 0 "register_operand" "=r,r") | |
70 | (plus:$d (zero_extend:$d $operand) | |
71 | (match_operand:$d 2 "immediate_operand" "i,i")))] | |
72 | "TARGET_H8300SX" | |
f46b8378 | 73 | "mova/b.l @(%o2%C2,$src),%S0" |
beed8fc0 AO |
74 | [(set_attr "length_table" "mova") |
75 | (set_attr "cc" "none")]) | |
76 | ||
77 | EOF | |
78 | ;; | |
79 | esac | |
80 | ||
81 | # Loop over the shift amount. | |
82 | for shift in 1 2; do | |
83 | case $shift in | |
84 | 1) opsize=w mult=2;; | |
85 | 2) opsize=l mult=4;; | |
86 | esac | |
87 | ||
88 | # Calculate the mask of bits that will be nonzero after the source | |
89 | # has been extended and shifted. | |
90 | case $s:$shift in | |
91 | QI:1) mask=510;; | |
92 | QI:2) mask=1020;; | |
93 | HI:1) mask=131070;; | |
94 | HI:2) mask=262140;; | |
95 | esac | |
96 | ||
97 | # There doesn't seem to be a well-established canonical form for | |
98 | # some of the patterns we need. Emit both shift and multiplication | |
99 | # patterns. | |
100 | for form in mult ashift; do | |
101 | case $form in | |
102 | mult) amount=$mult;; | |
103 | ashift) amount=$shift;; | |
104 | esac | |
105 | ||
106 | case $d:$s in | |
107 | # If the source and destination are the same size, we can treat | |
108 | # mova as a sort of multiply-add instruction. | |
109 | QI:QI | HI:HI) | |
110 | cat <<EOF | |
111 | (define_insn "" | |
112 | [(set (match_operand:$d 0 "register_operand" "=r,r") | |
113 | (plus:$d ($form:$d $operand | |
114 | (const_int $amount)) | |
115 | (match_operand:$d 2 "immediate_operand" "i,i")))] | |
116 | "TARGET_H8300SX" | |
f46b8378 | 117 | "mova/$opsize.l @(%o2%C2,$src),%S0" |
beed8fc0 AO |
118 | [(set_attr "length_table" "mova") |
119 | (set_attr "cc" "none")]) | |
120 | ||
121 | EOF | |
122 | ;; | |
123 | ||
124 | # Handle the cases where the source is smaller than the | |
125 | # destination. Sometimes combine will keep the extension, | |
126 | # sometimes it will use an AND. | |
127 | SI:QI | SI:HI | HI:QI) | |
128 | ||
129 | # Emit the forms that use zero_extend. | |
130 | cat <<EOF | |
131 | (define_insn "" | |
132 | [(set (match_operand:$d 0 "register_operand" "=r,r") | |
133 | ($form:$d (zero_extend:$d $operand) | |
134 | (const_int $amount)))] | |
135 | "TARGET_H8300SX" | |
136 | "mova/$opsize.l @(0,$src),%S0" | |
137 | [(set_attr "length_table" "mova_zero") | |
138 | (set_attr "cc" "none")]) | |
139 | ||
140 | (define_insn "" | |
141 | [(set (match_operand:$d 0 "register_operand" "=r,r") | |
142 | (plus:$d ($form:$d (zero_extend:$d $operand) | |
143 | (const_int $amount)) | |
144 | (match_operand:$d 2 "immediate_operand" "i,i")))] | |
145 | "TARGET_H8300SX" | |
f46b8378 | 146 | "mova/$opsize.l @(%o2%C2,$src),%S0" |
beed8fc0 AO |
147 | [(set_attr "length_table" "mova") |
148 | (set_attr "cc" "none")]) | |
149 | ||
150 | EOF | |
151 | ||
152 | # Now emit the forms that use AND. When the index is a register, | |
153 | # these forms are effectively $d-mode operations: the index will | |
154 | # be a $d-mode REG or SUBREG. When the index is a memory | |
155 | # location, we will have a paradoxical subreg such as: | |
156 | # | |
157 | # (and:SI (mult:SI (subreg:SI (mem:QI ...) 0) | |
158 | # (const_int 4)) | |
159 | # (const_int 1020)) | |
160 | # | |
161 | # Match the two case separately: a $d-mode register_operand | |
162 | # or a $d-mode subreg of an $s-mode memory_operand. Match the | |
163 | # memory form first since register_operand accepts mem subregs | |
164 | # before reload. | |
165 | memory="(match_operand:$s 1 \"memory_operand\" \"m\")" | |
166 | memory="(subreg:$d $memory 0)" | |
167 | register="(match_operand:$d 1 \"register_operand\" \"0\")" | |
168 | for paradoxical in "$memory" "$register"; do | |
169 | cat <<EOF | |
170 | (define_insn "" | |
171 | [(set (match_operand:$d 0 "register_operand" "=r") | |
172 | (and:$d ($form:$d $paradoxical | |
173 | (const_int $amount)) | |
174 | (const_int $mask)))] | |
175 | "TARGET_H8300SX" | |
176 | "mova/$opsize.l @(0,$src),%S0" | |
177 | [(set_attr "length_table" "mova_zero") | |
178 | (set_attr "cc" "none")]) | |
179 | ||
180 | (define_insn "" | |
181 | [(set (match_operand:$d 0 "register_operand" "=r") | |
182 | (plus:$d (and:$d ($form:$d $paradoxical | |
183 | (const_int $amount)) | |
184 | (const_int $mask)) | |
185 | (match_operand:$d 2 "immediate_operand" "i")))] | |
186 | "TARGET_H8300SX" | |
f46b8378 | 187 | "mova/$opsize.l @(%o2%C2,$src),%S0" |
beed8fc0 AO |
188 | [(set_attr "length_table" "mova") |
189 | (set_attr "cc" "none")]) | |
190 | ||
191 | EOF | |
192 | done | |
193 | ;; | |
194 | esac | |
195 | done | |
196 | done | |
197 | done | |
198 | done |