[thirdparty/gcc.git] / gcc / config / h8300 / genmova.sh

#!/bin/sh
# Generate mova.md, a file containing patterns that can be implemented
# using the h8sx mova instruction.

# Copyright (C) 2004-2021 Free Software Foundation, Inc.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3.  If not see
# <http://www.gnu.org/licenses/>.

echo ";; -*- buffer-read-only: t -*-"
echo ";; Generated automatically from genmova.sh"
echo ";; Copyright (C) 2004-2021 Free Software Foundation, Inc."
echo ";;"
echo ";; This file is part of GCC."
echo ";;"
echo ";; GCC is free software; you can redistribute it and/or modify"
echo ";; it under the terms of the GNU General Public License as published by"
echo ";; the Free Software Foundation; either version 3, or (at your option)"
echo ";; any later version."
echo ";;"
echo ";; GCC is distributed in the hope that it will be useful,"
echo ";; but WITHOUT ANY WARRANTY; without even the implied warranty of"
echo ";; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the"
echo ";; GNU General Public License for more details."
echo ";;"
echo ";; You should have received a copy of the GNU General Public License"
echo ";; along with GCC; see the file COPYING3.  If not see"
echo ";; <http://www.gnu.org/licenses/>."

# Loop over modes for the source operand (the index).  Only 8-bit and
# 16-bit indices are allowed.
for s in QI HI; do

  # Set $src to the operand syntax for this size of index.
  case $s in
    QI) src=%X1.b;;
    HI) src=%T1.w;;
  esac

  # A match_operand for the source.
  operand="(match_operand:$s 1 \"h8300_dst_operand\" \"0,rQ\")"

  # Loop over the destination register's mode.  The QI and HI versions use
  # the same instructions as the SI ones, they just ignore the upper bits
  # of the result.
  for d in QI HI SI; do

    # If the destination is larger than the source, include a
    # zero_extend/plus pattern.  We could also match zero extensions
    # of memory without the plus, but it's not any smaller or faster
    # than separate insns.
    case $d:$s in
      SI:QI | SI:HI | HI:QI)
	cat <<EOF
(define_insn ""
  [(set (match_operand:$d 0 "register_operand" "=r,r")
	(plus:$d (zero_extend:$d $operand)
		 (match_operand:$d 2 "immediate_operand" "i,i")))]
  "TARGET_H8300SX"
  "mova/b.l @(%o2%C2,$src),%S0"
  [(set_attr "length_table" "mova")])

EOF
	;;
    esac

    # Loop over the shift amount.
    for shift in 1 2; do
      case $shift in
	1) opsize=w mult=2;;
	2) opsize=l mult=4;;
      esac

      # Calculate the mask of bits that will be nonzero after the source
      # has been extended and shifted.
      case $s:$shift in
	QI:1) mask=510;;
	QI:2) mask=1020;;
	HI:1) mask=131070;;
	HI:2) mask=262140;;
      esac

      # There doesn't seem to be a well-established canonical form for
      # some of the patterns we need.  Emit both shift and multiplication
      # patterns.
      for form in mult ashift; do
	case $form in
	  mult) amount=$mult;;
	  ashift) amount=$shift;;
	esac

	case $d:$s in
	  # If the source and destination are the same size, we can treat
	  # mova as a sort of multiply-add instruction.
	  QI:QI | HI:HI)
	    cat <<EOF
(define_insn ""
  [(set (match_operand:$d 0 "register_operand" "=r,r")
	(plus:$d ($form:$d $operand
			   (const_int $amount))
		 (match_operand:$d 2 "immediate_operand" "i,i")))]
  "TARGET_H8300SX"
  "mova/$opsize.l @(%o2%C2,$src),%S0"
  [(set_attr "length_table" "mova")])

EOF
	    ;;

	  # Handle the cases where the source is smaller than the
	  # destination.  Sometimes combine will keep the extension,
	  # sometimes it will use an AND.
	  SI:QI | SI:HI | HI:QI)

	    # Emit the forms that use zero_extend.
	    cat <<EOF
(define_insn ""
  [(set (match_operand:$d 0 "register_operand" "=r,r")
	($form:$d (zero_extend:$d $operand)
		  (const_int $amount)))]
  "TARGET_H8300SX"
  "mova/$opsize.l @(0,$src),%S0"
  [(set_attr "length_table" "mova_zero")])

(define_insn ""
  [(set (match_operand:$d 0 "register_operand" "=r,r")
	(plus:$d ($form:$d (zero_extend:$d $operand)
			   (const_int $amount))
		 (match_operand:$d 2 "immediate_operand" "i,i")))]
  "TARGET_H8300SX"
  "mova/$opsize.l @(%o2%C2,$src),%S0"
  [(set_attr "length_table" "mova")])

EOF

	    # Now emit the forms that use AND.  When the index is a register,
	    # these forms are effectively $d-mode operations: the index will
	    # be a $d-mode REG or SUBREG.  When the index is a memory
	    # location, we will have a paradoxical subreg such as:
	    #
	    #	(and:SI (mult:SI (subreg:SI (mem:QI ...) 0)
	    #			 (const_int 4))
	    #		(const_int 1020))
	    #
	    # Match the two case separately: a $d-mode register_operand
	    # or a $d-mode subreg of an $s-mode memory_operand.  Match the
	    # memory form first since register_operand accepts mem subregs
	    # before reload.
	    memory="(match_operand:$s 1 \"memory_operand\" \"m\")"
	    memory="(subreg:$d $memory 0)"
	    register="(match_operand:$d 1 \"register_operand\" \"0\")"
	    for paradoxical in "$memory" "$register"; do
	      cat <<EOF
(define_insn ""
  [(set (match_operand:$d 0 "register_operand" "=r")
	(and:$d ($form:$d $paradoxical
			  (const_int $amount))
		(const_int $mask)))]
  "TARGET_H8300SX"
  "mova/$opsize.l @(0,$src),%S0"
  [(set_attr "length_table" "mova_zero")])

(define_insn ""
  [(set (match_operand:$d 0 "register_operand" "=r")
	(plus:$d (and:$d ($form:$d $paradoxical
				   (const_int $amount))
			 (const_int $mask))
		 (match_operand:$d 2 "immediate_operand" "i")))]
  "TARGET_H8300SX"
  "mova/$opsize.l @(%o2%C2,$src),%S0"
  [(set_attr "length_table" "mova")])

EOF
	      done
	    ;;
	esac
      done
    done
  done
done
Commit	Line	Data
beed8fc0 AO	1	#!/bin/sh
	2	# Generate mova.md, a file containing patterns that can be implemented
	3	# using the h8sx mova instruction.
	4
99dee823	5	# Copyright (C) 2004-2021 Free Software Foundation, Inc.
ad41bd84 JM	6	#
	7	# This file is part of GCC.
	8	#
	9	# GCC is free software; you can redistribute it and/or modify
	10	# it under the terms of the GNU General Public License as published by
	11	# the Free Software Foundation; either version 3, or (at your option)
	12	# any later version.
	13	#
	14	# GCC is distributed in the hope that it will be useful,
	15	# but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	# GNU General Public License for more details.
	18	#
	19	# You should have received a copy of the GNU General Public License
	20	# along with GCC; see the file COPYING3. If not see
	21	# <http://www.gnu.org/licenses/>.
	22
beed8fc0 AO	23	echo ";; -- buffer-read-only: t --"
beed8fc0 AO	24	echo ";; Generated automatically from genmova.sh"
99dee823	25	echo ";; Copyright (C) 2004-2021 Free Software Foundation, Inc."
ad41bd84 JM	26	echo ";;"
	27	echo ";; This file is part of GCC."
	28	echo ";;"
	29	echo ";; GCC is free software; you can redistribute it and/or modify"
	30	echo ";; it under the terms of the GNU General Public License as published by"
	31	echo ";; the Free Software Foundation; either version 3, or (at your option)"
	32	echo ";; any later version."
	33	echo ";;"
	34	echo ";; GCC is distributed in the hope that it will be useful,"
	35	echo ";; but WITHOUT ANY WARRANTY; without even the implied warranty of"
	36	echo ";; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the"
	37	echo ";; GNU General Public License for more details."
	38	echo ";;"
	39	echo ";; You should have received a copy of the GNU General Public License"
	40	echo ";; along with GCC; see the file COPYING3. If not see"
	41	echo ";; <http://www.gnu.org/licenses/>."
beed8fc0 AO	42
	43	# Loop over modes for the source operand (the index). Only 8-bit and
	44	# 16-bit indices are allowed.
	45	for s in QI HI; do
	46
	47	# Set $src to the operand syntax for this size of index.
	48	case $s in
	49	QI) src=%X1.b;;
	50	HI) src=%T1.w;;
	51	esac
	52
	53	# A match_operand for the source.
	54	operand="(match_operand:$s 1 \"h8300_dst_operand\" \"0,rQ\")"
	55
	56	# Loop over the destination register's mode. The QI and HI versions use
	57	# the same instructions as the SI ones, they just ignore the upper bits
	58	# of the result.
	59	for d in QI HI SI; do
	60
	61	# If the destination is larger than the source, include a
	62	# zero_extend/plus pattern. We could also match zero extensions
	63	# of memory without the plus, but it's not any smaller or faster
	64	# than separate insns.
	65	case $d:$s in
	66	SI:QI \| SI:HI \| HI:QI)
	67	cat <<EOF
	68	(define_insn ""
	69	[(set (match_operand:$d 0 "register_operand" "=r,r")
	70	(plus:$d (zero_extend:$d $operand)
	71	(match_operand:$d 2 "immediate_operand" "i,i")))]
	72	"TARGET_H8300SX"
f46b8378	73	"mova/b.l @(%o2%C2,$src),%S0"
f16897cb	74	[(set_attr "length_table" "mova")])
beed8fc0 AO	75
	76	EOF
	77	;;
	78	esac
	79
	80	# Loop over the shift amount.
	81	for shift in 1 2; do
	82	case $shift in
	83	1) opsize=w mult=2;;
	84	2) opsize=l mult=4;;
	85	esac
	86
	87	# Calculate the mask of bits that will be nonzero after the source
	88	# has been extended and shifted.
	89	case $s:$shift in
	90	QI:1) mask=510;;
	91	QI:2) mask=1020;;
	92	HI:1) mask=131070;;
	93	HI:2) mask=262140;;
	94	esac
	95
	96	# There doesn't seem to be a well-established canonical form for
	97	# some of the patterns we need. Emit both shift and multiplication
	98	# patterns.
	99	for form in mult ashift; do
	100	case $form in
	101	mult) amount=$mult;;
	102	ashift) amount=$shift;;
	103	esac
	104
	105	case $d:$s in
	106	# If the source and destination are the same size, we can treat
	107	# mova as a sort of multiply-add instruction.
	108	QI:QI \| HI:HI)
	109	cat <<EOF
	110	(define_insn ""
	111	[(set (match_operand:$d 0 "register_operand" "=r,r")
	112	(plus:$d ($form:$d $operand
	113	(const_int $amount))
	114	(match_operand:$d 2 "immediate_operand" "i,i")))]
	115	"TARGET_H8300SX"
f46b8378	116	"mova/$opsize.l @(%o2%C2,$src),%S0"
f16897cb	117	[(set_attr "length_table" "mova")])
beed8fc0 AO	118
	119	EOF
	120	;;
	121
	122	# Handle the cases where the source is smaller than the
	123	# destination. Sometimes combine will keep the extension,
	124	# sometimes it will use an AND.
	125	SI:QI \| SI:HI \| HI:QI)
	126
	127	# Emit the forms that use zero_extend.
	128	cat <<EOF
	129	(define_insn ""
	130	[(set (match_operand:$d 0 "register_operand" "=r,r")
	131	($form:$d (zero_extend:$d $operand)
	132	(const_int $amount)))]
	133	"TARGET_H8300SX"
	134	"mova/$opsize.l @(0,$src),%S0"
f16897cb	135	[(set_attr "length_table" "mova_zero")])
beed8fc0 AO	136
	137	(define_insn ""
	138	[(set (match_operand:$d 0 "register_operand" "=r,r")
	139	(plus:$d ($form:$d (zero_extend:$d $operand)
	140	(const_int $amount))
	141	(match_operand:$d 2 "immediate_operand" "i,i")))]
	142	"TARGET_H8300SX"
f46b8378	143	"mova/$opsize.l @(%o2%C2,$src),%S0"
f16897cb	144	[(set_attr "length_table" "mova")])
beed8fc0 AO	145
	146	EOF
	147
	148	# Now emit the forms that use AND. When the index is a register,
	149	# these forms are effectively $d-mode operations: the index will
	150	# be a $d-mode REG or SUBREG. When the index is a memory
	151	# location, we will have a paradoxical subreg such as:
	152	#
	153	# (and:SI (mult:SI (subreg:SI (mem:QI ...) 0)
	154	# (const_int 4))
	155	# (const_int 1020))
	156	#
	157	# Match the two case separately: a $d-mode register_operand
	158	# or a $d-mode subreg of an $s-mode memory_operand. Match the
	159	# memory form first since register_operand accepts mem subregs
	160	# before reload.
	161	memory="(match_operand:$s 1 \"memory_operand\" \"m\")"
	162	memory="(subreg:$d $memory 0)"
	163	register="(match_operand:$d 1 \"register_operand\" \"0\")"
	164	for paradoxical in "$memory" "$register"; do
	165	cat <<EOF
	166	(define_insn ""
	167	[(set (match_operand:$d 0 "register_operand" "=r")
	168	(and:$d ($form:$d $paradoxical
	169	(const_int $amount))
	170	(const_int $mask)))]
	171	"TARGET_H8300SX"
	172	"mova/$opsize.l @(0,$src),%S0"
f16897cb	173	[(set_attr "length_table" "mova_zero")])
beed8fc0 AO	174
	175	(define_insn ""
	176	[(set (match_operand:$d 0 "register_operand" "=r")
	177	(plus:$d (and:$d ($form:$d $paradoxical
	178	(const_int $amount))
	179	(const_int $mask))
	180	(match_operand:$d 2 "immediate_operand" "i")))]
	181	"TARGET_H8300SX"
f46b8378	182	"mova/$opsize.l @(%o2%C2,$src),%S0"
f16897cb	183	[(set_attr "length_table" "mova")])
beed8fc0 AO	184
	185	EOF
	186	done
	187	;;
	188	esac
	189	done
	190	done
	191	done
	192	done