]>
Commit | Line | Data |
---|---|---|
f2702e8a | 1 | /* Definitions of target machine for GNU compiler. |
716085c2 | 2 | Renesas H8/300 (generic) |
f1717362 | 3 | Copyright (C) 1992-2016 Free Software Foundation, Inc. |
d22d451b | 4 | Contributed by Steve Chamberlain (sac@cygnus.com), |
5 | Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com). | |
e1629549 | 6 | |
dbbae424 | 7 | This file is part of GCC. |
e1629549 | 8 | |
dbbae424 | 9 | GCC is free software; you can redistribute it and/or modify |
e1629549 | 10 | it under the terms of the GNU General Public License as published by |
038d1e19 | 11 | the Free Software Foundation; either version 3, or (at your option) |
e1629549 | 12 | any later version. |
13 | ||
dbbae424 | 14 | GCC is distributed in the hope that it will be useful, |
e1629549 | 15 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
038d1e19 | 20 | along with GCC; see the file COPYING3. If not see |
21 | <http://www.gnu.org/licenses/>. */ | |
e1629549 | 22 | |
1fcd08b1 | 23 | #ifndef GCC_H8300_H |
24 | #define GCC_H8300_H | |
25 | ||
a86fab2e | 26 | /* Which CPU to compile for. |
d22d451b | 27 | We use int for CPU_TYPE to avoid lots of casts. */ |
28 | #if 0 /* defined in insn-attr.h, here for documentation */ | |
29 | enum attr_cpu { CPU_H8300, CPU_H8300H }; | |
30 | #endif | |
31 | extern int cpu_type; | |
32 | ||
33 | /* Various globals defined in h8300.c. */ | |
34 | ||
eb2aa24e | 35 | extern const char *h8_push_op, *h8_pop_op, *h8_mov_op; |
9305fe33 | 36 | extern const char * const *h8_reg_names; |
d22d451b | 37 | |
b2e455f8 | 38 | /* Target CPU builtins. */ |
39 | #define TARGET_CPU_CPP_BUILTINS() \ | |
40 | do \ | |
41 | { \ | |
acff2768 | 42 | if (TARGET_H8300SX) \ |
16b503e9 | 43 | { \ |
acff2768 | 44 | builtin_define ("__H8300SX__"); \ |
35a462ce | 45 | if (TARGET_NORMAL_MODE) \ |
46 | { \ | |
47 | builtin_define ("__NORMAL_MODE__"); \ | |
48 | } \ | |
b2e455f8 | 49 | } \ |
acff2768 | 50 | else if (TARGET_H8300S) \ |
727c62dd | 51 | { \ |
acff2768 | 52 | builtin_define ("__H8300S__"); \ |
53 | builtin_assert ("cpu=h8300s"); \ | |
54 | builtin_assert ("machine=h8300s"); \ | |
727c62dd | 55 | if (TARGET_NORMAL_MODE) \ |
56 | { \ | |
57 | builtin_define ("__NORMAL_MODE__"); \ | |
58 | } \ | |
59 | } \ | |
acff2768 | 60 | else if (TARGET_H8300H) \ |
16b503e9 | 61 | { \ |
acff2768 | 62 | builtin_define ("__H8300H__"); \ |
63 | builtin_assert ("cpu=h8300h"); \ | |
64 | builtin_assert ("machine=h8300h"); \ | |
35a462ce | 65 | if (TARGET_NORMAL_MODE) \ |
66 | { \ | |
67 | builtin_define ("__NORMAL_MODE__"); \ | |
68 | } \ | |
b2e455f8 | 69 | } \ |
70 | else \ | |
16b503e9 | 71 | { \ |
b2e455f8 | 72 | builtin_define ("__H8300__"); \ |
73 | builtin_assert ("cpu=h8300"); \ | |
74 | builtin_assert ("machine=h8300"); \ | |
75 | } \ | |
b2e455f8 | 76 | } \ |
77 | while (0) | |
d22d451b | 78 | |
4209f9b2 | 79 | #define LINK_SPEC "%{mh:%{mn:-m h8300hn}} %{mh:%{!mn:-m h8300h}} %{ms:%{mn:-m h8300sn}} %{ms:%{!mn:-m h8300s}}" |
d22d451b | 80 | |
81 | #define LIB_SPEC "%{mrelax:-relax} %{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}" | |
e1629549 | 82 | |
e1629549 | 83 | /* Macros used in the machine description to test the flags. */ |
84 | ||
fa88dd2b | 85 | /* Select between the H8/300 and H8/300H CPUs. */ |
69b4e418 | 86 | #define TARGET_H8300 (! TARGET_H8300H && ! TARGET_H8300S) |
3f21adc8 | 87 | #define TARGET_H8300S (TARGET_H8300S_1 || TARGET_H8300SX) |
727c62dd | 88 | /* Some multiply instructions are not available in all H8SX variants. |
89 | Use this macro instead of TARGET_H8300SX to indicate this, even | |
90 | though we don't actually generate different code for now. */ | |
91 | #define TARGET_H8300SXMUL TARGET_H8300SX | |
e1629549 | 92 | |
cf378360 | 93 | #ifdef IN_LIBGCC2 |
94 | #undef TARGET_H8300H | |
95 | #undef TARGET_H8300S | |
35a462ce | 96 | #undef TARGET_NORMAL_MODE |
cf378360 | 97 | /* If compiling libgcc2, make these compile time constants based on what |
98 | flags are we actually compiling with. */ | |
99 | #ifdef __H8300H__ | |
100 | #define TARGET_H8300H 1 | |
101 | #else | |
102 | #define TARGET_H8300H 0 | |
103 | #endif | |
104 | #ifdef __H8300S__ | |
105 | #define TARGET_H8300S 1 | |
106 | #else | |
107 | #define TARGET_H8300S 0 | |
108 | #endif | |
35a462ce | 109 | #ifdef __NORMAL_MODE__ |
110 | #define TARGET_NORMAL_MODE 1 | |
111 | #else | |
112 | #define TARGET_NORMAL_MODE 0 | |
113 | #endif | |
cf378360 | 114 | #endif /* !IN_LIBGCC2 */ |
115 | ||
d22d451b | 116 | /* Default target_flags if no switches specified. */ |
117 | ||
118 | #ifndef TARGET_DEFAULT | |
2b7014df | 119 | #define TARGET_DEFAULT (MASK_QUICKCALL) |
d22d451b | 120 | #endif |
121 | ||
43600936 | 122 | /* We want dwarf2 info available to gdb. */ |
80c13943 | 123 | #define DWARF2_DEBUGGING_INFO 1 |
80c13943 | 124 | |
125 | /* The return address is pushed on the stack. */ | |
126 | #define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, STACK_POINTER_REGNUM)) | |
127 | #define INCOMING_FRAME_SP_OFFSET (POINTER_SIZE / 8) | |
128 | ||
129 | #define DWARF_CIE_DATA_ALIGNMENT 2 | |
130 | ||
94a1f2a0 | 131 | /* Define this if addresses of constant functions |
132 | shouldn't be put through pseudo regs where they can be cse'd. | |
133 | Desirable on machines where ordinary constants are expensive | |
f2702e8a | 134 | but a CALL with constant address is cheap. |
92eae32b | 135 | |
136 | Calls through a register are cheaper than calls to named | |
137 | functions; however, the register pressure this causes makes | |
138 | CSEing of function addresses generally a lose. */ | |
93516111 | 139 | #define NO_FUNCTION_CSE 1 |
e1629549 | 140 | \f |
d22d451b | 141 | /* Target machine storage layout */ |
142 | ||
e1629549 | 143 | /* Define this if most significant bit is lowest numbered |
144 | in instructions that operate on numbered bit-fields. | |
145 | This is not true on the H8/300. */ | |
146 | #define BITS_BIG_ENDIAN 0 | |
147 | ||
148 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
149 | /* That is true on the H8/300. */ | |
150 | #define BYTES_BIG_ENDIAN 1 | |
151 | ||
152 | /* Define this if most significant word of a multiword number is lowest | |
c986ea8c | 153 | numbered. */ |
e1629549 | 154 | #define WORDS_BIG_ENDIAN 1 |
155 | ||
d22d451b | 156 | #define MAX_BITS_PER_WORD 32 |
e1629549 | 157 | |
158 | /* Width of a word, in units (bytes). */ | |
69b4e418 | 159 | #define UNITS_PER_WORD (TARGET_H8300H || TARGET_H8300S ? 4 : 2) |
65748b1b | 160 | #define MIN_UNITS_PER_WORD 2 |
e1629549 | 161 | |
81c3eb11 | 162 | #define SHORT_TYPE_SIZE 16 |
163 | #define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16) | |
164 | #define LONG_TYPE_SIZE 32 | |
77e0f75a | 165 | #define LONG_LONG_TYPE_SIZE 64 |
81c3eb11 | 166 | #define FLOAT_TYPE_SIZE 32 |
167 | #define DOUBLE_TYPE_SIZE 32 | |
168 | #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE | |
e1629549 | 169 | |
81c3eb11 | 170 | #define MAX_FIXED_MODE_SIZE 32 |
e1629549 | 171 | |
172 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
69b4e418 | 173 | #define PARM_BOUNDARY (TARGET_H8300H || TARGET_H8300S ? 32 : 16) |
e1629549 | 174 | |
175 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
176 | #define FUNCTION_BOUNDARY 16 | |
177 | ||
178 | /* Alignment of field after `int : 0' in a structure. */ | |
03fb0c81 | 179 | /* One can argue this should be 32 for -mint32, but since 32-bit ints only |
180 | need 16-bit alignment, this is left as is so that -mint32 doesn't change | |
1ed688ff | 181 | structure layouts. */ |
d22d451b | 182 | #define EMPTY_FIELD_BOUNDARY 16 |
e1629549 | 183 | |
1ed688ff | 184 | /* No data type wants to be aligned rounder than this. |
03fb0c81 | 185 | 32-bit values are aligned as such on the H8/300H and H8S for speed. */ |
15e64167 | 186 | #define BIGGEST_ALIGNMENT \ |
69b4e418 | 187 | (((TARGET_H8300H || TARGET_H8300S) && ! TARGET_ALIGN_300) ? 32 : 16) |
e1629549 | 188 | |
d22d451b | 189 | /* The stack goes in 16/32 bit lumps. */ |
190 | #define STACK_BOUNDARY (TARGET_H8300 ? 16 : 32) | |
e1629549 | 191 | |
192 | /* Define this if move instructions will actually fail to work | |
193 | when given unaligned data. */ | |
d22d451b | 194 | /* On the H8/300, longs can be aligned on halfword boundaries, but not |
195 | byte boundaries. */ | |
e1629549 | 196 | #define STRICT_ALIGNMENT 1 |
197 | \f | |
198 | /* Standard register usage. */ | |
199 | ||
200 | /* Number of actual hardware registers. | |
201 | The hardware registers are assigned numbers for the compiler | |
202 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
203 | ||
204 | All registers that the compiler knows about must be given numbers, | |
f2702e8a | 205 | even those that are not normally considered general registers. |
e1629549 | 206 | |
a65ce2f2 | 207 | Reg 9 does not correspond to any hardware register, but instead |
e1629549 | 208 | appears in the RTL as an argument pointer prior to reload, and is |
209 | eliminated during reloading in favor of either the stack or frame | |
210 | pointer. */ | |
d22d451b | 211 | |
f4ac50fb | 212 | #define FIRST_PSEUDO_REGISTER 12 |
e1629549 | 213 | |
214 | /* 1 for registers that have pervasive standard uses | |
d22d451b | 215 | and are not available for the register allocator. */ |
e1629549 | 216 | |
fbeb603c | 217 | #define FIXED_REGISTERS \ |
218 | /* r0 r1 r2 r3 r4 r5 r6 r7 mac ap rap fp */ \ | |
219 | { 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1 } | |
e1629549 | 220 | |
221 | /* 1 for registers not available across function calls. | |
222 | These must include the FIXED_REGISTERS and also any | |
223 | registers that can be used without being saved. | |
224 | The latter must include the registers where values are returned | |
225 | and the register where structure-value addresses are passed. | |
226 | Aside from that, you can include as many other registers as you | |
f2702e8a | 227 | like. |
e1629549 | 228 | |
a86fab2e | 229 | H8 destroys r0,r1,r2,r3. */ |
e1629549 | 230 | |
fbeb603c | 231 | #define CALL_USED_REGISTERS \ |
232 | /* r0 r1 r2 r3 r4 r5 r6 r7 mac ap rap fp */ \ | |
233 | { 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1 } | |
e1629549 | 234 | |
fbeb603c | 235 | #define REG_ALLOC_ORDER \ |
236 | /* r0 r1 r2 r3 r4 r5 r6 r7 mac ap rap fp */ \ | |
237 | { 2, 3, 0, 1, 4, 5, 6, 8, 7, 9, 10, 11 } | |
a65ce2f2 | 238 | |
a578a1cc | 239 | #define HARD_REGNO_NREGS(REGNO, MODE) \ |
240 | h8300_hard_regno_nregs ((REGNO), (MODE)) | |
e1629549 | 241 | |
a578a1cc | 242 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ |
243 | h8300_hard_regno_mode_ok ((REGNO), (MODE)) | |
e1629549 | 244 | |
245 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
246 | when one has mode MODE1 and one has mode MODE2. | |
247 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
248 | for any hard reg, then this must be 0 for correct output. */ | |
7953f686 | 249 | #define MODES_TIEABLE_P(MODE1, MODE2) \ |
250 | ((MODE1) == (MODE2) \ | |
251 | || (((MODE1) == QImode || (MODE1) == HImode \ | |
252 | || ((TARGET_H8300H || TARGET_H8300S) && (MODE1) == SImode)) \ | |
253 | && ((MODE2) == QImode || (MODE2) == HImode \ | |
254 | || ((TARGET_H8300H || TARGET_H8300S) && (MODE2) == SImode)))) | |
e1629549 | 255 | |
01272fdf | 256 | /* A C expression that is nonzero if hard register NEW_REG can be |
257 | considered for use as a rename register for OLD_REG register */ | |
258 | ||
259 | #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ | |
260 | h8300_hard_regno_rename_ok (OLD_REG, NEW_REG) | |
261 | ||
e1629549 | 262 | /* Specify the registers used for certain standard purposes. |
263 | The values of these macros are register numbers. */ | |
264 | ||
265 | /* H8/300 pc is not overloaded on a register. */ | |
d22d451b | 266 | |
e1629549 | 267 | /*#define PC_REGNUM 15*/ |
268 | ||
269 | /* Register to use for pushing function arguments. */ | |
2e9dc773 | 270 | #define STACK_POINTER_REGNUM SP_REG |
e1629549 | 271 | |
f4ac50fb | 272 | /* Base register for access to local variables of the function. */ |
273 | #define HARD_FRAME_POINTER_REGNUM HFP_REG | |
274 | ||
e1629549 | 275 | /* Base register for access to local variables of the function. */ |
2e9dc773 | 276 | #define FRAME_POINTER_REGNUM FP_REG |
e1629549 | 277 | |
e1629549 | 278 | /* Base register for access to arguments of the function. */ |
914c4f2c | 279 | #define ARG_POINTER_REGNUM AP_REG |
e1629549 | 280 | |
281 | /* Register in which static-chain is passed to a function. */ | |
914c4f2c | 282 | #define STATIC_CHAIN_REGNUM SC_REG |
f643a7d5 | 283 | |
284 | /* Fake register that holds the address on the stack of the | |
285 | current function's return address. */ | |
914c4f2c | 286 | #define RETURN_ADDRESS_POINTER_REGNUM RAP_REG |
f643a7d5 | 287 | |
288 | /* A C expression whose value is RTL representing the value of the return | |
289 | address for the frame COUNT steps up from the current frame. | |
290 | FRAMEADDR is already the frame pointer of the COUNT frame, assuming | |
291 | a stack layout with the frame pointer as the first saved register. */ | |
292 | #define RETURN_ADDR_RTX(COUNT, FRAME) h8300_return_addr_rtx ((COUNT), (FRAME)) | |
e1629549 | 293 | \f |
294 | /* Define the classes of registers for register constraints in the | |
295 | machine description. Also define ranges of constants. | |
296 | ||
297 | One of the classes must always be named ALL_REGS and include all hard regs. | |
298 | If there is more than one class, another class must be named NO_REGS | |
299 | and contain no registers. | |
300 | ||
301 | The name GENERAL_REGS must be the name of a class (or an alias for | |
302 | another name such as ALL_REGS). This is the class of registers | |
303 | that is allowed by "g" or "r" in a register constraint. | |
304 | Also, registers outside this class are allocated only when | |
305 | instructions express preferences for them. | |
306 | ||
307 | The classes must be numbered in nondecreasing order; that is, | |
308 | a larger-numbered class must never be contained completely | |
309 | in a smaller-numbered class. | |
310 | ||
311 | For any two classes, it is very desirable that there be another | |
312 | class that represents their union. */ | |
eb2aa24e | 313 | |
30c992ef | 314 | enum reg_class { |
727c62dd | 315 | NO_REGS, COUNTER_REGS, SOURCE_REGS, DESTINATION_REGS, |
316 | GENERAL_REGS, MAC_REGS, ALL_REGS, LIM_REG_CLASSES | |
30c992ef | 317 | }; |
e1629549 | 318 | |
97a4bc7f | 319 | #define N_REG_CLASSES ((int) LIM_REG_CLASSES) |
e1629549 | 320 | |
87d3145e | 321 | /* Give names of register classes as strings for dump file. */ |
e1629549 | 322 | |
323 | #define REG_CLASS_NAMES \ | |
727c62dd | 324 | { "NO_REGS", "COUNTER_REGS", "SOURCE_REGS", "DESTINATION_REGS", \ |
325 | "GENERAL_REGS", "MAC_REGS", "ALL_REGS", "LIM_REGS" } | |
e1629549 | 326 | |
327 | /* Define which registers fit in which classes. | |
328 | This is an initializer for a vector of HARD_REG_SET | |
329 | of length N_REG_CLASSES. */ | |
330 | ||
81c3eb11 | 331 | #define REG_CLASS_CONTENTS \ |
9305fe33 | 332 | { {0}, /* No regs */ \ |
727c62dd | 333 | {0x010}, /* COUNTER_REGS */ \ |
334 | {0x020}, /* SOURCE_REGS */ \ | |
335 | {0x040}, /* DESTINATION_REGS */ \ | |
fbeb603c | 336 | {0xeff}, /* GENERAL_REGS */ \ |
727c62dd | 337 | {0x100}, /* MAC_REGS */ \ |
fbeb603c | 338 | {0xfff}, /* ALL_REGS */ \ |
e1629549 | 339 | } |
340 | ||
d22d451b | 341 | /* The same information, inverted: |
342 | Return the class number of the smallest class containing | |
343 | reg number REGNO. This could be a conditional expression | |
a65ce2f2 | 344 | or could index an array. */ |
92eae32b | 345 | |
727c62dd | 346 | #define REGNO_REG_CLASS(REGNO) \ |
347 | ((REGNO) == MAC_REG ? MAC_REGS \ | |
348 | : (REGNO) == COUNTER_REG ? COUNTER_REGS \ | |
349 | : (REGNO) == SOURCE_REG ? SOURCE_REGS \ | |
350 | : (REGNO) == DESTINATION_REG ? DESTINATION_REGS \ | |
351 | : GENERAL_REGS) | |
e1629549 | 352 | |
353 | /* The class value for index registers, and the one for base regs. */ | |
354 | ||
727c62dd | 355 | #define INDEX_REG_CLASS (TARGET_H8300SX ? GENERAL_REGS : NO_REGS) |
e1629549 | 356 | #define BASE_REG_CLASS GENERAL_REGS |
357 | ||
e1629549 | 358 | /* Stack layout; function entry, exit and calling. */ |
359 | ||
360 | /* Define this if pushing a word on the stack | |
361 | makes the stack pointer a smaller address. */ | |
d22d451b | 362 | |
2b785411 | 363 | #define STACK_GROWS_DOWNWARD 1 |
e1629549 | 364 | |
3ce7ff97 | 365 | /* Define this to nonzero if the nominal address of the stack frame |
e1629549 | 366 | is at the high-address end of the local variables; |
367 | that is, each additional local variable allocated | |
368 | goes at a more negative offset in the frame. */ | |
d22d451b | 369 | |
d28d5017 | 370 | #define FRAME_GROWS_DOWNWARD 1 |
e1629549 | 371 | |
372 | /* Offset within stack frame to start allocating local variables at. | |
373 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
374 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
375 | of the first local allocated. */ | |
d22d451b | 376 | |
e1629549 | 377 | #define STARTING_FRAME_OFFSET 0 |
378 | ||
379 | /* If we generate an insn to push BYTES bytes, | |
380 | this says how many the stack pointer really advances by. | |
381 | ||
382 | On the H8/300, @-sp really pushes a byte if you ask it to - but that's | |
383 | dangerous, so we claim that it always pushes a word, then we catch | |
d22d451b | 384 | the mov.b rx,@-sp and turn it into a mov.w rx,@-sp on output. |
e1629549 | 385 | |
024c9703 | 386 | On the H8/300H, we simplify TARGET_QUICKCALL by setting this to 4 |
387 | and doing a similar thing. */ | |
e1629549 | 388 | |
d22d451b | 389 | #define PUSH_ROUNDING(BYTES) \ |
024c9703 | 390 | (((BYTES) + PARM_BOUNDARY / 8 - 1) & -PARM_BOUNDARY / 8) |
d22d451b | 391 | |
392 | /* Offset of first parameter from the argument pointer register value. */ | |
e1629549 | 393 | /* Is equal to the size of the saved fp + pc, even if an fp isn't |
394 | saved since the value is used before we know. */ | |
d22d451b | 395 | |
e1629549 | 396 | #define FIRST_PARM_OFFSET(FNDECL) 0 |
397 | ||
e1629549 | 398 | /* Definitions for register eliminations. |
399 | ||
400 | This is an array of structures. Each structure initializes one pair | |
401 | of eliminable registers. The "from" register number is given first, | |
402 | followed by "to". Eliminations of the same "from" register are listed | |
403 | in order of preference. | |
404 | ||
3d5bc8c3 | 405 | We have three registers that can be eliminated on the h8300. |
406 | First, the frame pointer register can often be eliminated in favor | |
407 | of the stack pointer register. Secondly, the argument pointer | |
408 | register and the return address pointer register are always | |
409 | eliminated; they are replaced with either the stack or frame | |
410 | pointer. */ | |
d22d451b | 411 | |
f4ac50fb | 412 | #define ELIMINABLE_REGS \ |
413 | {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
414 | { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
415 | { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
416 | { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
417 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
418 | { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} | |
e1629549 | 419 | |
e1629549 | 420 | /* Define the offset between two registers, one to be eliminated, and the other |
421 | its replacement, at the start of a routine. */ | |
d22d451b | 422 | |
b52b2982 | 423 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ |
424 | ((OFFSET) = h8300_initial_elimination_offset ((FROM), (TO))) | |
e1629549 | 425 | |
e1629549 | 426 | /* Define this if PCC uses the nonreentrant convention for returning |
427 | structure and union values. */ | |
d22d451b | 428 | |
429 | /*#define PCC_STATIC_STRUCT_RETURN*/ | |
e1629549 | 430 | |
431 | /* 1 if N is a possible register number for function argument passing. | |
d22d451b | 432 | On the H8, no registers are used in this way. */ |
d22d451b | 433 | |
0a56558f | 434 | #define FUNCTION_ARG_REGNO_P(N) (TARGET_QUICKCALL ? N < 3 : 0) |
e1629549 | 435 | |
ed5527ca | 436 | /* When this hook returns true for MODE, the compiler allows |
437 | registers explicitly used in the rtl to be used as spill registers | |
438 | but prevents the compiler from extending the lifetime of these | |
439 | registers. */ | |
440 | #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true | |
e1629549 | 441 | \f |
442 | /* Define a data type for recording info about an argument list | |
443 | during the scan of that argument list. This data type should | |
d22d451b | 444 | hold all necessary information about the function itself |
e1629549 | 445 | and about the args processed so far, enough to enable macros |
446 | such as FUNCTION_ARG to determine where the next arg should go. | |
447 | ||
024c9703 | 448 | On the H8/300, this is a two item struct, the first is the number |
449 | of bytes scanned so far and the second is the rtx of the called | |
450 | library function if any. */ | |
e1629549 | 451 | |
452 | #define CUMULATIVE_ARGS struct cum_arg | |
eb2aa24e | 453 | struct cum_arg |
454 | { | |
455 | int nbytes; | |
842ae815 | 456 | rtx libcall; |
eb2aa24e | 457 | }; |
e1629549 | 458 | |
459 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
460 | for a call to a function whose data type is FNTYPE. | |
461 | For a library call, FNTYPE is 0. | |
462 | ||
463 | On the H8/300, the offset starts at 0. */ | |
d22d451b | 464 | |
30c70355 | 465 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ |
d22d451b | 466 | ((CUM).nbytes = 0, (CUM).libcall = LIBNAME) |
e1629549 | 467 | |
e1629549 | 468 | /* Output assembler code to FILE to increment profiler label # LABELNO |
469 | for profiling a function entry. */ | |
470 | ||
d22d451b | 471 | #define FUNCTION_PROFILER(FILE, LABELNO) \ |
472 | fprintf (FILE, "\t%s\t#LP%d,%s\n\tjsr @mcount\n", \ | |
473 | h8_mov_op, (LABELNO), h8_reg_names[0]); | |
e1629549 | 474 | |
e1629549 | 475 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, |
476 | the stack pointer does not matter. The value is tested only in | |
477 | functions that have frame pointers. | |
478 | No definition is equivalent to always zero. */ | |
479 | ||
480 | #define EXIT_IGNORE_STACK 0 | |
481 | ||
e1629549 | 482 | /* Length in units of the trampoline for entering a nested function. */ |
483 | ||
34712114 | 484 | #define TRAMPOLINE_SIZE ((Pmode == HImode) ? 8 : 12) |
e1629549 | 485 | \f |
d22d451b | 486 | /* Addressing modes, and classification of registers for them. */ |
e1629549 | 487 | |
e4e498cf | 488 | #define HAVE_POST_INCREMENT 1 |
e4e498cf | 489 | #define HAVE_PRE_DECREMENT 1 |
727c62dd | 490 | #define HAVE_POST_DECREMENT TARGET_H8300SX |
491 | #define HAVE_PRE_INCREMENT TARGET_H8300SX | |
e1629549 | 492 | |
493 | /* Macros to check register numbers against specific register classes. */ | |
494 | ||
495 | /* These assume that REGNO is a hard or pseudo reg number. | |
496 | They give nonzero only if REGNO is a hard reg of the suitable class | |
497 | or a pseudo reg currently allocated to a suitable hard reg. | |
498 | Since they use reg_renumber, they are safe only once reg_renumber | |
957b2bdc | 499 | has been allocated, which happens in reginfo.c during register |
500 | allocation. */ | |
eb2aa24e | 501 | |
d22d451b | 502 | #define REGNO_OK_FOR_INDEX_P(regno) 0 |
e1629549 | 503 | |
b91522ff | 504 | #define REGNO_OK_FOR_BASE_P(regno) \ |
505 | (((regno) < FIRST_PSEUDO_REGISTER && regno != MAC_REG) \ | |
506 | || reg_renumber[regno] >= 0) | |
e1629549 | 507 | \f |
508 | /* Maximum number of registers that can appear in a valid memory address. */ | |
509 | ||
510 | #define MAX_REGS_PER_ADDRESS 1 | |
511 | ||
512 | /* 1 if X is an rtx for a constant that is a valid address. */ | |
513 | ||
27276a3b | 514 | #define CONSTANT_ADDRESS_P(X) \ |
d22d451b | 515 | (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ |
516 | || (GET_CODE (X) == CONST_INT \ | |
517 | /* We handle signed and unsigned offsets here. */ \ | |
518 | && INTVAL (X) > (TARGET_H8300 ? -0x10000 : -0x1000000) \ | |
519 | && INTVAL (X) < (TARGET_H8300 ? 0x10000 : 0x1000000)) \ | |
bf33764c | 520 | || (GET_CODE (X) == HIGH || GET_CODE (X) == CONST)) |
e1629549 | 521 | |
e1629549 | 522 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx |
523 | and check its validity for a certain class. | |
524 | We have two alternate definitions for each of them. | |
525 | The usual definition accepts all pseudo regs; the other rejects | |
526 | them unless they have been allocated suitable hard regs. | |
527 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
528 | ||
529 | Most source files want to accept pseudo regs in the hope that | |
530 | they will get allocated to the class that the insn wants them to be in. | |
531 | Source files for reload pass need to be strict. | |
532 | After reload, it makes no difference, since pseudo regs have | |
533 | been eliminated by then. */ | |
534 | ||
61c2d1b0 | 535 | /* Non-strict versions. */ |
536 | #define REG_OK_FOR_INDEX_NONSTRICT_P(X) 0 | |
537 | /* Don't use REGNO_OK_FOR_BASE_P here because it uses reg_renumber. */ | |
538 | #define REG_OK_FOR_BASE_NONSTRICT_P(X) \ | |
b0c1e147 | 539 | (REGNO (X) >= FIRST_PSEUDO_REGISTER || REGNO (X) != MAC_REG) |
61c2d1b0 | 540 | |
541 | /* Strict versions. */ | |
542 | #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
543 | #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
544 | ||
e1629549 | 545 | #ifndef REG_OK_STRICT |
546 | ||
61c2d1b0 | 547 | #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X) |
548 | #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P (X) | |
e1629549 | 549 | |
550 | #else | |
551 | ||
61c2d1b0 | 552 | #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P (X) |
553 | #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X) | |
e1629549 | 554 | |
555 | #endif | |
d22d451b | 556 | |
e1629549 | 557 | \f |
e1629549 | 558 | /* Specify the machine mode that this machine uses |
559 | for the index in the tablejump instruction. */ | |
d22d451b | 560 | #define CASE_VECTOR_MODE Pmode |
e1629549 | 561 | |
e1629549 | 562 | /* Define this as 1 if `char' should by default be signed; else as 0. |
563 | ||
564 | On the H8/300, sign extension is expensive, so we'll say that chars | |
565 | are unsigned. */ | |
566 | #define DEFAULT_SIGNED_CHAR 0 | |
567 | ||
e1629549 | 568 | /* Max number of bytes we can move from memory to memory |
569 | in one reasonably fast instruction. */ | |
69b4e418 | 570 | #define MOVE_MAX (TARGET_H8300H || TARGET_H8300S ? 4 : 2) |
d22d451b | 571 | #define MAX_MOVE_MAX 4 |
e1629549 | 572 | |
e1629549 | 573 | /* Nonzero if access to memory by bytes is slow and undesirable. */ |
574 | #define SLOW_BYTE_ACCESS TARGET_SLOWBYTE | |
575 | ||
576 | /* Define if shifts truncate the shift count | |
577 | which implies one can omit a sign-extension or zero-extension | |
578 | of a shift count. */ | |
579 | /* #define SHIFT_COUNT_TRUNCATED */ | |
580 | ||
581 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
582 | is done just by pretending it is already truncated. */ | |
583 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
584 | ||
585 | /* Specify the machine mode that pointers have. | |
586 | After generation of rtl, the compiler makes no further distinction | |
587 | between pointers and any other objects of this machine mode. */ | |
35a462ce | 588 | #define Pmode \ |
589 | ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? SImode : HImode) | |
d22d451b | 590 | |
591 | /* ANSI C types. | |
7d754c59 | 592 | We use longs for the H8/300H and the H8S because ints can be 16 or 32. |
d22d451b | 593 | GCC requires SIZE_TYPE to be the same size as pointers. */ |
35a462ce | 594 | #define SIZE_TYPE \ |
727c62dd | 595 | (TARGET_H8300 || TARGET_NORMAL_MODE ? TARGET_INT32 ? "short unsigned int" : "unsigned int" : "long unsigned int") |
35a462ce | 596 | #define PTRDIFF_TYPE \ |
727c62dd | 597 | (TARGET_H8300 || TARGET_NORMAL_MODE ? TARGET_INT32 ? "short int" : "int" : "long int") |
35a462ce | 598 | |
599 | #define POINTER_SIZE \ | |
600 | ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? 32 : 16) | |
e1629549 | 601 | |
d22d451b | 602 | #define WCHAR_TYPE "short unsigned int" |
603 | #define WCHAR_TYPE_SIZE 16 | |
e1629549 | 604 | |
605 | /* A function address in a call instruction | |
606 | is a byte address (for indexing purposes) | |
607 | so give the MEM rtx a byte's mode. */ | |
608 | #define FUNCTION_MODE QImode | |
609 | ||
727c62dd | 610 | /* Return the length of JUMP's delay slot insn (0 if it has none). |
611 | If JUMP is a delayed branch, NEXT_INSN (PREV_INSN (JUMP)) will | |
612 | be the containing SEQUENCE, not JUMP itself. */ | |
613 | #define DELAY_SLOT_LENGTH(JUMP) \ | |
614 | (NEXT_INSN (PREV_INSN (JUMP)) == JUMP ? 0 : 2) | |
615 | ||
4a9d7ef7 | 616 | #define BRANCH_COST(speed_p, predictable_p) 0 |
d22d451b | 617 | |
e1629549 | 618 | /* Tell final.c how to eliminate redundant test instructions. */ |
d22d451b | 619 | |
620 | /* Here we define machine-dependent flags and fields in cc_status | |
25d1d1e9 | 621 | (see `conditions.h'). No extra ones are needed for the h8300. */ |
d22d451b | 622 | |
623 | /* Store in cc_status the expressions | |
624 | that the condition codes will describe | |
625 | after execution of an instruction whose pattern is EXP. | |
626 | Do not alter them if the instruction would not alter the cc's. */ | |
627 | ||
7baf3cdd | 628 | #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc (EXP, INSN) |
d22d451b | 629 | |
30c992ef | 630 | /* The add insns don't set overflow in a usable way. */ |
631 | #define CC_OVERFLOW_UNUSABLE 01000 | |
7baf3cdd | 632 | /* The mov,and,or,xor insns don't set carry. That's OK though as the |
30c992ef | 633 | Z bit is all we need when doing unsigned comparisons on the result of |
634 | these insns (since they're always with 0). However, conditions.h has | |
635 | CC_NO_OVERFLOW defined for this purpose. Rename it to something more | |
636 | understandable. */ | |
637 | #define CC_NO_CARRY CC_NO_OVERFLOW | |
e1629549 | 638 | \f |
639 | /* Control the assembler format that we output. */ | |
640 | ||
e1629549 | 641 | /* Output to assembler file text saying following lines |
642 | may contain character constants, extra white space, comments, etc. */ | |
643 | ||
d22d451b | 644 | #define ASM_APP_ON "; #APP\n" |
e1629549 | 645 | |
646 | /* Output to assembler file text saying following lines | |
647 | no longer contain unusual constructs. */ | |
648 | ||
d22d451b | 649 | #define ASM_APP_OFF "; #NO_APP\n" |
e1629549 | 650 | |
d22d451b | 651 | #define FILE_ASM_OP "\t.file\n" |
d22d451b | 652 | |
653 | /* The assembler op to get a word, 2 bytes for the H8/300, 4 for H8/300H. */ | |
35a462ce | 654 | #define ASM_WORD_OP \ |
655 | (TARGET_H8300 || TARGET_NORMAL_MODE ? "\t.word\t" : "\t.long\t") | |
e1629549 | 656 | |
e1629549 | 657 | #define TEXT_SECTION_ASM_OP "\t.section .text" |
658 | #define DATA_SECTION_ASM_OP "\t.section .data" | |
d22d451b | 659 | #define BSS_SECTION_ASM_OP "\t.section .bss" |
d22d451b | 660 | |
eb2aa24e | 661 | #undef DO_GLOBAL_CTORS_BODY |
d22d451b | 662 | #define DO_GLOBAL_CTORS_BODY \ |
663 | { \ | |
cec97c18 | 664 | extern func_ptr __ctors[]; \ |
665 | extern func_ptr __ctors_end[]; \ | |
666 | func_ptr *p; \ | |
2c5a14aa | 667 | for (p = __ctors_end; p > __ctors; ) \ |
d22d451b | 668 | { \ |
2c5a14aa | 669 | (*--p)(); \ |
d22d451b | 670 | } \ |
eb2aa24e | 671 | } |
d22d451b | 672 | |
eb2aa24e | 673 | #undef DO_GLOBAL_DTORS_BODY |
01d15dc5 | 674 | #define DO_GLOBAL_DTORS_BODY \ |
d22d451b | 675 | { \ |
cec97c18 | 676 | extern func_ptr __dtors[]; \ |
677 | extern func_ptr __dtors_end[]; \ | |
678 | func_ptr *p; \ | |
d22d451b | 679 | for (p = __dtors; p < __dtors_end; p++) \ |
680 | { \ | |
681 | (*p)(); \ | |
682 | } \ | |
eb2aa24e | 683 | } |
e1629549 | 684 | |
685 | /* How to refer to registers in assembler output. | |
686 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
687 | ||
688 | #define REGISTER_NAMES \ | |
f4ac50fb | 689 | { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "sp", "mac", "ap", "rap", "fp" } |
ddc858f3 | 690 | |
38aee53a | 691 | #define ADDITIONAL_REGISTER_NAMES \ |
692 | { {"er0", 0}, {"er1", 1}, {"er2", 2}, {"er3", 3}, {"er4", 4}, \ | |
693 | {"er5", 5}, {"er6", 6}, {"er7", 7}, {"r7", 7} } | |
e1629549 | 694 | |
0036ad94 | 695 | /* Globalizing directive for a label. */ |
696 | #define GLOBAL_ASM_OP "\t.global " | |
e1629549 | 697 | |
d22d451b | 698 | #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ |
70a7518f | 699 | ASM_OUTPUT_LABEL (FILE, NAME) |
e1629549 | 700 | |
8b88e5d2 | 701 | /* The prefix to add to user-visible assembler symbols. */ |
c4b47fac | 702 | |
bee1420b | 703 | #define USER_LABEL_PREFIX "_" |
e1629549 | 704 | |
e1629549 | 705 | /* This is how to store into the string LABEL |
706 | the symbol_ref name of an internal numbered label where | |
707 | PREFIX is the class of label and NUM is the number within the class. | |
230002f2 | 708 | This is suitable for output with `assemble_name'. |
e1629549 | 709 | |
805e22b2 | 710 | N.B.: The h8300.md branch_true and branch_false patterns also know |
711 | how to generate internal labels. */ | |
e1629549 | 712 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ |
6433714e | 713 | sprintf (LABEL, "*.%s%lu", PREFIX, (unsigned long)(NUM)) |
e1629549 | 714 | |
e1629549 | 715 | /* This is how to output an insn to push a register on the stack. |
716 | It need not be very fast code. */ | |
d22d451b | 717 | |
718 | #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \ | |
719 | fprintf (FILE, "\t%s\t%s\n", h8_push_op, h8_reg_names[REGNO]) | |
e1629549 | 720 | |
721 | /* This is how to output an insn to pop a register from the stack. | |
722 | It need not be very fast code. */ | |
e1629549 | 723 | |
7baf3cdd | 724 | #define ASM_OUTPUT_REG_POP(FILE, REGNO) \ |
d22d451b | 725 | fprintf (FILE, "\t%s\t%s\n", h8_pop_op, h8_reg_names[REGNO]) |
726 | ||
727 | /* This is how to output an element of a case-vector that is absolute. */ | |
728 | ||
729 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
7fe1d31c | 730 | fprintf (FILE, "%s.L%d\n", ASM_WORD_OP, VALUE) |
e1629549 | 731 | |
732 | /* This is how to output an element of a case-vector that is relative. */ | |
d22d451b | 733 | |
9eaab178 | 734 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
71113c04 | 735 | fprintf (FILE, "%s.L%d-.L%d\n", ASM_WORD_OP, VALUE, REL) |
e1629549 | 736 | |
737 | /* This is how to output an assembler line | |
738 | that says to advance the location counter | |
739 | to a multiple of 2**LOG bytes. */ | |
d22d451b | 740 | |
7baf3cdd | 741 | #define ASM_OUTPUT_ALIGN(FILE, LOG) \ |
27276a3b | 742 | if ((LOG) != 0) \ |
ddc858f3 | 743 | fprintf (FILE, "\t.align %d\n", (LOG)) |
e1629549 | 744 | |
d22d451b | 745 | #define ASM_OUTPUT_SKIP(FILE, SIZE) \ |
d716c068 | 746 | fprintf (FILE, "\t.space %d\n", (int)(SIZE)) |
e1629549 | 747 | |
748 | /* This says how to output an assembler line | |
749 | to define a global common symbol. */ | |
d22d451b | 750 | |
27276a3b | 751 | #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ |
752 | ( fputs ("\t.comm ", (FILE)), \ | |
753 | assemble_name ((FILE), (NAME)), \ | |
6433714e | 754 | fprintf ((FILE), ",%lu\n", (unsigned long)(SIZE))) |
e1629549 | 755 | |
94c0f361 | 756 | #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ |
757 | asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN) | |
758 | ||
e1629549 | 759 | /* This says how to output an assembler line |
760 | to define a local common symbol. */ | |
d22d451b | 761 | |
7baf3cdd | 762 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ |
e1629549 | 763 | ( fputs ("\t.lcomm ", (FILE)), \ |
764 | assemble_name ((FILE), (NAME)), \ | |
d716c068 | 765 | fprintf ((FILE), ",%d\n", (int)(SIZE))) |
e1629549 | 766 | |
805e22b2 | 767 | #define ASM_PN_FORMAT "%s___%lu" |
e1629549 | 768 | |
1fcd08b1 | 769 | /* H8300 specific pragmas. */ |
eb180587 | 770 | #define REGISTER_TARGET_PRAGMAS() \ |
771 | do \ | |
772 | { \ | |
773 | c_register_pragma (0, "saveall", h8300_pr_saveall); \ | |
774 | c_register_pragma (0, "interrupt", h8300_pr_interrupt); \ | |
775 | } \ | |
024c9703 | 776 | while (0) |
e1629549 | 777 | |
024c9703 | 778 | #define FINAL_PRESCAN_INSN(insn, operand, nop) \ |
779 | final_prescan_insn (insn, operand, nop) | |
e1629549 | 780 | |
727c62dd | 781 | extern int h8300_move_ratio; |
f5733e7c | 782 | #define MOVE_RATIO(speed) h8300_move_ratio |
1fcd08b1 | 783 | |
d255713c | 784 | /* Machine-specific symbol_ref flags. */ |
785 | #define SYMBOL_FLAG_FUNCVEC_FUNCTION (SYMBOL_FLAG_MACH_DEP << 0) | |
786 | #define SYMBOL_FLAG_EIGHTBIT_DATA (SYMBOL_FLAG_MACH_DEP << 1) | |
787 | #define SYMBOL_FLAG_TINY_DATA (SYMBOL_FLAG_MACH_DEP << 2) | |
b2589b50 | 788 | |
2a281353 | 789 | #endif /* ! GCC_H8300_H */ |