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88143062 1/* Definitions of target machine for GNU compiler. System/370 version.
18543a22 2 Copyright (C) 1989, 1993, 1995, 1996, 1997 Free Software Foundation, Inc.
88143062 3 Contributed by Jan Stein (jan@cd.chalmers.se).
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4 Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
5 Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
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6
7This file is part of GNU CC.
8
9GNU CC is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 2, or (at your option)
12any later version.
13
14GNU CC is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License
20along with GNU CC; see the file COPYING. If not, write to
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21the Free Software Foundation, 59 Temple Place - Suite 330,
22Boston, MA 02111-1307, USA. */
88143062 23
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24#ifndef __I370_H__
25#define __I370_H__
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26/* Run-time compilation parameters selecting different hardware subsets. */
27
28extern int target_flags;
29
30/* The sizes of the code and literals on the current page. */
31
32extern int mvs_page_code, mvs_page_lit;
33
34/* The current page number and the base page number for the function. */
35
36extern int mvs_page_num, function_base_page;
37
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38/* The name of the current function. */
39
40extern char *mvs_function_name;
41
42/* The length of the function name malloc'd area. */
43
44extern int mvs_function_name_length;
45
ddd5a7c1 46/* Compile using char instructions (mvc, nc, oc, xc). On 4341 use this since
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47 these are more than twice as fast as load-op-store.
48 On 3090 don't use this since load-op-store is much faster. */
49
50#define TARGET_CHAR_INSTRUCTIONS (target_flags & 1)
51
52/* Default target switches */
53
54#define TARGET_DEFAULT 1
55
56/* Macro to define tables used to set the flags. This is a list in braces
57 of pairs in braces, each pair being { "NAME", VALUE }
58 where VALUE is the bits to set or minus the bits to clear.
59 An empty string NAME is used to identify the default VALUE. */
60
61#define TARGET_SWITCHES \
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62{ { "char-instructions", 1, "Generate char instructions"}, \
63 { "no-char-instructions", -1, "Do not generate char instructions"}, \
64 { "", TARGET_DEFAULT} }
88143062 65
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66/* To use IBM supplied macro function prologue and epilogue, define the
67 following to 1. Should only be needed if IBM changes the definition
68 of their prologue and epilogue. */
69
70#define MACROPROLOGUE 0
71#define MACROEPILOGUE 0
72
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73/* Target machine storage layout */
74
75/* Define this if most significant bit is lowest numbered in instructions
76 that operate on numbered bit-fields. */
77
78#define BITS_BIG_ENDIAN 1
79
80/* Define this if most significant byte of a word is the lowest numbered. */
81
82#define BYTES_BIG_ENDIAN 1
83
84/* Define this if MS word of a multiword is the lowest numbered. */
85
86#define WORDS_BIG_ENDIAN 1
87
ddd5a7c1 88/* Number of bits in an addressable storage unit. */
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89
90#define BITS_PER_UNIT 8
91
92/* Width in bits of a "word", which is the contents of a machine register. */
93
94#define BITS_PER_WORD 32
95
96/* Width of a word, in units (bytes). */
97
98#define UNITS_PER_WORD 4
99
100/* Width in bits of a pointer. See also the macro `Pmode' defined below. */
101
102#define POINTER_SIZE 32
103
104/* Allocation boundary (in *bits*) for storing pointers in memory. */
105
106#define POINTER_BOUNDARY 32
107
108/* Allocation boundary (in *bits*) for storing arguments in argument list. */
109
110#define PARM_BOUNDARY 32
111
112/* Boundary (in *bits*) on which stack pointer should be aligned. */
113
114#define STACK_BOUNDARY 32
115
116/* Allocation boundary (in *bits*) for the code of a function. */
117
118#define FUNCTION_BOUNDARY 32
119
120/* There is no point aligning anything to a rounder boundary than this. */
121
122#define BIGGEST_ALIGNMENT 64
123
124/* Alignment of field after `int : 0' in a structure. */
125
126#define EMPTY_FIELD_BOUNDARY 32
127
128/* Define this if move instructions will actually fail to work when given
129 unaligned data. */
130
131#define STRICT_ALIGNMENT 0
132
133/* Define target floating point format. */
134
135#define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
136
137/* Define character mapping for cross-compiling. */
92d6db66 138/* but only define it if really needed, since otherwise it will break builds */
88143062 139
92d6db66 140#ifdef TARGET_EBCDIC
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141#ifdef HOST_EBCDIC
142#define MAP_CHARACTER(c) ((char)(c))
143#else
144#define MAP_CHARACTER(c) ((char)mvs_map_char (c))
145#endif
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146#endif
147
148#ifdef TARGET_HLASM
149/* Define this macro if you want to implement any pragmas. If defined, it
150 is a C expression to be executed when #pragma is seen. The
151 argument FILE is the stdio input stream from which the source
152 text can be read. CH is the first character after the #pragma. The
153 result of the expression is the terminating character found
154 (newline or EOF). */
155#define HANDLE_PRAGMA(FILE, NODE) handle_pragma ((FILE), (NODE))
156#endif /* TARGET_HLASM */
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157
158/* Define maximum length of page minus page escape overhead. */
159
160#define MAX_MVS_PAGE_LENGTH 4080
161
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162/* Define special register allocation order desired.
163 Don't fiddle with this. I did, and I got all sorts of register
164 spill errors when compiling even relatively simple programs...
165 I have no clue why ...
166 E.g. this one is bad:
167 { 0, 1, 2, 9, 8, 7, 6, 5, 10, 15, 14, 12, 3, 4, 16, 17, 18, 19, 11, 13 }
168 */
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169
170#define REG_ALLOC_ORDER \
171{ 0, 1, 2, 3, 14, 15, 12, 10, 9, 8, 7, 6, 5, 4, 16, 17, 18, 19, 11, 13 }
172
173/* Standard register usage. */
174
175/* Number of actual hardware registers. The hardware registers are
176 assigned numbers for the compiler from 0 to just below
177 FIRST_PSEUDO_REGISTER.
178 All registers that the compiler knows about must be given numbers,
179 even those that are not normally considered general registers.
180 For the 370, we give the data registers numbers 0-15,
181 and the floating point registers numbers 16-19. */
182
183#define FIRST_PSEUDO_REGISTER 20
184
185/* Define base and page registers. */
186
187#define BASE_REGISTER 3
188#define PAGE_REGISTER 4
189
190/* 1 for registers that have pervasive standard uses and are not available
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191 for the register allocator. These are registers that must have fixed,
192 valid values stored in them for the entire length of the subroutine call,
193 and must not in any way be moved around, jiggered with, etc. That is,
194 they must never be clobbered, and, if clobbered, the register allocator
195 will never restore them back.
196
197 We use five registers in this special way:
198 -- R3 which is used as the base register
199 -- R4 the page origin table pointer used to load R3,
200 -- R11 the arg pointer.
201 -- R12 the TCA pointer
202 -- R13 the stack (DSA) pointer
203
204 A fifth register is also exceptional: R14 is used in many branch
205 instructions to hold the target of the branch. Technically, this
206 does not qualify R14 as a register with a long-term meaning; it should
207 be enough, theoretically, to note that these instructions clobber
208 R14, and let the compiler deal with that. In practice, however,
209 the "clobber" directive acts as a barrier to optimization, and the
210 optimizer appears to be unable to perform optimizations around branches.
211 Thus, a much better strategy appears to give R14 a pervasive use;
212 this eliminates it from the register pool witout hurting optimization.
213
214 There are other registers which have special meanings, but its OK
215 for them to get clobbered, since other allocator config below will
216 make sure that they always have the right value. These are for
217 example:
218 -- R1 the returned structure pointer.
219 -- R10 the static chain reg.
220 -- R15 holds the value a subroutine returns.
221
222 Notice that it is *almost* safe to mark R11 as available to the allocator.
223 By marking it as a call_used_register, in most cases, the compiler
224 can handle it being clobbered. However, there are a few rare
225 circumstances where the register allocator will allocate r11 and
226 also try to use it as the arg pointer ... thus it must be marked fixed.
227 I think this is a bug, but I can't track it down...
228 */
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229
230#define FIXED_REGISTERS \
231{ 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0 }
232/*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
233
234/* 1 for registers not available across function calls. These must include
235 the FIXED_REGISTERS and also any registers that can be used without being
236 saved.
237 The latter must include the registers where values are returned
238 and the register where structure-value addresses are passed.
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239 NOTE: all floating registers are undefined across calls.
240*/
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241
242#define CALL_USED_REGISTERS \
243{ 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
244/*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
245
246/* Return number of consecutive hard regs needed starting at reg REGNO
247 to hold something of mode MODE.
248 This is ordinarily the length in words of a value of mode MODE
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249 but can be less for certain modes in special long registers.
250 Note that DCmode (complex double) needs two regs.
251*/
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252
253#define HARD_REGNO_NREGS(REGNO, MODE) \
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254 ((REGNO) > 15 ? \
255 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
256 (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
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257
258/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
259 On the 370, the cpu registers can hold QI, HI, SI, SF and DF. The
260 even registers can hold DI. The floating point registers can hold
92d6db66 261 either SF, DF, SC or DC. */
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262
263#define HARD_REGNO_MODE_OK(REGNO, MODE) \
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264 ((REGNO) < 16 ? (((REGNO) & 1) == 0 || \
265 (((MODE) != DImode) && ((MODE) != DFmode))) \
266 : ((MODE) == SFmode || (MODE) == DFmode) || \
267 (MODE) == SCmode || (MODE) == DCmode)
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268
269/* Value is 1 if it is a good idea to tie two pseudo registers when one has
270 mode MODE1 and one has mode MODE2.
271 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
272 for any hard reg, then this must be 0 for correct output. */
273
274#define MODES_TIEABLE_P(MODE1, MODE2) \
275 (((MODE1) == SFmode || (MODE1) == DFmode) \
276 == ((MODE2) == SFmode || (MODE2) == DFmode))
277
278/* Mark external references. */
279
280#define ENCODE_SECTION_INFO(decl) \
281 if (DECL_EXTERNAL (decl) && TREE_PUBLIC (decl)) \
282 SYMBOL_REF_FLAG (XEXP (DECL_RTL (decl), 0)) = 1;
283
284/* Specify the registers used for certain standard purposes.
285 The values of these macros are register numbers. */
286
287/* 370 PC isn't overloaded on a register. */
288
289/* #define PC_REGNUM */
290
291/* Register to use for pushing function arguments. */
292
293#define STACK_POINTER_REGNUM 13
294
295/* Base register for access to local variables of the function. */
296
297#define FRAME_POINTER_REGNUM 13
298
299/* Value should be nonzero if functions must have frame pointers.
300 Zero means the frame pointer need not be set up (and parms may be
301 accessed via the stack pointer) in functions that seem suitable.
302 This is computed in `reload', in reload1.c. */
303
304#define FRAME_POINTER_REQUIRED 1
305
306/* Base register for access to arguments of the function. */
307
308#define ARG_POINTER_REGNUM 11
309
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310/* R10 is register in which static-chain is passed to a function.
311 Static-chaining is done when a nested function references as a global
312 a stack variable of its parent: e.g.
313 int parent_func (int arg) {
314 int x; // x is in parents stack
315 void child_func (void) { x++: } // child references x as global var
316 ...
317 }
318 */
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319
320#define STATIC_CHAIN_REGNUM 10
321
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322/* R1 is register in which address to store a structure value is passed to
323 a function. This is used only when returning 64-bit long-long in a 32-bit arch
324 and when calling functions that return structs by value. e.g.
325 typedef struct A_s { int a,b,c; } A_t;
326 A_t fun_returns_value (void) {
327 A_t a; a.a=1; a.b=2 a.c=3;
328 return a;
329 }
330 In the above, the stroage for the return value is in the callers stack, and
331 the R1 points at that mem location.
332 */
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333
334#define STRUCT_VALUE_REGNUM 1
335
336/* Define the classes of registers for register constraints in the
337 machine description. Also define ranges of constants.
338
339 One of the classes must always be named ALL_REGS and include all hard regs.
340 If there is more than one class, another class must be named NO_REGS
341 and contain no registers.
342
343 The name GENERAL_REGS must be the name of a class (or an alias for
344 another name such as ALL_REGS). This is the class of registers
345 that is allowed by "g" or "r" in a register constraint.
346 Also, registers outside this class are allocated only when
347 instructions express preferences for them.
348
349 The classes must be numbered in nondecreasing order; that is,
350 a larger-numbered class must never be contained completely
351 in a smaller-numbered class.
352
353 For any two classes, it is very desirable that there be another
354 class that represents their union. */
355
356enum reg_class
357 {
358 NO_REGS, ADDR_REGS, DATA_REGS,
359 FP_REGS, ALL_REGS, LIM_REG_CLASSES
360 };
361
362#define GENERAL_REGS DATA_REGS
363#define N_REG_CLASSES (int) LIM_REG_CLASSES
364
365/* Give names of register classes as strings for dump file. */
366
367#define REG_CLASS_NAMES \
368{ "NO_REGS", "ADDR_REGS", "DATA_REGS", "FP_REGS", "ALL_REGS" }
369
370/* Define which registers fit in which classes. This is an initializer for
371 a vector of HARD_REG_SET of length N_REG_CLASSES. */
372
373#define REG_CLASS_CONTENTS {0, 0x0fffe, 0x0ffff, 0xf0000, 0xfffff}
374
375/* The same information, inverted:
376 Return the class number of the smallest class containing
377 reg number REGNO. This could be a conditional expression
378 or could index an array. */
379
380#define REGNO_REG_CLASS(REGNO) \
381 ((REGNO) >= 16 ? FP_REGS : (REGNO) != 0 ? ADDR_REGS : DATA_REGS)
382
383/* The class value for index registers, and the one for base regs. */
384
385#define INDEX_REG_CLASS ADDR_REGS
386#define BASE_REG_CLASS ADDR_REGS
387
388/* Get reg_class from a letter such as appears in the machine description. */
389
390#define REG_CLASS_FROM_LETTER(C) \
391 ((C) == 'a' ? ADDR_REGS : \
392 ((C) == 'd' ? DATA_REGS : \
393 ((C) == 'f' ? FP_REGS : NO_REGS)))
394
395/* The letters I, J, K, L and M in a register constraint string can be used
396 to stand for particular ranges of immediate operands.
397 This macro defines what the ranges are.
398 C is the letter, and VALUE is a constant value.
399 Return 1 if VALUE is in the range specified by C. */
400
401#define CONST_OK_FOR_LETTER_P(VALUE, C) \
402 ((C) == 'I' ? (unsigned) (VALUE) < 256 : \
403 (C) == 'J' ? (unsigned) (VALUE) < 4096 : \
404 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : 0)
405
406/* Similar, but for floating constants, and defining letters G and H.
407 Here VALUE is the CONST_DOUBLE rtx itself. */
408
409#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
410
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411/* see recog.c for details */
412#define EXTRA_CONSTRAINT(OP,C) \
413 ((C) == 'R' ? r_or_s_operand (OP, GET_MODE(OP)) : \
414 (C) == 'S' ? s_operand (OP, GET_MODE(OP)) : 0) \
415
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416/* Given an rtx X being reloaded into a reg required to be in class CLASS,
417 return the class of reg to actually use. In general this is just CLASS;
418 but on some machines in some cases it is preferable to use a more
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419 restrictive class.
420
421 XXX We reload CONST_INT's into ADDR not DATA regs because on certain
422 rare occasions when lots of egisters are spilled, reload() will try
423 to put a const int into r0 and then use r0 as an index register.
424*/
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425
426#define PREFERRED_RELOAD_CLASS(X, CLASS) \
427 (GET_CODE(X) == CONST_DOUBLE ? FP_REGS : \
92d6db66 428 GET_CODE(X) == CONST_INT ? (reload_in_progress ? ADDR_REGS : DATA_REGS) : \
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429 GET_CODE(X) == LABEL_REF || \
430 GET_CODE(X) == SYMBOL_REF || \
431 GET_CODE(X) == CONST ? ADDR_REGS : (CLASS))
432
433/* Return the maximum number of consecutive registers needed to represent
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434 mode MODE in a register of class CLASS.
435 Note that DCmode (complex double) needs two regs.
436*/
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437
438#define CLASS_MAX_NREGS(CLASS, MODE) \
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439 ((CLASS) == FP_REGS ? \
440 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
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441 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
442
443/* Stack layout; function entry, exit and calling. */
444
445/* Define this if pushing a word on the stack makes the stack pointer a
446 smaller address. */
447
448/* #define STACK_GROWS_DOWNWARD */
449
450/* Define this if the nominal address of the stack frame is at the
451 high-address end of the local variables; that is, each additional local
452 variable allocated goes at a more negative offset in the frame. */
453
454/* #define FRAME_GROWS_DOWNWARD */
455
456/* Offset within stack frame to start allocating local variables at.
457 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
458 first local allocated. Otherwise, it is the offset to the BEGINNING
459 of the first local allocated. */
460
461#define STARTING_FRAME_OFFSET \
462 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
463
464#define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
465
466/* If we generate an insn to push BYTES bytes, this says how many the stack
467 pointer really advances by. On the 370, we have no push instruction. */
468
469/* #define PUSH_ROUNDING(BYTES) */
470
471/* Accumulate the outgoing argument count so we can request the right
472 DSA size and determine stack offset. */
473
474#define ACCUMULATE_OUTGOING_ARGS
475
476/* Define offset from stack pointer, to location where a parm can be
477 pushed. */
478
479#define STACK_POINTER_OFFSET 148
480
481/* Offset of first parameter from the argument pointer register value. */
482
483#define FIRST_PARM_OFFSET(FNDECL) 0
484
485/* 1 if N is a possible register number for function argument passing.
486 On the 370, no registers are used in this way. */
487
488#define FUNCTION_ARG_REGNO_P(N) 0
489
490/* Define a data type for recording info about an argument list during
491 the scan of that argument list. This data type should hold all
492 necessary information about the function itself and about the args
493 processed so far, enough to enable macros such as FUNCTION_ARG to
494 determine where the next arg should go. */
495
496#define CUMULATIVE_ARGS int
497
498/* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
499 a function whose data type is FNTYPE.
500 For a library call, FNTYPE is 0. */
501
2c7ee1a6 502#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0)
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503
504/* Update the data in CUM to advance over an argument of mode MODE and
505 data type TYPE. (TYPE is null for libcalls where that information
506 may not be available.) */
507
508#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
509 ((CUM) += ((MODE) == DFmode || (MODE) == SFmode \
510 ? 256 \
511 : (MODE) != BLKmode \
512 ? (GET_MODE_SIZE (MODE) + 3) / 4 \
513 : (int_size_in_bytes (TYPE) + 3) / 4))
514
515/* Define where to put the arguments to a function. Value is zero to push
516 the argument on the stack, or a hard register in which to store the
517 argument. */
518
519#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
520
521/* For an arg passed partly in registers and partly in memory, this is the
522 number of registers used. For args passed entirely in registers or
523 entirely in memory, zero. */
524
525#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
526
527/* Define if returning from a function call automatically pops the
528 arguments described by the number-of-args field in the call. */
529
8b109b37 530#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
88143062 531
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532/* The FUNCTION_VALUE macro dDefines how to find the value returned by a
533 function. VALTYPE is the data type of the value (as a tree).
88143062 534 If the precise function being called is known, FUNC is its FUNCTION_DECL;
92d6db66 535 otherwise, FUNC is NULL.
88143062 536
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537 On the 370 the return value is in R15 or R16. However,
538 DImode (64-bit ints) scalars need to get returned on the stack,
539 with r15 pointing to the location. To accomplish this, we define
540 the RETURN_IN_MEMORY macro to be true for both blockmode (structures)
541 and the DImode scalars.
542 */
88143062 543
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544#define RET_REG(MODE) \
545 (((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
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546
547#define FUNCTION_VALUE(VALTYPE, FUNC) \
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548 gen_rtx(REG, TYPE_MODE (VALTYPE), RET_REG(TYPE_MODE(VALTYPE)))
549
550#define RETURN_IN_MEMORY(VALTYPE) \
551 ((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE)))
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552
553/* Define how to find the value returned by a library function assuming
554 the value has mode MODE. */
555
556#define LIBCALL_VALUE(MODE) gen_rtx(REG, MODE, RET_REG(MODE))
557
558/* 1 if N is a possible register number for a function value.
559 On the 370 under C/370, R15 and R16 are thus used. */
560
561#define FUNCTION_VALUE_REGNO_P(N) ((N) == 15 || (N) == 16)
562
563/* This macro definition sets up a default value for `main' to return. */
564
565#define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
566
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567
568/* Output assembler code for a block containing the constant parts of a
569 trampoline, leaving space for the variable parts.
570
571 On the 370, the trampoline contains these instructions:
572
573 BALR 14,0
574 USING *,14
575 L STATIC_CHAIN_REGISTER,X
576 L 15,Y
577 BR 15
578 X DS 0F
579 Y DS 0F */
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580/*
581 I am confused as to why this emitting raw binary, instead of instructions ...
582 see for example, rs6000/rs000.c for an example of a different way to
583 do this ... especially since BASR should probably be substituted for BALR.
584 */
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585
586#define TRAMPOLINE_TEMPLATE(FILE) \
587{ \
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588 ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x05E0)); \
589 ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x5800 | \
590 STATIC_CHAIN_REGNUM << 4)); \
591 ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xE00A)); \
592 ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x58F0)); \
593 ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xE00E)); \
594 ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x07FF)); \
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595 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
596 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
597 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
598 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
599}
600
601/* Length in units of the trampoline for entering a nested function. */
602
603#define TRAMPOLINE_SIZE 20
604
605/* Emit RTL insns to initialize the variable parts of a trampoline. */
606
607#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
608{ \
609 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), CXT); \
610 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), FNADDR); \
611}
612
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613/* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
614 pointer does not matter (provided there is a frame pointer). */
615
616#define EXIT_IGNORE_STACK 1
617
618/* Addressing modes, and classification of registers for them. */
619
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620/* #define HAVE_POST_INCREMENT */
621/* #define HAVE_POST_DECREMENT */
88143062 622
92d6db66
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623/* #define HAVE_PRE_DECREMENT */
624/* #define HAVE_PRE_INCREMENT */
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625
626/* These assume that REGNO is a hard or pseudo reg number. They give
627 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
628 reg currently allocated to a suitable hard reg.
629 These definitions are NOT overridden anywhere. */
630
631#define REGNO_OK_FOR_INDEX_P(REGNO) \
632 (((REGNO) > 0 && (REGNO) < 16) \
633 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
634
635#define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P(REGNO)
636
637#define REGNO_OK_FOR_DATA_P(REGNO) \
638 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
639
640#define REGNO_OK_FOR_FP_P(REGNO) \
641 ((unsigned) ((REGNO) - 16) < 4 || (unsigned) (reg_renumber[REGNO] - 16) < 4)
642
643/* Now macros that check whether X is a register and also,
644 strictly, whether it is in a specified class. */
645
646/* 1 if X is a data register. */
647
648#define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
649
650/* 1 if X is an fp register. */
651
652#define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
653
654/* 1 if X is an address register. */
655
656#define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
657
658/* Maximum number of registers that can appear in a valid memory address. */
659
660#define MAX_REGS_PER_ADDRESS 2
661
662/* Recognize any constant value that is a valid address. */
663
664#define CONSTANT_ADDRESS_P(X) \
665 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
666 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
667 || (GET_CODE (X) == CONST \
668 && GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
669 || (GET_CODE (X) == CONST \
670 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
671 && !SYMBOL_REF_FLAG (XEXP (XEXP (X, 0), 0))))
672
673/* Nonzero if the constant value X is a legitimate general operand.
674 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
675
676#define LEGITIMATE_CONSTANT_P(X) 1
677
678/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
679 its validity for a certain class. We have two alternate definitions
680 for each of them. The usual definition accepts all pseudo regs; the
681 other rejects them all. The symbol REG_OK_STRICT causes the latter
682 definition to be used.
683
684 Most source files want to accept pseudo regs in the hope that they will
685 get allocated to the class that the insn wants them to be in.
686 Some source files that are used after register allocation
687 need to be strict. */
688
689#ifndef REG_OK_STRICT
690
691/* Nonzero if X is a hard reg that can be used as an index or if it is
692 a pseudo reg. */
693
694#define REG_OK_FOR_INDEX_P(X) \
695 ((REGNO(X) > 0 && REGNO(X) < 16) || REGNO(X) >= 20)
696
697/* Nonzero if X is a hard reg that can be used as a base reg or if it is
698 a pseudo reg. */
699
700#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P(X)
701
702#else /* REG_OK_STRICT */
703
704/* Nonzero if X is a hard reg that can be used as an index. */
705
706#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P(REGNO(X))
707
708/* Nonzero if X is a hard reg that can be used as a base reg. */
709
710#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P(REGNO(X))
711
712#endif /* REG_OK_STRICT */
713
714/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
715 valid memory address for an instruction.
716 The MODE argument is the machine mode for the MEM expression
717 that wants to use this address.
718
719 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
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720 except for CONSTANT_ADDRESS_P which is actually machine-independent.
721*/
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722
723#define COUNT_REGS(X, REGS, FAIL) \
92d6db66
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724 if (REG_P (X)) { \
725 if (REG_OK_FOR_BASE_P (X)) REGS += 1; \
726 else goto FAIL; \
727 } \
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728 else if (GET_CODE (X) != CONST_INT || (unsigned) INTVAL (X) >= 4096) \
729 goto FAIL;
730
731#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
732{ \
733 if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
734 goto ADDR; \
735 if (GET_CODE (X) == PLUS) \
736 { \
737 int regs = 0; \
738 rtx x0 = XEXP (X, 0); \
739 rtx x1 = XEXP (X, 1); \
740 if (GET_CODE (x0) == PLUS) \
741 { \
742 COUNT_REGS (XEXP (x0, 0), regs, FAIL); \
743 COUNT_REGS (XEXP (x0, 1), regs, FAIL); \
744 COUNT_REGS (x1, regs, FAIL); \
745 if (regs == 2) \
746 goto ADDR; \
747 } \
748 else if (GET_CODE (x1) == PLUS) \
749 { \
750 COUNT_REGS (x0, regs, FAIL); \
751 COUNT_REGS (XEXP (x1, 0), regs, FAIL); \
752 COUNT_REGS (XEXP (x1, 1), regs, FAIL); \
753 if (regs == 2) \
754 goto ADDR; \
755 } \
756 else \
757 { \
758 COUNT_REGS (x0, regs, FAIL); \
759 COUNT_REGS (x1, regs, FAIL); \
760 if (regs != 0) \
761 goto ADDR; \
762 } \
763 } \
764 FAIL: ; \
765}
766
767/* The 370 has no mode dependent addresses. */
768
769#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
770
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771/* Macro: LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
772 Try machine-dependent ways of modifying an illegitimate address
88143062 773 to be legitimate. If we find one, return the new, valid address.
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774 This macro is used in only one place: `memory_address' in explow.c.
775
776 Several comments:
777 (1) It's not obvious that this macro results in better code
778 than its omission does. For historical reasons we leave it in.
779
780 (2) This macro may be (???) implicated in the accidental promotion
781 or RS operand to RX operands, which bombs out any RS, SI, SS
782 instruction that was expecting a simple address. Note that
783 this occurs fairly rarely ...
784
785 (3) There is a bug somewhere that causes either r4 to be spilled,
786 or causes r0 to be used as a base register. Changeing the macro
787 below will make the bug move around, but will not make it go away
788 ... Note that this is a rare bug ...
789
790 */
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791
792#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
793{ \
794 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
795 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
796 copy_to_mode_reg (SImode, XEXP (X, 1))); \
797 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
798 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
799 copy_to_mode_reg (SImode, XEXP (X, 0))); \
800 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
801 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
802 force_operand (XEXP (X, 0), 0)); \
803 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
804 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
805 force_operand (XEXP (X, 1), 0)); \
806 if (memory_address_p (MODE, X)) \
807 goto WIN; \
808}
809
810/* Specify the machine mode that this machine uses for the index in the
811 tablejump instruction. */
812
813#define CASE_VECTOR_MODE SImode
814
92d6db66
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815/* Define this if the tablejump instruction expects the table to contain
816 offsets from the address of the table.
817 Do not define this if the table should contain absolute addresses. */
818
819/* #define CASE_VECTOR_PC_RELATIVE */
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820
821/* Specify the tree operation to be used to convert reals to integers. */
822
823#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
824
825/* Define this if fixuns_trunc is the same as fix_trunc. */
826
827#define FIXUNS_TRUNC_LIKE_FIX_TRUNC
828
829/* We use "unsigned char" as default. */
830
831#define DEFAULT_SIGNED_CHAR 0
832
833/* This is the kind of divide that is easiest to do in the general case. */
834
835#define EASY_DIV_EXPR TRUNC_DIV_EXPR
836
837/* Max number of bytes we can move from memory to memory in one reasonably
838 fast instruction. */
839
840#define MOVE_MAX 256
841
842/* Define this if zero-extension is slow (more than one real instruction). */
843
92d6db66 844#define SLOW_ZERO_EXTEND 1
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845
846/* Nonzero if access to memory by bytes is slow and undesirable. */
847
848#define SLOW_BYTE_ACCESS 1
849
850/* Define if shifts truncate the shift count which implies one can omit
851 a sign-extension or zero-extension of a shift count. */
852
853/* #define SHIFT_COUNT_TRUNCATED */
854
855/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
856 is done just by pretending it is already truncated. */
857
858#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) (OUTPREC != 16)
859
860/* We assume that the store-condition-codes instructions store 0 for false
861 and some other value for true. This is the value stored for true. */
862
863/* #define STORE_FLAG_VALUE -1 */
864
865/* When a prototype says `char' or `short', really pass an `int'. */
866
cb560352 867#define PROMOTE_PROTOTYPES 1
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868
869/* Don't perform CSE on function addresses. */
870
871#define NO_FUNCTION_CSE
872
873/* Specify the machine mode that pointers have.
874 After generation of rtl, the compiler makes no further distinction
875 between pointers and any other objects of this machine mode. */
876
877#define Pmode SImode
878
879/* A function address in a call instruction is a byte address (for
880 indexing purposes) so give the MEM rtx a byte's mode. */
881
882#define FUNCTION_MODE QImode
883
884/* Compute the cost of computing a constant rtl expression RTX whose
885 rtx-code is CODE. The body of this macro is a portion of a switch
886 statement. If the code is computed here, return it with a return
887 statement. Otherwise, break from the switch. */
888
889#define CONST_COSTS(RTX, CODE, OUTERCODE) \
890 case CONST_INT: \
891 if ((unsigned) INTVAL (RTX) < 0xfff) return 1; \
892 case CONST: \
893 case LABEL_REF: \
894 case SYMBOL_REF: \
895 return 2; \
896 case CONST_DOUBLE: \
897 return 4;
898
92d6db66
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899/* A C statement (sans semicolon) to update the integer variable COST
900 based on the relationship between INSN that is dependent on
901 DEP_INSN through the dependence LINK. The default is to make no
902 adjustment to COST. This can be used for example to specify to
903 the scheduler that an output- or anti-dependence does not incur
904 the same cost as a data-dependence.
905
906 We will want to use this to indicate that there is a cost associated
907 with the loading, followed by use of base registers ...
908#define ADJUST_COST (INSN, LINK, DEP_INSN, COST)
909 */
910
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911/* Tell final.c how to eliminate redundant test instructions. */
912
913/* Here we define machine-dependent flags and fields in cc_status
914 (see `conditions.h'). */
915
916/* Store in cc_status the expressions that the condition codes will
917 describe after execution of an instruction whose pattern is EXP.
918 Do not alter them if the instruction would not alter the cc's.
919
920 On the 370, load insns do not alter the cc's. However, in some
921 cases these instructions can make it possibly invalid to use the
922 saved cc's. In those cases we clear out some or all of the saved
92d6db66
LV
923 cc's so they won't be used.
924
925 Note that only some arith instructions set the CC. These include
926 add, subtract, complement, various shifts. Note that multiply
927 and divide do *not* set set the CC. Therefore, in the code below,
928 don't set the status for MUL, DIV, etc.
929
930 Note that the bitwise ops set the condition code, but not in a
931 way that we can make use of it. So we treat these as clobbering,
932 rather than setting the CC. These are clobbered in the individual
933 instruction patterns that use them. Use CC_STATUS_INIT to clobber.
934*/
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935
936#define NOTICE_UPDATE_CC(EXP, INSN) \
937{ \
938 rtx exp = (EXP); \
939 if (GET_CODE (exp) == PARALLEL) /* Check this */ \
940 exp = XVECEXP (exp, 0, 0); \
941 if (GET_CODE (exp) != SET) \
942 CC_STATUS_INIT; \
943 else \
944 { \
945 if (XEXP (exp, 0) == cc0_rtx) \
946 { \
947 cc_status.value1 = XEXP (exp, 0); \
948 cc_status.value2 = XEXP (exp, 1); \
949 cc_status.flags = 0; \
950 } \
951 else \
952 { \
953 if (cc_status.value1 \
954 && reg_mentioned_p (XEXP (exp, 0), cc_status.value1)) \
955 cc_status.value1 = 0; \
956 if (cc_status.value2 \
957 && reg_mentioned_p (XEXP (exp, 0), cc_status.value2)) \
958 cc_status.value2 = 0; \
959 switch (GET_CODE (XEXP (exp, 1))) \
960 { \
92d6db66
LV
961 case PLUS: case MINUS: case NEG: \
962 case NOT: case ABS: \
88143062 963 CC_STATUS_SET (XEXP (exp, 0), XEXP (exp, 1)); \
92d6db66
LV
964 \
965 /* mult and div don't set any cc codes !! */ \
966 case MULT: /* case UMULT: */ case DIV: case UDIV: \
967 /* and, or and xor set the cc's the wrong way !! */ \
968 case AND: case IOR: case XOR: \
969 /* some shifts set the CC some don't. */ \
970 case ASHIFT: case ASHIFTRT: \
971 do {} while (0); \
88143062
RK
972 } \
973 } \
974 } \
975}
976
977
978#define CC_STATUS_SET(V1, V2) \
979{ \
980 cc_status.flags = 0; \
981 cc_status.value1 = (V1); \
982 cc_status.value2 = (V2); \
983 if (cc_status.value1 \
984 && reg_mentioned_p (cc_status.value1, cc_status.value2)) \
985 cc_status.value2 = 0; \
986}
987
988#define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
989{ if (cc_status.flags & CC_NO_OVERFLOW) return NO_OV; return NORMAL; }
990
92d6db66 991/* ------------------------------------------ */
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992/* Control the assembler format that we output. */
993
92d6db66
LV
994/* Define the parentheses used to group arithmetic operations
995 in assembler code. */
996
997#define ASM_OPEN_PAREN "("
998#define ASM_CLOSE_PAREN ")"
999
1000/* Define results of standard character escape sequences. */
1001
1002#ifdef TARGET_EBCDIC
1003#define TARGET_ESC 39
1004#define TARGET_BELL 47
1005#define TARGET_BS 22
1006#define TARGET_TAB 5
1007#define TARGET_NEWLINE 21
1008#define TARGET_VT 11
1009#define TARGET_FF 12
1010#define TARGET_CR 13
1011#else
1012#define TARGET_BELL 007
1013#define TARGET_BS 010
1014#define TARGET_TAB 011
1015#define TARGET_NEWLINE 012
1016#define TARGET_VT 013
1017#define TARGET_FF 014
1018#define TARGET_CR 015
1019#endif
1020
1021/* ======================================================== */
1022
1023#ifdef TARGET_HLASM
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1024#define TEXT_SECTION_ASM_OP "* Program text area"
1025#define DATA_SECTION_ASM_OP "* Program data area"
1026#define INIT_SECTION_ASM_OP "* Program initialization area"
92d6db66 1027#define SHARED_SECTION_ASM_OP "* Program shared data"
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RK
1028#define CTOR_LIST_BEGIN /* NO OP */
1029#define CTOR_LIST_END /* NO OP */
92d6db66 1030#define MAX_MVS_LABEL_SIZE 8
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1031
1032/* How to refer to registers in assembler output. This sequence is
1033 indexed by compiler's hard-register-number (see above). */
1034
1035#define REGISTER_NAMES \
1036{ "0", "1", "2", "3", "4", "5", "6", "7", \
1037 "8", "9", "10", "11", "12", "13", "14", "15", \
1038 "0", "2", "4", "6" \
1039}
1040
1041/* How to renumber registers for dbx and gdb. */
92d6db66 1042#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
88143062 1043
92d6db66
LV
1044#define ASM_FILE_START(FILE) \
1045{ fputs ("\tRMODE\tANY\n", FILE); \
1046 fputs ("\tCSECT\n", FILE); }
88143062 1047
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RK
1048#define ASM_FILE_END(FILE) fputs ("\tEND\n", FILE);
1049#define ASM_IDENTIFY_GCC(FILE)
1050#define ASM_COMMENT_START "*"
1051#define ASM_APP_OFF ""
1052#define ASM_APP_ON ""
1053
1054#define ASM_OUTPUT_LABEL(FILE, NAME) \
1055{ assemble_name (FILE, NAME); fputs ("\tEQU\t*\n", FILE); }
1056
92d6db66
LV
1057#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1058{ \
1059 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1060 if (mvs_check_alias (NAME, temp) == 2) \
1061 { \
1062 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1063 } \
1064}
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1065
1066#define ASM_GLOBALIZE_LABEL(FILE, NAME) \
92d6db66
LV
1067{ \
1068 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1069 if (mvs_check_alias (NAME, temp) == 2) \
1070 { \
1071 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1072 } \
1073 fputs ("\tENTRY\t", FILE); \
1074 assemble_name (FILE, NAME); \
1075 fputs ("\n", FILE); \
1076}
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1077
1078/* MVS externals are limited to 8 characters, upper case only.
1079 The '_' is mapped to '@', except for MVS functions, then '#'. */
1080
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1081
1082#define ASM_OUTPUT_LABELREF(FILE, NAME) \
1083{ \
1084 char *bp, ch, temp[MAX_MVS_LABEL_SIZE + 1]; \
92d6db66
LV
1085 if (!mvs_get_alias (NAME, temp)) \
1086 strcpy (temp, NAME); \
88143062
RK
1087 if (!strcmp (temp,"main")) \
1088 strcpy (temp,"gccmain"); \
1089 if (mvs_function_check (temp)) \
1090 ch = '#'; \
1091 else \
1092 ch = '@'; \
1093 for (bp = temp; *bp; bp++) \
1094 { \
1095 if (islower (*bp)) *bp = toupper (*bp); \
92d6db66 1096 else if (*bp == '_') *bp = ch; \
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1097 } \
1098 fprintf (FILE, "%s", temp); \
1099}
1100
1101#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1102 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1103
1104/* Generate internal label. Since we can branch here from off page, we
1105 must reload the base register. */
1106
1107#define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1108{ \
1109 if (!strcmp (PREFIX,"L")) \
1110 { \
1111 mvs_add_label(NUM); \
88143062
RK
1112 } \
1113 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM); \
1114}
1115
1116/* Generate case label. */
92d6db66
LV
1117/* hack alert -- I don't get it ... what if its a really big case label?
1118 * wouldn't we have to say label_emitted also ?? */
88143062
RK
1119
1120#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
1121 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
1122
1123/* This is how to output an element of a case-vector that is absolute. */
1124
1125#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1126 mvs_check_page (FILE, 4, 0); \
1127 fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
1128
1129/* This is how to output an element of a case-vector that is relative. */
1130
33f7f353 1131#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
88143062
RK
1132 mvs_check_page (FILE, 4, 0); \
1133 fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
1134
1135/* This is how to output an insn to push a register on the stack.
92d6db66
LV
1136 It need not be very fast code.
1137 Right now, PUSH & POP are used only when profiling is enabled,
1138 and then, only to push the static chain reg and the function struct
1139 value reg, and only if those are used. Since profiling is not
1140 supported anyway, punt on this. */
88143062
RK
1141
1142#define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1143 mvs_check_page (FILE, 8, 4); \
92d6db66 1144 fprintf (FILE, "\tSXXX\t13,=F'4'\n\tST\t%s,%d(13)\n", \
88143062
RK
1145 reg_names[REGNO], STACK_POINTER_OFFSET)
1146
1147/* This is how to output an insn to pop a register from the stack.
1148 It need not be very fast code. */
1149
1150#define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1151 mvs_check_page (FILE, 8, 0); \
92d6db66 1152 fprintf (FILE, "\tL\t%s,%d(13)\n\tLAXXX\t13,4(13)\n", \
88143062
RK
1153 reg_names[REGNO], STACK_POINTER_OFFSET)
1154
92d6db66
LV
1155/* TBD: hack alert XXX these two float point macros print horribly
1156 incorrect things when run in cross-compiler mode. Thats's because
1157 in cross-compiler mode, the VALUE is not really a double. See below,
1158 in the ELF section, for the correct implementation. */
88143062 1159/* This is how to output an assembler line defining a `double' constant. */
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RK
1160#define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
1161 fprintf (FILE, "\tDC\tD'%.18G'\n", (VALUE))
1162
1163/* This is how to output an assembler line defining a `float' constant. */
88143062
RK
1164#define ASM_OUTPUT_FLOAT(FILE, VALUE) \
1165 fprintf (FILE, "\tDC\tE'%.9G'\n", (VALUE))
1166
1167/* This outputs an integer, if not a CONST_INT must be address constant. */
1168
1169#define ASM_OUTPUT_INT(FILE, EXP) \
1170{ \
1171 if (GET_CODE (EXP) == CONST_INT) \
1172 { \
1173 fprintf (FILE, "\tDC\tF'"); \
1174 output_addr_const (FILE, EXP); \
1175 fprintf (FILE, "'\n"); \
1176 } \
1177 else \
1178 { \
1179 fprintf (FILE, "\tDC\tA("); \
1180 output_addr_const (FILE, EXP); \
1181 fprintf (FILE, ")\n"); \
1182 } \
1183}
1184
1185/* This outputs a short integer. */
1186
1187#define ASM_OUTPUT_SHORT(FILE, EXP) \
1188{ \
383c27ca 1189 fprintf (FILE, "\tDC\tX'%04X'\n", INTVAL(EXP) & 0xFFFF); \
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RK
1190}
1191
1192/* This outputs a byte sized integer. */
1193
1194#define ASM_OUTPUT_CHAR(FILE, EXP) \
1195 fprintf (FILE, "\tDC\tX'%02X'\n", INTVAL (EXP) )
1196
1197#define ASM_OUTPUT_BYTE(FILE, VALUE) \
1198 fprintf (FILE, "\tDC\tX'%02X'\n", VALUE)
1199
1200/* This outputs a text string. The string are chopped up to fit into
1201 an 80 byte record. Also, control and special characters, interpreted
1202 by the IBM assembler, are output numerically. */
1203
1204#define MVS_ASCII_TEXT_LENGTH 48
1205
1206#define ASM_OUTPUT_ASCII(FILE, PTR, LEN) \
1207{ \
1208 int i, j; \
1209 int c; \
1210 for (j = 0, i = 0; i < LEN; j++, i++) \
1211 { \
1212 c = PTR[i]; \
1213 if (iscntrl (c) || c == '&') \
1214 { \
1215 if (j % MVS_ASCII_TEXT_LENGTH != 0 ) \
1216 fprintf (FILE, "'\n"); \
1217 j = -1; \
1218 if (c == '&') c = MAP_CHARACTER (c); \
1219 fprintf (FILE, "\tDC\tX'%X'\n", c ); \
1220 } \
1221 else \
1222 { \
1223 if (j % MVS_ASCII_TEXT_LENGTH == 0) \
383c27ca 1224 fprintf (FILE, "\tDC\tC'"); \
1b2c9988
RK
1225 if ( c == '\'' ) \
1226 fprintf (FILE, "%c%c", c, c); \
1227 else \
1228 fprintf (FILE, "%c", c); \
1229 if (j % MVS_ASCII_TEXT_LENGTH == MVS_ASCII_TEXT_LENGTH - 1) \
1230 fprintf (FILE, "'\n" ); \
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1231 } \
1232 } \
1233 if (j % MVS_ASCII_TEXT_LENGTH != 0) \
1234 fprintf (FILE, "'\n"); \
1235}
1236
1237/* This is how to output an assembler line that says to advance the
1238 location counter to a multiple of 2**LOG bytes. */
1239
1240#define ASM_OUTPUT_ALIGN(FILE, LOG) \
1241 if (LOG) \
1242 { \
1243 if ((LOG) == 1) \
1244 fprintf (FILE, "\tDS\t0H\n" ); \
1245 else \
1246 fprintf (FILE, "\tDS\t0F\n" ); \
1247 } \
1248
1249/* The maximum length of memory that the IBM assembler will allow in one
1250 DS operation. */
1251
1252#define MAX_CHUNK 32767
1253
1254/* A C statement to output to the stdio stream FILE an assembler
1255 instruction to advance the location counter by SIZE bytes. Those
1256 bytes should be zero when loaded. */
1257
1258#define ASM_OUTPUT_SKIP(FILE, SIZE) \
1259{ \
1260 int s, k; \
1261 for (s = (SIZE); s > 0; s -= MAX_CHUNK) \
1262 { \
1263 if (s > MAX_CHUNK) \
1264 k = MAX_CHUNK; \
1265 else \
1266 k = s; \
1267 fprintf (FILE, "\tDS\tXL%d\n", k); \
1268 } \
1269}
1270
1271/* A C statement (sans semicolon) to output to the stdio stream
1272 FILE the assembler definition of a common-label named NAME whose
1273 size is SIZE bytes. The variable ROUNDED is the size rounded up
1274 to whatever alignment the caller wants. */
1275
1276#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1277{ \
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LV
1278 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1279 if (mvs_check_alias(NAME, temp) == 2) \
1280 { \
1281 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1282 } \
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1283 fputs ("\tENTRY\t", FILE); \
1284 assemble_name (FILE, NAME); \
1285 fputs ("\n", FILE); \
1286 fprintf (FILE, "\tDS\t0F\n"); \
1287 ASM_OUTPUT_LABEL (FILE,NAME); \
1288 ASM_OUTPUT_SKIP (FILE,SIZE); \
1289}
1290
1291/* A C statement (sans semicolon) to output to the stdio stream
1292 FILE the assembler definition of a local-common-label named NAME
1293 whose size is SIZE bytes. The variable ROUNDED is the size
1294 rounded up to whatever alignment the caller wants. */
1295
1296#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1297{ \
1298 fprintf (FILE, "\tDS\t0F\n"); \
1299 ASM_OUTPUT_LABEL (FILE,NAME); \
1300 ASM_OUTPUT_SKIP (FILE,SIZE); \
1301}
1302
1303/* Store in OUTPUT a string (made with alloca) containing an
1304 assembler-name for a local static variable named NAME.
1305 LABELNO is an integer which is different for each call. */
1306
1307#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1308{ \
1309 (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10); \
1310 sprintf ((OUTPUT), "%s%d", (NAME), (LABELNO)); \
1311}
1312
92d6db66 1313/* Print operand XV (an rtx) in assembler syntax to file FILE.
88143062 1314 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
92d6db66 1315 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
88143062 1316
92d6db66 1317#define PRINT_OPERAND(FILE, XV, CODE) \
88143062 1318{ \
92d6db66 1319 switch (GET_CODE (XV)) \
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RK
1320 { \
1321 static char curreg[4]; \
1322 case REG: \
1323 if (CODE == 'N') \
92d6db66 1324 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
88143062 1325 else \
92d6db66 1326 strcpy (curreg, reg_names[REGNO (XV)]); \
88143062
RK
1327 fprintf (FILE, "%s", curreg); \
1328 break; \
1329 case MEM: \
1330 { \
92d6db66 1331 rtx addr = XEXP (XV, 0); \
88143062
RK
1332 if (CODE == 'O') \
1333 { \
1334 if (GET_CODE (addr) == PLUS) \
1335 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1336 else \
1337 fprintf (FILE, "0"); \
1338 } \
1339 else if (CODE == 'R') \
1340 { \
1341 if (GET_CODE (addr) == PLUS) \
1342 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1343 else \
1344 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1345 } \
1346 else \
92d6db66 1347 output_address (XEXP (XV, 0)); \
88143062
RK
1348 } \
1349 break; \
1350 case SYMBOL_REF: \
1351 case LABEL_REF: \
1352 mvs_page_lit += 4; \
92d6db66
LV
1353 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1354 else fprintf (FILE, "=A("); \
1355 output_addr_const (FILE, XV); \
88143062
RK
1356 fprintf (FILE, ")"); \
1357 break; \
1358 case CONST_INT: \
1359 if (CODE == 'B') \
92d6db66 1360 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
88143062 1361 else if (CODE == 'X') \
92d6db66 1362 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
88143062 1363 else if (CODE == 'h') \
92d6db66 1364 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
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1365 else if (CODE == 'H') \
1366 { \
383c27ca 1367 mvs_page_lit += 2; \
92d6db66
LV
1368 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1369 } \
1370 else if (CODE == 'K') \
1371 { \
1372 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1373 mvs_page_lit += 4; \
1374 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1375 } \
1376 else if (CODE == 'W') \
1377 { \
1378 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1379 mvs_page_lit += 8; \
1380 if (0 <= INTVAL (XV)) { \
1381 fprintf (FILE, "=XL8'00000000"); \
1382 } else { \
1383 fprintf (FILE, "=XL8'FFFFFFFF"); \
1384 } \
1385 fprintf (FILE, "%08X'", INTVAL (XV)); \
88143062
RK
1386 } \
1387 else \
1388 { \
1389 mvs_page_lit += 4; \
92d6db66 1390 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
88143062
RK
1391 } \
1392 break; \
1393 case CONST_DOUBLE: \
92d6db66 1394 if (GET_MODE (XV) == DImode) \
88143062
RK
1395 { \
1396 if (CODE == 'M') \
1397 { \
1398 mvs_page_lit += 4; \
92d6db66 1399 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
88143062
RK
1400 } \
1401 else if (CODE == 'L') \
1402 { \
1403 mvs_page_lit += 4; \
92d6db66 1404 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
88143062
RK
1405 } \
1406 else \
1407 { \
1408 mvs_page_lit += 8; \
92d6db66
LV
1409 fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (XV), \
1410 CONST_DOUBLE_HIGH (XV)); \
88143062
RK
1411 } \
1412 } \
1413 else \
1414 { \
92d6db66
LV
1415 /* hack alert -- this prints wildly incorrect values */ \
1416 /* when run in cross-compiler mode. See ELF section */ \
1417 /* for suggested fix */ \
88143062 1418 union { double d; int i[2]; } u; \
92d6db66
LV
1419 u.i[0] = CONST_DOUBLE_LOW (XV); \
1420 u.i[1] = CONST_DOUBLE_HIGH (XV); \
1421 if (GET_MODE (XV) == SFmode) \
88143062
RK
1422 { \
1423 mvs_page_lit += 4; \
1424 fprintf (FILE, "=E'%.9G'", u.d); \
1425 } \
1426 else \
1427 { \
1428 mvs_page_lit += 8; \
1429 fprintf (FILE, "=D'%.18G'", u.d); \
1430 } \
1431 } \
1432 break; \
1433 case CONST: \
92d6db66
LV
1434 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1435 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
88143062
RK
1436 { \
1437 mvs_page_lit += 4; \
92d6db66 1438 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
88143062
RK
1439 { \
1440 fprintf (FILE, "=V("); \
1441 ASM_OUTPUT_LABELREF (FILE, \
92d6db66 1442 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
88143062 1443 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
92d6db66 1444 INTVAL (XEXP (XEXP (XV, 0), 1))); \
88143062
RK
1445 } \
1446 else \
1447 { \
1448 fprintf (FILE, "=A("); \
92d6db66 1449 output_addr_const (FILE, XV); \
88143062
RK
1450 fprintf (FILE, ")"); \
1451 } \
1452 } \
1453 else \
1454 { \
1455 mvs_page_lit += 4; \
1456 fprintf (FILE, "=F'"); \
92d6db66 1457 output_addr_const (FILE, XV); \
88143062
RK
1458 fprintf (FILE, "'"); \
1459 } \
1460 break; \
1461 default: \
1462 abort(); \
1463 } \
1464}
1465
1466#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1467{ \
1468 rtx breg, xreg, offset, plus; \
1469 \
1470 switch (GET_CODE (ADDR)) \
1471 { \
1472 case REG: \
1473 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1474 break; \
1475 case PLUS: \
1476 breg = 0; \
1477 xreg = 0; \
1478 offset = 0; \
1479 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1480 { \
1481 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1482 breg = XEXP (ADDR, 1); \
1483 else \
1484 offset = XEXP (ADDR, 1); \
1485 plus = XEXP (ADDR, 0); \
1486 } \
1487 else \
1488 { \
1489 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1490 breg = XEXP (ADDR, 0); \
1491 else \
1492 offset = XEXP (ADDR, 0); \
1493 plus = XEXP (ADDR, 1); \
1494 } \
1495 if (GET_CODE (plus) == PLUS) \
1496 { \
1497 if (GET_CODE (XEXP (plus, 0)) == REG) \
1498 { \
1499 if (breg) \
1500 xreg = XEXP (plus, 0); \
1501 else \
1502 breg = XEXP (plus, 0); \
1503 } \
1504 else \
1505 { \
1506 offset = XEXP (plus, 0); \
1507 } \
1508 if (GET_CODE (XEXP (plus, 1)) == REG) \
1509 { \
1510 if (breg) \
1511 xreg = XEXP (plus, 1); \
1512 else \
1513 breg = XEXP (plus, 1); \
1514 } \
1515 else \
1516 { \
1517 offset = XEXP (plus, 1); \
1518 } \
1519 } \
1520 else if (GET_CODE (plus) == REG) \
1521 { \
1522 if (breg) \
1523 xreg = plus; \
1524 else \
1525 breg = plus; \
1526 } \
1527 else \
1528 { \
1529 offset = plus; \
1530 } \
1531 if (offset) \
1532 { \
1533 if (GET_CODE (offset) == LABEL_REF) \
1534 fprintf (FILE, "L%d", \
1535 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1536 else \
1537 output_addr_const (FILE, offset); \
1538 } \
1539 else \
1540 fprintf (FILE, "0"); \
1541 if (xreg) \
1542 fprintf (FILE, "(%s,%s)", \
1543 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1544 else \
1545 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1546 break; \
1547 default: \
1548 mvs_page_lit += 4; \
1549 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1550 else fprintf (FILE, "=A("); \
1551 output_addr_const (FILE, ADDR); \
1552 fprintf (FILE, ")"); \
1553 break; \
1554 } \
1555}
92d6db66
LV
1556
1557/* This macro generates the assembly code for function entry.
1558 All of the C/370 environment is preserved. */
1559#define FUNCTION_PROLOGUE(FILE, LSIZE) i370_function_prolog ((FILE), (LSIZE));
1560
1561#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1562{ \
1563 if (strlen (NAME) * 2 > mvs_function_name_length) \
1564 { \
1565 if (mvs_function_name) \
1566 free (mvs_function_name); \
1567 mvs_function_name = 0; \
1568 } \
1569 if (!mvs_function_name) \
1570 { \
1571 mvs_function_name_length = strlen (NAME) * 2; \
1572 mvs_function_name = (char *) malloc (mvs_function_name_length); \
1573 if (mvs_function_name == 0) \
1574 { \
1575 fatal ("virtual memory exceeded"); \
1576 abort (); \
1577 } \
1578 } \
1579 if (!strcmp (NAME, "main")) \
1580 strcpy (mvs_function_name, "gccmain"); \
1581 else \
1582 strcpy (mvs_function_name, NAME); \
1583 fprintf (FILE, "\tDS\t0F\n"); \
1584 assemble_name (FILE, mvs_function_name); \
1585 fputs ("\tRMODE\tANY\n", FILE); \
1586 assemble_name (FILE, mvs_function_name); \
1587 fputs ("\tCSECT\n", FILE); \
1588}
1589
1590/* This macro generates the assembly code for function exit, on machines
1591 that need it. If FUNCTION_EPILOGUE is not defined then individual
1592 return instructions are generated for each return statement. Args are
1593 same as for FUNCTION_PROLOGUE.
1594
1595 The function epilogue should not depend on the current stack pointer!
1596 It should use the frame pointer only. This is mandatory because
1597 of alloca; we also take advantage of it to omit stack adjustments
1598 before returning. */
1599
1600#if MACROEPILOGUE == 1
1601#define FUNCTION_EPILOGUE(FILE, LSIZE) \
1602{ \
1603 int i; \
1604 check_label_emit(); \
1605 mvs_check_page (FILE,14,0); \
1606 fprintf (FILE, "* Function %s epilogue\n", mvs_function_name); \
1607 fprintf (FILE, "\tEDCEPIL\n"); \
1608 mvs_page_num++; \
1609 fprintf (FILE, "* Function %s literal pool\n", mvs_function_name); \
1610 fprintf (FILE, "\tDS\t0F\n" ); \
1611 fprintf (FILE, "\tLTORG\n"); \
1612 fprintf (FILE, "* Function %s page table\n", mvs_function_name); \
1613 fprintf (FILE, "\tDS\t0F\n"); \
1614 fprintf (FILE, "PGT%d\tEQU\t*\n", function_base_page); \
1615 mvs_free_label_list(); \
1616 for ( i = function_base_page; i < mvs_page_num; i++ ) \
1617 fprintf (FILE, "\tDC\tA(PG%d)\n", i); \
1618}
1619#else /* MACROEPILOGUE != 1 */
1620#define FUNCTION_EPILOGUE(FILE, LSIZE) \
1621{ \
1622 int i; \
1623 check_label_emit(); \
1624 mvs_check_page (FILE,14,0); \
1625 fprintf (FILE, "* Function %s epilogue\n", mvs_function_name); \
1626 fprintf (FILE, "\tL\t13,4(,13)\n"); \
1627 fprintf (FILE, "\tL\t14,12(,13)\n"); \
1628 fprintf (FILE, "\tLM\t2,12,28(13)\n"); \
1629 fprintf (FILE, "\tBALR\t1,14\n"); \
1630 fprintf (FILE, "\tDC\tA("); \
1631 mvs_page_num++; \
1632 assemble_name (FILE, mvs_function_name); \
1633 fprintf (FILE, ")\n" ); \
1634 fprintf (FILE, "* Function %s literal pool\n", mvs_function_name); \
1635 fprintf (FILE, "\tDS\t0F\n" ); \
1636 fprintf (FILE, "\tLTORG\n"); \
1637 fprintf (FILE, "* Function %s page table\n", mvs_function_name); \
1638 fprintf (FILE, "\tDS\t0F\n"); \
1639 fprintf (FILE, "PGT%d\tEQU\t*\n", function_base_page); \
1640 mvs_free_label_list(); \
1641 for ( i = function_base_page; i < mvs_page_num; i++ ) \
1642 fprintf (FILE, "\tDC\tA(PG%d)\n", i); \
1643}
1644#endif /* MACROEPILOGUE */
1645
1646/* Output assembler code to FILE to increment profiler label # LABELNO
1647 for profiling a function entry. */
1648
1649#define FUNCTION_PROFILER(FILE, LABELNO) \
1650 fprintf (FILE, "Error: No profiling available.\n")
1651
1652#endif /* TARGET_HLASM */
1653
1654/* ======================================================== */
1655
1656#ifdef TARGET_ELF_ABI
1657
1658/* How to refer to registers in assembler output. This sequence is
1659 indexed by compiler's hard-register-number (see above). */
1660
1661#define REGISTER_NAMES \
1662{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1663 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
1664 "f0", "f2", "f4", "f6" \
1665}
1666
1667/* How to renumber registers for dbx and gdb. */
1668#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1669
1670/* Print operand XV (an rtx) in assembler syntax to file FILE.
1671 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1672 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1673
1674#define PRINT_OPERAND(FILE, XV, CODE) \
1675{ \
1676 switch (GET_CODE (XV)) \
1677 { \
1678 static char curreg[4]; \
1679 case REG: \
1680 if (CODE == 'N') \
1681 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1682 else \
1683 strcpy (curreg, reg_names[REGNO (XV)]); \
1684 fprintf (FILE, "%s", curreg); \
1685 break; \
1686 case MEM: \
1687 { \
1688 rtx addr = XEXP (XV, 0); \
1689 if (CODE == 'O') \
1690 { \
1691 if (GET_CODE (addr) == PLUS) \
1692 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1693 else \
1694 fprintf (FILE, "0"); \
1695 } \
1696 else if (CODE == 'R') \
1697 { \
1698 if (GET_CODE (addr) == PLUS) \
1699 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1700 else \
1701 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1702 } \
1703 else \
1704 output_address (XEXP (XV, 0)); \
1705 } \
1706 break; \
1707 case SYMBOL_REF: \
1708 case LABEL_REF: \
1709 mvs_page_lit += 4; \
1710 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1711 else fprintf (FILE, "=A("); \
1712 output_addr_const (FILE, XV); \
1713 fprintf (FILE, ")"); \
1714 break; \
1715 case CONST_INT: \
1716 if (CODE == 'B') \
1717 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1718 else if (CODE == 'X') \
1719 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1720 else if (CODE == 'h') \
1721 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1722 else if (CODE == 'H') \
1723 { \
1724 mvs_page_lit += 2; \
1725 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1726 } \
1727 else if (CODE == 'K') \
1728 { \
1729 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1730 mvs_page_lit += 4; \
1731 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1732 } \
1733 else if (CODE == 'W') \
1734 { \
1735 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1736 mvs_page_lit += 8; \
1737 if (0 <= INTVAL (XV)) { \
1738 fprintf (FILE, "=XL8'00000000"); \
1739 } else { \
1740 fprintf (FILE, "=XL8'FFFFFFFF"); \
1741 } \
1742 fprintf (FILE, "%08X'", INTVAL (XV)); \
1743 } \
1744 else \
1745 { \
1746 mvs_page_lit += 4; \
1747 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1748 } \
1749 break; \
1750 case CONST_DOUBLE: \
1751 if (GET_MODE (XV) == DImode) \
1752 { \
1753 if (CODE == 'M') \
1754 { \
1755 mvs_page_lit += 4; \
1756 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1757 } \
1758 else if (CODE == 'L') \
1759 { \
1760 mvs_page_lit += 4; \
1761 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1762 } \
1763 else \
1764 { \
1765 mvs_page_lit += 8; \
1766 fprintf (FILE, "=yyyyXL8'%08X%08X'", \
1767 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1768 } \
1769 } \
1770 else \
1771 { \
1772 char buf[50]; \
1773 REAL_VALUE_TYPE rval; \
1774 REAL_VALUE_FROM_CONST_DOUBLE(rval, XV); \
1775 REAL_VALUE_TO_DECIMAL (rval, HOST_WIDE_INT_PRINT_DEC, buf); \
1776 if (GET_MODE (XV) == SFmode) \
1777 { \
1778 mvs_page_lit += 4; \
1779 fprintf (FILE, "=E'%s'", buf); \
1780 } \
1781 else \
1782 if (GET_MODE (XV) == DFmode) \
1783 { \
1784 mvs_page_lit += 8; \
1785 fprintf (FILE, "=D'%s'", buf); \
1786 } \
1787 else /* VOIDmode !?!? strange but true ... */ \
1788 { \
1789 mvs_page_lit += 8; \
1790 fprintf (FILE, "=XL8'%08X%08X'", \
1791 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1792 } \
1793 } \
1794 break; \
1795 case CONST: \
1796 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1797 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1798 { \
1799 mvs_page_lit += 4; \
1800 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1801 { \
1802 fprintf (FILE, "=V("); \
1803 ASM_OUTPUT_LABELREF (FILE, \
1804 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1805 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1806 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1807 } \
1808 else \
1809 { \
1810 fprintf (FILE, "=A("); \
1811 output_addr_const (FILE, XV); \
1812 fprintf (FILE, ")"); \
1813 } \
1814 } \
1815 else \
1816 { \
1817 mvs_page_lit += 4; \
1818 fprintf (FILE, "=bogus_bad_F'"); \
1819 output_addr_const (FILE, XV); \
1820 fprintf (FILE, "'"); \
1821/* XXX hack alert this gets gen'd in -fPIC code in relation to a tablejump */ \
1822/* but its somehow fundamentally broken, I can't make any sense out of it */ \
1823debug_rtx (XV); \
1824abort(); \
1825 } \
1826 break; \
1827 default: \
1828 abort(); \
1829 } \
1830}
1831
1832#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1833{ \
1834 rtx breg, xreg, offset, plus; \
1835 \
1836 switch (GET_CODE (ADDR)) \
1837 { \
1838 case REG: \
1839 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1840 break; \
1841 case PLUS: \
1842 breg = 0; \
1843 xreg = 0; \
1844 offset = 0; \
1845 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1846 { \
1847 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1848 breg = XEXP (ADDR, 1); \
1849 else \
1850 offset = XEXP (ADDR, 1); \
1851 plus = XEXP (ADDR, 0); \
1852 } \
1853 else \
1854 { \
1855 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1856 breg = XEXP (ADDR, 0); \
1857 else \
1858 offset = XEXP (ADDR, 0); \
1859 plus = XEXP (ADDR, 1); \
1860 } \
1861 if (GET_CODE (plus) == PLUS) \
1862 { \
1863 if (GET_CODE (XEXP (plus, 0)) == REG) \
1864 { \
1865 if (breg) \
1866 xreg = XEXP (plus, 0); \
1867 else \
1868 breg = XEXP (plus, 0); \
1869 } \
1870 else \
1871 { \
1872 offset = XEXP (plus, 0); \
1873 } \
1874 if (GET_CODE (XEXP (plus, 1)) == REG) \
1875 { \
1876 if (breg) \
1877 xreg = XEXP (plus, 1); \
1878 else \
1879 breg = XEXP (plus, 1); \
1880 } \
1881 else \
1882 { \
1883 offset = XEXP (plus, 1); \
1884 } \
1885 } \
1886 else if (GET_CODE (plus) == REG) \
1887 { \
1888 if (breg) \
1889 xreg = plus; \
1890 else \
1891 breg = plus; \
1892 } \
1893 else \
1894 { \
1895 offset = plus; \
1896 } \
1897 if (offset) \
1898 { \
1899 if (GET_CODE (offset) == LABEL_REF) \
1900 fprintf (FILE, "L%d", \
1901 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1902 else \
1903 output_addr_const (FILE, offset); \
1904 } \
1905 else \
1906 fprintf (FILE, "0"); \
1907 if (xreg) \
1908 fprintf (FILE, "(%s,%s)", \
1909 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1910 else \
1911 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1912 break; \
1913 default: \
1914 mvs_page_lit += 4; \
1915 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1916 else fprintf (FILE, "=A("); \
1917 output_addr_const (FILE, ADDR); \
1918 fprintf (FILE, ")"); \
1919 break; \
1920 } \
1921}
1922
1923/* This macro generates the assembly code for function exit, on machines
1924 that need it. If FUNCTION_EPILOGUE is not defined then individual
1925 return instructions are generated for each return statement. Args are
1926 same as for FUNCTION_PROLOGUE.
1927
1928 The function epilogue should not depend on the current stack pointer!
1929 It should use the frame pointer only. This is mandatory because
1930 of alloca; we also take advantage of it to omit stack adjustments
1931 before returning. */
1932
1933#define FUNCTION_EPILOGUE(FILE, LSIZE) \
1934{ \
1935 int i; \
1936 check_label_emit(); \
1937 mvs_check_page (FILE,14,0); \
1938 fprintf (FILE, "# Function epilogue\n"); \
1939 fprintf (FILE, "\tL\tsp,4(0,sp)\n"); \
1940 fprintf (FILE, "\tL\tlr,12(0,sp)\n"); \
1941 fprintf (FILE, "\tLM\t2,12,28(sp)\n"); \
1942 fprintf (FILE, "\tBASR\t1,lr\n"); \
1943 mvs_page_num++; \
1944 fprintf (FILE, "# Function literal pool\n"); \
1945 fprintf (FILE, "\t.balign\t4\n"); \
1946 fprintf (FILE, "\t.ltorg\n"); \
1947 fprintf (FILE, "# Function page table\n"); \
1948 fprintf (FILE, "\t.balign\t4\n"); \
1949 fprintf (FILE, ".LPGT%d:\n", function_base_page); \
1950 mvs_free_label_list(); \
1951 for ( i = function_base_page; i < mvs_page_num; i++ ) \
1952 fprintf (FILE, "\t.long\t.LPG%d\n", i); \
1953}
1954
1955#define FUNCTION_PROLOGUE(FILE, LSIZE) i370_function_prolog ((FILE), (LSIZE));
1956
1957/* Output assembler code to FILE to increment profiler label # LABELNO
1958 for profiling a function entry. */
1959/* Make it a no-op for now, so we can at least compile glibc */
1960#define FUNCTION_PROFILER(FILE, LABELNO) { \
1961 mvs_check_page (FILE, 24, 4); \
1962 fprintf (FILE, "\tSTM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1963 fprintf (FILE, "\tLA\tr1,1(0,0)\n"); \
1964 fprintf (FILE, "\tL\tr2,=A(.LP%d)\n", LABELNO); \
1965 fprintf (FILE, "\tA\tr1,0(r2)\n"); \
1966 fprintf (FILE, "\tST\tr1,0(r2)\n"); \
1967 fprintf (FILE, "\tLM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1968}
1969
1970/* Don't bother to output .extern pseudo-ops. They are not needed by
1971 ELF assemblers. */
1972
1973#undef ASM_OUTPUT_EXTERNAL
1974
1975#define ASM_DOUBLE "\t.double"
1976#define ASM_LONG "\t.long"
1977#define ASM_SHORT "\t.short"
1978#define ASM_BYTE "\t.byte"
1979
1980/* Argument to the flt pt. macros is a REAL_VALUE_TYPE which
1981 may or may not be a float/double, depending on whther we
1982 are running in cross-compiler mode. */
1983/* This is how to output an assembler line defining a `double' constant. */
1984#define ASM_OUTPUT_DOUBLE(FILE, RVAL) { \
1985 char buf[50]; \
1986 REAL_VALUE_TO_DECIMAL (RVAL, HOST_WIDE_INT_PRINT_DOUBLE_HEX, buf); \
1987 fprintf (FILE, "\tDC\tD'%s'\n", buf); \
1988}
1989
1990/* This is how to output an assembler line defining a `float' constant. */
1991#define ASM_OUTPUT_FLOAT(FILE, RVAL) { \
1992 char buf[50]; \
1993 REAL_VALUE_TO_DECIMAL (RVAL, HOST_WIDE_INT_PRINT_DEC, buf); \
1994 fprintf (FILE, "\tDC\tE'%s'\n", buf); \
1995}
1996
1997
1998/* This is how to output an assembler line defining an `int' constant. */
1999#define ASM_OUTPUT_INT(FILE,VALUE) \
2000( fprintf (FILE, "%s ", ASM_LONG), \
2001 output_addr_const (FILE,(VALUE)), \
2002 putc('\n',FILE))
2003
2004/* Likewise for `char' and `short' constants. */
2005#define ASM_OUTPUT_SHORT(FILE,VALUE) \
2006( fprintf (FILE, "%s ", ASM_SHORT), \
2007 output_addr_const (FILE,(VALUE)), \
2008 putc('\n',FILE))
2009
2010
2011#define ASM_OUTPUT_CHAR(FILE,VALUE) \
2012( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2013 output_addr_const (FILE, (VALUE)), \
2014 putc ('\n', FILE))
2015
2016/* This is how to output an assembler line for a numeric constant byte. */
2017#define ASM_OUTPUT_BYTE(FILE,VALUE) \
2018 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
2019
2020/* This is how to output the definition of a user-level label named NAME,
2021 such as the label on a static function or variable NAME. */
2022#define ASM_OUTPUT_LABEL(FILE,NAME) \
2023 (assemble_name (FILE, NAME), fputs (":\n", FILE))
2024
2025/* #define ASM_OUTPUT_LABELREF(FILE, NAME) */ /* use gas -- defaults.h */
2026
2027/* Generate internal label. Since we can branch here from off page, we
2028 must reload the base register. Note that internal labels are generated
2029 for loops, goto's and case labels. */
2030#undef ASM_OUTPUT_INTERNAL_LABEL
2031#define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
2032{ \
2033 if (!strcmp (PREFIX,"L")) \
2034 { \
2035 mvs_add_label(NUM); \
2036 } \
2037 fprintf (FILE, ".%s%d:\n", PREFIX, NUM); \
2038}
2039
2040/* let config/svr4.h define this ...
2041 * #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
2042 * fprintf (FILE, "%s%d:\n", PREFIX, NUM)
2043 */
2044
2045/* This is how to output an element of a case-vector that is absolute. */
2046#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2047 mvs_check_page (FILE, 4, 0); \
2048 fprintf (FILE, "\t.long\t.L%d\n", VALUE)
2049
2050/* This is how to output an element of a case-vector that is relative. */
2051#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
2052 mvs_check_page (FILE, 4, 0); \
2053 fprintf (FILE, "\t.long\t.L%d-.L%d\n", VALUE, REL)
2054
2055/* Right now, PUSH & POP are used only when profiling is enabled,
2056 and then, only to push the static chain reg and the function struct
2057 value reg, and only if those are used by the function being profiled.
2058 We don't need this for profiling, so punt. */
2059#define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
2060#define ASM_OUTPUT_REG_POP(FILE, REGNO)
2061
2062
2063/* Indicate that jump tables go in the text section. This is
2064 necessary when compiling PIC code. */
2065#define JUMP_TABLES_IN_TEXT_SECTION 1
2066
2067/* Define macro used to output shift-double opcodes when the shift
2068 count is in %cl. Some assemblers require %cl as an argument;
2069 some don't.
2070
2071 GAS requires the %cl argument, so override i386/unix.h. */
2072
2073#undef SHIFT_DOUBLE_OMITS_COUNT
2074#define SHIFT_DOUBLE_OMITS_COUNT 0
2075
2076#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2077( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2078 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2079
2080/* Allow #sccs in preprocessor. */
2081#define SCCS_DIRECTIVE
2082
2083 /* Implicit library calls should use memcpy, not bcopy, etc. */
2084#define TARGET_MEM_FUNCTIONS
2085
2086/* Output before read-only data. */
2087#define TEXT_SECTION_ASM_OP ".text"
2088
2089/* Output before writable (initialized) data. */
2090#define DATA_SECTION_ASM_OP ".data"
2091
2092/* Output before writable (uninitialized) data. */
2093#define BSS_SECTION_ASM_OP ".bss"
2094
2095/* In the past there was confusion as to what the argument to .align was
2096 in GAS. For the last several years the rule has been this: for a.out
2097 file formats that argument is LOG, and for all other file formats the
2098 argument is 1<<LOG.
2099
2100 However, GAS now has .p2align and .balign pseudo-ops so to remove any
2101 doubt or guess work, and since this file is used for both a.out and other
2102 file formats, we use one of them. */
2103
2104#define ASM_OUTPUT_ALIGN(FILE,LOG) \
2105 if ((LOG)!=0) fprintf ((FILE), "\t.balign %d\n", 1<<(LOG))
2106
2107/* This is how to output a command to make the user-level label named NAME
2108 defined for reference from other files. */
2109
2110#define ASM_GLOBALIZE_LABEL(FILE,NAME) \
2111 (fputs (".globl ", FILE), assemble_name (FILE, NAME), fputs ("\n", FILE))
2112
2113/* This says how to output an assembler line
2114 to define a global common symbol. */
2115
2116#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
2117( fputs (".comm ", (FILE)), \
2118 assemble_name ((FILE), (NAME)), \
2119 fprintf ((FILE), ",%u\n", (ROUNDED)))
2120
2121/* This says how to output an assembler line
2122 to define a local common symbol. */
2123
2124#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
2125( fputs (".lcomm ", (FILE)), \
2126 assemble_name ((FILE), (NAME)), \
2127 fprintf ((FILE), ",%u\n", (ROUNDED)))
2128
2129#endif /* TARGET_ELF_ABI */
2130#endif /* __I370_H__ */