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21efb4d4 HJ |
1 | /* Copyright (C) 2007 Free Software Foundation, Inc. |
2 | ||
3 | This file is part of GCC. | |
4 | ||
5 | GCC is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2, or (at your option) | |
8 | any later version. | |
9 | ||
10 | GCC is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with GCC; see the file COPYING. If not, write to | |
17 | the Free Software Foundation, 51 Franklin Street, Fifth Floor, | |
18 | Boston, MA 02110-1301, USA. */ | |
19 | ||
20 | /* As a special exception, if you include this header file into source | |
21 | files compiled by GCC, this header file does not by itself cause | |
22 | the resulting executable to be covered by the GNU General Public | |
23 | License. This exception does not however invalidate any other | |
24 | reasons why the executable file might be covered by the GNU General | |
25 | Public License. */ | |
26 | ||
27 | /* Implemented from the specification included in the AMD Programmers | |
28 | Manual Update, version 2.x */ | |
29 | ||
30 | #ifndef _AMMINTRIN_H_INCLUDED | |
31 | #define _AMMINTRIN_H_INCLUDED | |
32 | ||
33 | #ifndef __SSE4A__ | |
34 | # error "SSE4A instruction set not enabled" | |
35 | #else | |
36 | ||
37 | /* We need definitions from the SSE3, SSE2 and SSE header files*/ | |
38 | #include <pmmintrin.h> | |
39 | ||
d752cfdb | 40 | static __inline void __attribute__((__always_inline__, __artificial__)) |
21efb4d4 HJ |
41 | _mm_stream_sd (double * __P, __m128d __Y) |
42 | { | |
43 | __builtin_ia32_movntsd (__P, (__v2df) __Y); | |
44 | } | |
45 | ||
d752cfdb | 46 | static __inline void __attribute__((__always_inline__, __artificial__)) |
21efb4d4 HJ |
47 | _mm_stream_ss (float * __P, __m128 __Y) |
48 | { | |
49 | __builtin_ia32_movntss (__P, (__v4sf) __Y); | |
50 | } | |
51 | ||
d752cfdb | 52 | static __inline __m128i __attribute__((__always_inline__, __artificial__)) |
21efb4d4 HJ |
53 | _mm_extract_si64 (__m128i __X, __m128i __Y) |
54 | { | |
55 | return (__m128i) __builtin_ia32_extrq ((__v2di) __X, (__v16qi) __Y); | |
56 | } | |
57 | ||
32fe15ec | 58 | #ifdef __OPTIMIZE__ |
d752cfdb | 59 | static __inline __m128i __attribute__((__always_inline__, __artificial__)) |
46fb8f6b UB |
60 | _mm_extracti_si64 (__m128i __X, unsigned const int __I, unsigned const int __L) |
61 | { | |
62 | return (__m128i) __builtin_ia32_extrqi ((__v2di) __X, __I, __L); | |
63 | } | |
32fe15ec UB |
64 | #else |
65 | #define _mm_extracti_si64(X, I, L) \ | |
66 | ((__m128i) __builtin_ia32_extrqi ((__v2di)(X), I, L)) | |
67 | #endif | |
21efb4d4 | 68 | |
d752cfdb | 69 | static __inline __m128i __attribute__((__always_inline__, __artificial__)) |
21efb4d4 HJ |
70 | _mm_insert_si64 (__m128i __X,__m128i __Y) |
71 | { | |
72 | return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y); | |
73 | } | |
74 | ||
32fe15ec | 75 | #ifdef __OPTIMIZE__ |
d752cfdb | 76 | static __inline __m128i __attribute__((__always_inline__, __artificial__)) |
46fb8f6b UB |
77 | _mm_inserti_si64(__m128i __X, __m128i __Y, unsigned const int __I, unsigned const int __L) |
78 | { | |
79 | return (__m128i) __builtin_ia32_insertqi ((__v2di)__X, (__v2di)__Y, __I, __L); | |
80 | } | |
32fe15ec UB |
81 | #else |
82 | #define _mm_inserti_si64(X, Y, I, L) \ | |
83 | ((__m128i) __builtin_ia32_insertqi ((__v2di)(X), (__v2di)(Y), I, L)) | |
84 | #endif | |
21efb4d4 HJ |
85 | |
86 | #endif /* __SSE4A__ */ | |
87 | ||
88 | #endif /* _AMMINTRIN_H_INCLUDED */ |