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[thirdparty/gcc.git] / gcc / config / i386 / avx512vldqintrin.h
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a945c346 1/* Copyright (C) 2014-2024 Free Software Foundation, Inc.
936c0fe4
AI		 2
3 This file is part of GCC.
4
5 GCC is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3, or (at your option)
8 any later version.
9
10 GCC is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 Under Section 7 of GPL version 3, you are granted additional
16 permissions described in the GCC Runtime Library Exception, version
17 3.1, as published by the Free Software Foundation.
18
19 You should have received a copy of the GNU General Public License and
20 a copy of the GCC Runtime Library Exception along with this program;
21 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
22 <http://www.gnu.org/licenses/>. */
23
24#ifndef _IMMINTRIN_H_INCLUDED
25#error "Never use <avx512vldqintrin.h> directly; include <immintrin.h> instead."
26#endif
27
28#ifndef _AVX512VLDQINTRIN_H_INCLUDED
29#define _AVX512VLDQINTRIN_H_INCLUDED
30
fd514717 31#if !defined(__AVX512VL__) || !defined(__AVX512DQ__) || defined (__EVEX512__)
1ce82f56 32#pragma GCC push_options
fd514717 33#pragma GCC target("avx512vl,avx512dq,no-evex512")
1ce82f56
HJ		 34#define __DISABLE_AVX512VLDQ__
35#endif /* __AVX512VLDQ__ */
36
936c0fe4
AI		 37extern __inline __m256i
38__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
39_mm256_cvttpd_epi64 (__m256d __A)
40{
41 return (__m256i) __builtin_ia32_cvttpd2qq256_mask ((__v4df) __A,
42 (__v4di)
fd79b414 43 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 44 (__mmask8) -1);
45}
46
47extern __inline __m256i
48__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
49_mm256_mask_cvttpd_epi64 (__m256i __W, __mmask8 __U, __m256d __A)
50{
51 return (__m256i) __builtin_ia32_cvttpd2qq256_mask ((__v4df) __A,
52 (__v4di) __W,
53 (__mmask8) __U);
54}
55
56extern __inline __m256i
57__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
58_mm256_maskz_cvttpd_epi64 (__mmask8 __U, __m256d __A)
59{
60 return (__m256i) __builtin_ia32_cvttpd2qq256_mask ((__v4df) __A,
61 (__v4di)
fd79b414 62 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 63 (__mmask8) __U);
64}
65
66extern __inline __m128i
67__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
68_mm_cvttpd_epi64 (__m128d __A)
69{
70 return (__m128i) __builtin_ia32_cvttpd2qq128_mask ((__v2df) __A,
71 (__v2di)
fd79b414 72 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 73 (__mmask8) -1);
74}
75
76extern __inline __m128i
77__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
78_mm_mask_cvttpd_epi64 (__m128i __W, __mmask8 __U, __m128d __A)
79{
80 return (__m128i) __builtin_ia32_cvttpd2qq128_mask ((__v2df) __A,
81 (__v2di) __W,
82 (__mmask8) __U);
83}
84
85extern __inline __m128i
86__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
87_mm_maskz_cvttpd_epi64 (__mmask8 __U, __m128d __A)
88{
89 return (__m128i) __builtin_ia32_cvttpd2qq128_mask ((__v2df) __A,
90 (__v2di)
fd79b414 91 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 92 (__mmask8) __U);
93}
94
95extern __inline __m256i
96__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
97_mm256_cvttpd_epu64 (__m256d __A)
98{
99 return (__m256i) __builtin_ia32_cvttpd2uqq256_mask ((__v4df) __A,
100 (__v4di)
fd79b414 101 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 102 (__mmask8) -1);
103}
104
105extern __inline __m256i
106__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
107_mm256_mask_cvttpd_epu64 (__m256i __W, __mmask8 __U, __m256d __A)
108{
109 return (__m256i) __builtin_ia32_cvttpd2uqq256_mask ((__v4df) __A,
110 (__v4di) __W,
111 (__mmask8) __U);
112}
113
114extern __inline __m256i
115__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
116_mm256_maskz_cvttpd_epu64 (__mmask8 __U, __m256d __A)
117{
118 return (__m256i) __builtin_ia32_cvttpd2uqq256_mask ((__v4df) __A,
119 (__v4di)
fd79b414 120 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 121 (__mmask8) __U);
122}
123
124extern __inline __m128i
125__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
126_mm_cvttpd_epu64 (__m128d __A)
127{
128 return (__m128i) __builtin_ia32_cvttpd2uqq128_mask ((__v2df) __A,
129 (__v2di)
fd79b414 130 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 131 (__mmask8) -1);
132}
133
134extern __inline __m128i
135__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
136_mm_mask_cvttpd_epu64 (__m128i __W, __mmask8 __U, __m128d __A)
137{
138 return (__m128i) __builtin_ia32_cvttpd2uqq128_mask ((__v2df) __A,
139 (__v2di) __W,
140 (__mmask8) __U);
141}
142
143extern __inline __m128i
144__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
145_mm_maskz_cvttpd_epu64 (__mmask8 __U, __m128d __A)
146{
147 return (__m128i) __builtin_ia32_cvttpd2uqq128_mask ((__v2df) __A,
148 (__v2di)
fd79b414 149 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 150 (__mmask8) __U);
151}
152
153extern __inline __m256i
154__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
155_mm256_cvtpd_epi64 (__m256d __A)
156{
157 return (__m256i) __builtin_ia32_cvtpd2qq256_mask ((__v4df) __A,
158 (__v4di)
fd79b414 159 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 160 (__mmask8) -1);
161}
162
163extern __inline __m256i
164__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
165_mm256_mask_cvtpd_epi64 (__m256i __W, __mmask8 __U, __m256d __A)
166{
167 return (__m256i) __builtin_ia32_cvtpd2qq256_mask ((__v4df) __A,
168 (__v4di) __W,
169 (__mmask8) __U);
170}
171
172extern __inline __m256i
173__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
174_mm256_maskz_cvtpd_epi64 (__mmask8 __U, __m256d __A)
175{
176 return (__m256i) __builtin_ia32_cvtpd2qq256_mask ((__v4df) __A,
177 (__v4di)
fd79b414 178 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 179 (__mmask8) __U);
180}
181
182extern __inline __m128i
183__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
184_mm_cvtpd_epi64 (__m128d __A)
185{
186 return (__m128i) __builtin_ia32_cvtpd2qq128_mask ((__v2df) __A,
187 (__v2di)
fd79b414 188 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 189 (__mmask8) -1);
190}
191
192extern __inline __m128i
193__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
194_mm_mask_cvtpd_epi64 (__m128i __W, __mmask8 __U, __m128d __A)
195{
196 return (__m128i) __builtin_ia32_cvtpd2qq128_mask ((__v2df) __A,
197 (__v2di) __W,
198 (__mmask8) __U);
199}
200
201extern __inline __m128i
202__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
203_mm_maskz_cvtpd_epi64 (__mmask8 __U, __m128d __A)
204{
205 return (__m128i) __builtin_ia32_cvtpd2qq128_mask ((__v2df) __A,
206 (__v2di)
fd79b414 207 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 208 (__mmask8) __U);
209}
210
211extern __inline __m256i
212__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
213_mm256_cvtpd_epu64 (__m256d __A)
214{
215 return (__m256i) __builtin_ia32_cvtpd2uqq256_mask ((__v4df) __A,
216 (__v4di)
fd79b414 217 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 218 (__mmask8) -1);
219}
220
221extern __inline __m256i
222__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
223_mm256_mask_cvtpd_epu64 (__m256i __W, __mmask8 __U, __m256d __A)
224{
225 return (__m256i) __builtin_ia32_cvtpd2uqq256_mask ((__v4df) __A,
226 (__v4di) __W,
227 (__mmask8) __U);
228}
229
230extern __inline __m256i
231__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
232_mm256_maskz_cvtpd_epu64 (__mmask8 __U, __m256d __A)
233{
234 return (__m256i) __builtin_ia32_cvtpd2uqq256_mask ((__v4df) __A,
235 (__v4di)
fd79b414 236 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 237 (__mmask8) __U);
238}
239
240extern __inline __m128i
241__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
242_mm_cvtpd_epu64 (__m128d __A)
243{
244 return (__m128i) __builtin_ia32_cvtpd2uqq128_mask ((__v2df) __A,
245 (__v2di)
fd79b414 246 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 247 (__mmask8) -1);
248}
249
250extern __inline __m128i
251__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
252_mm_mask_cvtpd_epu64 (__m128i __W, __mmask8 __U, __m128d __A)
253{
254 return (__m128i) __builtin_ia32_cvtpd2uqq128_mask ((__v2df) __A,
255 (__v2di) __W,
256 (__mmask8) __U);
257}
258
259extern __inline __m128i
260__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
261_mm_maskz_cvtpd_epu64 (__mmask8 __U, __m128d __A)
262{
263 return (__m128i) __builtin_ia32_cvtpd2uqq128_mask ((__v2df) __A,
264 (__v2di)
fd79b414 265 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 266 (__mmask8) __U);
267}
268
269extern __inline __m256i
270__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
271_mm256_cvttps_epi64 (__m128 __A)
272{
273 return (__m256i) __builtin_ia32_cvttps2qq256_mask ((__v4sf) __A,
274 (__v4di)
fd79b414 275 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 276 (__mmask8) -1);
277}
278
279extern __inline __m256i
280__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
281_mm256_mask_cvttps_epi64 (__m256i __W, __mmask8 __U, __m128 __A)
282{
283 return (__m256i) __builtin_ia32_cvttps2qq256_mask ((__v4sf) __A,
284 (__v4di) __W,
285 (__mmask8) __U);
286}
287
288extern __inline __m256i
289__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
290_mm256_maskz_cvttps_epi64 (__mmask8 __U, __m128 __A)
291{
292 return (__m256i) __builtin_ia32_cvttps2qq256_mask ((__v4sf) __A,
293 (__v4di)
fd79b414 294 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 295 (__mmask8) __U);
296}
297
298extern __inline __m128i
299__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
300_mm_cvttps_epi64 (__m128 __A)
301{
302 return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A,
303 (__v2di)
fd79b414 304 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 305 (__mmask8) -1);
306}
307
308extern __inline __m128i
309__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
310_mm_mask_cvttps_epi64 (__m128i __W, __mmask8 __U, __m128 __A)
311{
312 return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A,
313 (__v2di) __W,
314 (__mmask8) __U);
315}
316
317extern __inline __m128i
318__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
319_mm_maskz_cvttps_epi64 (__mmask8 __U, __m128 __A)
320{
321 return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A,
322 (__v2di)
fd79b414 323 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 324 (__mmask8) __U);
325}
326
327extern __inline __m256i
328__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
329_mm256_cvttps_epu64 (__m128 __A)
330{
331 return (__m256i) __builtin_ia32_cvttps2uqq256_mask ((__v4sf) __A,
332 (__v4di)
fd79b414 333 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 334 (__mmask8) -1);
335}
336
337extern __inline __m256i
338__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
339_mm256_mask_cvttps_epu64 (__m256i __W, __mmask8 __U, __m128 __A)
340{
341 return (__m256i) __builtin_ia32_cvttps2uqq256_mask ((__v4sf) __A,
342 (__v4di) __W,
343 (__mmask8) __U);
344}
345
346extern __inline __m256i
347__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
348_mm256_maskz_cvttps_epu64 (__mmask8 __U, __m128 __A)
349{
350 return (__m256i) __builtin_ia32_cvttps2uqq256_mask ((__v4sf) __A,
351 (__v4di)
fd79b414 352 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 353 (__mmask8) __U);
354}
355
356extern __inline __m128i
357__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
358_mm_cvttps_epu64 (__m128 __A)
359{
360 return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A,
361 (__v2di)
fd79b414 362 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 363 (__mmask8) -1);
364}
365
366extern __inline __m128i
367__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
368_mm_mask_cvttps_epu64 (__m128i __W, __mmask8 __U, __m128 __A)
369{
370 return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A,
371 (__v2di) __W,
372 (__mmask8) __U);
373}
374
375extern __inline __m128i
376__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
377_mm_maskz_cvttps_epu64 (__mmask8 __U, __m128 __A)
378{
379 return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A,
380 (__v2di)
fd79b414 381 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 382 (__mmask8) __U);
383}
384
385extern __inline __m256d
386__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
387_mm256_broadcast_f64x2 (__m128d __A)
388{
389 return (__m256d) __builtin_ia32_broadcastf64x2_256_mask ((__v2df)
390 __A,
4bbabb2a 391 (__v4df)_mm256_avx512_undefined_pd(),
c42b0bdf 392 (__mmask8) -1);
936c0fe4
AI		 393}
394
395extern __inline __m256d
396__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
397_mm256_mask_broadcast_f64x2 (__m256d __O, __mmask8 __M, __m128d __A)
398{
399 return (__m256d) __builtin_ia32_broadcastf64x2_256_mask ((__v2df)
400 __A,
401 (__v4df)
402 __O, __M);
403}
404
405extern __inline __m256d
406__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
407_mm256_maskz_broadcast_f64x2 (__mmask8 __M, __m128d __A)
408{
409 return (__m256d) __builtin_ia32_broadcastf64x2_256_mask ((__v2df)
410 __A,
411 (__v4df)
fd79b414 412 _mm256_avx512_setzero_ps (),
936c0fe4
AI		 413 __M);
414}
415
416extern __inline __m256i
417__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
418_mm256_broadcast_i64x2 (__m128i __A)
419{
420 return (__m256i) __builtin_ia32_broadcasti64x2_256_mask ((__v2di)
421 __A,
4bbabb2a 422 (__v4di)_mm256_avx512_undefined_si256(),
c42b0bdf 423 (__mmask8) -1);
936c0fe4
AI		 424}
425
426extern __inline __m256i
427__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
428_mm256_mask_broadcast_i64x2 (__m256i __O, __mmask8 __M, __m128i __A)
429{
430 return (__m256i) __builtin_ia32_broadcasti64x2_256_mask ((__v2di)
431 __A,
432 (__v4di)
433 __O, __M);
434}
435
436extern __inline __m256i
437__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
438_mm256_maskz_broadcast_i64x2 (__mmask8 __M, __m128i __A)
439{
440 return (__m256i) __builtin_ia32_broadcasti64x2_256_mask ((__v2di)
441 __A,
442 (__v4di)
fd79b414 443 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 444 __M);
445}
446
447extern __inline __m256
448__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
449_mm256_broadcast_f32x2 (__m128 __A)
450{
451 return (__m256) __builtin_ia32_broadcastf32x2_256_mask ((__v4sf) __A,
4bbabb2a 452 (__v8sf)_mm256_avx512_undefined_ps(),
c42b0bdf 453 (__mmask8) -1);
936c0fe4
AI		 454}
455
456extern __inline __m256
457__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
458_mm256_mask_broadcast_f32x2 (__m256 __O, __mmask8 __M, __m128 __A)
459{
460 return (__m256) __builtin_ia32_broadcastf32x2_256_mask ((__v4sf) __A,
461 (__v8sf) __O,
462 __M);
463}
464
465extern __inline __m256
466__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
467_mm256_maskz_broadcast_f32x2 (__mmask8 __M, __m128 __A)
468{
469 return (__m256) __builtin_ia32_broadcastf32x2_256_mask ((__v4sf) __A,
470 (__v8sf)
fd79b414 471 _mm256_avx512_setzero_ps (),
936c0fe4
AI		 472 __M);
473}
474
475extern __inline __m256i
476__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
477_mm256_broadcast_i32x2 (__m128i __A)
478{
479 return (__m256i) __builtin_ia32_broadcasti32x2_256_mask ((__v4si)
480 __A,
4bbabb2a 481 (__v8si)_mm256_avx512_undefined_si256(),
c42b0bdf 482 (__mmask8) -1);
936c0fe4
AI		 483}
484
485extern __inline __m256i
486__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
487_mm256_mask_broadcast_i32x2 (__m256i __O, __mmask8 __M, __m128i __A)
488{
489 return (__m256i) __builtin_ia32_broadcasti32x2_256_mask ((__v4si)
490 __A,
491 (__v8si)
492 __O, __M);
493}
494
495extern __inline __m256i
496__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
497_mm256_maskz_broadcast_i32x2 (__mmask8 __M, __m128i __A)
498{
499 return (__m256i) __builtin_ia32_broadcasti32x2_256_mask ((__v4si)
500 __A,
501 (__v8si)
fd79b414 502 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 503 __M);
504}
505
506extern __inline __m128i
507__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
508_mm_broadcast_i32x2 (__m128i __A)
509{
510 return (__m128i) __builtin_ia32_broadcasti32x2_128_mask ((__v4si)
511 __A,
4bbabb2a 512 (__v4si)_mm_avx512_undefined_si128(),
c42b0bdf 513 (__mmask8) -1);
936c0fe4
AI		 514}
515
516extern __inline __m128i
517__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
518_mm_mask_broadcast_i32x2 (__m128i __O, __mmask8 __M, __m128i __A)
519{
520 return (__m128i) __builtin_ia32_broadcasti32x2_128_mask ((__v4si)
521 __A,
522 (__v4si)
523 __O, __M);
524}
525
526extern __inline __m128i
527__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
528_mm_maskz_broadcast_i32x2 (__mmask8 __M, __m128i __A)
529{
530 return (__m128i) __builtin_ia32_broadcasti32x2_128_mask ((__v4si)
531 __A,
532 (__v4si)
fd79b414 533 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 534 __M);
535}
536
537extern __inline __m256i
538__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
539_mm256_mullo_epi64 (__m256i __A, __m256i __B)
540{
2069d6fc 541 return (__m256i) ((__v4du) __A * (__v4du) __B);
936c0fe4
AI		 542}
543
544extern __inline __m256i
545__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
546_mm256_mask_mullo_epi64 (__m256i __W, __mmask8 __U, __m256i __A,
547 __m256i __B)
548{
549 return (__m256i) __builtin_ia32_pmullq256_mask ((__v4di) __A,
550 (__v4di) __B,
551 (__v4di) __W,
552 (__mmask8) __U);
553}
554
555extern __inline __m256i
556__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
557_mm256_maskz_mullo_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
558{
559 return (__m256i) __builtin_ia32_pmullq256_mask ((__v4di) __A,
560 (__v4di) __B,
561 (__v4di)
fd79b414 562 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 563 (__mmask8) __U);
564}
565
566extern __inline __m128i
567__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
568_mm_mullo_epi64 (__m128i __A, __m128i __B)
569{
2069d6fc 570 return (__m128i) ((__v2du) __A * (__v2du) __B);
936c0fe4
AI		 571}
572
573extern __inline __m128i
574__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
575_mm_mask_mullo_epi64 (__m128i __W, __mmask8 __U, __m128i __A,
576 __m128i __B)
577{
578 return (__m128i) __builtin_ia32_pmullq128_mask ((__v2di) __A,
579 (__v2di) __B,
580 (__v2di) __W,
581 (__mmask8) __U);
582}
583
584extern __inline __m128i
585__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
586_mm_maskz_mullo_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
587{
588 return (__m128i) __builtin_ia32_pmullq128_mask ((__v2di) __A,
589 (__v2di) __B,
590 (__v2di)
fd79b414 591 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 592 (__mmask8) __U);
593}
594
595extern __inline __m256d
596__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
597_mm256_mask_andnot_pd (__m256d __W, __mmask8 __U, __m256d __A,
598 __m256d __B)
599{
600 return (__m256d) __builtin_ia32_andnpd256_mask ((__v4df) __A,
601 (__v4df) __B,
602 (__v4df) __W,
603 (__mmask8) __U);
604}
605
606extern __inline __m256d
607__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
608_mm256_maskz_andnot_pd (__mmask8 __U, __m256d __A, __m256d __B)
609{
610 return (__m256d) __builtin_ia32_andnpd256_mask ((__v4df) __A,
611 (__v4df) __B,
612 (__v4df)
fd79b414 613 _mm256_avx512_setzero_pd (),
936c0fe4
AI		 614 (__mmask8) __U);
615}
616
617extern __inline __m128d
618__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
619_mm_mask_andnot_pd (__m128d __W, __mmask8 __U, __m128d __A,
620 __m128d __B)
621{
622 return (__m128d) __builtin_ia32_andnpd128_mask ((__v2df) __A,
623 (__v2df) __B,
624 (__v2df) __W,
625 (__mmask8) __U);
626}
627
628extern __inline __m128d
629__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
630_mm_maskz_andnot_pd (__mmask8 __U, __m128d __A, __m128d __B)
631{
632 return (__m128d) __builtin_ia32_andnpd128_mask ((__v2df) __A,
633 (__v2df) __B,
634 (__v2df)
fd79b414 635 _mm_avx512_setzero_pd (),
936c0fe4
AI		 636 (__mmask8) __U);
637}
638
639extern __inline __m256
640__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
641_mm256_mask_andnot_ps (__m256 __W, __mmask8 __U, __m256 __A,
642 __m256 __B)
643{
644 return (__m256) __builtin_ia32_andnps256_mask ((__v8sf) __A,
645 (__v8sf) __B,
646 (__v8sf) __W,
647 (__mmask8) __U);
648}
649
650extern __inline __m256
651__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
652_mm256_maskz_andnot_ps (__mmask8 __U, __m256 __A, __m256 __B)
653{
654 return (__m256) __builtin_ia32_andnps256_mask ((__v8sf) __A,
655 (__v8sf) __B,
656 (__v8sf)
fd79b414 657 _mm256_avx512_setzero_ps (),
936c0fe4
AI		 658 (__mmask8) __U);
659}
660
661extern __inline __m128
662__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
663_mm_mask_andnot_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
664{
665 return (__m128) __builtin_ia32_andnps128_mask ((__v4sf) __A,
666 (__v4sf) __B,
667 (__v4sf) __W,
668 (__mmask8) __U);
669}
670
671extern __inline __m128
672__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
673_mm_maskz_andnot_ps (__mmask8 __U, __m128 __A, __m128 __B)
674{
675 return (__m128) __builtin_ia32_andnps128_mask ((__v4sf) __A,
676 (__v4sf) __B,
677 (__v4sf)
fd79b414 678 _mm_avx512_setzero_ps (),
936c0fe4
AI		 679 (__mmask8) __U);
680}
681
682extern __inline __m256i
683__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
684_mm256_cvtps_epi64 (__m128 __A)
685{
686 return (__m256i) __builtin_ia32_cvtps2qq256_mask ((__v4sf) __A,
687 (__v4di)
fd79b414 688 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 689 (__mmask8) -1);
690}
691
692extern __inline __m256i
693__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
694_mm256_mask_cvtps_epi64 (__m256i __W, __mmask8 __U, __m128 __A)
695{
696 return (__m256i) __builtin_ia32_cvtps2qq256_mask ((__v4sf) __A,
697 (__v4di) __W,
698 (__mmask8) __U);
699}
700
701extern __inline __m256i
702__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
703_mm256_maskz_cvtps_epi64 (__mmask8 __U, __m128 __A)
704{
705 return (__m256i) __builtin_ia32_cvtps2qq256_mask ((__v4sf) __A,
706 (__v4di)
fd79b414 707 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 708 (__mmask8) __U);
709}
710
711extern __inline __m128i
712__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
713_mm_cvtps_epi64 (__m128 __A)
714{
715 return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A,
716 (__v2di)
fd79b414 717 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 718 (__mmask8) -1);
719}
720
721extern __inline __m128i
722__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
723_mm_mask_cvtps_epi64 (__m128i __W, __mmask8 __U, __m128 __A)
724{
725 return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A,
726 (__v2di) __W,
727 (__mmask8) __U);
728}
729
730extern __inline __m128i
731__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
732_mm_maskz_cvtps_epi64 (__mmask8 __U, __m128 __A)
733{
734 return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A,
735 (__v2di)
fd79b414 736 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 737 (__mmask8) __U);
738}
739
740extern __inline __m256i
741__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
742_mm256_cvtps_epu64 (__m128 __A)
743{
744 return (__m256i) __builtin_ia32_cvtps2uqq256_mask ((__v4sf) __A,
745 (__v4di)
fd79b414 746 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 747 (__mmask8) -1);
748}
749
750extern __inline __m256i
751__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
752_mm256_mask_cvtps_epu64 (__m256i __W, __mmask8 __U, __m128 __A)
753{
754 return (__m256i) __builtin_ia32_cvtps2uqq256_mask ((__v4sf) __A,
755 (__v4di) __W,
756 (__mmask8) __U);
757}
758
759extern __inline __m256i
760__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
761_mm256_maskz_cvtps_epu64 (__mmask8 __U, __m128 __A)
762{
763 return (__m256i) __builtin_ia32_cvtps2uqq256_mask ((__v4sf) __A,
764 (__v4di)
fd79b414 765 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 766 (__mmask8) __U);
767}
768
769extern __inline __m128i
770__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
771_mm_cvtps_epu64 (__m128 __A)
772{
773 return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A,
774 (__v2di)
fd79b414 775 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 776 (__mmask8) -1);
777}
778
779extern __inline __m128i
780__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
781_mm_mask_cvtps_epu64 (__m128i __W, __mmask8 __U, __m128 __A)
782{
783 return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A,
784 (__v2di) __W,
785 (__mmask8) __U);
786}
787
788extern __inline __m128i
789__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
790_mm_maskz_cvtps_epu64 (__mmask8 __U, __m128 __A)
791{
792 return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A,
793 (__v2di)
fd79b414 794 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 795 (__mmask8) __U);
796}
797
798extern __inline __m128
799__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
800_mm256_cvtepi64_ps (__m256i __A)
801{
802 return (__m128) __builtin_ia32_cvtqq2ps256_mask ((__v4di) __A,
803 (__v4sf)
fd79b414 804 _mm_avx512_setzero_ps (),
936c0fe4
AI		 805 (__mmask8) -1);
806}
807
808extern __inline __m128
809__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
810_mm256_mask_cvtepi64_ps (__m128 __W, __mmask8 __U, __m256i __A)
811{
812 return (__m128) __builtin_ia32_cvtqq2ps256_mask ((__v4di) __A,
813 (__v4sf) __W,
814 (__mmask8) __U);
815}
816
817extern __inline __m128
818__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
819_mm256_maskz_cvtepi64_ps (__mmask8 __U, __m256i __A)
820{
821 return (__m128) __builtin_ia32_cvtqq2ps256_mask ((__v4di) __A,
822 (__v4sf)
fd79b414 823 _mm_avx512_setzero_ps (),
936c0fe4
AI		 824 (__mmask8) __U);
825}
826
827extern __inline __m128
828__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
829_mm_cvtepi64_ps (__m128i __A)
830{
831 return (__m128) __builtin_ia32_cvtqq2ps128_mask ((__v2di) __A,
832 (__v4sf)
fd79b414 833 _mm_avx512_setzero_ps (),
936c0fe4
AI		 834 (__mmask8) -1);
835}
836
837extern __inline __m128
838__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
839_mm_mask_cvtepi64_ps (__m128 __W, __mmask8 __U, __m128i __A)
840{
841 return (__m128) __builtin_ia32_cvtqq2ps128_mask ((__v2di) __A,
842 (__v4sf) __W,
843 (__mmask8) __U);
844}
845
846extern __inline __m128
847__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
848_mm_maskz_cvtepi64_ps (__mmask8 __U, __m128i __A)
849{
850 return (__m128) __builtin_ia32_cvtqq2ps128_mask ((__v2di) __A,
851 (__v4sf)
fd79b414 852 _mm_avx512_setzero_ps (),
936c0fe4
AI		 853 (__mmask8) __U);
854}
855
856extern __inline __m128
857__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
858_mm256_cvtepu64_ps (__m256i __A)
859{
860 return (__m128) __builtin_ia32_cvtuqq2ps256_mask ((__v4di) __A,
861 (__v4sf)
fd79b414 862 _mm_avx512_setzero_ps (),
936c0fe4
AI		 863 (__mmask8) -1);
864}
865
866extern __inline __m128
867__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
868_mm256_mask_cvtepu64_ps (__m128 __W, __mmask8 __U, __m256i __A)
869{
870 return (__m128) __builtin_ia32_cvtuqq2ps256_mask ((__v4di) __A,
871 (__v4sf) __W,
872 (__mmask8) __U);
873}
874
875extern __inline __m128
876__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
877_mm256_maskz_cvtepu64_ps (__mmask8 __U, __m256i __A)
878{
879 return (__m128) __builtin_ia32_cvtuqq2ps256_mask ((__v4di) __A,
880 (__v4sf)
fd79b414 881 _mm_avx512_setzero_ps (),
936c0fe4
AI		 882 (__mmask8) __U);
883}
884
885extern __inline __m128
886__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
887_mm_cvtepu64_ps (__m128i __A)
888{
889 return (__m128) __builtin_ia32_cvtuqq2ps128_mask ((__v2di) __A,
890 (__v4sf)
fd79b414 891 _mm_avx512_setzero_ps (),
936c0fe4
AI		 892 (__mmask8) -1);
893}
894
895extern __inline __m128
896__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
897_mm_mask_cvtepu64_ps (__m128 __W, __mmask8 __U, __m128i __A)
898{
899 return (__m128) __builtin_ia32_cvtuqq2ps128_mask ((__v2di) __A,
900 (__v4sf) __W,
901 (__mmask8) __U);
902}
903
904extern __inline __m128
905__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
906_mm_maskz_cvtepu64_ps (__mmask8 __U, __m128i __A)
907{
908 return (__m128) __builtin_ia32_cvtuqq2ps128_mask ((__v2di) __A,
909 (__v4sf)
fd79b414 910 _mm_avx512_setzero_ps (),
936c0fe4
AI		 911 (__mmask8) __U);
912}
913
914extern __inline __m256d
915__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
916_mm256_cvtepi64_pd (__m256i __A)
917{
918 return (__m256d) __builtin_ia32_cvtqq2pd256_mask ((__v4di) __A,
919 (__v4df)
fd79b414 920 _mm256_avx512_setzero_pd (),
936c0fe4
AI		 921 (__mmask8) -1);
922}
923
924extern __inline __m256d
925__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
926_mm256_mask_cvtepi64_pd (__m256d __W, __mmask8 __U, __m256i __A)
927{
928 return (__m256d) __builtin_ia32_cvtqq2pd256_mask ((__v4di) __A,
929 (__v4df) __W,
930 (__mmask8) __U);
931}
932
933extern __inline __m256d
934__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
935_mm256_maskz_cvtepi64_pd (__mmask8 __U, __m256i __A)
936{
937 return (__m256d) __builtin_ia32_cvtqq2pd256_mask ((__v4di) __A,
938 (__v4df)
fd79b414 939 _mm256_avx512_setzero_pd (),
936c0fe4
AI		 940 (__mmask8) __U);
941}
942
943extern __inline __m128d
944__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
945_mm_cvtepi64_pd (__m128i __A)
946{
947 return (__m128d) __builtin_ia32_cvtqq2pd128_mask ((__v2di) __A,
948 (__v2df)
fd79b414 949 _mm_avx512_setzero_pd (),
936c0fe4
AI		 950 (__mmask8) -1);
951}
952
953extern __inline __m128d
954__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
955_mm_mask_cvtepi64_pd (__m128d __W, __mmask8 __U, __m128i __A)
956{
957 return (__m128d) __builtin_ia32_cvtqq2pd128_mask ((__v2di) __A,
958 (__v2df) __W,
959 (__mmask8) __U);
960}
961
962extern __inline __m128d
963__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
964_mm_maskz_cvtepi64_pd (__mmask8 __U, __m128i __A)
965{
966 return (__m128d) __builtin_ia32_cvtqq2pd128_mask ((__v2di) __A,
967 (__v2df)
fd79b414 968 _mm_avx512_setzero_pd (),
936c0fe4
AI		 969 (__mmask8) __U);
970}
971
972extern __inline __m256d
973__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
974_mm256_cvtepu64_pd (__m256i __A)
975{
976 return (__m256d) __builtin_ia32_cvtuqq2pd256_mask ((__v4di) __A,
977 (__v4df)
fd79b414 978 _mm256_avx512_setzero_pd (),
936c0fe4
AI		 979 (__mmask8) -1);
980}
981
982extern __inline __m256d
983__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
984_mm256_mask_cvtepu64_pd (__m256d __W, __mmask8 __U, __m256i __A)
985{
986 return (__m256d) __builtin_ia32_cvtuqq2pd256_mask ((__v4di) __A,
987 (__v4df) __W,
988 (__mmask8) __U);
989}
990
991extern __inline __m256d
992__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
993_mm256_maskz_cvtepu64_pd (__mmask8 __U, __m256i __A)
994{
995 return (__m256d) __builtin_ia32_cvtuqq2pd256_mask ((__v4di) __A,
996 (__v4df)
fd79b414 997 _mm256_avx512_setzero_pd (),
936c0fe4
AI		 998 (__mmask8) __U);
999}
1000
1001extern __inline __m256d
1002__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1003_mm256_mask_and_pd (__m256d __W, __mmask8 __U, __m256d __A,
1004 __m256d __B)
1005{
1006 return (__m256d) __builtin_ia32_andpd256_mask ((__v4df) __A,
1007 (__v4df) __B,
1008 (__v4df) __W,
1009 (__mmask8) __U);
1010}
1011
1012extern __inline __m256d
1013__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1014_mm256_maskz_and_pd (__mmask8 __U, __m256d __A, __m256d __B)
1015{
1016 return (__m256d) __builtin_ia32_andpd256_mask ((__v4df) __A,
1017 (__v4df) __B,
1018 (__v4df)
fd79b414 1019 _mm256_avx512_setzero_pd (),
936c0fe4
AI		 1020 (__mmask8) __U);
1021}
1022
1023extern __inline __m128d
1024__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1025_mm_mask_and_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
1026{
1027 return (__m128d) __builtin_ia32_andpd128_mask ((__v2df) __A,
1028 (__v2df) __B,
1029 (__v2df) __W,
1030 (__mmask8) __U);
1031}
1032
1033extern __inline __m128d
1034__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1035_mm_maskz_and_pd (__mmask8 __U, __m128d __A, __m128d __B)
1036{
1037 return (__m128d) __builtin_ia32_andpd128_mask ((__v2df) __A,
1038 (__v2df) __B,
1039 (__v2df)
fd79b414 1040 _mm_avx512_setzero_pd (),
936c0fe4
AI		 1041 (__mmask8) __U);
1042}
1043
1044extern __inline __m256
1045__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1046_mm256_mask_and_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
1047{
1048 return (__m256) __builtin_ia32_andps256_mask ((__v8sf) __A,
1049 (__v8sf) __B,
1050 (__v8sf) __W,
1051 (__mmask8) __U);
1052}
1053
1054extern __inline __m256
1055__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1056_mm256_maskz_and_ps (__mmask8 __U, __m256 __A, __m256 __B)
1057{
1058 return (__m256) __builtin_ia32_andps256_mask ((__v8sf) __A,
1059 (__v8sf) __B,
1060 (__v8sf)
fd79b414 1061 _mm256_avx512_setzero_ps (),
936c0fe4
AI		 1062 (__mmask8) __U);
1063}
1064
1065extern __inline __m128
1066__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1067_mm_mask_and_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
1068{
1069 return (__m128) __builtin_ia32_andps128_mask ((__v4sf) __A,
1070 (__v4sf) __B,
1071 (__v4sf) __W,
1072 (__mmask8) __U);
1073}
1074
1075extern __inline __m128
1076__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1077_mm_maskz_and_ps (__mmask8 __U, __m128 __A, __m128 __B)
1078{
1079 return (__m128) __builtin_ia32_andps128_mask ((__v4sf) __A,
1080 (__v4sf) __B,
1081 (__v4sf)
fd79b414 1082 _mm_avx512_setzero_ps (),
936c0fe4
AI		 1083 (__mmask8) __U);
1084}
1085
1086extern __inline __m128d
1087__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1088_mm_cvtepu64_pd (__m128i __A)
1089{
1090 return (__m128d) __builtin_ia32_cvtuqq2pd128_mask ((__v2di) __A,
1091 (__v2df)
fd79b414 1092 _mm_avx512_setzero_pd (),
936c0fe4
AI		 1093 (__mmask8) -1);
1094}
1095
1096extern __inline __m128d
1097__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1098_mm_mask_cvtepu64_pd (__m128d __W, __mmask8 __U, __m128i __A)
1099{
1100 return (__m128d) __builtin_ia32_cvtuqq2pd128_mask ((__v2di) __A,
1101 (__v2df) __W,
1102 (__mmask8) __U);
1103}
1104
1105extern __inline __m128d
1106__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1107_mm_maskz_cvtepu64_pd (__mmask8 __U, __m128i __A)
1108{
1109 return (__m128d) __builtin_ia32_cvtuqq2pd128_mask ((__v2di) __A,
1110 (__v2df)
fd79b414 1111 _mm_avx512_setzero_pd (),
936c0fe4
AI		 1112 (__mmask8) __U);
1113}
1114
1115extern __inline __m256d
1116__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1117_mm256_mask_xor_pd (__m256d __W, __mmask8 __U, __m256d __A,
1118 __m256d __B)
1119{
1120 return (__m256d) __builtin_ia32_xorpd256_mask ((__v4df) __A,
1121 (__v4df) __B,
1122 (__v4df) __W,
1123 (__mmask8) __U);
1124}
1125
1126extern __inline __m256d
1127__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1128_mm256_maskz_xor_pd (__mmask8 __U, __m256d __A, __m256d __B)
1129{
1130 return (__m256d) __builtin_ia32_xorpd256_mask ((__v4df) __A,
1131 (__v4df) __B,
1132 (__v4df)
fd79b414 1133 _mm256_avx512_setzero_pd (),
936c0fe4
AI		 1134 (__mmask8) __U);
1135}
1136
1137extern __inline __m128d
1138__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1139_mm_mask_xor_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
1140{
1141 return (__m128d) __builtin_ia32_xorpd128_mask ((__v2df) __A,
1142 (__v2df) __B,
1143 (__v2df) __W,
1144 (__mmask8) __U);
1145}
1146
1147extern __inline __m128d
1148__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1149_mm_maskz_xor_pd (__mmask8 __U, __m128d __A, __m128d __B)
1150{
1151 return (__m128d) __builtin_ia32_xorpd128_mask ((__v2df) __A,
1152 (__v2df) __B,
1153 (__v2df)
fd79b414 1154 _mm_avx512_setzero_pd (),
936c0fe4
AI		 1155 (__mmask8) __U);
1156}
1157
1158extern __inline __m256
1159__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1160_mm256_mask_xor_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
1161{
1162 return (__m256) __builtin_ia32_xorps256_mask ((__v8sf) __A,
1163 (__v8sf) __B,
1164 (__v8sf) __W,
1165 (__mmask8) __U);
1166}
1167
1168extern __inline __m256
1169__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1170_mm256_maskz_xor_ps (__mmask8 __U, __m256 __A, __m256 __B)
1171{
1172 return (__m256) __builtin_ia32_xorps256_mask ((__v8sf) __A,
1173 (__v8sf) __B,
1174 (__v8sf)
fd79b414 1175 _mm256_avx512_setzero_ps (),
936c0fe4
AI		 1176 (__mmask8) __U);
1177}
1178
1179extern __inline __m128
1180__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1181_mm_mask_xor_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
1182{
1183 return (__m128) __builtin_ia32_xorps128_mask ((__v4sf) __A,
1184 (__v4sf) __B,
1185 (__v4sf) __W,
1186 (__mmask8) __U);
1187}
1188
1189extern __inline __m128
1190__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1191_mm_maskz_xor_ps (__mmask8 __U, __m128 __A, __m128 __B)
1192{
1193 return (__m128) __builtin_ia32_xorps128_mask ((__v4sf) __A,
1194 (__v4sf) __B,
1195 (__v4sf)
fd79b414 1196 _mm_avx512_setzero_ps (),
936c0fe4
AI		 1197 (__mmask8) __U);
1198}
1199
1200extern __inline __m256d
1201__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1202_mm256_mask_or_pd (__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)
1203{
1204 return (__m256d) __builtin_ia32_orpd256_mask ((__v4df) __A,
1205 (__v4df) __B,
1206 (__v4df) __W,
1207 (__mmask8) __U);
1208}
1209
1210extern __inline __m256d
1211__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1212_mm256_maskz_or_pd (__mmask8 __U, __m256d __A, __m256d __B)
1213{
1214 return (__m256d) __builtin_ia32_orpd256_mask ((__v4df) __A,
1215 (__v4df) __B,
1216 (__v4df)
fd79b414 1217 _mm256_avx512_setzero_pd (),
936c0fe4
AI		 1218 (__mmask8) __U);
1219}
1220
1221extern __inline __m128d
1222__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1223_mm_mask_or_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
1224{
1225 return (__m128d) __builtin_ia32_orpd128_mask ((__v2df) __A,
1226 (__v2df) __B,
1227 (__v2df) __W,
1228 (__mmask8) __U);
1229}
1230
1231extern __inline __m128d
1232__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1233_mm_maskz_or_pd (__mmask8 __U, __m128d __A, __m128d __B)
1234{
1235 return (__m128d) __builtin_ia32_orpd128_mask ((__v2df) __A,
1236 (__v2df) __B,
1237 (__v2df)
fd79b414 1238 _mm_avx512_setzero_pd (),
936c0fe4
AI		 1239 (__mmask8) __U);
1240}
1241
1242extern __inline __m256
1243__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1244_mm256_mask_or_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
1245{
1246 return (__m256) __builtin_ia32_orps256_mask ((__v8sf) __A,
1247 (__v8sf) __B,
1248 (__v8sf) __W,
1249 (__mmask8) __U);
1250}
1251
1252extern __inline __m256
1253__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1254_mm256_maskz_or_ps (__mmask8 __U, __m256 __A, __m256 __B)
1255{
1256 return (__m256) __builtin_ia32_orps256_mask ((__v8sf) __A,
1257 (__v8sf) __B,
1258 (__v8sf)
fd79b414 1259 _mm256_avx512_setzero_ps (),
936c0fe4
AI		 1260 (__mmask8) __U);
1261}
1262
1263extern __inline __m128
1264__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1265_mm_mask_or_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
1266{
1267 return (__m128) __builtin_ia32_orps128_mask ((__v4sf) __A,
1268 (__v4sf) __B,
1269 (__v4sf) __W,
1270 (__mmask8) __U);
1271}
1272
1273extern __inline __m128
1274__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1275_mm_maskz_or_ps (__mmask8 __U, __m128 __A, __m128 __B)
1276{
1277 return (__m128) __builtin_ia32_orps128_mask ((__v4sf) __A,
1278 (__v4sf) __B,
1279 (__v4sf)
fd79b414 1280 _mm_avx512_setzero_ps (),
936c0fe4
AI		 1281 (__mmask8) __U);
1282}
1283
1284extern __inline __m128i
1285__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1286_mm_movm_epi32 (__mmask8 __A)
1287{
1288 return (__m128i) __builtin_ia32_cvtmask2d128 (__A);
1289}
1290
1291extern __inline __m256i
1292__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1293_mm256_movm_epi32 (__mmask8 __A)
1294{
1295 return (__m256i) __builtin_ia32_cvtmask2d256 (__A);
1296}
1297
1298extern __inline __m128i
1299__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1300_mm_movm_epi64 (__mmask8 __A)
1301{
1302 return (__m128i) __builtin_ia32_cvtmask2q128 (__A);
1303}
1304
1305extern __inline __m256i
1306__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1307_mm256_movm_epi64 (__mmask8 __A)
1308{
1309 return (__m256i) __builtin_ia32_cvtmask2q256 (__A);
1310}
1311
1312extern __inline __mmask8
1313__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1314_mm_movepi32_mask (__m128i __A)
1315{
1316 return (__mmask8) __builtin_ia32_cvtd2mask128 ((__v4si) __A);
1317}
1318
1319extern __inline __mmask8
1320__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1321_mm256_movepi32_mask (__m256i __A)
1322{
1323 return (__mmask8) __builtin_ia32_cvtd2mask256 ((__v8si) __A);
1324}
1325
1326extern __inline __mmask8
1327__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1328_mm_movepi64_mask (__m128i __A)
1329{
1330 return (__mmask8) __builtin_ia32_cvtq2mask128 ((__v2di) __A);
1331}
1332
1333extern __inline __mmask8
1334__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1335_mm256_movepi64_mask (__m256i __A)
1336{
1337 return (__mmask8) __builtin_ia32_cvtq2mask256 ((__v4di) __A);
1338}
1339
1340#ifdef __OPTIMIZE__
1341extern __inline __m128d
1342__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1343_mm256_extractf64x2_pd (__m256d __A, const int __imm)
1344{
1345 return (__m128d) __builtin_ia32_extractf64x2_256_mask ((__v4df) __A,
1346 __imm,
1347 (__v2df)
fd79b414 1348 _mm_avx512_setzero_pd (),
c42b0bdf 1349 (__mmask8) -1);
936c0fe4
AI		 1350}
1351
1352extern __inline __m128d
1353__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1354_mm256_mask_extractf64x2_pd (__m128d __W, __mmask8 __U, __m256d __A,
1355 const int __imm)
1356{
1357 return (__m128d) __builtin_ia32_extractf64x2_256_mask ((__v4df) __A,
1358 __imm,
1359 (__v2df) __W,
1360 (__mmask8)
1361 __U);
1362}
1363
1364extern __inline __m128d
1365__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1366_mm256_maskz_extractf64x2_pd (__mmask8 __U, __m256d __A,
1367 const int __imm)
1368{
1369 return (__m128d) __builtin_ia32_extractf64x2_256_mask ((__v4df) __A,
1370 __imm,
1371 (__v2df)
fd79b414 1372 _mm_avx512_setzero_pd (),
936c0fe4
AI		 1373 (__mmask8)
1374 __U);
1375}
1376
1377extern __inline __m128i
1378__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1379_mm256_extracti64x2_epi64 (__m256i __A, const int __imm)
1380{
1381 return (__m128i) __builtin_ia32_extracti64x2_256_mask ((__v4di) __A,
1382 __imm,
1383 (__v2di)
fd79b414 1384 _mm_avx512_setzero_si128 (),
c42b0bdf 1385 (__mmask8) -1);
936c0fe4
AI		 1386}
1387
1388extern __inline __m128i
1389__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1390_mm256_mask_extracti64x2_epi64 (__m128i __W, __mmask8 __U, __m256i __A,
1391 const int __imm)
1392{
1393 return (__m128i) __builtin_ia32_extracti64x2_256_mask ((__v4di) __A,
1394 __imm,
1395 (__v2di) __W,
1396 (__mmask8)
1397 __U);
1398}
1399
1400extern __inline __m128i
1401__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1402_mm256_maskz_extracti64x2_epi64 (__mmask8 __U, __m256i __A,
1403 const int __imm)
1404{
1405 return (__m128i) __builtin_ia32_extracti64x2_256_mask ((__v4di) __A,
1406 __imm,
1407 (__v2di)
fd79b414 1408 _mm_avx512_setzero_si128 (),
936c0fe4
AI		 1409 (__mmask8)
1410 __U);
1411}
1412
1413extern __inline __m256d
1414__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1415_mm256_reduce_pd (__m256d __A, int __B)
1416{
1417 return (__m256d) __builtin_ia32_reducepd256_mask ((__v4df) __A, __B,
1418 (__v4df)
fd79b414 1419 _mm256_avx512_setzero_pd (),
936c0fe4
AI		 1420 (__mmask8) -1);
1421}
1422
1423extern __inline __m256d
1424__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1425_mm256_mask_reduce_pd (__m256d __W, __mmask8 __U, __m256d __A, int __B)
1426{
1427 return (__m256d) __builtin_ia32_reducepd256_mask ((__v4df) __A, __B,
1428 (__v4df) __W,
1429 (__mmask8) __U);
1430}
1431
1432extern __inline __m256d
1433__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1434_mm256_maskz_reduce_pd (__mmask8 __U, __m256d __A, int __B)
1435{
1436 return (__m256d) __builtin_ia32_reducepd256_mask ((__v4df) __A, __B,
1437 (__v4df)
fd79b414 1438 _mm256_avx512_setzero_pd (),
936c0fe4
AI		 1439 (__mmask8) __U);
1440}
1441
1442extern __inline __m128d
1443__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1444_mm_reduce_pd (__m128d __A, int __B)
1445{
1446 return (__m128d) __builtin_ia32_reducepd128_mask ((__v2df) __A, __B,
1447 (__v2df)
fd79b414 1448 _mm_avx512_setzero_pd (),
936c0fe4
AI		 1449 (__mmask8) -1);
1450}
1451
1452extern __inline __m128d
1453__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1454_mm_mask_reduce_pd (__m128d __W, __mmask8 __U, __m128d __A, int __B)
1455{
1456 return (__m128d) __builtin_ia32_reducepd128_mask ((__v2df) __A, __B,
1457 (__v2df) __W,
1458 (__mmask8) __U);
1459}
1460
1461extern __inline __m128d
1462__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1463_mm_maskz_reduce_pd (__mmask8 __U, __m128d __A, int __B)
1464{
1465 return (__m128d) __builtin_ia32_reducepd128_mask ((__v2df) __A, __B,
1466 (__v2df)
fd79b414 1467 _mm_avx512_setzero_pd (),
936c0fe4
AI		 1468 (__mmask8) __U);
1469}
1470
1471extern __inline __m256
1472__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1473_mm256_reduce_ps (__m256 __A, int __B)
1474{
1475 return (__m256) __builtin_ia32_reduceps256_mask ((__v8sf) __A, __B,
1476 (__v8sf)
fd79b414 1477 _mm256_avx512_setzero_ps (),
936c0fe4
AI		 1478 (__mmask8) -1);
1479}
1480
1481extern __inline __m256
1482__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1483_mm256_mask_reduce_ps (__m256 __W, __mmask8 __U, __m256 __A, int __B)
1484{
1485 return (__m256) __builtin_ia32_reduceps256_mask ((__v8sf) __A, __B,
1486 (__v8sf) __W,
1487 (__mmask8) __U);
1488}
1489
1490extern __inline __m256
1491__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1492_mm256_maskz_reduce_ps (__mmask8 __U, __m256 __A, int __B)
1493{
1494 return (__m256) __builtin_ia32_reduceps256_mask ((__v8sf) __A, __B,
1495 (__v8sf)
fd79b414 1496 _mm256_avx512_setzero_ps (),
936c0fe4
AI		 1497 (__mmask8) __U);
1498}
1499
1500extern __inline __m128
1501__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1502_mm_reduce_ps (__m128 __A, int __B)
1503{
1504 return (__m128) __builtin_ia32_reduceps128_mask ((__v4sf) __A, __B,
1505 (__v4sf)
fd79b414 1506 _mm_avx512_setzero_ps (),
936c0fe4
AI		 1507 (__mmask8) -1);
1508}
1509
1510extern __inline __m128
1511__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1512_mm_mask_reduce_ps (__m128 __W, __mmask8 __U, __m128 __A, int __B)
1513{
1514 return (__m128) __builtin_ia32_reduceps128_mask ((__v4sf) __A, __B,
1515 (__v4sf) __W,
1516 (__mmask8) __U);
1517}
1518
1519extern __inline __m128
1520__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1521_mm_maskz_reduce_ps (__mmask8 __U, __m128 __A, int __B)
1522{
1523 return (__m128) __builtin_ia32_reduceps128_mask ((__v4sf) __A, __B,
1524 (__v4sf)
fd79b414 1525 _mm_avx512_setzero_ps (),
936c0fe4
AI		 1526 (__mmask8) __U);
1527}
1528
1529extern __inline __m256d
1530__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1531_mm256_range_pd (__m256d __A, __m256d __B, int __C)
1532{
1533 return (__m256d) __builtin_ia32_rangepd256_mask ((__v4df) __A,
1534 (__v4df) __B, __C,
1535 (__v4df)
fd79b414 1536 _mm256_avx512_setzero_pd (),
936c0fe4
AI		 1537 (__mmask8) -1);
1538}
1539
1540extern __inline __m256d
1541__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1542_mm256_mask_range_pd (__m256d __W, __mmask8 __U,
1543 __m256d __A, __m256d __B, int __C)
1544{
1545 return (__m256d) __builtin_ia32_rangepd256_mask ((__v4df) __A,
1546 (__v4df) __B, __C,
1547 (__v4df) __W,
1548 (__mmask8) __U);
1549}
1550
1551extern __inline __m256d
1552__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1553_mm256_maskz_range_pd (__mmask8 __U, __m256d __A, __m256d __B, int __C)
1554{
1555 return (__m256d) __builtin_ia32_rangepd256_mask ((__v4df) __A,
1556 (__v4df) __B, __C,
1557 (__v4df)
fd79b414 1558 _mm256_avx512_setzero_pd (),
936c0fe4
AI		 1559 (__mmask8) __U);
1560}
1561
1562extern __inline __m128d
1563__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1564_mm_range_pd (__m128d __A, __m128d __B, int __C)
1565{
1566 return (__m128d) __builtin_ia32_rangepd128_mask ((__v2df) __A,
1567 (__v2df) __B, __C,
1568 (__v2df)
fd79b414 1569 _mm_avx512_setzero_pd (),
936c0fe4
AI		 1570 (__mmask8) -1);
1571}
1572
1573extern __inline __m128d
1574__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1575_mm_mask_range_pd (__m128d __W, __mmask8 __U,
1576 __m128d __A, __m128d __B, int __C)
1577{
1578 return (__m128d) __builtin_ia32_rangepd128_mask ((__v2df) __A,
1579 (__v2df) __B, __C,
1580 (__v2df) __W,
1581 (__mmask8) __U);
1582}
1583
1584extern __inline __m128d
1585__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1586_mm_maskz_range_pd (__mmask8 __U, __m128d __A, __m128d __B, int __C)
1587{
1588 return (__m128d) __builtin_ia32_rangepd128_mask ((__v2df) __A,
1589 (__v2df) __B, __C,
1590 (__v2df)
fd79b414 1591 _mm_avx512_setzero_pd (),
936c0fe4
AI		 1592 (__mmask8) __U);
1593}
1594
1595extern __inline __m256
1596__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1597_mm256_range_ps (__m256 __A, __m256 __B, int __C)
1598{
1599 return (__m256) __builtin_ia32_rangeps256_mask ((__v8sf) __A,
1600 (__v8sf) __B, __C,
1601 (__v8sf)
fd79b414 1602 _mm256_avx512_setzero_ps (),
936c0fe4
AI		 1603 (__mmask8) -1);
1604}
1605
1606extern __inline __m256
1607__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1608_mm256_mask_range_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B,
1609 int __C)
1610{
1611 return (__m256) __builtin_ia32_rangeps256_mask ((__v8sf) __A,
1612 (__v8sf) __B, __C,
1613 (__v8sf) __W,
1614 (__mmask8) __U);
1615}
1616
1617extern __inline __m256
1618__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1619_mm256_maskz_range_ps (__mmask8 __U, __m256 __A, __m256 __B, int __C)
1620{
1621 return (__m256) __builtin_ia32_rangeps256_mask ((__v8sf) __A,
1622 (__v8sf) __B, __C,
1623 (__v8sf)
fd79b414 1624 _mm256_avx512_setzero_ps (),
936c0fe4
AI		 1625 (__mmask8) __U);
1626}
1627
1628extern __inline __m128
1629__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1630_mm_range_ps (__m128 __A, __m128 __B, int __C)
1631{
1632 return (__m128) __builtin_ia32_rangeps128_mask ((__v4sf) __A,
1633 (__v4sf) __B, __C,
1634 (__v4sf)
fd79b414 1635 _mm_avx512_setzero_ps (),
936c0fe4
AI		 1636 (__mmask8) -1);
1637}
1638
1639extern __inline __m128
1640__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1641_mm_mask_range_ps (__m128 __W, __mmask8 __U,
1642 __m128 __A, __m128 __B, int __C)
1643{
1644 return (__m128) __builtin_ia32_rangeps128_mask ((__v4sf) __A,
1645 (__v4sf) __B, __C,
1646 (__v4sf) __W,
1647 (__mmask8) __U);
1648}
1649
1650extern __inline __m128
1651__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1652_mm_maskz_range_ps (__mmask8 __U, __m128 __A, __m128 __B, int __C)
1653{
1654 return (__m128) __builtin_ia32_rangeps128_mask ((__v4sf) __A,
1655 (__v4sf) __B, __C,
1656 (__v4sf)
fd79b414 1657 _mm_avx512_setzero_ps (),
936c0fe4
AI		 1658 (__mmask8) __U);
1659}
1660
1661extern __inline __mmask8
1662__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1663_mm256_mask_fpclass_pd_mask (__mmask8 __U, __m256d __A,
1664 const int __imm)
1665{
1666 return (__mmask8) __builtin_ia32_fpclasspd256_mask ((__v4df) __A,
1667 __imm, __U);
1668}
1669
1670extern __inline __mmask8
1671__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1672_mm256_fpclass_pd_mask (__m256d __A, const int __imm)
1673{
1674 return (__mmask8) __builtin_ia32_fpclasspd256_mask ((__v4df) __A,
1675 __imm,
1676 (__mmask8) -1);
1677}
1678
1679extern __inline __mmask8
1680__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1681_mm256_mask_fpclass_ps_mask (__mmask8 __U, __m256 __A, const int __imm)
1682{
1683 return (__mmask8) __builtin_ia32_fpclassps256_mask ((__v8sf) __A,
1684 __imm, __U);
1685}
1686
1687extern __inline __mmask8
1688__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1689_mm256_fpclass_ps_mask (__m256 __A, const int __imm)
1690{
1691 return (__mmask8) __builtin_ia32_fpclassps256_mask ((__v8sf) __A,
1692 __imm,
1693 (__mmask8) -1);
1694}
1695
1696extern __inline __mmask8
1697__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1698_mm_mask_fpclass_pd_mask (__mmask8 __U, __m128d __A, const int __imm)
1699{
1700 return (__mmask8) __builtin_ia32_fpclasspd128_mask ((__v2df) __A,
1701 __imm, __U);
1702}
1703
1704extern __inline __mmask8
1705__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1706_mm_fpclass_pd_mask (__m128d __A, const int __imm)
1707{
1708 return (__mmask8) __builtin_ia32_fpclasspd128_mask ((__v2df) __A,
1709 __imm,
1710 (__mmask8) -1);
1711}
1712
1713extern __inline __mmask8
1714__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1715_mm_mask_fpclass_ps_mask (__mmask8 __U, __m128 __A, const int __imm)
1716{
1717 return (__mmask8) __builtin_ia32_fpclassps128_mask ((__v4sf) __A,
1718 __imm, __U);
1719}
1720
1721extern __inline __mmask8
1722__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1723_mm_fpclass_ps_mask (__m128 __A, const int __imm)
1724{
1725 return (__mmask8) __builtin_ia32_fpclassps128_mask ((__v4sf) __A,
1726 __imm,
1727 (__mmask8) -1);
1728}
1729
1730extern __inline __m256i
1731__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1732_mm256_inserti64x2 (__m256i __A, __m128i __B, const int __imm)
1733{
1734 return (__m256i) __builtin_ia32_inserti64x2_256_mask ((__v4di) __A,
1735 (__v2di) __B,
1736 __imm,
1737 (__v4di)
fd79b414 1738 _mm256_avx512_setzero_si256 (),
c42b0bdf 1739 (__mmask8) -1);
936c0fe4
AI		 1740}
1741
1742extern __inline __m256i
1743__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1744_mm256_mask_inserti64x2 (__m256i __W, __mmask8 __U, __m256i __A,
1745 __m128i __B, const int __imm)
1746{
1747 return (__m256i) __builtin_ia32_inserti64x2_256_mask ((__v4di) __A,
1748 (__v2di) __B,
1749 __imm,
1750 (__v4di) __W,
1751 (__mmask8)
1752 __U);
1753}
1754
1755extern __inline __m256i
1756__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1757_mm256_maskz_inserti64x2 (__mmask8 __U, __m256i __A, __m128i __B,
1758 const int __imm)
1759{
1760 return (__m256i) __builtin_ia32_inserti64x2_256_mask ((__v4di) __A,
1761 (__v2di) __B,
1762 __imm,
1763 (__v4di)
fd79b414 1764 _mm256_avx512_setzero_si256 (),
936c0fe4
AI		 1765 (__mmask8)
1766 __U);
1767}
1768
1769extern __inline __m256d
1770__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1771_mm256_insertf64x2 (__m256d __A, __m128d __B, const int __imm)
1772{
1773 return (__m256d) __builtin_ia32_insertf64x2_256_mask ((__v4df) __A,
1774 (__v2df) __B,
1775 __imm,
1776 (__v4df)
fd79b414 1777 _mm256_avx512_setzero_pd (),
c42b0bdf 1778 (__mmask8) -1);
936c0fe4
AI		 1779}
1780
1781extern __inline __m256d
1782__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1783_mm256_mask_insertf64x2 (__m256d __W, __mmask8 __U, __m256d __A,
1784 __m128d __B, const int __imm)
1785{
1786 return (__m256d) __builtin_ia32_insertf64x2_256_mask ((__v4df) __A,
1787 (__v2df) __B,
1788 __imm,
1789 (__v4df) __W,
1790 (__mmask8)
1791 __U);
1792}
1793
1794extern __inline __m256d
1795__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
1796_mm256_maskz_insertf64x2 (__mmask8 __U, __m256d __A, __m128d __B,
1797 const int __imm)
1798{
1799 return (__m256d) __builtin_ia32_insertf64x2_256_mask ((__v4df) __A,
1800 (__v2df) __B,
1801 __imm,
1802 (__v4df)
fd79b414 1803 _mm256_avx512_setzero_pd (),
936c0fe4
AI		 1804 (__mmask8)
1805 __U);
1806}
1807
1808#else
1809#define _mm256_insertf64x2(X, Y, C) \
1810 ((__m256d) __builtin_ia32_insertf64x2_256_mask ((__v4df)(__m256d) (X),\
1811 (__v2df)(__m128d) (Y), (int) (C), \
fd79b414 1812 (__v4df)(__m256d)_mm256_avx512_setzero_pd(), \
936c0fe4
AI		 1813 (__mmask8)-1))
1814
1815#define _mm256_mask_insertf64x2(W, U, X, Y, C) \
1816 ((__m256d) __builtin_ia32_insertf64x2_256_mask ((__v4df)(__m256d) (X),\
1817 (__v2df)(__m128d) (Y), (int) (C), \
1818 (__v4df)(__m256d)(W), \
1819 (__mmask8)(U)))
1820
1821#define _mm256_maskz_insertf64x2(U, X, Y, C) \
1822 ((__m256d) __builtin_ia32_insertf64x2_256_mask ((__v4df)(__m256d) (X),\
1823 (__v2df)(__m128d) (Y), (int) (C), \
fd79b414 1824 (__v4df)(__m256d)_mm256_avx512_setzero_pd(), \
936c0fe4
AI		 1825 (__mmask8)(U)))
1826
1827#define _mm256_inserti64x2(X, Y, C) \
1828 ((__m256i) __builtin_ia32_inserti64x2_256_mask ((__v4di)(__m256i) (X),\
1829 (__v2di)(__m128i) (Y), (int) (C), \
fd79b414 1830 (__v4di)(__m256i)_mm256_avx512_setzero_si256 (), \
936c0fe4
AI		 1831 (__mmask8)-1))
1832
1833#define _mm256_mask_inserti64x2(W, U, X, Y, C) \
1834 ((__m256i) __builtin_ia32_inserti64x2_256_mask ((__v4di)(__m256i) (X),\
1835 (__v2di)(__m128i) (Y), (int) (C), \
1836 (__v4di)(__m256i)(W), \
1837 (__mmask8)(U)))
1838
1839#define _mm256_maskz_inserti64x2(U, X, Y, C) \
1840 ((__m256i) __builtin_ia32_inserti64x2_256_mask ((__v4di)(__m256i) (X),\
1841 (__v2di)(__m128i) (Y), (int) (C), \
fd79b414 1842 (__v4di)(__m256i)_mm256_avx512_setzero_si256 (), \
936c0fe4
AI		 1843 (__mmask8)(U)))
1844
1845#define _mm256_extractf64x2_pd(X, C) \
1846 ((__m128d) __builtin_ia32_extractf64x2_256_mask ((__v4df)(__m256d) (X),\
fd79b414 1847 (int) (C), (__v2df)(__m128d) _mm_avx512_setzero_pd(), (__mmask8)-1))
936c0fe4
AI		 1848
1849#define _mm256_mask_extractf64x2_pd(W, U, X, C) \
1850 ((__m128d) __builtin_ia32_extractf64x2_256_mask ((__v4df)(__m256d) (X),\
1851 (int) (C), (__v2df)(__m128d) (W), (__mmask8) (U)))
1852
1853#define _mm256_maskz_extractf64x2_pd(U, X, C) \
1854 ((__m128d) __builtin_ia32_extractf64x2_256_mask ((__v4df)(__m256d) (X),\
fd79b414 1855 (int) (C), (__v2df)(__m128d) _mm_avx512_setzero_pd(), (__mmask8) (U)))
936c0fe4
AI		 1856
1857#define _mm256_extracti64x2_epi64(X, C) \
1858 ((__m128i) __builtin_ia32_extracti64x2_256_mask ((__v4di)(__m256i) (X),\
fd79b414 1859 (int) (C), (__v2di)(__m128i) _mm_avx512_setzero_si128 (), (__mmask8)-1))
936c0fe4
AI		 1860
1861#define _mm256_mask_extracti64x2_epi64(W, U, X, C) \
1862 ((__m128i) __builtin_ia32_extracti64x2_256_mask ((__v4di)(__m256i) (X),\
1863 (int) (C), (__v2di)(__m128i) (W), (__mmask8) (U)))
1864
1865#define _mm256_maskz_extracti64x2_epi64(U, X, C) \
1866 ((__m128i) __builtin_ia32_extracti64x2_256_mask ((__v4di)(__m256i) (X),\
fd79b414 1867 (int) (C), (__v2di)(__m128i) _mm_avx512_setzero_si128 (), (__mmask8) (U)))
936c0fe4
AI		 1868
1869#define _mm256_reduce_pd(A, B) \
1870 ((__m256d) __builtin_ia32_reducepd256_mask ((__v4df)(__m256d)(A), \
fd79b414 1871 (int)(B), (__v4df)_mm256_avx512_setzero_pd(), (__mmask8)-1))
936c0fe4
AI		 1872
1873#define _mm256_mask_reduce_pd(W, U, A, B) \
1874 ((__m256d) __builtin_ia32_reducepd256_mask ((__v4df)(__m256d)(A), \
1875 (int)(B), (__v4df)(__m256d)(W), (__mmask8)(U)))
1876
1877#define _mm256_maskz_reduce_pd(U, A, B) \
1878 ((__m256d) __builtin_ia32_reducepd256_mask ((__v4df)(__m256d)(A), \
fd79b414 1879 (int)(B), (__v4df)_mm256_avx512_setzero_pd(), (__mmask8)(U)))
936c0fe4
AI		 1880
1881#define _mm_reduce_pd(A, B) \
1882 ((__m128d) __builtin_ia32_reducepd128_mask ((__v2df)(__m128d)(A), \
fd79b414 1883 (int)(B), (__v2df)_mm_avx512_setzero_pd(), (__mmask8)-1))
936c0fe4
AI		 1884
1885#define _mm_mask_reduce_pd(W, U, A, B) \
1886 ((__m128d) __builtin_ia32_reducepd128_mask ((__v2df)(__m128d)(A), \
1887 (int)(B), (__v2df)(__m128d)(W), (__mmask8)(U)))
1888
1889#define _mm_maskz_reduce_pd(U, A, B) \
1890 ((__m128d) __builtin_ia32_reducepd128_mask ((__v2df)(__m128d)(A), \
fd79b414 1891 (int)(B), (__v2df)_mm_avx512_setzero_pd(), (__mmask8)(U)))
936c0fe4
AI		 1892
1893#define _mm256_reduce_ps(A, B) \
1894 ((__m256) __builtin_ia32_reduceps256_mask ((__v8sf)(__m256)(A), \
fd79b414 1895 (int)(B), (__v8sf)_mm256_avx512_setzero_ps(), (__mmask8)-1))
936c0fe4
AI		 1896
1897#define _mm256_mask_reduce_ps(W, U, A, B) \
1898 ((__m256) __builtin_ia32_reduceps256_mask ((__v8sf)(__m256)(A), \
1899 (int)(B), (__v8sf)(__m256)(W), (__mmask8)(U)))
1900
1901#define _mm256_maskz_reduce_ps(U, A, B) \
1902 ((__m256) __builtin_ia32_reduceps256_mask ((__v8sf)(__m256)(A), \
fd79b414 1903 (int)(B), (__v8sf)_mm256_avx512_setzero_ps(), (__mmask8)(U)))
936c0fe4
AI		 1904
1905#define _mm_reduce_ps(A, B) \
1906 ((__m128) __builtin_ia32_reduceps128_mask ((__v4sf)(__m128)(A), \
fd79b414 1907 (int)(B), (__v4sf)_mm_avx512_setzero_ps(), (__mmask8)-1))
936c0fe4
AI		 1908
1909#define _mm_mask_reduce_ps(W, U, A, B) \
1910 ((__m128) __builtin_ia32_reduceps128_mask ((__v4sf)(__m128)(A), \
1911 (int)(B), (__v4sf)(__m128)(W), (__mmask8)(U)))
1912
1913#define _mm_maskz_reduce_ps(U, A, B) \
1914 ((__m128) __builtin_ia32_reduceps128_mask ((__v4sf)(__m128)(A), \
fd79b414 1915 (int)(B), (__v4sf)_mm_avx512_setzero_ps(), (__mmask8)(U)))
936c0fe4
AI		 1916
1917#define _mm256_range_pd(A, B, C) \
1918 ((__m256d) __builtin_ia32_rangepd256_mask ((__v4df)(__m256d)(A), \
1919 (__v4df)(__m256d)(B), (int)(C), \
fd79b414 1920 (__v4df)_mm256_avx512_setzero_pd(), (__mmask8)-1))
936c0fe4
AI		 1921
1922#define _mm256_maskz_range_pd(U, A, B, C) \
1923 ((__m256d) __builtin_ia32_rangepd256_mask ((__v4df)(__m256d)(A), \
1924 (__v4df)(__m256d)(B), (int)(C), \
fd79b414 1925 (__v4df)_mm256_avx512_setzero_pd(), (__mmask8)(U)))
936c0fe4
AI		 1926
1927#define _mm_range_pd(A, B, C) \
1928 ((__m128d) __builtin_ia32_rangepd128_mask ((__v2df)(__m128d)(A), \
1929 (__v2df)(__m128d)(B), (int)(C), \
fd79b414 1930 (__v2df)_mm_avx512_setzero_pd(), (__mmask8)-1))
936c0fe4
AI		 1931
1932#define _mm256_range_ps(A, B, C) \
1933 ((__m256) __builtin_ia32_rangeps256_mask ((__v8sf)(__m256)(A), \
1934 (__v8sf)(__m256)(B), (int)(C), \
fd79b414 1935 (__v8sf)_mm256_avx512_setzero_ps(), (__mmask8)-1))
936c0fe4
AI		 1936
1937#define _mm256_mask_range_ps(W, U, A, B, C) \
1938 ((__m256) __builtin_ia32_rangeps256_mask ((__v8sf)(__m256)(A), \
1939 (__v8sf)(__m256)(B), (int)(C), \
1940 (__v8sf)(__m256)(W), (__mmask8)(U)))
1941
1942#define _mm256_maskz_range_ps(U, A, B, C) \
1943 ((__m256) __builtin_ia32_rangeps256_mask ((__v8sf)(__m256)(A), \
1944 (__v8sf)(__m256)(B), (int)(C), \
fd79b414 1945 (__v8sf)_mm256_avx512_setzero_ps(), (__mmask8)(U)))
936c0fe4
AI		 1946
1947#define _mm_range_ps(A, B, C) \
1948 ((__m128) __builtin_ia32_rangeps128_mask ((__v4sf)(__m128)(A), \
1949 (__v4sf)(__m128)(B), (int)(C), \
fd79b414 1950 (__v4sf)_mm_avx512_setzero_ps(), (__mmask8)-1))
936c0fe4
AI		 1951
1952#define _mm_mask_range_ps(W, U, A, B, C) \
1953 ((__m128) __builtin_ia32_rangeps128_mask ((__v4sf)(__m128)(A), \
1954 (__v4sf)(__m128)(B), (int)(C), \
1955 (__v4sf)(__m128)(W), (__mmask8)(U)))
1956
1957#define _mm_maskz_range_ps(U, A, B, C) \
1958 ((__m128) __builtin_ia32_rangeps128_mask ((__v4sf)(__m128)(A), \
1959 (__v4sf)(__m128)(B), (int)(C), \
fd79b414 1960 (__v4sf)_mm_avx512_setzero_ps(), (__mmask8)(U)))
936c0fe4
AI		 1961
1962#define _mm256_mask_range_pd(W, U, A, B, C) \
1963 ((__m256d) __builtin_ia32_rangepd256_mask ((__v4df)(__m256d)(A), \
1964 (__v4df)(__m256d)(B), (int)(C), \
1965 (__v4df)(__m256d)(W), (__mmask8)(U)))
1966
1967#define _mm_mask_range_pd(W, U, A, B, C) \
1968 ((__m128d) __builtin_ia32_rangepd128_mask ((__v2df)(__m128d)(A), \
1969 (__v2df)(__m128d)(B), (int)(C), \
1970 (__v2df)(__m128d)(W), (__mmask8)(U)))
1971
1972#define _mm_maskz_range_pd(U, A, B, C) \
1973 ((__m128d) __builtin_ia32_rangepd128_mask ((__v2df)(__m128d)(A), \
1974 (__v2df)(__m128d)(B), (int)(C), \
fd79b414 1975 (__v2df)_mm_avx512_setzero_pd(), (__mmask8)(U)))
936c0fe4
AI		 1976
1977#define _mm256_mask_fpclass_pd_mask(u, X, C) \
1978 ((__mmask8) __builtin_ia32_fpclasspd256_mask ((__v4df) (__m256d) (X), \
1979 (int) (C),(__mmask8)(u)))
1980
1981#define _mm256_mask_fpclass_ps_mask(u, X, C) \
1982 ((__mmask8) __builtin_ia32_fpclassps256_mask ((__v8sf) (__m256) (X), \
1983 (int) (C),(__mmask8)(u)))
1984
1985#define _mm_mask_fpclass_pd_mask(u, X, C) \
1986 ((__mmask8) __builtin_ia32_fpclasspd128_mask ((__v2df) (__m128d) (X), \
1987 (int) (C),(__mmask8)(u)))
1988
1989#define _mm_mask_fpclass_ps_mask(u, X, C) \
1990 ((__mmask8) __builtin_ia32_fpclassps128_mask ((__v4sf) (__m128) (X), \
1991 (int) (C),(__mmask8)(u)))
1992
1993#define _mm256_fpclass_pd_mask(X, C) \
1994 ((__mmask8) __builtin_ia32_fpclasspd256_mask ((__v4df) (__m256d) (X), \
1995 (int) (C),(__mmask8)-1))
1996
1997#define _mm256_fpclass_ps_mask(X, C) \
1998 ((__mmask8) __builtin_ia32_fpclassps256_mask ((__v8sf) (__m256) (X), \
1999 (int) (C),(__mmask8)-1))
2000
2001#define _mm_fpclass_pd_mask(X, C) \
2002 ((__mmask8) __builtin_ia32_fpclasspd128_mask ((__v2df) (__m128d) (X), \
2003 (int) (C),(__mmask8)-1))
2004
2005#define _mm_fpclass_ps_mask(X, C) \
2006 ((__mmask8) __builtin_ia32_fpclassps128_mask ((__v4sf) (__m128) (X), \
2007 (int) (C),(__mmask8)-1))
2008
2009#endif
2010
cfb1dde5
HJ		 2011#ifdef __DISABLE_AVX512VLDQ__
2012#undef __DISABLE_AVX512VLDQ__
2013#pragma GCC pop_options
2014#endif /* __DISABLE_AVX512VLDQ__ */
2015
936c0fe4 2016#endif /* _AVX512VLDQINTRIN_H_INCLUDED */
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