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7adcbafe 1/* Copyright (C) 1988-2022 Free Software Foundation, Inc.
2bf6d935
ML		 2
3This file is part of GCC.
4
5GCC is free software; you can redistribute it and/or modify
6it under the terms of the GNU General Public License as published by
7the Free Software Foundation; either version 3, or (at your option)
8any later version.
9
10GCC is distributed in the hope that it will be useful,
11but WITHOUT ANY WARRANTY; without even the implied warranty of
12MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13GNU General Public License for more details.
14
15You should have received a copy of the GNU General Public License
16along with GCC; see the file COPYING3. If not see
17<http://www.gnu.org/licenses/>. */
18
19#define IN_TARGET_CODE 1
20
21#include "config.h"
22#include "system.h"
23#include "coretypes.h"
24#include "backend.h"
25#include "rtl.h"
26#include "tree.h"
27#include "memmodel.h"
28#include "gimple.h"
29#include "cfghooks.h"
30#include "cfgloop.h"
31#include "df.h"
32#include "tm_p.h"
33#include "stringpool.h"
34#include "expmed.h"
35#include "optabs.h"
36#include "regs.h"
37#include "emit-rtl.h"
38#include "recog.h"
39#include "cgraph.h"
40#include "diagnostic.h"
41#include "cfgbuild.h"
42#include "alias.h"
43#include "fold-const.h"
44#include "attribs.h"
45#include "calls.h"
46#include "stor-layout.h"
47#include "varasm.h"
48#include "output.h"
49#include "insn-attr.h"
50#include "flags.h"
51#include "except.h"
52#include "explow.h"
53#include "expr.h"
54#include "cfgrtl.h"
55#include "common/common-target.h"
56#include "langhooks.h"
57#include "reload.h"
58#include "gimplify.h"
59#include "dwarf2.h"
60#include "tm-constrs.h"
2bf6d935
ML		 61#include "cselib.h"
62#include "sched-int.h"
63#include "opts.h"
64#include "tree-pass.h"
65#include "context.h"
66#include "pass_manager.h"
67#include "target-globals.h"
68#include "gimple-iterator.h"
69#include "tree-vectorizer.h"
70#include "shrink-wrap.h"
71#include "builtins.h"
72#include "rtl-iter.h"
73#include "tree-iterator.h"
74#include "dbgcnt.h"
75#include "case-cfn-macros.h"
76#include "dojump.h"
77#include "fold-const-call.h"
78#include "tree-vrp.h"
79#include "tree-ssanames.h"
80#include "selftest.h"
81#include "selftest-rtl.h"
82#include "print-rtl.h"
83#include "intl.h"
84#include "ifcvt.h"
85#include "symbol-summary.h"
86#include "ipa-prop.h"
87#include "ipa-fnsummary.h"
88#include "wide-int-bitmask.h"
89#include "tree-vector-builder.h"
90#include "debug.h"
91#include "dwarf2out.h"
92#include "i386-builtins.h"
6c35d16a 93#include "common/config/i386/i386-isas.h"
2bf6d935
ML		 94
95#undef BDESC
96#undef BDESC_FIRST
97#undef BDESC_END
98
99/* Macros for verification of enum ix86_builtins order. */
100#define BDESC_VERIFY(x, y, z) \
101 gcc_checking_assert ((x) == (enum ix86_builtins) ((y) + (z)))
102#define BDESC_VERIFYS(x, y, z) \
103 STATIC_ASSERT ((x) == (enum ix86_builtins) ((y) + (z)))
104
105BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_FIRST,
106 IX86_BUILTIN__BDESC_COMI_LAST, 1);
107BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_FIRST,
108 IX86_BUILTIN__BDESC_PCMPESTR_LAST, 1);
109BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
110 IX86_BUILTIN__BDESC_PCMPISTR_LAST, 1);
fd5d5794 111BDESC_VERIFYS (IX86_BUILTIN__BDESC_PURE_ARGS_FIRST,
2bf6d935 112 IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST, 1);
fd5d5794
UB		 113BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_FIRST,
114 IX86_BUILTIN__BDESC_PURE_ARGS_LAST, 1);
2bf6d935
ML		 115BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST,
116 IX86_BUILTIN__BDESC_ARGS_LAST, 1);
117BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
118 IX86_BUILTIN__BDESC_ROUND_ARGS_LAST, 1);
119BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_FIRST,
120 IX86_BUILTIN__BDESC_MULTI_ARG_LAST, 1);
2bf6d935 121BDESC_VERIFYS (IX86_BUILTIN_MAX,
b5034abb 122 IX86_BUILTIN__BDESC_CET_LAST, 1);
2bf6d935
ML		 123
124
125/* Table for the ix86 builtin non-function types. */
126static GTY(()) tree ix86_builtin_type_tab[(int) IX86_BT_LAST_CPTR + 1];
127
a6841211 128tree ix86_float16_type_node = NULL_TREE;
2bf6d935
ML		 129/* Retrieve an element from the above table, building some of
130 the types lazily. */
131
132static tree
133ix86_get_builtin_type (enum ix86_builtin_type tcode)
134{
135 unsigned int index;
136 tree type, itype;
137
138 gcc_assert ((unsigned)tcode < ARRAY_SIZE(ix86_builtin_type_tab));
139
140 type = ix86_builtin_type_tab[(int) tcode];
141 if (type != NULL)
142 return type;
143
144 gcc_assert (tcode > IX86_BT_LAST_PRIM);
145 if (tcode <= IX86_BT_LAST_VECT)
146 {
147 machine_mode mode;
148
149 index = tcode - IX86_BT_LAST_PRIM - 1;
150 itype = ix86_get_builtin_type (ix86_builtin_type_vect_base[index]);
151 mode = ix86_builtin_type_vect_mode[index];
152
153 type = build_vector_type_for_mode (itype, mode);
154 }
155 else
156 {
157 int quals;
158
159 index = tcode - IX86_BT_LAST_VECT - 1;
160 if (tcode <= IX86_BT_LAST_PTR)
161 quals = TYPE_UNQUALIFIED;
162 else
163 quals = TYPE_QUAL_CONST;
164
165 itype = ix86_get_builtin_type (ix86_builtin_type_ptr_base[index]);
166 if (quals != TYPE_UNQUALIFIED)
167 itype = build_qualified_type (itype, quals);
168
169 type = build_pointer_type (itype);
170 }
171
172 ix86_builtin_type_tab[(int) tcode] = type;
173 return type;
174}
175
176/* Table for the ix86 builtin function types. */
177static GTY(()) tree ix86_builtin_func_type_tab[(int) IX86_BT_LAST_ALIAS + 1];
178
179/* Retrieve an element from the above table, building some of
180 the types lazily. */
181
182static tree
183ix86_get_builtin_func_type (enum ix86_builtin_func_type tcode)
184{
185 tree type;
186
187 gcc_assert ((unsigned)tcode < ARRAY_SIZE (ix86_builtin_func_type_tab));
188
189 type = ix86_builtin_func_type_tab[(int) tcode];
190 if (type != NULL)
191 return type;
192
193 if (tcode <= IX86_BT_LAST_FUNC)
194 {
195 unsigned start = ix86_builtin_func_start[(int) tcode];
196 unsigned after = ix86_builtin_func_start[(int) tcode + 1];
197 tree rtype, atype, args = void_list_node;
198 unsigned i;
199
200 rtype = ix86_get_builtin_type (ix86_builtin_func_args[start]);
201 for (i = after - 1; i > start; --i)
202 {
203 atype = ix86_get_builtin_type (ix86_builtin_func_args[i]);
204 args = tree_cons (NULL, atype, args);
205 }
206
207 type = build_function_type (rtype, args);
208 }
209 else
210 {
211 unsigned index = tcode - IX86_BT_LAST_FUNC - 1;
212 enum ix86_builtin_func_type icode;
213
214 icode = ix86_builtin_func_alias_base[index];
215 type = ix86_get_builtin_func_type (icode);
216 }
217
218 ix86_builtin_func_type_tab[(int) tcode] = type;
219 return type;
220}
221
222/* Table for the ix86 builtin decls. */
223static GTY(()) tree ix86_builtins[(int) IX86_BUILTIN_MAX];
224
225struct builtin_isa ix86_builtins_isa[(int) IX86_BUILTIN_MAX];
226
227tree get_ix86_builtin (enum ix86_builtins c)
228{
229 return ix86_builtins[c];
230}
231
232/* Bits that can still enable any inclusion of a builtin. */
233HOST_WIDE_INT deferred_isa_values = 0;
234HOST_WIDE_INT deferred_isa_values2 = 0;
235
236/* Add an ix86 target builtin function with CODE, NAME and TYPE. Save the
237 MASK and MASK2 of which isa_flags and ix86_isa_flags2 to use in the
238 ix86_builtins_isa array. Stores the function decl in the ix86_builtins
239 array. Returns the function decl or NULL_TREE, if the builtin was not
240 added.
241
242 If the front end has a special hook for builtin functions, delay adding
243 builtin functions that aren't in the current ISA until the ISA is changed
244 with function specific optimization. Doing so, can save about 300K for the
245 default compiler. When the builtin is expanded, check at that time whether
246 it is valid.
247
248 If the front end doesn't have a special hook, record all builtins, even if
249 it isn't an instruction set in the current ISA in case the user uses
250 function specific options for a different ISA, so that we don't get scope
251 errors if a builtin is added in the middle of a function scope. */
252
253static inline tree
254def_builtin (HOST_WIDE_INT mask, HOST_WIDE_INT mask2,
255 const char *name,
256 enum ix86_builtin_func_type tcode,
257 enum ix86_builtins code)
258{
259 tree decl = NULL_TREE;
260
261 /* An instruction may be 64bit only regardless of ISAs. */
262 if (!(mask & OPTION_MASK_ISA_64BIT) || TARGET_64BIT)
263 {
264 ix86_builtins_isa[(int) code].isa = mask;
265 ix86_builtins_isa[(int) code].isa2 = mask2;
266
267 mask &= ~OPTION_MASK_ISA_64BIT;
268
269 /* Filter out the masks most often ored together with others. */
270 if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512VL)
271 && mask != OPTION_MASK_ISA_AVX512VL)
272 mask &= ~OPTION_MASK_ISA_AVX512VL;
273 if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512BW)
274 && mask != OPTION_MASK_ISA_AVX512BW)
275 mask &= ~OPTION_MASK_ISA_AVX512BW;
276
277 if (((mask2 == 0 || (mask2 & ix86_isa_flags2) != 0)
278 && (mask == 0 || (mask & ix86_isa_flags) != 0))
a13d6ec8 279 || ((mask & OPTION_MASK_ISA_MMX) != 0 && TARGET_MMX_WITH_SSE)
ca813880 280 /* "Unified" builtin used by either AVXVNNI intrinsics or AVX512VNNIVL
281 non-mask intrinsics should be defined whenever avxvnni
282 or avx512vnni && avx512vl exist. */
283 || (mask2 == OPTION_MASK_ISA2_AVXVNNI)
2bf6d935
ML		 284 || (lang_hooks.builtin_function
285 == lang_hooks.builtin_function_ext_scope))
286 {
287 tree type = ix86_get_builtin_func_type (tcode);
288 decl = add_builtin_function (name, type, code, BUILT_IN_MD,
289 NULL, NULL_TREE);
290 ix86_builtins[(int) code] = decl;
291 ix86_builtins_isa[(int) code].set_and_not_built_p = false;
292 }
293 else
294 {
295 /* Just MASK and MASK2 where set_and_not_built_p == true can potentially
296 include a builtin. */
297 deferred_isa_values |= mask;
298 deferred_isa_values2 |= mask2;
299 ix86_builtins[(int) code] = NULL_TREE;
300 ix86_builtins_isa[(int) code].tcode = tcode;
301 ix86_builtins_isa[(int) code].name = name;
302 ix86_builtins_isa[(int) code].const_p = false;
303 ix86_builtins_isa[(int) code].pure_p = false;
304 ix86_builtins_isa[(int) code].set_and_not_built_p = true;
305 }
306 }
307
308 return decl;
309}
310
311/* Like def_builtin, but also marks the function decl "const". */
312
313static inline tree
314def_builtin_const (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name,
315 enum ix86_builtin_func_type tcode, enum ix86_builtins code)
316{
317 tree decl = def_builtin (mask, mask2, name, tcode, code);
318 if (decl)
319 TREE_READONLY (decl) = 1;
320 else
321 ix86_builtins_isa[(int) code].const_p = true;
322
323 return decl;
324}
325
326/* Like def_builtin, but also marks the function decl "pure". */
327
328static inline tree
329def_builtin_pure (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name,
330 enum ix86_builtin_func_type tcode, enum ix86_builtins code)
331{
332 tree decl = def_builtin (mask, mask2, name, tcode, code);
333 if (decl)
334 DECL_PURE_P (decl) = 1;
335 else
336 ix86_builtins_isa[(int) code].pure_p = true;
337
338 return decl;
339}
340
341/* Add any new builtin functions for a given ISA that may not have been
342 declared. This saves a bit of space compared to adding all of the
343 declarations to the tree, even if we didn't use them. */
344
345void
346ix86_add_new_builtins (HOST_WIDE_INT isa, HOST_WIDE_INT isa2)
347{
348 isa &= ~OPTION_MASK_ISA_64BIT;
349
350 if ((isa & deferred_isa_values) == 0
a13d6ec8
JJ		 351 && (isa2 & deferred_isa_values2) == 0
352 && ((deferred_isa_values & OPTION_MASK_ISA_MMX) == 0
353 || !(TARGET_64BIT && (isa & OPTION_MASK_ISA_SSE2) != 0)))
2bf6d935
ML		 354 return;
355
356 /* Bits in ISA value can be removed from potential isa values. */
357 deferred_isa_values &= ~isa;
358 deferred_isa_values2 &= ~isa2;
a13d6ec8
JJ		 359 if (TARGET_64BIT && (isa & OPTION_MASK_ISA_SSE2) != 0)
360 deferred_isa_values &= ~OPTION_MASK_ISA_MMX;
2bf6d935
ML		 361
362 int i;
363 tree saved_current_target_pragma = current_target_pragma;
364 current_target_pragma = NULL_TREE;
365
366 for (i = 0; i < (int)IX86_BUILTIN_MAX; i++)
367 {
368 if (((ix86_builtins_isa[i].isa & isa) != 0
a13d6ec8
JJ		 369 || (ix86_builtins_isa[i].isa2 & isa2) != 0
370 || ((ix86_builtins_isa[i].isa & OPTION_MASK_ISA_MMX) != 0
371 && TARGET_64BIT
372 && (isa & OPTION_MASK_ISA_SSE2) != 0))
2bf6d935
ML		 373 && ix86_builtins_isa[i].set_and_not_built_p)
374 {
375 tree decl, type;
376
377 /* Don't define the builtin again. */
378 ix86_builtins_isa[i].set_and_not_built_p = false;
379
380 type = ix86_get_builtin_func_type (ix86_builtins_isa[i].tcode);
381 decl = add_builtin_function_ext_scope (ix86_builtins_isa[i].name,
382 type, i, BUILT_IN_MD, NULL,
383 NULL_TREE);
384
385 ix86_builtins[i] = decl;
386 if (ix86_builtins_isa[i].const_p)
387 TREE_READONLY (decl) = 1;
388 }
389 }
390
391 current_target_pragma = saved_current_target_pragma;
392}
393\f
394/* TM vector builtins. */
395
396/* Reuse the existing x86-specific `struct builtin_description' cause
397 we're lazy. Add casts to make them fit. */
398static const struct builtin_description bdesc_tm[] =
399{
a13d6ec8
JJ		 400 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_WM64", (enum ix86_builtins) BUILT_IN_TM_STORE_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI },
401 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM64", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI },
402 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM64", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI },
403 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
404 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
405 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
406 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
2bf6d935
ML		 407
408 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WM128", (enum ix86_builtins) BUILT_IN_TM_STORE_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF },
409 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM128", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF },
410 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM128", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF },
411 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
412 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
413 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
414 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
415
416 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WM256", (enum ix86_builtins) BUILT_IN_TM_STORE_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF },
417 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM256", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF },
418 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM256", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF },
419 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
420 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
421 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
422 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
423
a13d6ec8 424 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_LM64", (enum ix86_builtins) BUILT_IN_TM_LOG_M64, UNKNOWN, VOID_FTYPE_PCVOID },
2bf6d935
ML		 425 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_LM128", (enum ix86_builtins) BUILT_IN_TM_LOG_M128, UNKNOWN, VOID_FTYPE_PCVOID },
426 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_LM256", (enum ix86_builtins) BUILT_IN_TM_LOG_M256, UNKNOWN, VOID_FTYPE_PCVOID },
427};
428
429/* Initialize the transactional memory vector load/store builtins. */
430
431static void
432ix86_init_tm_builtins (void)
433{
434 enum ix86_builtin_func_type ftype;
435 const struct builtin_description *d;
436 size_t i;
437 tree decl;
438 tree attrs_load, attrs_type_load, attrs_store, attrs_type_store;
439 tree attrs_log, attrs_type_log;
440
441 if (!flag_tm)
442 return;
443
444 /* If there are no builtins defined, we must be compiling in a
445 language without trans-mem support. */
446 if (!builtin_decl_explicit_p (BUILT_IN_TM_LOAD_1))
447 return;
448
449 /* Use whatever attributes a normal TM load has. */
450 decl = builtin_decl_explicit (BUILT_IN_TM_LOAD_1);
451 attrs_load = DECL_ATTRIBUTES (decl);
452 attrs_type_load = TYPE_ATTRIBUTES (TREE_TYPE (decl));
453 /* Use whatever attributes a normal TM store has. */
454 decl = builtin_decl_explicit (BUILT_IN_TM_STORE_1);
455 attrs_store = DECL_ATTRIBUTES (decl);
456 attrs_type_store = TYPE_ATTRIBUTES (TREE_TYPE (decl));
457 /* Use whatever attributes a normal TM log has. */
458 decl = builtin_decl_explicit (BUILT_IN_TM_LOG);
459 attrs_log = DECL_ATTRIBUTES (decl);
460 attrs_type_log = TYPE_ATTRIBUTES (TREE_TYPE (decl));
461
462 for (i = 0, d = bdesc_tm;
463 i < ARRAY_SIZE (bdesc_tm);
464 i++, d++)
465 {
466 if ((d->mask & ix86_isa_flags) != 0
a13d6ec8 467 || ((d->mask & OPTION_MASK_ISA_MMX) != 0 && TARGET_MMX_WITH_SSE)
2bf6d935
ML		 468 || (lang_hooks.builtin_function
469 == lang_hooks.builtin_function_ext_scope))
470 {
471 tree type, attrs, attrs_type;
472 enum built_in_function code = (enum built_in_function) d->code;
473
474 ftype = (enum ix86_builtin_func_type) d->flag;
475 type = ix86_get_builtin_func_type (ftype);
476
477 if (BUILTIN_TM_LOAD_P (code))
478 {
479 attrs = attrs_load;
480 attrs_type = attrs_type_load;
481 }
482 else if (BUILTIN_TM_STORE_P (code))
483 {
484 attrs = attrs_store;
485 attrs_type = attrs_type_store;
486 }
487 else
488 {
489 attrs = attrs_log;
490 attrs_type = attrs_type_log;
491 }
492 decl = add_builtin_function (d->name, type, code, BUILT_IN_NORMAL,
493 /* The builtin without the prefix for
494 calling it directly. */
495 d->name + strlen ("__builtin_"),
496 attrs);
497 /* add_builtin_function() will set the DECL_ATTRIBUTES, now
498 set the TYPE_ATTRIBUTES. */
499 decl_attributes (&TREE_TYPE (decl), attrs_type, ATTR_FLAG_BUILT_IN);
500
501 set_builtin_decl (code, decl, false);
502 }
503 }
504}
505
506/* Set up all the MMX/SSE builtins, even builtins for instructions that are not
507 in the current target ISA to allow the user to compile particular modules
508 with different target specific options that differ from the command line
509 options. */
510static void
511ix86_init_mmx_sse_builtins (void)
512{
513 const struct builtin_description * d;
514 enum ix86_builtin_func_type ftype;
515 size_t i;
516
517 /* Add all special builtins with variable number of operands. */
518 for (i = 0, d = bdesc_special_args;
519 i < ARRAY_SIZE (bdesc_special_args);
520 i++, d++)
521 {
522 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST, i);
523 if (d->name == 0)
524 continue;
525
526 ftype = (enum ix86_builtin_func_type) d->flag;
527 def_builtin (d->mask, d->mask2, d->name, ftype, d->code);
528 }
529 BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST,
530 IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
531 ARRAY_SIZE (bdesc_special_args) - 1);
532
fd5d5794
UB		 533 /* Add all pure builtins with variable number of operands. */
534 for (i = 0, d = bdesc_pure_args;
535 i < ARRAY_SIZE (bdesc_pure_args);
536 i++, d++)
537 {
538 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PURE_ARGS_FIRST, i);
539 if (d->name == 0)
540 continue;
541
542 ftype = (enum ix86_builtin_func_type) d->flag;
543 def_builtin_pure (d->mask, d->mask2, d->name, ftype, d->code);
544 }
545 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PURE_ARGS_LAST,
546 IX86_BUILTIN__BDESC_PURE_ARGS_FIRST,
547 ARRAY_SIZE (bdesc_pure_args) - 1);
548
549 /* Add all const builtins with variable number of operands. */
2bf6d935
ML		 550 for (i = 0, d = bdesc_args;
551 i < ARRAY_SIZE (bdesc_args);
552 i++, d++)
553 {
554 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ARGS_FIRST, i);
555 if (d->name == 0)
556 continue;
557
558 ftype = (enum ix86_builtin_func_type) d->flag;
559 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
560 }
561 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_LAST,
562 IX86_BUILTIN__BDESC_ARGS_FIRST,
563 ARRAY_SIZE (bdesc_args) - 1);
564
565 /* Add all builtins with rounding. */
566 for (i = 0, d = bdesc_round_args;
567 i < ARRAY_SIZE (bdesc_round_args);
568 i++, d++)
569 {
570 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST, i);
571 if (d->name == 0)
572 continue;
573
574 ftype = (enum ix86_builtin_func_type) d->flag;
575 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
576 }
577 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_LAST,
578 IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST,
579 ARRAY_SIZE (bdesc_round_args) - 1);
580
581 /* pcmpestr[im] insns. */
582 for (i = 0, d = bdesc_pcmpestr;
583 i < ARRAY_SIZE (bdesc_pcmpestr);
584 i++, d++)
585 {
586 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPESTR_FIRST, i);
587 if (d->code == IX86_BUILTIN_PCMPESTRM128)
588 ftype = V16QI_FTYPE_V16QI_INT_V16QI_INT_INT;
589 else
590 ftype = INT_FTYPE_V16QI_INT_V16QI_INT_INT;
591 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
592 }
593 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_LAST,
594 IX86_BUILTIN__BDESC_PCMPESTR_FIRST,
595 ARRAY_SIZE (bdesc_pcmpestr) - 1);
596
597 /* pcmpistr[im] insns. */
598 for (i = 0, d = bdesc_pcmpistr;
599 i < ARRAY_SIZE (bdesc_pcmpistr);
600 i++, d++)
601 {
602 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPISTR_FIRST, i);
603 if (d->code == IX86_BUILTIN_PCMPISTRM128)
604 ftype = V16QI_FTYPE_V16QI_V16QI_INT;
605 else
606 ftype = INT_FTYPE_V16QI_V16QI_INT;
607 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
608 }
609 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_LAST,
610 IX86_BUILTIN__BDESC_PCMPISTR_FIRST,
611 ARRAY_SIZE (bdesc_pcmpistr) - 1);
612
613 /* comi/ucomi insns. */
614 for (i = 0, d = bdesc_comi; i < ARRAY_SIZE (bdesc_comi); i++, d++)
615 {
616 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_COMI_FIRST, i);
617 if (d->mask == OPTION_MASK_ISA_SSE2)
618 ftype = INT_FTYPE_V2DF_V2DF;
619 else
620 ftype = INT_FTYPE_V4SF_V4SF;
621 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
622 }
623 BDESC_VERIFYS (IX86_BUILTIN__BDESC_COMI_LAST,
624 IX86_BUILTIN__BDESC_COMI_FIRST,
625 ARRAY_SIZE (bdesc_comi) - 1);
626
627 /* SSE */
628 def_builtin (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_ldmxcsr",
629 VOID_FTYPE_UNSIGNED, IX86_BUILTIN_LDMXCSR);
630 def_builtin_pure (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_stmxcsr",
631 UNSIGNED_FTYPE_VOID, IX86_BUILTIN_STMXCSR);
632
633 /* SSE or 3DNow!A */
634 def_builtin (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
635 /* As it uses V4HImode, we have to require -mmmx too. */
636 | OPTION_MASK_ISA_MMX, 0,
637 "__builtin_ia32_maskmovq", VOID_FTYPE_V8QI_V8QI_PCHAR,
638 IX86_BUILTIN_MASKMOVQ);
639
640 /* SSE2 */
641 def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_maskmovdqu",
642 VOID_FTYPE_V16QI_V16QI_PCHAR, IX86_BUILTIN_MASKMOVDQU);
643
644 def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_clflush",
645 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLFLUSH);
646 x86_mfence = def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_mfence",
647 VOID_FTYPE_VOID, IX86_BUILTIN_MFENCE);
648
649 /* SSE3. */
d8c6cc2c 650 def_builtin (0, OPTION_MASK_ISA2_MWAIT, "__builtin_ia32_monitor",
2bf6d935 651 VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, IX86_BUILTIN_MONITOR);
d8c6cc2c 652 def_builtin (0, OPTION_MASK_ISA2_MWAIT, "__builtin_ia32_mwait",
2bf6d935
ML		 653 VOID_FTYPE_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAIT);
654
655 /* AES */
656 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
657 "__builtin_ia32_aesenc128",
658 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESENC128);
659 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
660 "__builtin_ia32_aesenclast128",
661 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESENCLAST128);
662 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
663 "__builtin_ia32_aesdec128",
664 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESDEC128);
665 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
666 "__builtin_ia32_aesdeclast128",
667 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESDECLAST128);
668 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
669 "__builtin_ia32_aesimc128",
670 V2DI_FTYPE_V2DI, IX86_BUILTIN_AESIMC128);
671 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
672 "__builtin_ia32_aeskeygenassist128",
673 V2DI_FTYPE_V2DI_INT, IX86_BUILTIN_AESKEYGENASSIST128);
674
675 /* PCLMUL */
676 def_builtin_const (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2, 0,
677 "__builtin_ia32_pclmulqdq128",
678 V2DI_FTYPE_V2DI_V2DI_INT, IX86_BUILTIN_PCLMULQDQ128);
679
680 /* RDRND */
681 def_builtin (OPTION_MASK_ISA_RDRND, 0, "__builtin_ia32_rdrand16_step",
682 INT_FTYPE_PUSHORT, IX86_BUILTIN_RDRAND16_STEP);
683 def_builtin (OPTION_MASK_ISA_RDRND, 0, "__builtin_ia32_rdrand32_step",
684 INT_FTYPE_PUNSIGNED, IX86_BUILTIN_RDRAND32_STEP);
685 def_builtin (OPTION_MASK_ISA_RDRND | OPTION_MASK_ISA_64BIT, 0,
686 "__builtin_ia32_rdrand64_step", INT_FTYPE_PULONGLONG,
687 IX86_BUILTIN_RDRAND64_STEP);
688
689 /* AVX2 */
690 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv2df",
691 V2DF_FTYPE_V2DF_PCDOUBLE_V4SI_V2DF_INT,
692 IX86_BUILTIN_GATHERSIV2DF);
693
694 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4df",
695 V4DF_FTYPE_V4DF_PCDOUBLE_V4SI_V4DF_INT,
696 IX86_BUILTIN_GATHERSIV4DF);
697
698 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv2df",
699 V2DF_FTYPE_V2DF_PCDOUBLE_V2DI_V2DF_INT,
700 IX86_BUILTIN_GATHERDIV2DF);
701
702 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4df",
703 V4DF_FTYPE_V4DF_PCDOUBLE_V4DI_V4DF_INT,
704 IX86_BUILTIN_GATHERDIV4DF);
705
706 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4sf",
707 V4SF_FTYPE_V4SF_PCFLOAT_V4SI_V4SF_INT,
708 IX86_BUILTIN_GATHERSIV4SF);
709
710 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv8sf",
711 V8SF_FTYPE_V8SF_PCFLOAT_V8SI_V8SF_INT,
712 IX86_BUILTIN_GATHERSIV8SF);
713
714 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4sf",
715 V4SF_FTYPE_V4SF_PCFLOAT_V2DI_V4SF_INT,
716 IX86_BUILTIN_GATHERDIV4SF);
717
718 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4sf256",
719 V4SF_FTYPE_V4SF_PCFLOAT_V4DI_V4SF_INT,
720 IX86_BUILTIN_GATHERDIV8SF);
721
722 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv2di",
723 V2DI_FTYPE_V2DI_PCINT64_V4SI_V2DI_INT,
724 IX86_BUILTIN_GATHERSIV2DI);
725
726 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4di",
727 V4DI_FTYPE_V4DI_PCINT64_V4SI_V4DI_INT,
728 IX86_BUILTIN_GATHERSIV4DI);
729
730 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv2di",
731 V2DI_FTYPE_V2DI_PCINT64_V2DI_V2DI_INT,
732 IX86_BUILTIN_GATHERDIV2DI);
733
734 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4di",
735 V4DI_FTYPE_V4DI_PCINT64_V4DI_V4DI_INT,
736 IX86_BUILTIN_GATHERDIV4DI);
737
738 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4si",
739 V4SI_FTYPE_V4SI_PCINT_V4SI_V4SI_INT,
740 IX86_BUILTIN_GATHERSIV4SI);
741
742 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv8si",
743 V8SI_FTYPE_V8SI_PCINT_V8SI_V8SI_INT,
744 IX86_BUILTIN_GATHERSIV8SI);
745
746 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4si",
747 V4SI_FTYPE_V4SI_PCINT_V2DI_V4SI_INT,
748 IX86_BUILTIN_GATHERDIV4SI);
749
750 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4si256",
751 V4SI_FTYPE_V4SI_PCINT_V4DI_V4SI_INT,
752 IX86_BUILTIN_GATHERDIV8SI);
753
754 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltsiv4df ",
755 V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_V4DF_INT,
756 IX86_BUILTIN_GATHERALTSIV4DF);
757
758 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltdiv8sf ",
759 V8SF_FTYPE_V8SF_PCFLOAT_V4DI_V8SF_INT,
760 IX86_BUILTIN_GATHERALTDIV8SF);
761
762 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltsiv4di ",
763 V4DI_FTYPE_V4DI_PCINT64_V8SI_V4DI_INT,
764 IX86_BUILTIN_GATHERALTSIV4DI);
765
766 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltdiv8si ",
767 V8SI_FTYPE_V8SI_PCINT_V4DI_V8SI_INT,
768 IX86_BUILTIN_GATHERALTDIV8SI);
769
770 /* AVX512F */
771 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv16sf",
772 V16SF_FTYPE_V16SF_PCVOID_V16SI_HI_INT,
773 IX86_BUILTIN_GATHER3SIV16SF);
774
775 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv8df",
776 V8DF_FTYPE_V8DF_PCVOID_V8SI_QI_INT,
777 IX86_BUILTIN_GATHER3SIV8DF);
778
779 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv16sf",
780 V8SF_FTYPE_V8SF_PCVOID_V8DI_QI_INT,
781 IX86_BUILTIN_GATHER3DIV16SF);
782
783 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv8df",
784 V8DF_FTYPE_V8DF_PCVOID_V8DI_QI_INT,
785 IX86_BUILTIN_GATHER3DIV8DF);
786
787 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv16si",
788 V16SI_FTYPE_V16SI_PCVOID_V16SI_HI_INT,
789 IX86_BUILTIN_GATHER3SIV16SI);
790
791 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv8di",
792 V8DI_FTYPE_V8DI_PCVOID_V8SI_QI_INT,
793 IX86_BUILTIN_GATHER3SIV8DI);
794
795 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv16si",
796 V8SI_FTYPE_V8SI_PCVOID_V8DI_QI_INT,
797 IX86_BUILTIN_GATHER3DIV16SI);
798
799 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv8di",
800 V8DI_FTYPE_V8DI_PCVOID_V8DI_QI_INT,
801 IX86_BUILTIN_GATHER3DIV8DI);
802
803 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altsiv8df ",
804 V8DF_FTYPE_V8DF_PCDOUBLE_V16SI_QI_INT,
805 IX86_BUILTIN_GATHER3ALTSIV8DF);
806
807 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altdiv16sf ",
808 V16SF_FTYPE_V16SF_PCFLOAT_V8DI_HI_INT,
809 IX86_BUILTIN_GATHER3ALTDIV16SF);
810
811 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altsiv8di ",
812 V8DI_FTYPE_V8DI_PCINT64_V16SI_QI_INT,
813 IX86_BUILTIN_GATHER3ALTSIV8DI);
814
815 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altdiv16si ",
816 V16SI_FTYPE_V16SI_PCINT_V8DI_HI_INT,
817 IX86_BUILTIN_GATHER3ALTDIV16SI);
818
819 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv16sf",
820 VOID_FTYPE_PVOID_HI_V16SI_V16SF_INT,
821 IX86_BUILTIN_SCATTERSIV16SF);
822
823 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv8df",
824 VOID_FTYPE_PVOID_QI_V8SI_V8DF_INT,
825 IX86_BUILTIN_SCATTERSIV8DF);
826
827 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv16sf",
828 VOID_FTYPE_PVOID_QI_V8DI_V8SF_INT,
829 IX86_BUILTIN_SCATTERDIV16SF);
830
831 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv8df",
832 VOID_FTYPE_PVOID_QI_V8DI_V8DF_INT,
833 IX86_BUILTIN_SCATTERDIV8DF);
834
835 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv16si",
836 VOID_FTYPE_PVOID_HI_V16SI_V16SI_INT,
837 IX86_BUILTIN_SCATTERSIV16SI);
838
839 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv8di",
840 VOID_FTYPE_PVOID_QI_V8SI_V8DI_INT,
841 IX86_BUILTIN_SCATTERSIV8DI);
842
843 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv16si",
844 VOID_FTYPE_PVOID_QI_V8DI_V8SI_INT,
845 IX86_BUILTIN_SCATTERDIV16SI);
846
847 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv8di",
848 VOID_FTYPE_PVOID_QI_V8DI_V8DI_INT,
849 IX86_BUILTIN_SCATTERDIV8DI);
850
851 /* AVX512VL */
852 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv2df",
853 V2DF_FTYPE_V2DF_PCVOID_V4SI_QI_INT,
854 IX86_BUILTIN_GATHER3SIV2DF);
855
856 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4df",
857 V4DF_FTYPE_V4DF_PCVOID_V4SI_QI_INT,
858 IX86_BUILTIN_GATHER3SIV4DF);
859
860 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div2df",
861 V2DF_FTYPE_V2DF_PCVOID_V2DI_QI_INT,
862 IX86_BUILTIN_GATHER3DIV2DF);
863
864 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4df",
865 V4DF_FTYPE_V4DF_PCVOID_V4DI_QI_INT,
866 IX86_BUILTIN_GATHER3DIV4DF);
867
868 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4sf",
869 V4SF_FTYPE_V4SF_PCVOID_V4SI_QI_INT,
870 IX86_BUILTIN_GATHER3SIV4SF);
871
872 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv8sf",
873 V8SF_FTYPE_V8SF_PCVOID_V8SI_QI_INT,
874 IX86_BUILTIN_GATHER3SIV8SF);
875
876 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4sf",
877 V4SF_FTYPE_V4SF_PCVOID_V2DI_QI_INT,
878 IX86_BUILTIN_GATHER3DIV4SF);
879
880 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div8sf",
881 V4SF_FTYPE_V4SF_PCVOID_V4DI_QI_INT,
882 IX86_BUILTIN_GATHER3DIV8SF);
883
884 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv2di",
885 V2DI_FTYPE_V2DI_PCVOID_V4SI_QI_INT,
886 IX86_BUILTIN_GATHER3SIV2DI);
887
888 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4di",
889 V4DI_FTYPE_V4DI_PCVOID_V4SI_QI_INT,
890 IX86_BUILTIN_GATHER3SIV4DI);
891
892 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div2di",
893 V2DI_FTYPE_V2DI_PCVOID_V2DI_QI_INT,
894 IX86_BUILTIN_GATHER3DIV2DI);
895
896 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4di",
897 V4DI_FTYPE_V4DI_PCVOID_V4DI_QI_INT,
898 IX86_BUILTIN_GATHER3DIV4DI);
899
900 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4si",
901 V4SI_FTYPE_V4SI_PCVOID_V4SI_QI_INT,
902 IX86_BUILTIN_GATHER3SIV4SI);
903
904 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv8si",
905 V8SI_FTYPE_V8SI_PCVOID_V8SI_QI_INT,
906 IX86_BUILTIN_GATHER3SIV8SI);
907
908 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4si",
909 V4SI_FTYPE_V4SI_PCVOID_V2DI_QI_INT,
910 IX86_BUILTIN_GATHER3DIV4SI);
911
912 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div8si",
913 V4SI_FTYPE_V4SI_PCVOID_V4DI_QI_INT,
914 IX86_BUILTIN_GATHER3DIV8SI);
915
916 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altsiv4df ",
917 V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_QI_INT,
918 IX86_BUILTIN_GATHER3ALTSIV4DF);
919
920 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altdiv8sf ",
921 V8SF_FTYPE_V8SF_PCFLOAT_V4DI_QI_INT,
922 IX86_BUILTIN_GATHER3ALTDIV8SF);
923
924 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altsiv4di ",
925 V4DI_FTYPE_V4DI_PCINT64_V8SI_QI_INT,
926 IX86_BUILTIN_GATHER3ALTSIV4DI);
927
928 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altdiv8si ",
929 V8SI_FTYPE_V8SI_PCINT_V4DI_QI_INT,
930 IX86_BUILTIN_GATHER3ALTDIV8SI);
931
932 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv8sf",
933 VOID_FTYPE_PVOID_QI_V8SI_V8SF_INT,
934 IX86_BUILTIN_SCATTERSIV8SF);
935
936 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4sf",
937 VOID_FTYPE_PVOID_QI_V4SI_V4SF_INT,
938 IX86_BUILTIN_SCATTERSIV4SF);
939
940 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4df",
941 VOID_FTYPE_PVOID_QI_V4SI_V4DF_INT,
942 IX86_BUILTIN_SCATTERSIV4DF);
943
944 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv2df",
945 VOID_FTYPE_PVOID_QI_V4SI_V2DF_INT,
946 IX86_BUILTIN_SCATTERSIV2DF);
947
948 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv8sf",
949 VOID_FTYPE_PVOID_QI_V4DI_V4SF_INT,
950 IX86_BUILTIN_SCATTERDIV8SF);
951
952 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4sf",
953 VOID_FTYPE_PVOID_QI_V2DI_V4SF_INT,
954 IX86_BUILTIN_SCATTERDIV4SF);
955
956 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4df",
957 VOID_FTYPE_PVOID_QI_V4DI_V4DF_INT,
958 IX86_BUILTIN_SCATTERDIV4DF);
959
960 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv2df",
961 VOID_FTYPE_PVOID_QI_V2DI_V2DF_INT,
962 IX86_BUILTIN_SCATTERDIV2DF);
963
964 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv8si",
965 VOID_FTYPE_PVOID_QI_V8SI_V8SI_INT,
966 IX86_BUILTIN_SCATTERSIV8SI);
967
968 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4si",
969 VOID_FTYPE_PVOID_QI_V4SI_V4SI_INT,
970 IX86_BUILTIN_SCATTERSIV4SI);
971
972 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4di",
973 VOID_FTYPE_PVOID_QI_V4SI_V4DI_INT,
974 IX86_BUILTIN_SCATTERSIV4DI);
975
976 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv2di",
977 VOID_FTYPE_PVOID_QI_V4SI_V2DI_INT,
978 IX86_BUILTIN_SCATTERSIV2DI);
979
980 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv8si",
981 VOID_FTYPE_PVOID_QI_V4DI_V4SI_INT,
982 IX86_BUILTIN_SCATTERDIV8SI);
983
984 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4si",
985 VOID_FTYPE_PVOID_QI_V2DI_V4SI_INT,
986 IX86_BUILTIN_SCATTERDIV4SI);
987
988 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4di",
989 VOID_FTYPE_PVOID_QI_V4DI_V4DI_INT,
990 IX86_BUILTIN_SCATTERDIV4DI);
991
992 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv2di",
993 VOID_FTYPE_PVOID_QI_V2DI_V2DI_INT,
994 IX86_BUILTIN_SCATTERDIV2DI);
995
996 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltsiv8df ",
997 VOID_FTYPE_PDOUBLE_QI_V16SI_V8DF_INT,
998 IX86_BUILTIN_SCATTERALTSIV8DF);
999
1000 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltdiv16sf ",
1001 VOID_FTYPE_PFLOAT_HI_V8DI_V16SF_INT,
1002 IX86_BUILTIN_SCATTERALTDIV16SF);
1003
1004 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltsiv8di ",
1005 VOID_FTYPE_PLONGLONG_QI_V16SI_V8DI_INT,
1006 IX86_BUILTIN_SCATTERALTSIV8DI);
1007
1008 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltdiv16si ",
1009 VOID_FTYPE_PINT_HI_V8DI_V16SI_INT,
1010 IX86_BUILTIN_SCATTERALTDIV16SI);
1011
1012 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv4df ",
1013 VOID_FTYPE_PDOUBLE_QI_V8SI_V4DF_INT,
1014 IX86_BUILTIN_SCATTERALTSIV4DF);
1015
1016 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv8sf ",
1017 VOID_FTYPE_PFLOAT_QI_V4DI_V8SF_INT,
1018 IX86_BUILTIN_SCATTERALTDIV8SF);
1019
1020 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv4di ",
1021 VOID_FTYPE_PLONGLONG_QI_V8SI_V4DI_INT,
1022 IX86_BUILTIN_SCATTERALTSIV4DI);
1023
1024 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv8si ",
1025 VOID_FTYPE_PINT_QI_V4DI_V8SI_INT,
1026 IX86_BUILTIN_SCATTERALTDIV8SI);
1027
1028 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv2df ",
1029 VOID_FTYPE_PDOUBLE_QI_V4SI_V2DF_INT,
1030 IX86_BUILTIN_SCATTERALTSIV2DF);
1031
1032 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv4sf ",
1033 VOID_FTYPE_PFLOAT_QI_V2DI_V4SF_INT,
1034 IX86_BUILTIN_SCATTERALTDIV4SF);
1035
1036 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv2di ",
1037 VOID_FTYPE_PLONGLONG_QI_V4SI_V2DI_INT,
1038 IX86_BUILTIN_SCATTERALTSIV2DI);
1039
1040 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv4si ",
1041 VOID_FTYPE_PINT_QI_V2DI_V4SI_INT,
1042 IX86_BUILTIN_SCATTERALTDIV4SI);
1043
1044 /* AVX512PF */
1045 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfdpd",
1046 VOID_FTYPE_QI_V8SI_PCVOID_INT_INT,
1047 IX86_BUILTIN_GATHERPFDPD);
1048 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfdps",
1049 VOID_FTYPE_HI_V16SI_PCVOID_INT_INT,
1050 IX86_BUILTIN_GATHERPFDPS);
1051 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfqpd",
1052 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1053 IX86_BUILTIN_GATHERPFQPD);
1054 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfqps",
1055 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1056 IX86_BUILTIN_GATHERPFQPS);
1057 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfdpd",
1058 VOID_FTYPE_QI_V8SI_PCVOID_INT_INT,
1059 IX86_BUILTIN_SCATTERPFDPD);
1060 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfdps",
1061 VOID_FTYPE_HI_V16SI_PCVOID_INT_INT,
1062 IX86_BUILTIN_SCATTERPFDPS);
1063 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfqpd",
1064 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1065 IX86_BUILTIN_SCATTERPFQPD);
1066 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfqps",
1067 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1068 IX86_BUILTIN_SCATTERPFQPS);
1069
1070 /* SHA */
1071 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1msg1",
1072 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1MSG1);
1073 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1msg2",
1074 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1MSG2);
1075 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1nexte",
1076 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1NEXTE);
1077 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1rnds4",
1078 V4SI_FTYPE_V4SI_V4SI_INT, IX86_BUILTIN_SHA1RNDS4);
1079 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256msg1",
1080 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA256MSG1);
1081 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256msg2",
1082 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA256MSG2);
1083 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256rnds2",
1084 V4SI_FTYPE_V4SI_V4SI_V4SI, IX86_BUILTIN_SHA256RNDS2);
1085
1086 /* RTM. */
1087 def_builtin (OPTION_MASK_ISA_RTM, 0, "__builtin_ia32_xabort",
1088 VOID_FTYPE_UNSIGNED, IX86_BUILTIN_XABORT);
1089
1090 /* MMX access to the vec_init patterns. */
a13d6ec8 1091 def_builtin_const (OPTION_MASK_ISA_MMX, 0,
ecfdb16c 1092 "__builtin_ia32_vec_init_v2si",
2bf6d935
ML		 1093 V2SI_FTYPE_INT_INT, IX86_BUILTIN_VEC_INIT_V2SI);
1094
a13d6ec8 1095 def_builtin_const (OPTION_MASK_ISA_MMX, 0,
ecfdb16c 1096 "__builtin_ia32_vec_init_v4hi",
2bf6d935
ML		 1097 V4HI_FTYPE_HI_HI_HI_HI,
1098 IX86_BUILTIN_VEC_INIT_V4HI);
1099
a13d6ec8 1100 def_builtin_const (OPTION_MASK_ISA_MMX, 0,
ecfdb16c 1101 "__builtin_ia32_vec_init_v8qi",
2bf6d935
ML		 1102 V8QI_FTYPE_QI_QI_QI_QI_QI_QI_QI_QI,
1103 IX86_BUILTIN_VEC_INIT_V8QI);
1104
1105 /* Access to the vec_extract patterns. */
1106 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v2df",
1107 DOUBLE_FTYPE_V2DF_INT, IX86_BUILTIN_VEC_EXT_V2DF);
1108 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v2di",
1109 DI_FTYPE_V2DI_INT, IX86_BUILTIN_VEC_EXT_V2DI);
1110 def_builtin_const (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_vec_ext_v4sf",
1111 FLOAT_FTYPE_V4SF_INT, IX86_BUILTIN_VEC_EXT_V4SF);
1112 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v4si",
1113 SI_FTYPE_V4SI_INT, IX86_BUILTIN_VEC_EXT_V4SI);
1114 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v8hi",
1115 HI_FTYPE_V8HI_INT, IX86_BUILTIN_VEC_EXT_V8HI);
1116
1117 def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
1118 /* As it uses V4HImode, we have to require -mmmx too. */
1119 | OPTION_MASK_ISA_MMX, 0,
1120 "__builtin_ia32_vec_ext_v4hi",
1121 HI_FTYPE_V4HI_INT, IX86_BUILTIN_VEC_EXT_V4HI);
1122
a13d6ec8 1123 def_builtin_const (OPTION_MASK_ISA_MMX, 0,
ecfdb16c 1124 "__builtin_ia32_vec_ext_v2si",
2bf6d935
ML		 1125 SI_FTYPE_V2SI_INT, IX86_BUILTIN_VEC_EXT_V2SI);
1126
1127 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v16qi",
1128 QI_FTYPE_V16QI_INT, IX86_BUILTIN_VEC_EXT_V16QI);
1129
1130 /* Access to the vec_set patterns. */
1131 def_builtin_const (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_64BIT, 0,
1132 "__builtin_ia32_vec_set_v2di",
1133 V2DI_FTYPE_V2DI_DI_INT, IX86_BUILTIN_VEC_SET_V2DI);
1134
1135 def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v4sf",
1136 V4SF_FTYPE_V4SF_FLOAT_INT, IX86_BUILTIN_VEC_SET_V4SF);
1137
1138 def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v4si",
1139 V4SI_FTYPE_V4SI_SI_INT, IX86_BUILTIN_VEC_SET_V4SI);
1140
1141 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_set_v8hi",
1142 V8HI_FTYPE_V8HI_HI_INT, IX86_BUILTIN_VEC_SET_V8HI);
1143
1144 def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
1145 /* As it uses V4HImode, we have to require -mmmx too. */
1146 | OPTION_MASK_ISA_MMX, 0,
1147 "__builtin_ia32_vec_set_v4hi",
1148 V4HI_FTYPE_V4HI_HI_INT, IX86_BUILTIN_VEC_SET_V4HI);
1149
1150 def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v16qi",
1151 V16QI_FTYPE_V16QI_QI_INT, IX86_BUILTIN_VEC_SET_V16QI);
1152
1153 /* RDSEED */
1154 def_builtin (OPTION_MASK_ISA_RDSEED, 0, "__builtin_ia32_rdseed_hi_step",
1155 INT_FTYPE_PUSHORT, IX86_BUILTIN_RDSEED16_STEP);
1156 def_builtin (OPTION_MASK_ISA_RDSEED, 0, "__builtin_ia32_rdseed_si_step",
1157 INT_FTYPE_PUNSIGNED, IX86_BUILTIN_RDSEED32_STEP);
1158 def_builtin (OPTION_MASK_ISA_RDSEED | OPTION_MASK_ISA_64BIT, 0,
1159 "__builtin_ia32_rdseed_di_step",
1160 INT_FTYPE_PULONGLONG, IX86_BUILTIN_RDSEED64_STEP);
1161
1162 /* ADCX */
1163 def_builtin (0, 0, "__builtin_ia32_addcarryx_u32",
1164 UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, IX86_BUILTIN_ADDCARRYX32);
1165 def_builtin (OPTION_MASK_ISA_64BIT, 0,
1166 "__builtin_ia32_addcarryx_u64",
1167 UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG,
1168 IX86_BUILTIN_ADDCARRYX64);
1169
1170 /* SBB */
1171 def_builtin (0, 0, "__builtin_ia32_sbb_u32",
1172 UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, IX86_BUILTIN_SBB32);
1173 def_builtin (OPTION_MASK_ISA_64BIT, 0,
1174 "__builtin_ia32_sbb_u64",
1175 UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG,
1176 IX86_BUILTIN_SBB64);
1177
1178 /* Read/write FLAGS. */
1179 if (TARGET_64BIT)
1180 {
1181 def_builtin (OPTION_MASK_ISA_64BIT, 0, "__builtin_ia32_readeflags_u64",
1182 UINT64_FTYPE_VOID, IX86_BUILTIN_READ_FLAGS);
1183 def_builtin (OPTION_MASK_ISA_64BIT, 0, "__builtin_ia32_writeeflags_u64",
1184 VOID_FTYPE_UINT64, IX86_BUILTIN_WRITE_FLAGS);
1185 }
1186 else
1187 {
1188 def_builtin (0, 0, "__builtin_ia32_readeflags_u32",
1189 UNSIGNED_FTYPE_VOID, IX86_BUILTIN_READ_FLAGS);
1190 def_builtin (0, 0, "__builtin_ia32_writeeflags_u32",
1191 VOID_FTYPE_UNSIGNED, IX86_BUILTIN_WRITE_FLAGS);
1192 }
1193
1194 /* CLFLUSHOPT. */
1195 def_builtin (OPTION_MASK_ISA_CLFLUSHOPT, 0, "__builtin_ia32_clflushopt",
1196 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLFLUSHOPT);
1197
1198 /* CLWB. */
1199 def_builtin (OPTION_MASK_ISA_CLWB, 0, "__builtin_ia32_clwb",
1200 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLWB);
1201
1202 /* MONITORX and MWAITX. */
8cf86e14 1203 def_builtin (0, OPTION_MASK_ISA2_MWAITX, "__builtin_ia32_monitorx",
2bf6d935 1204 VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, IX86_BUILTIN_MONITORX);
8cf86e14 1205 def_builtin (0, OPTION_MASK_ISA2_MWAITX, "__builtin_ia32_mwaitx",
2bf6d935
ML		 1206 VOID_FTYPE_UNSIGNED_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAITX);
1207
1208 /* CLZERO. */
8cf86e14 1209 def_builtin (0, OPTION_MASK_ISA2_CLZERO, "__builtin_ia32_clzero",
2bf6d935
ML		 1210 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLZERO);
1211
1212 /* WAITPKG. */
8cf86e14 1213 def_builtin (0, OPTION_MASK_ISA2_WAITPKG, "__builtin_ia32_umonitor",
2bf6d935 1214 VOID_FTYPE_PVOID, IX86_BUILTIN_UMONITOR);
8cf86e14 1215 def_builtin (0, OPTION_MASK_ISA2_WAITPKG, "__builtin_ia32_umwait",
2bf6d935 1216 UINT8_FTYPE_UNSIGNED_UINT64, IX86_BUILTIN_UMWAIT);
8cf86e14 1217 def_builtin (0, OPTION_MASK_ISA2_WAITPKG, "__builtin_ia32_tpause",
2bf6d935
ML		 1218 UINT8_FTYPE_UNSIGNED_UINT64, IX86_BUILTIN_TPAUSE);
1219
299a53d7 1220 /* UINTR. */
1221 def_builtin (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_UINTR,
1222 "__builtin_ia32_testui",
1223 UINT8_FTYPE_VOID, IX86_BUILTIN_TESTUI);
1224
2bf6d935 1225 /* CLDEMOTE. */
8cf86e14 1226 def_builtin (0, OPTION_MASK_ISA2_CLDEMOTE, "__builtin_ia32_cldemote",
2bf6d935
ML		 1227 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLDEMOTE);
1228
1229 /* Add FMA4 multi-arg argument instructions */
1230 for (i = 0, d = bdesc_multi_arg; i < ARRAY_SIZE (bdesc_multi_arg); i++, d++)
1231 {
1232 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_MULTI_ARG_FIRST, i);
1233 if (d->name == 0)
1234 continue;
1235
1236 ftype = (enum ix86_builtin_func_type) d->flag;
1237 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
1238 }
1239 BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_LAST,
1240 IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
1241 ARRAY_SIZE (bdesc_multi_arg) - 1);
1242
1243 /* Add CET inrinsics. */
1244 for (i = 0, d = bdesc_cet; i < ARRAY_SIZE (bdesc_cet); i++, d++)
1245 {
1246 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_CET_FIRST, i);
1247 if (d->name == 0)
1248 continue;
1249
1250 ftype = (enum ix86_builtin_func_type) d->flag;
1251 def_builtin (d->mask, d->mask2, d->name, ftype, d->code);
1252 }
1253 BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_LAST,
1254 IX86_BUILTIN__BDESC_CET_FIRST,
1255 ARRAY_SIZE (bdesc_cet) - 1);
2bf6d935
ML		 1256}
1257
1258#undef BDESC_VERIFY
1259#undef BDESC_VERIFYS
1260
1261/* Make builtins to detect cpu type and features supported. NAME is
1262 the builtin name, CODE is the builtin code, and FTYPE is the function
1263 type of the builtin. */
1264
1265static void
1266make_cpu_type_builtin (const char* name, int code,
1267 enum ix86_builtin_func_type ftype, bool is_const)
1268{
1269 tree decl;
1270 tree type;
1271
1272 type = ix86_get_builtin_func_type (ftype);
1273 decl = add_builtin_function (name, type, code, BUILT_IN_MD,
1274 NULL, NULL_TREE);
1275 gcc_assert (decl != NULL_TREE);
1276 ix86_builtins[(int) code] = decl;
1277 TREE_READONLY (decl) = is_const;
1278}
1279
1280/* Make builtins to get CPU type and features supported. The created
1281 builtins are :
1282
1283 __builtin_cpu_init (), to detect cpu type and features,
1284 __builtin_cpu_is ("<CPUNAME>"), to check if cpu is of type <CPUNAME>,
1285 __builtin_cpu_supports ("<FEATURE>"), to check if cpu supports <FEATURE>
1286 */
1287
1288static void
1289ix86_init_platform_type_builtins (void)
1290{
1291 make_cpu_type_builtin ("__builtin_cpu_init", IX86_BUILTIN_CPU_INIT,
1292 INT_FTYPE_VOID, false);
1293 make_cpu_type_builtin ("__builtin_cpu_is", IX86_BUILTIN_CPU_IS,
1294 INT_FTYPE_PCCHAR, true);
1295 make_cpu_type_builtin ("__builtin_cpu_supports", IX86_BUILTIN_CPU_SUPPORTS,
1296 INT_FTYPE_PCCHAR, true);
1297}
1298
1299/* Internal method for ix86_init_builtins. */
1300
1301static void
1302ix86_init_builtins_va_builtins_abi (void)
1303{
1304 tree ms_va_ref, sysv_va_ref;
1305 tree fnvoid_va_end_ms, fnvoid_va_end_sysv;
1306 tree fnvoid_va_start_ms, fnvoid_va_start_sysv;
1307 tree fnvoid_va_copy_ms, fnvoid_va_copy_sysv;
1308 tree fnattr_ms = NULL_TREE, fnattr_sysv = NULL_TREE;
1309
1310 if (!TARGET_64BIT)
1311 return;
1312 fnattr_ms = build_tree_list (get_identifier ("ms_abi"), NULL_TREE);
1313 fnattr_sysv = build_tree_list (get_identifier ("sysv_abi"), NULL_TREE);
1314 ms_va_ref = build_reference_type (ms_va_list_type_node);
1315 sysv_va_ref = build_pointer_type (TREE_TYPE (sysv_va_list_type_node));
1316
1317 fnvoid_va_end_ms = build_function_type_list (void_type_node, ms_va_ref,
1318 NULL_TREE);
1319 fnvoid_va_start_ms
1320 = build_varargs_function_type_list (void_type_node, ms_va_ref, NULL_TREE);
1321 fnvoid_va_end_sysv
1322 = build_function_type_list (void_type_node, sysv_va_ref, NULL_TREE);
1323 fnvoid_va_start_sysv
1324 = build_varargs_function_type_list (void_type_node, sysv_va_ref,
1325 NULL_TREE);
1326 fnvoid_va_copy_ms
1327 = build_function_type_list (void_type_node, ms_va_ref,
1328 ms_va_list_type_node, NULL_TREE);
1329 fnvoid_va_copy_sysv
1330 = build_function_type_list (void_type_node, sysv_va_ref,
1331 sysv_va_ref, NULL_TREE);
1332
1333 add_builtin_function ("__builtin_ms_va_start", fnvoid_va_start_ms,
1334 BUILT_IN_VA_START, BUILT_IN_NORMAL, NULL, fnattr_ms);
1335 add_builtin_function ("__builtin_ms_va_end", fnvoid_va_end_ms,
1336 BUILT_IN_VA_END, BUILT_IN_NORMAL, NULL, fnattr_ms);
1337 add_builtin_function ("__builtin_ms_va_copy", fnvoid_va_copy_ms,
1338 BUILT_IN_VA_COPY, BUILT_IN_NORMAL, NULL, fnattr_ms);
1339 add_builtin_function ("__builtin_sysv_va_start", fnvoid_va_start_sysv,
1340 BUILT_IN_VA_START, BUILT_IN_NORMAL, NULL, fnattr_sysv);
1341 add_builtin_function ("__builtin_sysv_va_end", fnvoid_va_end_sysv,
1342 BUILT_IN_VA_END, BUILT_IN_NORMAL, NULL, fnattr_sysv);
1343 add_builtin_function ("__builtin_sysv_va_copy", fnvoid_va_copy_sysv,
1344 BUILT_IN_VA_COPY, BUILT_IN_NORMAL, NULL, fnattr_sysv);
1345}
1346
a6841211
GX		 1347static void
1348ix86_register_float16_builtin_type (void)
1349{
1350 /* Provide the _Float16 type and float16_type_node if needed so that
1351 it can be used in AVX512FP16 intrinsics and builtins. */
1352 if (!float16_type_node)
1353 {
1354 ix86_float16_type_node = make_node (REAL_TYPE);
1355 TYPE_PRECISION (ix86_float16_type_node) = 16;
1356 SET_TYPE_MODE (ix86_float16_type_node, HFmode);
1357 layout_type (ix86_float16_type_node);
1358 }
1359 else
1360 ix86_float16_type_node = float16_type_node;
1361
1362 if (!maybe_get_identifier ("_Float16") && TARGET_SSE2)
1363 lang_hooks.types.register_builtin_type (ix86_float16_type_node,
1364 "_Float16");
1365}
1366
2bf6d935
ML		 1367static void
1368ix86_init_builtin_types (void)
1369{
1370 tree float80_type_node, const_string_type_node;
1371
1372 /* The __float80 type. */
1373 float80_type_node = long_double_type_node;
1374 if (TYPE_MODE (float80_type_node) != XFmode)
1375 {
1376 if (float64x_type_node != NULL_TREE
1377 && TYPE_MODE (float64x_type_node) == XFmode)
1378 float80_type_node = float64x_type_node;
1379 else
1380 {
1381 /* The __float80 type. */
1382 float80_type_node = make_node (REAL_TYPE);
1383
1384 TYPE_PRECISION (float80_type_node) = 80;
1385 layout_type (float80_type_node);
1386 }
1387 }
1388 lang_hooks.types.register_builtin_type (float80_type_node, "__float80");
1389
1390 /* The __float128 type. The node has already been created as
1391 _Float128, so we only need to register the __float128 name for
1392 it. */
1393 lang_hooks.types.register_builtin_type (float128_type_node, "__float128");
1394
a6841211
GX		 1395 ix86_register_float16_builtin_type ();
1396
2bf6d935
ML		 1397 const_string_type_node
1398 = build_pointer_type (build_qualified_type
1399 (char_type_node, TYPE_QUAL_CONST));
1400
1401 /* This macro is built by i386-builtin-types.awk. */
1402 DEFINE_BUILTIN_PRIMITIVE_TYPES;
1403}
1404
1405void
1406ix86_init_builtins (void)
1407{
1408 tree ftype, decl;
1409
1410 ix86_init_builtin_types ();
1411
1412 /* Builtins to get CPU type and features. */
1413 ix86_init_platform_type_builtins ();
1414
1415 /* TFmode support builtins. */
1416 def_builtin_const (0, 0, "__builtin_infq",
1417 FLOAT128_FTYPE_VOID, IX86_BUILTIN_INFQ);
1418 def_builtin_const (0, 0, "__builtin_huge_valq",
1419 FLOAT128_FTYPE_VOID, IX86_BUILTIN_HUGE_VALQ);
1420
1421 ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_CONST_STRING);
1422 decl = add_builtin_function ("__builtin_nanq", ftype, IX86_BUILTIN_NANQ,
1423 BUILT_IN_MD, "nanq", NULL_TREE);
1424 TREE_READONLY (decl) = 1;
1425 ix86_builtins[(int) IX86_BUILTIN_NANQ] = decl;
1426
1427 decl = add_builtin_function ("__builtin_nansq", ftype, IX86_BUILTIN_NANSQ,
1428 BUILT_IN_MD, "nansq", NULL_TREE);
1429 TREE_READONLY (decl) = 1;
1430 ix86_builtins[(int) IX86_BUILTIN_NANSQ] = decl;
1431
1432 /* We will expand them to normal call if SSE isn't available since
1433 they are used by libgcc. */
1434 ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_FLOAT128);
1435 decl = add_builtin_function ("__builtin_fabsq", ftype, IX86_BUILTIN_FABSQ,
1436 BUILT_IN_MD, "__fabstf2", NULL_TREE);
1437 TREE_READONLY (decl) = 1;
1438 ix86_builtins[(int) IX86_BUILTIN_FABSQ] = decl;
1439
1440 ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_FLOAT128_FLOAT128);
1441 decl = add_builtin_function ("__builtin_copysignq", ftype,
1442 IX86_BUILTIN_COPYSIGNQ, BUILT_IN_MD,
1443 "__copysigntf3", NULL_TREE);
1444 TREE_READONLY (decl) = 1;
1445 ix86_builtins[(int) IX86_BUILTIN_COPYSIGNQ] = decl;
1446
1447 ix86_init_tm_builtins ();
1448 ix86_init_mmx_sse_builtins ();
1449
1450 if (TARGET_LP64)
1451 ix86_init_builtins_va_builtins_abi ();
1452
1453#ifdef SUBTARGET_INIT_BUILTINS
1454 SUBTARGET_INIT_BUILTINS;
1455#endif
1456}
1457
1458/* Return the ix86 builtin for CODE. */
1459
1460tree
1461ix86_builtin_decl (unsigned code, bool)
1462{
1463 if (code >= IX86_BUILTIN_MAX)
1464 return error_mark_node;
1465
1466 return ix86_builtins[code];
1467}
1468
1469/* This returns the target-specific builtin with code CODE if
1470 current_function_decl has visibility on this builtin, which is checked
1471 using isa flags. Returns NULL_TREE otherwise. */
1472
1473static tree ix86_get_builtin (enum ix86_builtins code)
1474{
1475 struct cl_target_option *opts;
1476 tree target_tree = NULL_TREE;
1477
1478 /* Determine the isa flags of current_function_decl. */
1479
1480 if (current_function_decl)
1481 target_tree = DECL_FUNCTION_SPECIFIC_TARGET (current_function_decl);
1482
1483 if (target_tree == NULL)
1484 target_tree = target_option_default_node;
1485
1486 opts = TREE_TARGET_OPTION (target_tree);
1487
1488 if ((ix86_builtins_isa[(int) code].isa & opts->x_ix86_isa_flags)
1489 || (ix86_builtins_isa[(int) code].isa2 & opts->x_ix86_isa_flags2))
1490 return ix86_builtin_decl (code, true);
1491 else
1492 return NULL_TREE;
1493}
1494
1495/* Vectorization library interface and handlers. */
1496tree (*ix86_veclib_handler) (combined_fn, tree, tree);
1497
1498/* Returns a function decl for a vectorized version of the combined function
1499 with combined_fn code FN and the result vector type TYPE, or NULL_TREE
1500 if it is not available. */
1501
1502tree
1503ix86_builtin_vectorized_function (unsigned int fn, tree type_out,
1504 tree type_in)
1505{
1506 machine_mode in_mode, out_mode;
1507 int in_n, out_n;
1508
1509 if (TREE_CODE (type_out) != VECTOR_TYPE
1510 || TREE_CODE (type_in) != VECTOR_TYPE)
1511 return NULL_TREE;
1512
1513 out_mode = TYPE_MODE (TREE_TYPE (type_out));
1514 out_n = TYPE_VECTOR_SUBPARTS (type_out);
1515 in_mode = TYPE_MODE (TREE_TYPE (type_in));
1516 in_n = TYPE_VECTOR_SUBPARTS (type_in);
1517
1518 switch (fn)
1519 {
1520 CASE_CFN_EXP2:
1521 if (out_mode == SFmode && in_mode == SFmode)
1522 {
1523 if (out_n == 16 && in_n == 16)
1524 return ix86_get_builtin (IX86_BUILTIN_EXP2PS);
1525 }
1526 break;
1527
1528 CASE_CFN_IFLOOR:
1529 CASE_CFN_LFLOOR:
1530 CASE_CFN_LLFLOOR:
1531 /* The round insn does not trap on denormals. */
1532 if (flag_trapping_math || !TARGET_SSE4_1)
1533 break;
1534
1535 if (out_mode == SImode && in_mode == DFmode)
1536 {
1537 if (out_n == 4 && in_n == 2)
1538 return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX);
1539 else if (out_n == 8 && in_n == 4)
1540 return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX256);
1541 else if (out_n == 16 && in_n == 8)
1542 return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX512);
1543 }
1544 if (out_mode == SImode && in_mode == SFmode)
1545 {
1546 if (out_n == 4 && in_n == 4)
1547 return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX);
1548 else if (out_n == 8 && in_n == 8)
1549 return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX256);
1550 else if (out_n == 16 && in_n == 16)
1551 return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX512);
1552 }
1553 break;
1554
1555 CASE_CFN_ICEIL:
1556 CASE_CFN_LCEIL:
1557 CASE_CFN_LLCEIL:
1558 /* The round insn does not trap on denormals. */
1559 if (flag_trapping_math || !TARGET_SSE4_1)
1560 break;
1561
1562 if (out_mode == SImode && in_mode == DFmode)
1563 {
1564 if (out_n == 4 && in_n == 2)
1565 return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX);
1566 else if (out_n == 8 && in_n == 4)
1567 return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX256);
1568 else if (out_n == 16 && in_n == 8)
1569 return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512);
1570 }
1571 if (out_mode == SImode && in_mode == SFmode)
1572 {
1573 if (out_n == 4 && in_n == 4)
1574 return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX);
1575 else if (out_n == 8 && in_n == 8)
1576 return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX256);
1577 else if (out_n == 16 && in_n == 16)
1578 return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX512);
1579 }
1580 break;
1581
1582 CASE_CFN_IRINT:
1583 CASE_CFN_LRINT:
1584 CASE_CFN_LLRINT:
1585 if (out_mode == SImode && in_mode == DFmode)
1586 {
1587 if (out_n == 4 && in_n == 2)
1588 return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX);
1589 else if (out_n == 8 && in_n == 4)
1590 return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX256);
1591 else if (out_n == 16 && in_n == 8)
1592 return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX512);
1593 }
1594 if (out_mode == SImode && in_mode == SFmode)
1595 {
1596 if (out_n == 4 && in_n == 4)
1597 return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ);
1598 else if (out_n == 8 && in_n == 8)
1599 return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ256);
1600 else if (out_n == 16 && in_n == 16)
1601 return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ512);
1602 }
1603 break;
1604
1605 CASE_CFN_IROUND:
1606 CASE_CFN_LROUND:
1607 CASE_CFN_LLROUND:
1608 /* The round insn does not trap on denormals. */
1609 if (flag_trapping_math || !TARGET_SSE4_1)
1610 break;
1611
1612 if (out_mode == SImode && in_mode == DFmode)
1613 {
1614 if (out_n == 4 && in_n == 2)
1615 return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX);
1616 else if (out_n == 8 && in_n == 4)
1617 return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX256);
1618 else if (out_n == 16 && in_n == 8)
1619 return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX512);
1620 }
1621 if (out_mode == SImode && in_mode == SFmode)
1622 {
1623 if (out_n == 4 && in_n == 4)
1624 return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX);
1625 else if (out_n == 8 && in_n == 8)
1626 return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX256);
1627 else if (out_n == 16 && in_n == 16)
1628 return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX512);
1629 }
1630 break;
1631
1632 CASE_CFN_FLOOR:
1633 /* The round insn does not trap on denormals. */
1634 if (flag_trapping_math || !TARGET_SSE4_1)
1635 break;
1636
1637 if (out_mode == DFmode && in_mode == DFmode)
1638 {
1639 if (out_n == 2 && in_n == 2)
1640 return ix86_get_builtin (IX86_BUILTIN_FLOORPD);
1641 else if (out_n == 4 && in_n == 4)
1642 return ix86_get_builtin (IX86_BUILTIN_FLOORPD256);
1643 else if (out_n == 8 && in_n == 8)
1644 return ix86_get_builtin (IX86_BUILTIN_FLOORPD512);
1645 }
1646 if (out_mode == SFmode && in_mode == SFmode)
1647 {
1648 if (out_n == 4 && in_n == 4)
1649 return ix86_get_builtin (IX86_BUILTIN_FLOORPS);
1650 else if (out_n == 8 && in_n == 8)
1651 return ix86_get_builtin (IX86_BUILTIN_FLOORPS256);
1652 else if (out_n == 16 && in_n == 16)
1653 return ix86_get_builtin (IX86_BUILTIN_FLOORPS512);
1654 }
84bcefd5 1655 if (out_mode == HFmode && in_mode == HFmode)
1656 {
1657 /* V8HF/V16HF is supported in ix86_vector_mode_supported_p
1658 under TARGET_AVX512FP16, TARGET_AVX512VL is needed here. */
1659 if (out_n < 32 && !TARGET_AVX512VL)
1660 break;
1661
1662 if (out_n == 8 && in_n == 8)
1663 return ix86_get_builtin (IX86_BUILTIN_FLOORPH);
1664 else if (out_n == 16 && in_n == 16)
1665 return ix86_get_builtin (IX86_BUILTIN_FLOORPH256);
1666 else if (out_n == 32 && in_n == 32)
1667 return ix86_get_builtin (IX86_BUILTIN_FLOORPH512);
1668 }
2bf6d935
ML		 1669 break;
1670
1671 CASE_CFN_CEIL:
1672 /* The round insn does not trap on denormals. */
1673 if (flag_trapping_math || !TARGET_SSE4_1)
1674 break;
1675
1676 if (out_mode == DFmode && in_mode == DFmode)
1677 {
1678 if (out_n == 2 && in_n == 2)
1679 return ix86_get_builtin (IX86_BUILTIN_CEILPD);
1680 else if (out_n == 4 && in_n == 4)
1681 return ix86_get_builtin (IX86_BUILTIN_CEILPD256);
1682 else if (out_n == 8 && in_n == 8)
1683 return ix86_get_builtin (IX86_BUILTIN_CEILPD512);
1684 }
1685 if (out_mode == SFmode && in_mode == SFmode)
1686 {
1687 if (out_n == 4 && in_n == 4)
1688 return ix86_get_builtin (IX86_BUILTIN_CEILPS);
1689 else if (out_n == 8 && in_n == 8)
1690 return ix86_get_builtin (IX86_BUILTIN_CEILPS256);
1691 else if (out_n == 16 && in_n == 16)
1692 return ix86_get_builtin (IX86_BUILTIN_CEILPS512);
1693 }
84bcefd5 1694 if (out_mode == HFmode && in_mode == HFmode)
1695 {
1696 /* V8HF/V16HF is supported in ix86_vector_mode_supported_p
1697 under TARGET_AVX512FP16, TARGET_AVX512VL is needed here. */
1698 if (out_n < 32 && !TARGET_AVX512VL)
1699 break;
1700
1701 if (out_n == 8 && in_n == 8)
1702 return ix86_get_builtin (IX86_BUILTIN_CEILPH);
1703 else if (out_n == 16 && in_n == 16)
1704 return ix86_get_builtin (IX86_BUILTIN_CEILPH256);
1705 else if (out_n == 32 && in_n == 32)
1706 return ix86_get_builtin (IX86_BUILTIN_CEILPH512);
1707 }
2bf6d935
ML		 1708 break;
1709
1710 CASE_CFN_TRUNC:
1711 /* The round insn does not trap on denormals. */
1712 if (flag_trapping_math || !TARGET_SSE4_1)
1713 break;
1714
1715 if (out_mode == DFmode && in_mode == DFmode)
1716 {
1717 if (out_n == 2 && in_n == 2)
1718 return ix86_get_builtin (IX86_BUILTIN_TRUNCPD);
1719 else if (out_n == 4 && in_n == 4)
1720 return ix86_get_builtin (IX86_BUILTIN_TRUNCPD256);
1721 else if (out_n == 8 && in_n == 8)
1722 return ix86_get_builtin (IX86_BUILTIN_TRUNCPD512);
1723 }
1724 if (out_mode == SFmode && in_mode == SFmode)
1725 {
1726 if (out_n == 4 && in_n == 4)
1727 return ix86_get_builtin (IX86_BUILTIN_TRUNCPS);
1728 else if (out_n == 8 && in_n == 8)
1729 return ix86_get_builtin (IX86_BUILTIN_TRUNCPS256);
1730 else if (out_n == 16 && in_n == 16)
1731 return ix86_get_builtin (IX86_BUILTIN_TRUNCPS512);
1732 }
84bcefd5 1733 if (out_mode == HFmode && in_mode == HFmode)
1734 {
1735 /* V8HF/V16HF is supported in ix86_vector_mode_supported_p
1736 under TARGET_AVX512FP16, TARGET_AVX512VL is needed here. */
1737 if (out_n < 32 && !TARGET_AVX512VL)
1738 break;
1739
1740 if (out_n == 8 && in_n == 8)
1741 return ix86_get_builtin (IX86_BUILTIN_TRUNCPH);
1742 else if (out_n == 16 && in_n == 16)
1743 return ix86_get_builtin (IX86_BUILTIN_TRUNCPH256);
1744 else if (out_n == 32 && in_n == 32)
1745 return ix86_get_builtin (IX86_BUILTIN_TRUNCPH512);
1746 }
2bf6d935
ML		 1747 break;
1748
2bf6d935
ML		 1749 CASE_CFN_FMA:
1750 if (out_mode == DFmode && in_mode == DFmode)
1751 {
1752 if (out_n == 2 && in_n == 2)
1753 return ix86_get_builtin (IX86_BUILTIN_VFMADDPD);
1754 if (out_n == 4 && in_n == 4)
1755 return ix86_get_builtin (IX86_BUILTIN_VFMADDPD256);
1756 }
1757 if (out_mode == SFmode && in_mode == SFmode)
1758 {
1759 if (out_n == 4 && in_n == 4)
1760 return ix86_get_builtin (IX86_BUILTIN_VFMADDPS);
1761 if (out_n == 8 && in_n == 8)
1762 return ix86_get_builtin (IX86_BUILTIN_VFMADDPS256);
1763 }
1764 break;
1765
1766 default:
1767 break;
1768 }
1769
1770 /* Dispatch to a handler for a vectorization library. */
1771 if (ix86_veclib_handler)
1772 return ix86_veclib_handler (combined_fn (fn), type_out, type_in);
1773
1774 return NULL_TREE;
1775}
1776
1777/* Returns a decl of a function that implements gather load with
1778 memory type MEM_VECTYPE and index type INDEX_VECTYPE and SCALE.
1779 Return NULL_TREE if it is not available. */
1780
1781tree
1782ix86_vectorize_builtin_gather (const_tree mem_vectype,
1783 const_tree index_type, int scale)
1784{
1785 bool si;
1786 enum ix86_builtins code;
1787
1788 if (! TARGET_AVX2 || !TARGET_USE_GATHER)
1789 return NULL_TREE;
1790
1791 if ((TREE_CODE (index_type) != INTEGER_TYPE
1792 && !POINTER_TYPE_P (index_type))
1793 || (TYPE_MODE (index_type) != SImode
1794 && TYPE_MODE (index_type) != DImode))
1795 return NULL_TREE;
1796
1797 if (TYPE_PRECISION (index_type) > POINTER_SIZE)
1798 return NULL_TREE;
1799
1800 /* v*gather* insn sign extends index to pointer mode. */
1801 if (TYPE_PRECISION (index_type) < POINTER_SIZE
1802 && TYPE_UNSIGNED (index_type))
1803 return NULL_TREE;
1804
1805 if (scale <= 0
1806 || scale > 8
1807 || (scale & (scale - 1)) != 0)
1808 return NULL_TREE;
1809
1810 si = TYPE_MODE (index_type) == SImode;
1811 switch (TYPE_MODE (mem_vectype))
1812 {
1813 case E_V2DFmode:
1814 if (TARGET_AVX512VL)
1815 code = si ? IX86_BUILTIN_GATHER3SIV2DF : IX86_BUILTIN_GATHER3DIV2DF;
1816 else
1817 code = si ? IX86_BUILTIN_GATHERSIV2DF : IX86_BUILTIN_GATHERDIV2DF;
1818 break;
1819 case E_V4DFmode:
1820 if (TARGET_AVX512VL)
1821 code = si ? IX86_BUILTIN_GATHER3ALTSIV4DF : IX86_BUILTIN_GATHER3DIV4DF;
1822 else
1823 code = si ? IX86_BUILTIN_GATHERALTSIV4DF : IX86_BUILTIN_GATHERDIV4DF;
1824 break;
1825 case E_V2DImode:
1826 if (TARGET_AVX512VL)
1827 code = si ? IX86_BUILTIN_GATHER3SIV2DI : IX86_BUILTIN_GATHER3DIV2DI;
1828 else
1829 code = si ? IX86_BUILTIN_GATHERSIV2DI : IX86_BUILTIN_GATHERDIV2DI;
1830 break;
1831 case E_V4DImode:
1832 if (TARGET_AVX512VL)
1833 code = si ? IX86_BUILTIN_GATHER3ALTSIV4DI : IX86_BUILTIN_GATHER3DIV4DI;
1834 else
1835 code = si ? IX86_BUILTIN_GATHERALTSIV4DI : IX86_BUILTIN_GATHERDIV4DI;
1836 break;
1837 case E_V4SFmode:
1838 if (TARGET_AVX512VL)
1839 code = si ? IX86_BUILTIN_GATHER3SIV4SF : IX86_BUILTIN_GATHER3DIV4SF;
1840 else
1841 code = si ? IX86_BUILTIN_GATHERSIV4SF : IX86_BUILTIN_GATHERDIV4SF;
1842 break;
1843 case E_V8SFmode:
1844 if (TARGET_AVX512VL)
1845 code = si ? IX86_BUILTIN_GATHER3SIV8SF : IX86_BUILTIN_GATHER3ALTDIV8SF;
1846 else
1847 code = si ? IX86_BUILTIN_GATHERSIV8SF : IX86_BUILTIN_GATHERALTDIV8SF;
1848 break;
1849 case E_V4SImode:
1850 if (TARGET_AVX512VL)
1851 code = si ? IX86_BUILTIN_GATHER3SIV4SI : IX86_BUILTIN_GATHER3DIV4SI;
1852 else
1853 code = si ? IX86_BUILTIN_GATHERSIV4SI : IX86_BUILTIN_GATHERDIV4SI;
1854 break;
1855 case E_V8SImode:
1856 if (TARGET_AVX512VL)
1857 code = si ? IX86_BUILTIN_GATHER3SIV8SI : IX86_BUILTIN_GATHER3ALTDIV8SI;
1858 else
1859 code = si ? IX86_BUILTIN_GATHERSIV8SI : IX86_BUILTIN_GATHERALTDIV8SI;
1860 break;
1861 case E_V8DFmode:
1862 if (TARGET_AVX512F)
1863 code = si ? IX86_BUILTIN_GATHER3ALTSIV8DF : IX86_BUILTIN_GATHER3DIV8DF;
1864 else
1865 return NULL_TREE;
1866 break;
1867 case E_V8DImode:
1868 if (TARGET_AVX512F)
1869 code = si ? IX86_BUILTIN_GATHER3ALTSIV8DI : IX86_BUILTIN_GATHER3DIV8DI;
1870 else
1871 return NULL_TREE;
1872 break;
1873 case E_V16SFmode:
1874 if (TARGET_AVX512F)
1875 code = si ? IX86_BUILTIN_GATHER3SIV16SF : IX86_BUILTIN_GATHER3ALTDIV16SF;
1876 else
1877 return NULL_TREE;
1878 break;
1879 case E_V16SImode:
1880 if (TARGET_AVX512F)
1881 code = si ? IX86_BUILTIN_GATHER3SIV16SI : IX86_BUILTIN_GATHER3ALTDIV16SI;
1882 else
1883 return NULL_TREE;
1884 break;
1885 default:
1886 return NULL_TREE;
1887 }
1888
1889 return ix86_get_builtin (code);
1890}
1891
1892/* Returns a code for a target-specific builtin that implements
1893 reciprocal of the function, or NULL_TREE if not available. */
1894
1895tree
1896ix86_builtin_reciprocal (tree fndecl)
1897{
1898 enum ix86_builtins fn_code
4d732405 1899 = (enum ix86_builtins) DECL_MD_FUNCTION_CODE (fndecl);
2bf6d935
ML		 1900 switch (fn_code)
1901 {
1902 /* Vectorized version of sqrt to rsqrt conversion. */
1903 case IX86_BUILTIN_SQRTPS_NR:
1904 return ix86_get_builtin (IX86_BUILTIN_RSQRTPS_NR);
1905
1906 case IX86_BUILTIN_SQRTPS_NR256:
1907 return ix86_get_builtin (IX86_BUILTIN_RSQRTPS_NR256);
1908
1909 default:
1910 return NULL_TREE;
1911 }
1912}
1913
2bf6d935
ML		 1914/* This parses the attribute arguments to target in DECL and determines
1915 the right builtin to use to match the platform specification.
1916 It returns the priority value for this version decl. If PREDICATE_LIST
1917 is not NULL, it stores the list of cpu features that need to be checked
1918 before dispatching this function. */
1919
1920unsigned int
1921get_builtin_code_for_version (tree decl, tree *predicate_list)
1922{
1923 tree attrs;
1924 struct cl_target_option cur_target;
1925 tree target_node;
1926 struct cl_target_option *new_target;
1927 const char *arg_str = NULL;
1928 const char *attrs_str = NULL;
1929 char *tok_str = NULL;
1930 char *token;
1931
3fb2c2f4 1932 enum feature_priority priority = P_NONE;
2bf6d935
ML		 1933
1934 static unsigned int NUM_FEATURES
1935 = sizeof (isa_names_table) / sizeof (_isa_names_table);
1936
1937 unsigned int i;
1938
1939 tree predicate_chain = NULL_TREE;
1940 tree predicate_decl, predicate_arg;
1941
1942 attrs = lookup_attribute ("target", DECL_ATTRIBUTES (decl));
1943 gcc_assert (attrs != NULL);
1944
1945 attrs = TREE_VALUE (TREE_VALUE (attrs));
1946
1947 gcc_assert (TREE_CODE (attrs) == STRING_CST);
1948 attrs_str = TREE_STRING_POINTER (attrs);
1949
1950 /* Return priority zero for default function. */
1951 if (strcmp (attrs_str, "default") == 0)
1952 return 0;
1953
1954 /* Handle arch= if specified. For priority, set it to be 1 more than
1955 the best instruction set the processor can handle. For instance, if
1956 there is a version for atom and a version for ssse3 (the highest ISA
1957 priority for atom), the atom version must be checked for dispatch
1958 before the ssse3 version. */
1959 if (strstr (attrs_str, "arch=") != NULL)
1960 {
ba948b37
JJ		 1961 cl_target_option_save (&cur_target, &global_options,
1962 &global_options_set);
2bf6d935
ML		 1963 target_node
1964 = ix86_valid_target_attribute_tree (decl, attrs, &global_options,
1965 &global_options_set, 0);
1966
1967 gcc_assert (target_node);
1968 if (target_node == error_mark_node)
1969 return 0;
1970 new_target = TREE_TARGET_OPTION (target_node);
1971 gcc_assert (new_target);
8ea29259
ML		 1972 enum ix86_builtins builtin_fn = IX86_BUILTIN_CPU_IS;
1973
1974 /* Special case x86-64 micro-level architectures. */
1975 const char *arch_name = attrs_str + strlen ("arch=");
1976 if (startswith (arch_name, "x86-64"))
1977 {
1978 arg_str = arch_name;
1979 builtin_fn = IX86_BUILTIN_CPU_SUPPORTS;
1980 if (strcmp (arch_name, "x86-64") == 0)
1981 priority = P_X86_64_BASELINE;
1982 else if (strcmp (arch_name, "x86-64-v2") == 0)
1983 priority = P_X86_64_V2;
1984 else if (strcmp (arch_name, "x86-64-v3") == 0)
1985 priority = P_X86_64_V3;
1986 else if (strcmp (arch_name, "x86-64-v4") == 0)
1987 priority = P_X86_64_V4;
1988 }
1989 else if (new_target->arch_specified && new_target->arch > 0)
5ebdd535 1990 for (i = 0; i < pta_size; i++)
3fb2c2f4 1991 if (processor_alias_table[i].processor == new_target->arch)
2bf6d935 1992 {
3fb2c2f4
L		 1993 const pta *arch_info = &processor_alias_table[i];
1994 switch (arch_info->priority)
2bf6d935 1995 {
3fb2c2f4
L		 1996 default:
1997 arg_str = arch_info->name;
1998 priority = arch_info->priority;
1999 break;
2000 case P_PROC_DYNAMIC:
2001 switch (new_target->arch)
2002 {
2003 case PROCESSOR_NEHALEM:
2004 if (TARGET_PCLMUL_P (new_target->x_ix86_isa_flags))
2005 {
2006 arg_str = "westmere";
2007 priority = P_PCLMUL;
2008 }
2009 else
2010 {
2011 /* We translate "arch=corei7" and "arch=nehalem"
2012 to "corei7" so that it will be mapped to
2013 M_INTEL_COREI7 as cpu type to cover all
2014 M_INTEL_COREI7_XXXs. */
2015 arg_str = "corei7";
2016 priority = P_PROC_SSE4_2;
2017 }
2018 break;
2019 case PROCESSOR_SANDYBRIDGE:
2020 if (TARGET_F16C_P (new_target->x_ix86_isa_flags))
2021 arg_str = "ivybridge";
2022 else
2023 arg_str = "sandybridge";
2024 priority = P_PROC_AVX;
2025 break;
2026 case PROCESSOR_HASWELL:
2027 if (TARGET_ADX_P (new_target->x_ix86_isa_flags))
2028 arg_str = "broadwell";
2029 else
2030 arg_str = "haswell";
2031 priority = P_PROC_AVX2;
2032 break;
2033 case PROCESSOR_AMDFAM10:
2034 arg_str = "amdfam10h";
2035 priority = P_PROC_SSE4_A;
2036 break;
2037 default:
2038 gcc_unreachable ();
2039 }
2040 break;
2041 case P_NONE:
2042 break;
2bf6d935
ML		 2043 }
2044 break;
2bf6d935 2045 }
2bf6d935 2046
ba948b37
JJ		 2047 cl_target_option_restore (&global_options, &global_options_set,
2048 &cur_target);
2bf6d935
ML		 2049
2050 if (predicate_list && arg_str == NULL)
2051 {
2052 error_at (DECL_SOURCE_LOCATION (decl),
2053 "no dispatcher found for the versioning attributes");
2054 return 0;
2055 }
2056
2057 if (predicate_list)
2058 {
8ea29259 2059 predicate_decl = ix86_builtins [(int) builtin_fn];
2bf6d935
ML		 2060 /* For a C string literal the length includes the trailing NULL. */
2061 predicate_arg = build_string_literal (strlen (arg_str) + 1, arg_str);
2062 predicate_chain = tree_cons (predicate_decl, predicate_arg,
2063 predicate_chain);
2064 }
2065 }
2066
2067 /* Process feature name. */
2068 tok_str = (char *) xmalloc (strlen (attrs_str) + 1);
2069 strcpy (tok_str, attrs_str);
2070 token = strtok (tok_str, ",");
2071 predicate_decl = ix86_builtins [(int) IX86_BUILTIN_CPU_SUPPORTS];
2072
2073 while (token != NULL)
2074 {
2075 /* Do not process "arch=" */
c0129e2d 2076 if (startswith (token, "arch="))
2bf6d935
ML		 2077 {
2078 token = strtok (NULL, ",");
2079 continue;
2080 }
2081 for (i = 0; i < NUM_FEATURES; ++i)
2082 {
2083 if (strcmp (token, isa_names_table[i].name) == 0)
2084 {
2085 if (predicate_list)
2086 {
2087 predicate_arg = build_string_literal (
2088 strlen (isa_names_table[i].name) + 1,
2089 isa_names_table[i].name);
2090 predicate_chain = tree_cons (predicate_decl, predicate_arg,
2091 predicate_chain);
2092 }
2093 /* Find the maximum priority feature. */
2094 if (isa_names_table[i].priority > priority)
2095 priority = isa_names_table[i].priority;
2096
2097 break;
2098 }
2099 }
3fb2c2f4 2100 if (predicate_list && priority == P_NONE)
2bf6d935
ML		 2101 {
2102 error_at (DECL_SOURCE_LOCATION (decl),
2103 "ISA %qs is not supported in %<target%> attribute, "
2104 "use %<arch=%> syntax", token);
2105 return 0;
2106 }
2107 token = strtok (NULL, ",");
2108 }
2109 free (tok_str);
2110
2111 if (predicate_list && predicate_chain == NULL_TREE)
2112 {
2113 error_at (DECL_SOURCE_LOCATION (decl),
2114 "no dispatcher found for the versioning attributes: %s",
2115 attrs_str);
2116 return 0;
2117 }
2118 else if (predicate_list)
2119 {
2120 predicate_chain = nreverse (predicate_chain);
2121 *predicate_list = predicate_chain;
2122 }
2123
2124 return priority;
2125}
2126
2127/* This builds the processor_model struct type defined in
2128 libgcc/config/i386/cpuinfo.c */
2129
2130static tree
2131build_processor_model_struct (void)
2132{
2133 const char *field_name[] = {"__cpu_vendor", "__cpu_type", "__cpu_subtype",
2134 "__cpu_features"};
2135 tree field = NULL_TREE, field_chain = NULL_TREE;
2136 int i;
2137 tree type = make_node (RECORD_TYPE);
2138
2139 /* The first 3 fields are unsigned int. */
2140 for (i = 0; i < 3; ++i)
2141 {
2142 field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
2143 get_identifier (field_name[i]), unsigned_type_node);
2144 if (field_chain != NULL_TREE)
2145 DECL_CHAIN (field) = field_chain;
2146 field_chain = field;
2147 }
2148
2149 /* The last field is an array of unsigned integers of size one. */
2150 field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
2151 get_identifier (field_name[3]),
2152 build_array_type (unsigned_type_node,
2153 build_index_type (size_one_node)));
2154 if (field_chain != NULL_TREE)
2155 DECL_CHAIN (field) = field_chain;
2156 field_chain = field;
2157
2158 finish_builtin_struct (type, "__processor_model", field_chain, NULL_TREE);
2159 return type;
2160}
2161
2162/* Returns a extern, comdat VAR_DECL of type TYPE and name NAME. */
2163
2164static tree
2165make_var_decl (tree type, const char *name)
2166{
2167 tree new_decl;
2168
2169 new_decl = build_decl (UNKNOWN_LOCATION,
2170 VAR_DECL,
2171 get_identifier(name),
2172 type);
2173
2174 DECL_EXTERNAL (new_decl) = 1;
2175 TREE_STATIC (new_decl) = 1;
2176 TREE_PUBLIC (new_decl) = 1;
2177 DECL_INITIAL (new_decl) = 0;
2178 DECL_ARTIFICIAL (new_decl) = 0;
2179 DECL_PRESERVE_P (new_decl) = 1;
2180
2181 make_decl_one_only (new_decl, DECL_ASSEMBLER_NAME (new_decl));
2182 assemble_variable (new_decl, 0, 0, 0);
2183
2184 return new_decl;
2185}
2186
a0b4e09a
IS		 2187static GTY(()) tree ix86_cpu_model_type_node;
2188static GTY(()) tree ix86_cpu_model_var;
2189static GTY(()) tree ix86_cpu_features2_type_node;
2190static GTY(()) tree ix86_cpu_features2_var;
2191
2bf6d935
ML		 2192/* FNDECL is a __builtin_cpu_is or a __builtin_cpu_supports call that is folded
2193 into an integer defined in libgcc/config/i386/cpuinfo.c */
2194
2195tree
2196fold_builtin_cpu (tree fndecl, tree *args)
2197{
2198 unsigned int i;
4d732405
RS		 2199 enum ix86_builtins fn_code
2200 = (enum ix86_builtins) DECL_MD_FUNCTION_CODE (fndecl);
2bf6d935
ML		 2201 tree param_string_cst = NULL;
2202
a0b4e09a
IS		 2203 if (ix86_cpu_model_var == nullptr)
2204 {
2205 /* Build a single __cpu_model variable for all references to
2206 __cpu_model so that GIMPLE level optimizers can CSE the loads
2207 of __cpu_model and optimize bit-operations properly. */
2208 ix86_cpu_model_type_node = build_processor_model_struct ();
2209 ix86_cpu_model_var = make_var_decl (ix86_cpu_model_type_node,
2210 "__cpu_model");
2211 varpool_node::add (ix86_cpu_model_var);
2212 }
2bf6d935
ML		 2213
2214 gcc_assert ((args != NULL) && (*args != NULL));
2215
2216 param_string_cst = *args;
2217 while (param_string_cst
2218 && TREE_CODE (param_string_cst) != STRING_CST)
2219 {
2220 /* *args must be a expr that can contain other EXPRS leading to a
2221 STRING_CST. */
2222 if (!EXPR_P (param_string_cst))
2223 {
2224 error ("parameter to builtin must be a string constant or literal");
2225 return integer_zero_node;
2226 }
2227 param_string_cst = TREE_OPERAND (EXPR_CHECK (param_string_cst), 0);
2228 }
2229
2230 gcc_assert (param_string_cst);
2231
2232 if (fn_code == IX86_BUILTIN_CPU_IS)
2233 {
2234 tree ref;
2235 tree field;
2236 tree final;
2237
2238 unsigned int field_val = 0;
2bf6d935 2239
3fb2c2f4
L		 2240 for (i = 0; i < num_arch_names; i++)
2241 if (processor_alias_table[i].model != 0
2242 && strcmp (processor_alias_table[i].name,
2243 TREE_STRING_POINTER (param_string_cst)) == 0)
2bf6d935
ML		 2244 break;
2245
3fb2c2f4 2246 if (i == num_arch_names)
2bf6d935
ML		 2247 {
2248 error ("parameter to builtin not valid: %s",
2249 TREE_STRING_POINTER (param_string_cst));
2250 return integer_zero_node;
2251 }
2252
a0b4e09a 2253 field = TYPE_FIELDS (ix86_cpu_model_type_node);
3fb2c2f4 2254 field_val = processor_alias_table[i].model;
2bf6d935
ML		 2255
2256 /* CPU types are stored in the next field. */
2257 if (field_val > M_CPU_TYPE_START
2258 && field_val < M_CPU_SUBTYPE_START)
2259 {
2260 field = DECL_CHAIN (field);
2261 field_val -= M_CPU_TYPE_START;
2262 }
2263
2264 /* CPU subtypes are stored in the next field. */
2265 if (field_val > M_CPU_SUBTYPE_START)
2266 {
2267 field = DECL_CHAIN ( DECL_CHAIN (field));
2268 field_val -= M_CPU_SUBTYPE_START;
2269 }
2270
2271 /* Get the appropriate field in __cpu_model. */
a0b4e09a 2272 ref = build3 (COMPONENT_REF, TREE_TYPE (field), ix86_cpu_model_var,
2bf6d935
ML		 2273 field, NULL_TREE);
2274
2275 /* Check the value. */
2276 final = build2 (EQ_EXPR, unsigned_type_node, ref,
2277 build_int_cstu (unsigned_type_node, field_val));
2278 return build1 (CONVERT_EXPR, integer_type_node, final);
2279 }
2280 else if (fn_code == IX86_BUILTIN_CPU_SUPPORTS)
2281 {
2282 tree ref;
2283 tree array_elt;
2284 tree field;
2285 tree final;
2286
2287 unsigned int field_val = 0;
2288 unsigned int NUM_ISA_NAMES
2289 = sizeof (isa_names_table) / sizeof (struct _isa_names_table);
2290
2291 for (i = 0; i < NUM_ISA_NAMES; i++)
2292 if (strcmp (isa_names_table[i].name,
2293 TREE_STRING_POINTER (param_string_cst)) == 0)
2294 break;
2295
2296 if (i == NUM_ISA_NAMES)
2297 {
2298 error ("parameter to builtin not valid: %s",
2299 TREE_STRING_POINTER (param_string_cst));
2300 return integer_zero_node;
2301 }
2302
2303 if (isa_names_table[i].feature >= 32)
2304 {
a0b4e09a
IS		 2305 if (ix86_cpu_features2_var == nullptr)
2306 {
2307 /* Build a single __cpu_features2 variable for all
2308 references to __cpu_features2 so that GIMPLE level
2309 optimizers can CSE the loads of __cpu_features2 and
2310 optimize bit-operations properly. */
2311 tree index_type
2312 = build_index_type (size_int (SIZE_OF_CPU_FEATURES));
2313 ix86_cpu_features2_type_node
2314 = build_array_type (unsigned_type_node, index_type);
2315 ix86_cpu_features2_var
2316 = make_var_decl (ix86_cpu_features2_type_node,
2317 "__cpu_features2");
2318 varpool_node::add (ix86_cpu_features2_var);
2319 }
2bf6d935 2320
1890f2f0
L		 2321 for (unsigned int j = 0; j < SIZE_OF_CPU_FEATURES; j++)
2322 if (isa_names_table[i].feature < (32 + 32 + j * 32))
2323 {
2324 field_val = (1U << (isa_names_table[i].feature
2325 - (32 + j * 32)));
2326 tree index = size_int (j);
2327 array_elt = build4 (ARRAY_REF, unsigned_type_node,
a0b4e09a 2328 ix86_cpu_features2_var,
1890f2f0
L		 2329 index, NULL_TREE, NULL_TREE);
2330 /* Return __cpu_features2[index] & field_val */
2331 final = build2 (BIT_AND_EXPR, unsigned_type_node,
2332 array_elt,
2333 build_int_cstu (unsigned_type_node,
2334 field_val));
2335 return build1 (CONVERT_EXPR, integer_type_node, final);
2336 }
2bf6d935
ML		 2337 }
2338
a0b4e09a 2339 field = TYPE_FIELDS (ix86_cpu_model_type_node);
2bf6d935
ML		 2340 /* Get the last field, which is __cpu_features. */
2341 while (DECL_CHAIN (field))
2342 field = DECL_CHAIN (field);
2343
2344 /* Get the appropriate field: __cpu_model.__cpu_features */
a0b4e09a 2345 ref = build3 (COMPONENT_REF, TREE_TYPE (field), ix86_cpu_model_var,
2bf6d935
ML		 2346 field, NULL_TREE);
2347
2348 /* Access the 0th element of __cpu_features array. */
2349 array_elt = build4 (ARRAY_REF, unsigned_type_node, ref,
2350 integer_zero_node, NULL_TREE, NULL_TREE);
2351
2352 field_val = (1U << isa_names_table[i].feature);
2353 /* Return __cpu_model.__cpu_features[0] & field_val */
2354 final = build2 (BIT_AND_EXPR, unsigned_type_node, array_elt,
2355 build_int_cstu (unsigned_type_node, field_val));
127c7178
ML		 2356 if (isa_names_table[i].feature == (INT_TYPE_SIZE - 1))
2357 return build2 (NE_EXPR, integer_type_node, final,
2358 build_int_cst (unsigned_type_node, 0));
2359 else
2360 return build1 (CONVERT_EXPR, integer_type_node, final);
2bf6d935
ML		 2361 }
2362 gcc_unreachable ();
2363}
2364
2365#include "gt-i386-builtins.h"
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