]>
Commit | Line | Data |
---|---|---|
ab442df7 | 1 | /* Subroutines used for macro/preprocessor support on the ia-32. |
d5becc11 | 2 | Copyright (C) 2008, 2009, 2010, 2011, 2012 |
ab442df7 MM |
3 | Free Software Foundation, Inc. |
4 | ||
5 | This file is part of GCC. | |
6 | ||
7 | GCC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GCC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GCC; see the file COPYING3. If not see | |
19 | <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | #include "config.h" | |
22 | #include "system.h" | |
23 | #include "coretypes.h" | |
24 | #include "tm.h" | |
ab442df7 MM |
25 | #include "tree.h" |
26 | #include "tm_p.h" | |
27 | #include "flags.h" | |
39dabefd | 28 | #include "c-family/c-common.h" |
ab442df7 MM |
29 | #include "ggc.h" |
30 | #include "target.h" | |
31 | #include "target-def.h" | |
32 | #include "cpplib.h" | |
39dabefd | 33 | #include "c-family/c-pragma.h" |
ab442df7 | 34 | |
5779e713 | 35 | static bool ix86_pragma_target_parse (tree, tree); |
ab442df7 | 36 | static void ix86_target_macros_internal |
df385b9c | 37 | (HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit, |
ab442df7 MM |
38 | void (*def_or_undef) (cpp_reader *, const char *)); |
39 | ||
40 | \f | |
41 | /* Internal function to either define or undef the appropriate system | |
42 | macros. */ | |
43 | static void | |
df385b9c | 44 | ix86_target_macros_internal (HOST_WIDE_INT isa_flag, |
ab442df7 MM |
45 | enum processor_type arch, |
46 | enum processor_type tune, | |
47 | enum fpmath_unit fpmath, | |
48 | void (*def_or_undef) (cpp_reader *, | |
49 | const char *)) | |
50 | { | |
073a8998 | 51 | /* For some of the k6/pentium varients there weren't separate ISA bits to |
ab442df7 MM |
52 | identify which tune/arch flag was passed, so figure it out here. */ |
53 | size_t arch_len = strlen (ix86_arch_string); | |
54 | size_t tune_len = strlen (ix86_tune_string); | |
55 | int last_arch_char = ix86_arch_string[arch_len - 1]; | |
56 | int last_tune_char = ix86_tune_string[tune_len - 1]; | |
57 | ||
58 | /* Built-ins based on -march=. */ | |
59 | switch (arch) | |
60 | { | |
61 | case PROCESSOR_I386: | |
62 | break; | |
63 | case PROCESSOR_I486: | |
64 | def_or_undef (parse_in, "__i486"); | |
65 | def_or_undef (parse_in, "__i486__"); | |
66 | break; | |
67 | case PROCESSOR_PENTIUM: | |
68 | def_or_undef (parse_in, "__i586"); | |
69 | def_or_undef (parse_in, "__i586__"); | |
70 | def_or_undef (parse_in, "__pentium"); | |
71 | def_or_undef (parse_in, "__pentium__"); | |
72 | if (isa_flag & OPTION_MASK_ISA_MMX) | |
73 | def_or_undef (parse_in, "__pentium_mmx__"); | |
74 | break; | |
75 | case PROCESSOR_PENTIUMPRO: | |
76 | def_or_undef (parse_in, "__i686"); | |
77 | def_or_undef (parse_in, "__i686__"); | |
78 | def_or_undef (parse_in, "__pentiumpro"); | |
79 | def_or_undef (parse_in, "__pentiumpro__"); | |
80 | break; | |
81 | case PROCESSOR_GEODE: | |
82 | def_or_undef (parse_in, "__geode"); | |
83 | def_or_undef (parse_in, "__geode__"); | |
84 | break; | |
85 | case PROCESSOR_K6: | |
86 | def_or_undef (parse_in, "__k6"); | |
87 | def_or_undef (parse_in, "__k6__"); | |
88 | if (last_arch_char == '2') | |
89 | def_or_undef (parse_in, "__k6_2__"); | |
90 | else if (last_arch_char == '3') | |
91 | def_or_undef (parse_in, "__k6_3__"); | |
92 | else if (isa_flag & OPTION_MASK_ISA_3DNOW) | |
93 | def_or_undef (parse_in, "__k6_3__"); | |
94 | break; | |
95 | case PROCESSOR_ATHLON: | |
96 | def_or_undef (parse_in, "__athlon"); | |
97 | def_or_undef (parse_in, "__athlon__"); | |
98 | if (isa_flag & OPTION_MASK_ISA_SSE) | |
99 | def_or_undef (parse_in, "__athlon_sse__"); | |
100 | break; | |
101 | case PROCESSOR_K8: | |
102 | def_or_undef (parse_in, "__k8"); | |
103 | def_or_undef (parse_in, "__k8__"); | |
104 | break; | |
105 | case PROCESSOR_AMDFAM10: | |
106 | def_or_undef (parse_in, "__amdfam10"); | |
107 | def_or_undef (parse_in, "__amdfam10__"); | |
108 | break; | |
1133125e HJ |
109 | case PROCESSOR_BDVER1: |
110 | def_or_undef (parse_in, "__bdver1"); | |
111 | def_or_undef (parse_in, "__bdver1__"); | |
112 | break; | |
4d652a18 HJ |
113 | case PROCESSOR_BDVER2: |
114 | def_or_undef (parse_in, "__bdver2"); | |
115 | def_or_undef (parse_in, "__bdver2__"); | |
116 | break; | |
14b52538 CF |
117 | case PROCESSOR_BTVER1: |
118 | def_or_undef (parse_in, "__btver1"); | |
119 | def_or_undef (parse_in, "__btver1__"); | |
120 | break; | |
e32bfc16 VK |
121 | case PROCESSOR_BTVER2: |
122 | def_or_undef (parse_in, "__btver2"); | |
123 | def_or_undef (parse_in, "__btver2__"); | |
124 | break; | |
ab442df7 MM |
125 | case PROCESSOR_PENTIUM4: |
126 | def_or_undef (parse_in, "__pentium4"); | |
127 | def_or_undef (parse_in, "__pentium4__"); | |
128 | break; | |
129 | case PROCESSOR_NOCONA: | |
130 | def_or_undef (parse_in, "__nocona"); | |
131 | def_or_undef (parse_in, "__nocona__"); | |
132 | break; | |
ab247762 MK |
133 | case PROCESSOR_CORE2_32: |
134 | case PROCESSOR_CORE2_64: | |
ab442df7 MM |
135 | def_or_undef (parse_in, "__core2"); |
136 | def_or_undef (parse_in, "__core2__"); | |
137 | break; | |
b2b01543 BS |
138 | case PROCESSOR_COREI7_32: |
139 | case PROCESSOR_COREI7_64: | |
140 | def_or_undef (parse_in, "__corei7"); | |
141 | def_or_undef (parse_in, "__corei7__"); | |
142 | break; | |
b6837b94 JY |
143 | case PROCESSOR_ATOM: |
144 | def_or_undef (parse_in, "__atom"); | |
145 | def_or_undef (parse_in, "__atom__"); | |
146 | break; | |
ab442df7 MM |
147 | /* use PROCESSOR_max to not set/unset the arch macro. */ |
148 | case PROCESSOR_max: | |
149 | break; | |
150 | case PROCESSOR_GENERIC32: | |
151 | case PROCESSOR_GENERIC64: | |
152 | gcc_unreachable (); | |
153 | } | |
154 | ||
155 | /* Built-ins based on -mtune=. */ | |
156 | switch (tune) | |
157 | { | |
158 | case PROCESSOR_I386: | |
159 | def_or_undef (parse_in, "__tune_i386__"); | |
160 | break; | |
161 | case PROCESSOR_I486: | |
162 | def_or_undef (parse_in, "__tune_i486__"); | |
163 | break; | |
164 | case PROCESSOR_PENTIUM: | |
165 | def_or_undef (parse_in, "__tune_i586__"); | |
166 | def_or_undef (parse_in, "__tune_pentium__"); | |
167 | if (last_tune_char == 'x') | |
168 | def_or_undef (parse_in, "__tune_pentium_mmx__"); | |
169 | break; | |
170 | case PROCESSOR_PENTIUMPRO: | |
171 | def_or_undef (parse_in, "__tune_i686__"); | |
172 | def_or_undef (parse_in, "__tune_pentiumpro__"); | |
173 | switch (last_tune_char) | |
174 | { | |
175 | case '3': | |
176 | def_or_undef (parse_in, "__tune_pentium3__"); | |
177 | /* FALLTHRU */ | |
178 | case '2': | |
179 | def_or_undef (parse_in, "__tune_pentium2__"); | |
180 | break; | |
181 | } | |
182 | break; | |
183 | case PROCESSOR_GEODE: | |
184 | def_or_undef (parse_in, "__tune_geode__"); | |
185 | break; | |
186 | case PROCESSOR_K6: | |
187 | def_or_undef (parse_in, "__tune_k6__"); | |
188 | if (last_tune_char == '2') | |
189 | def_or_undef (parse_in, "__tune_k6_2__"); | |
190 | else if (last_tune_char == '3') | |
191 | def_or_undef (parse_in, "__tune_k6_3__"); | |
192 | else if (isa_flag & OPTION_MASK_ISA_3DNOW) | |
193 | def_or_undef (parse_in, "__tune_k6_3__"); | |
194 | break; | |
195 | case PROCESSOR_ATHLON: | |
196 | def_or_undef (parse_in, "__tune_athlon__"); | |
197 | if (isa_flag & OPTION_MASK_ISA_SSE) | |
198 | def_or_undef (parse_in, "__tune_athlon_sse__"); | |
199 | break; | |
200 | case PROCESSOR_K8: | |
201 | def_or_undef (parse_in, "__tune_k8__"); | |
202 | break; | |
203 | case PROCESSOR_AMDFAM10: | |
204 | def_or_undef (parse_in, "__tune_amdfam10__"); | |
205 | break; | |
1133125e HJ |
206 | case PROCESSOR_BDVER1: |
207 | def_or_undef (parse_in, "__tune_bdver1__"); | |
208 | break; | |
4d652a18 HJ |
209 | case PROCESSOR_BDVER2: |
210 | def_or_undef (parse_in, "__tune_bdver2__"); | |
211 | break; | |
14b52538 CF |
212 | case PROCESSOR_BTVER1: |
213 | def_or_undef (parse_in, "__tune_btver1__"); | |
214 | break; | |
e32bfc16 VK |
215 | case PROCESSOR_BTVER2: |
216 | def_or_undef (parse_in, "__tune_btver2__"); | |
217 | break; | |
ab442df7 MM |
218 | case PROCESSOR_PENTIUM4: |
219 | def_or_undef (parse_in, "__tune_pentium4__"); | |
220 | break; | |
221 | case PROCESSOR_NOCONA: | |
222 | def_or_undef (parse_in, "__tune_nocona__"); | |
223 | break; | |
ab247762 MK |
224 | case PROCESSOR_CORE2_32: |
225 | case PROCESSOR_CORE2_64: | |
ab442df7 MM |
226 | def_or_undef (parse_in, "__tune_core2__"); |
227 | break; | |
b2b01543 BS |
228 | case PROCESSOR_COREI7_32: |
229 | case PROCESSOR_COREI7_64: | |
230 | def_or_undef (parse_in, "__tune_corei7__"); | |
231 | break; | |
b6837b94 JY |
232 | case PROCESSOR_ATOM: |
233 | def_or_undef (parse_in, "__tune_atom__"); | |
234 | break; | |
ab442df7 MM |
235 | case PROCESSOR_GENERIC32: |
236 | case PROCESSOR_GENERIC64: | |
237 | break; | |
238 | /* use PROCESSOR_max to not set/unset the tune macro. */ | |
239 | case PROCESSOR_max: | |
240 | break; | |
241 | } | |
242 | ||
243 | if (isa_flag & OPTION_MASK_ISA_MMX) | |
244 | def_or_undef (parse_in, "__MMX__"); | |
245 | if (isa_flag & OPTION_MASK_ISA_3DNOW) | |
246 | def_or_undef (parse_in, "__3dNOW__"); | |
247 | if (isa_flag & OPTION_MASK_ISA_3DNOW_A) | |
248 | def_or_undef (parse_in, "__3dNOW_A__"); | |
249 | if (isa_flag & OPTION_MASK_ISA_SSE) | |
250 | def_or_undef (parse_in, "__SSE__"); | |
251 | if (isa_flag & OPTION_MASK_ISA_SSE2) | |
252 | def_or_undef (parse_in, "__SSE2__"); | |
253 | if (isa_flag & OPTION_MASK_ISA_SSE3) | |
254 | def_or_undef (parse_in, "__SSE3__"); | |
255 | if (isa_flag & OPTION_MASK_ISA_SSSE3) | |
256 | def_or_undef (parse_in, "__SSSE3__"); | |
257 | if (isa_flag & OPTION_MASK_ISA_SSE4_1) | |
258 | def_or_undef (parse_in, "__SSE4_1__"); | |
259 | if (isa_flag & OPTION_MASK_ISA_SSE4_2) | |
260 | def_or_undef (parse_in, "__SSE4_2__"); | |
261 | if (isa_flag & OPTION_MASK_ISA_AES) | |
262 | def_or_undef (parse_in, "__AES__"); | |
263 | if (isa_flag & OPTION_MASK_ISA_PCLMUL) | |
264 | def_or_undef (parse_in, "__PCLMUL__"); | |
95879c72 L |
265 | if (isa_flag & OPTION_MASK_ISA_AVX) |
266 | def_or_undef (parse_in, "__AVX__"); | |
7afac110 KY |
267 | if (isa_flag & OPTION_MASK_ISA_AVX2) |
268 | def_or_undef (parse_in, "__AVX2__"); | |
95879c72 L |
269 | if (isa_flag & OPTION_MASK_ISA_FMA) |
270 | def_or_undef (parse_in, "__FMA__"); | |
bf2eaa3f KY |
271 | if (isa_flag & OPTION_MASK_ISA_RTM) |
272 | def_or_undef (parse_in, "__RTM__"); | |
ab442df7 MM |
273 | if (isa_flag & OPTION_MASK_ISA_SSE4A) |
274 | def_or_undef (parse_in, "__SSE4A__"); | |
cbf2e4d4 HJ |
275 | if (isa_flag & OPTION_MASK_ISA_FMA4) |
276 | def_or_undef (parse_in, "__FMA4__"); | |
43a8b705 HJ |
277 | if (isa_flag & OPTION_MASK_ISA_XOP) |
278 | def_or_undef (parse_in, "__XOP__"); | |
3e901069 HJ |
279 | if (isa_flag & OPTION_MASK_ISA_LWP) |
280 | def_or_undef (parse_in, "__LWP__"); | |
13c0eb43 SP |
281 | if (isa_flag & OPTION_MASK_ISA_ABM) |
282 | def_or_undef (parse_in, "__ABM__"); | |
91afcfa3 QN |
283 | if (isa_flag & OPTION_MASK_ISA_BMI) |
284 | def_or_undef (parse_in, "__BMI__"); | |
82feeb8d L |
285 | if (isa_flag & OPTION_MASK_ISA_BMI2) |
286 | def_or_undef (parse_in, "__BMI2__"); | |
5fcafa60 KY |
287 | if (isa_flag & OPTION_MASK_ISA_LZCNT) |
288 | def_or_undef (parse_in, "__LZCNT__"); | |
94d13ad1 QN |
289 | if (isa_flag & OPTION_MASK_ISA_TBM) |
290 | def_or_undef (parse_in, "__TBM__"); | |
3bccee03 SP |
291 | if (isa_flag & OPTION_MASK_ISA_POPCNT) |
292 | def_or_undef (parse_in, "__POPCNT__"); | |
4ee89d5f L |
293 | if (isa_flag & OPTION_MASK_ISA_FSGSBASE) |
294 | def_or_undef (parse_in, "__FSGSBASE__"); | |
295 | if (isa_flag & OPTION_MASK_ISA_RDRND) | |
296 | def_or_undef (parse_in, "__RDRND__"); | |
297 | if (isa_flag & OPTION_MASK_ISA_F16C) | |
298 | def_or_undef (parse_in, "__F16C__"); | |
4c340b5d KY |
299 | if (isa_flag & OPTION_MASK_ISA_RDSEED) |
300 | def_or_undef (parse_in, "__RDSEED__"); | |
e61c94dd KY |
301 | if (isa_flag & OPTION_MASK_ISA_PRFCHW) |
302 | def_or_undef (parse_in, "__PRFCHW__"); | |
d05e383b MZ |
303 | if (isa_flag & OPTION_MASK_ISA_ADX) |
304 | def_or_undef (parse_in, "__ADX__"); | |
3a0d99bb AI |
305 | if (isa_flag & OPTION_MASK_ISA_FXSR) |
306 | def_or_undef (parse_in, "__FXSR__"); | |
307 | if (isa_flag & OPTION_MASK_ISA_XSAVE) | |
308 | def_or_undef (parse_in, "__XSAVE__"); | |
309 | if (isa_flag & OPTION_MASK_ISA_XSAVEOPT) | |
310 | def_or_undef (parse_in, "__XSAVEOPT__"); | |
ab442df7 MM |
311 | if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE)) |
312 | def_or_undef (parse_in, "__SSE_MATH__"); | |
313 | if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2)) | |
314 | def_or_undef (parse_in, "__SSE2_MATH__"); | |
315 | } | |
316 | ||
317 | \f | |
5779e713 MM |
318 | /* Hook to validate the current #pragma GCC target and set the state, and |
319 | update the macros based on what was changed. If ARGS is NULL, then | |
320 | POP_TARGET is used to reset the options. */ | |
ab442df7 MM |
321 | |
322 | static bool | |
5779e713 | 323 | ix86_pragma_target_parse (tree args, tree pop_target) |
ab442df7 MM |
324 | { |
325 | tree prev_tree = build_target_option_node (); | |
326 | tree cur_tree; | |
327 | struct cl_target_option *prev_opt; | |
328 | struct cl_target_option *cur_opt; | |
df385b9c L |
329 | HOST_WIDE_INT prev_isa; |
330 | HOST_WIDE_INT cur_isa; | |
331 | HOST_WIDE_INT diff_isa; | |
ab442df7 MM |
332 | enum processor_type prev_arch; |
333 | enum processor_type prev_tune; | |
334 | enum processor_type cur_arch; | |
335 | enum processor_type cur_tune; | |
336 | ||
337 | if (! args) | |
338 | { | |
5779e713 MM |
339 | cur_tree = ((pop_target) |
340 | ? pop_target | |
341 | : target_option_default_node); | |
46625112 JM |
342 | cl_target_option_restore (&global_options, |
343 | TREE_TARGET_OPTION (cur_tree)); | |
ab442df7 MM |
344 | } |
345 | else | |
346 | { | |
5779e713 | 347 | cur_tree = ix86_valid_target_attribute_tree (args); |
ab442df7 MM |
348 | if (!cur_tree) |
349 | return false; | |
350 | } | |
351 | ||
352 | target_option_current_node = cur_tree; | |
353 | ||
354 | /* Figure out the previous/current isa, arch, tune and the differences. */ | |
355 | prev_opt = TREE_TARGET_OPTION (prev_tree); | |
356 | cur_opt = TREE_TARGET_OPTION (cur_tree); | |
e3339d0f JM |
357 | prev_isa = prev_opt->x_ix86_isa_flags; |
358 | cur_isa = cur_opt->x_ix86_isa_flags; | |
ab442df7 | 359 | diff_isa = (prev_isa ^ cur_isa); |
32e8bb8e ILT |
360 | prev_arch = (enum processor_type) prev_opt->arch; |
361 | prev_tune = (enum processor_type) prev_opt->tune; | |
362 | cur_arch = (enum processor_type) cur_opt->arch; | |
363 | cur_tune = (enum processor_type) cur_opt->tune; | |
ab442df7 MM |
364 | |
365 | /* If the same processor is used for both previous and current options, don't | |
366 | change the macros. */ | |
367 | if (cur_arch == prev_arch) | |
368 | cur_arch = prev_arch = PROCESSOR_max; | |
369 | ||
370 | if (cur_tune == prev_tune) | |
371 | cur_tune = prev_tune = PROCESSOR_max; | |
372 | ||
373 | /* Undef all of the macros for that are no longer current. */ | |
374 | ix86_target_macros_internal (prev_isa & diff_isa, | |
375 | prev_arch, | |
376 | prev_tune, | |
8023568e | 377 | (enum fpmath_unit) prev_opt->x_ix86_fpmath, |
ab442df7 MM |
378 | cpp_undef); |
379 | ||
380 | /* Define all of the macros for new options that were just turned on. */ | |
381 | ix86_target_macros_internal (cur_isa & diff_isa, | |
382 | cur_arch, | |
383 | cur_tune, | |
8023568e | 384 | (enum fpmath_unit) cur_opt->x_ix86_fpmath, |
ab442df7 MM |
385 | cpp_define); |
386 | ||
387 | return true; | |
388 | } | |
389 | \f | |
390 | /* Function to tell the preprocessor about the defines for the current target. */ | |
391 | ||
392 | void | |
393 | ix86_target_macros (void) | |
394 | { | |
395 | /* 32/64-bit won't change with target specific options, so do the assert and | |
396 | builtin_define_std calls here. */ | |
397 | if (TARGET_64BIT) | |
398 | { | |
399 | cpp_assert (parse_in, "cpu=x86_64"); | |
400 | cpp_assert (parse_in, "machine=x86_64"); | |
401 | cpp_define (parse_in, "__amd64"); | |
402 | cpp_define (parse_in, "__amd64__"); | |
403 | cpp_define (parse_in, "__x86_64"); | |
404 | cpp_define (parse_in, "__x86_64__"); | |
6573c644 L |
405 | if (TARGET_X32) |
406 | { | |
407 | cpp_define (parse_in, "_ILP32"); | |
408 | cpp_define (parse_in, "__ILP32__"); | |
409 | } | |
ab442df7 MM |
410 | } |
411 | else | |
412 | { | |
413 | cpp_assert (parse_in, "cpu=i386"); | |
414 | cpp_assert (parse_in, "machine=i386"); | |
415 | builtin_define_std ("i386"); | |
416 | } | |
417 | ||
c637141a L |
418 | if (TARGET_LONG_DOUBLE_64) |
419 | cpp_define (parse_in, "__LONG_DOUBLE_64__"); | |
420 | ||
d5becc11 JJ |
421 | cpp_define_formatted (parse_in, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE); |
422 | cpp_define_formatted (parse_in, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE); | |
423 | ||
ab442df7 MM |
424 | ix86_target_macros_internal (ix86_isa_flags, |
425 | ix86_arch, | |
426 | ix86_tune, | |
427 | ix86_fpmath, | |
428 | cpp_define); | |
429 | } | |
430 | ||
431 | \f | |
432 | /* Register target pragmas. We need to add the hook for parsing #pragma GCC | |
433 | option here rather than in i386.c since it will pull in various preprocessor | |
434 | functions, and those are not present in languages like fortran without a | |
435 | preprocessor. */ | |
436 | ||
437 | void | |
438 | ix86_register_pragmas (void) | |
439 | { | |
5779e713 MM |
440 | /* Update pragma hook to allow parsing #pragma GCC target. */ |
441 | targetm.target_option.pragma_parse = ix86_pragma_target_parse; | |
ab442df7 MM |
442 | |
443 | #ifdef REGISTER_SUBTARGET_PRAGMAS | |
444 | REGISTER_SUBTARGET_PRAGMAS (); | |
445 | #endif | |
446 | } |