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ab442df7 | 1 | /* Subroutines used for macro/preprocessor support on the ia-32. |
a5544970 | 2 | Copyright (C) 2008-2019 Free Software Foundation, Inc. |
ab442df7 MM |
3 | |
4 | This file is part of GCC. | |
5 | ||
6 | GCC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GCC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GCC; see the file COPYING3. If not see | |
18 | <http://www.gnu.org/licenses/>. */ | |
19 | ||
8fcc61f8 RS |
20 | #define IN_TARGET_CODE 1 |
21 | ||
ab442df7 MM |
22 | #include "config.h" |
23 | #include "system.h" | |
24 | #include "coretypes.h" | |
ab442df7 | 25 | #include "target.h" |
e11c4407 | 26 | #include "c-family/c-common.h" |
4d0cdd0c | 27 | #include "memmodel.h" |
e11c4407 | 28 | #include "tm_p.h" |
39dabefd | 29 | #include "c-family/c-pragma.h" |
ab442df7 | 30 | |
5779e713 | 31 | static bool ix86_pragma_target_parse (tree, tree); |
ab442df7 | 32 | static void ix86_target_macros_internal |
5fbb13a7 | 33 | (HOST_WIDE_INT, HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit, |
ab442df7 MM |
34 | void (*def_or_undef) (cpp_reader *, const char *)); |
35 | ||
ab442df7 MM |
36 | /* Internal function to either define or undef the appropriate system |
37 | macros. */ | |
38 | static void | |
df385b9c | 39 | ix86_target_macros_internal (HOST_WIDE_INT isa_flag, |
5fbb13a7 | 40 | HOST_WIDE_INT isa_flag2, |
ab442df7 MM |
41 | enum processor_type arch, |
42 | enum processor_type tune, | |
43 | enum fpmath_unit fpmath, | |
44 | void (*def_or_undef) (cpp_reader *, | |
45 | const char *)) | |
46 | { | |
073a8998 | 47 | /* For some of the k6/pentium varients there weren't separate ISA bits to |
ab442df7 MM |
48 | identify which tune/arch flag was passed, so figure it out here. */ |
49 | size_t arch_len = strlen (ix86_arch_string); | |
50 | size_t tune_len = strlen (ix86_tune_string); | |
51 | int last_arch_char = ix86_arch_string[arch_len - 1]; | |
52 | int last_tune_char = ix86_tune_string[tune_len - 1]; | |
53 | ||
54 | /* Built-ins based on -march=. */ | |
55 | switch (arch) | |
56 | { | |
57 | case PROCESSOR_I386: | |
58 | break; | |
59 | case PROCESSOR_I486: | |
60 | def_or_undef (parse_in, "__i486"); | |
61 | def_or_undef (parse_in, "__i486__"); | |
62 | break; | |
2d6b2e28 | 63 | case PROCESSOR_LAKEMONT: |
45cef0e9 | 64 | /* Intel MCU is based on Intel Pentium CPU. */ |
ab442df7 MM |
65 | case PROCESSOR_PENTIUM: |
66 | def_or_undef (parse_in, "__i586"); | |
67 | def_or_undef (parse_in, "__i586__"); | |
68 | def_or_undef (parse_in, "__pentium"); | |
69 | def_or_undef (parse_in, "__pentium__"); | |
70 | if (isa_flag & OPTION_MASK_ISA_MMX) | |
71 | def_or_undef (parse_in, "__pentium_mmx__"); | |
72 | break; | |
73 | case PROCESSOR_PENTIUMPRO: | |
74 | def_or_undef (parse_in, "__i686"); | |
75 | def_or_undef (parse_in, "__i686__"); | |
76 | def_or_undef (parse_in, "__pentiumpro"); | |
77 | def_or_undef (parse_in, "__pentiumpro__"); | |
78 | break; | |
79 | case PROCESSOR_GEODE: | |
80 | def_or_undef (parse_in, "__geode"); | |
81 | def_or_undef (parse_in, "__geode__"); | |
82 | break; | |
83 | case PROCESSOR_K6: | |
84 | def_or_undef (parse_in, "__k6"); | |
85 | def_or_undef (parse_in, "__k6__"); | |
86 | if (last_arch_char == '2') | |
87 | def_or_undef (parse_in, "__k6_2__"); | |
88 | else if (last_arch_char == '3') | |
89 | def_or_undef (parse_in, "__k6_3__"); | |
90 | else if (isa_flag & OPTION_MASK_ISA_3DNOW) | |
91 | def_or_undef (parse_in, "__k6_3__"); | |
92 | break; | |
93 | case PROCESSOR_ATHLON: | |
94 | def_or_undef (parse_in, "__athlon"); | |
95 | def_or_undef (parse_in, "__athlon__"); | |
96 | if (isa_flag & OPTION_MASK_ISA_SSE) | |
97 | def_or_undef (parse_in, "__athlon_sse__"); | |
98 | break; | |
99 | case PROCESSOR_K8: | |
100 | def_or_undef (parse_in, "__k8"); | |
101 | def_or_undef (parse_in, "__k8__"); | |
102 | break; | |
103 | case PROCESSOR_AMDFAM10: | |
104 | def_or_undef (parse_in, "__amdfam10"); | |
105 | def_or_undef (parse_in, "__amdfam10__"); | |
106 | break; | |
1133125e HJ |
107 | case PROCESSOR_BDVER1: |
108 | def_or_undef (parse_in, "__bdver1"); | |
109 | def_or_undef (parse_in, "__bdver1__"); | |
110 | break; | |
4d652a18 HJ |
111 | case PROCESSOR_BDVER2: |
112 | def_or_undef (parse_in, "__bdver2"); | |
113 | def_or_undef (parse_in, "__bdver2__"); | |
114 | break; | |
eb2f2b44 GG |
115 | case PROCESSOR_BDVER3: |
116 | def_or_undef (parse_in, "__bdver3"); | |
117 | def_or_undef (parse_in, "__bdver3__"); | |
118 | break; | |
ed97ad47 GG |
119 | case PROCESSOR_BDVER4: |
120 | def_or_undef (parse_in, "__bdver4"); | |
121 | def_or_undef (parse_in, "__bdver4__"); | |
122 | break; | |
9ce29eb0 VK |
123 | case PROCESSOR_ZNVER1: |
124 | def_or_undef (parse_in, "__znver1"); | |
125 | def_or_undef (parse_in, "__znver1__"); | |
126 | break; | |
2901f42f VK |
127 | case PROCESSOR_ZNVER2: |
128 | def_or_undef (parse_in, "__znver2"); | |
129 | def_or_undef (parse_in, "__znver2__"); | |
130 | break; | |
14b52538 CF |
131 | case PROCESSOR_BTVER1: |
132 | def_or_undef (parse_in, "__btver1"); | |
133 | def_or_undef (parse_in, "__btver1__"); | |
134 | break; | |
e32bfc16 VK |
135 | case PROCESSOR_BTVER2: |
136 | def_or_undef (parse_in, "__btver2"); | |
137 | def_or_undef (parse_in, "__btver2__"); | |
138 | break; | |
ab442df7 MM |
139 | case PROCESSOR_PENTIUM4: |
140 | def_or_undef (parse_in, "__pentium4"); | |
141 | def_or_undef (parse_in, "__pentium4__"); | |
142 | break; | |
143 | case PROCESSOR_NOCONA: | |
144 | def_or_undef (parse_in, "__nocona"); | |
145 | def_or_undef (parse_in, "__nocona__"); | |
146 | break; | |
340ef734 | 147 | case PROCESSOR_CORE2: |
ab442df7 MM |
148 | def_or_undef (parse_in, "__core2"); |
149 | def_or_undef (parse_in, "__core2__"); | |
150 | break; | |
d3c11974 | 151 | case PROCESSOR_NEHALEM: |
b2b01543 BS |
152 | def_or_undef (parse_in, "__corei7"); |
153 | def_or_undef (parse_in, "__corei7__"); | |
d3c11974 L |
154 | def_or_undef (parse_in, "__nehalem"); |
155 | def_or_undef (parse_in, "__nehalem__"); | |
b2b01543 | 156 | break; |
d3c11974 | 157 | case PROCESSOR_SANDYBRIDGE: |
fd5564d3 WM |
158 | def_or_undef (parse_in, "__corei7_avx"); |
159 | def_or_undef (parse_in, "__corei7_avx__"); | |
d3c11974 L |
160 | def_or_undef (parse_in, "__sandybridge"); |
161 | def_or_undef (parse_in, "__sandybridge__"); | |
fd5564d3 | 162 | break; |
3a579e09 VY |
163 | case PROCESSOR_HASWELL: |
164 | def_or_undef (parse_in, "__core_avx2"); | |
165 | def_or_undef (parse_in, "__core_avx2__"); | |
d3c11974 L |
166 | def_or_undef (parse_in, "__haswell"); |
167 | def_or_undef (parse_in, "__haswell__"); | |
3a579e09 | 168 | break; |
d3c11974 | 169 | case PROCESSOR_BONNELL: |
b6837b94 JY |
170 | def_or_undef (parse_in, "__atom"); |
171 | def_or_undef (parse_in, "__atom__"); | |
d3c11974 L |
172 | def_or_undef (parse_in, "__bonnell"); |
173 | def_or_undef (parse_in, "__bonnell__"); | |
b6837b94 | 174 | break; |
d3c11974 | 175 | case PROCESSOR_SILVERMONT: |
0b871ccf YR |
176 | def_or_undef (parse_in, "__slm"); |
177 | def_or_undef (parse_in, "__slm__"); | |
d3c11974 L |
178 | def_or_undef (parse_in, "__silvermont"); |
179 | def_or_undef (parse_in, "__silvermont__"); | |
0b871ccf | 180 | break; |
50e461df OM |
181 | case PROCESSOR_GOLDMONT: |
182 | def_or_undef (parse_in, "__goldmont"); | |
183 | def_or_undef (parse_in, "__goldmont__"); | |
184 | break; | |
74b2bb19 OM |
185 | case PROCESSOR_GOLDMONT_PLUS: |
186 | def_or_undef (parse_in, "__goldmont_plus"); | |
187 | def_or_undef (parse_in, "__goldmont_plus__"); | |
188 | break; | |
a548a5a1 OM |
189 | case PROCESSOR_TREMONT: |
190 | def_or_undef (parse_in, "__tremont"); | |
191 | def_or_undef (parse_in, "__tremont__"); | |
192 | break; | |
52747219 IT |
193 | case PROCESSOR_KNL: |
194 | def_or_undef (parse_in, "__knl"); | |
195 | def_or_undef (parse_in, "__knl__"); | |
196 | break; | |
cace2309 SP |
197 | case PROCESSOR_KNM: |
198 | def_or_undef (parse_in, "__knm"); | |
199 | def_or_undef (parse_in, "__knm__"); | |
200 | break; | |
176a3386 OM |
201 | case PROCESSOR_SKYLAKE: |
202 | def_or_undef (parse_in, "__skylake"); | |
203 | def_or_undef (parse_in, "__skylake__"); | |
204 | break; | |
06caf59d KY |
205 | case PROCESSOR_SKYLAKE_AVX512: |
206 | def_or_undef (parse_in, "__skylake_avx512"); | |
207 | def_or_undef (parse_in, "__skylake_avx512__"); | |
208 | break; | |
c234d831 UB |
209 | case PROCESSOR_CANNONLAKE: |
210 | def_or_undef (parse_in, "__cannonlake"); | |
211 | def_or_undef (parse_in, "__cannonlake__"); | |
212 | break; | |
79ab5364 JK |
213 | case PROCESSOR_ICELAKE_CLIENT: |
214 | def_or_undef (parse_in, "__icelake_client"); | |
215 | def_or_undef (parse_in, "__icelake_client__"); | |
216 | break; | |
217 | case PROCESSOR_ICELAKE_SERVER: | |
218 | def_or_undef (parse_in, "__icelake_server"); | |
219 | def_or_undef (parse_in, "__icelake_server__"); | |
02da1e9c | 220 | break; |
7cab07f0 WX |
221 | case PROCESSOR_CASCADELAKE: |
222 | def_or_undef (parse_in, "__cascadelake"); | |
223 | def_or_undef (parse_in, "__cascadelake__"); | |
224 | break; | |
ab442df7 MM |
225 | /* use PROCESSOR_max to not set/unset the arch macro. */ |
226 | case PROCESSOR_max: | |
227 | break; | |
9a7f94d7 | 228 | case PROCESSOR_INTEL: |
9d532162 | 229 | case PROCESSOR_GENERIC: |
ab442df7 MM |
230 | gcc_unreachable (); |
231 | } | |
232 | ||
233 | /* Built-ins based on -mtune=. */ | |
234 | switch (tune) | |
235 | { | |
236 | case PROCESSOR_I386: | |
237 | def_or_undef (parse_in, "__tune_i386__"); | |
238 | break; | |
239 | case PROCESSOR_I486: | |
240 | def_or_undef (parse_in, "__tune_i486__"); | |
241 | break; | |
242 | case PROCESSOR_PENTIUM: | |
243 | def_or_undef (parse_in, "__tune_i586__"); | |
244 | def_or_undef (parse_in, "__tune_pentium__"); | |
245 | if (last_tune_char == 'x') | |
246 | def_or_undef (parse_in, "__tune_pentium_mmx__"); | |
247 | break; | |
248 | case PROCESSOR_PENTIUMPRO: | |
249 | def_or_undef (parse_in, "__tune_i686__"); | |
250 | def_or_undef (parse_in, "__tune_pentiumpro__"); | |
251 | switch (last_tune_char) | |
252 | { | |
253 | case '3': | |
254 | def_or_undef (parse_in, "__tune_pentium3__"); | |
255 | /* FALLTHRU */ | |
256 | case '2': | |
257 | def_or_undef (parse_in, "__tune_pentium2__"); | |
258 | break; | |
259 | } | |
260 | break; | |
261 | case PROCESSOR_GEODE: | |
262 | def_or_undef (parse_in, "__tune_geode__"); | |
263 | break; | |
264 | case PROCESSOR_K6: | |
265 | def_or_undef (parse_in, "__tune_k6__"); | |
266 | if (last_tune_char == '2') | |
267 | def_or_undef (parse_in, "__tune_k6_2__"); | |
268 | else if (last_tune_char == '3') | |
269 | def_or_undef (parse_in, "__tune_k6_3__"); | |
270 | else if (isa_flag & OPTION_MASK_ISA_3DNOW) | |
271 | def_or_undef (parse_in, "__tune_k6_3__"); | |
272 | break; | |
273 | case PROCESSOR_ATHLON: | |
274 | def_or_undef (parse_in, "__tune_athlon__"); | |
275 | if (isa_flag & OPTION_MASK_ISA_SSE) | |
276 | def_or_undef (parse_in, "__tune_athlon_sse__"); | |
277 | break; | |
278 | case PROCESSOR_K8: | |
279 | def_or_undef (parse_in, "__tune_k8__"); | |
280 | break; | |
281 | case PROCESSOR_AMDFAM10: | |
282 | def_or_undef (parse_in, "__tune_amdfam10__"); | |
283 | break; | |
1133125e HJ |
284 | case PROCESSOR_BDVER1: |
285 | def_or_undef (parse_in, "__tune_bdver1__"); | |
286 | break; | |
4d652a18 HJ |
287 | case PROCESSOR_BDVER2: |
288 | def_or_undef (parse_in, "__tune_bdver2__"); | |
289 | break; | |
eb2f2b44 GG |
290 | case PROCESSOR_BDVER3: |
291 | def_or_undef (parse_in, "__tune_bdver3__"); | |
ed97ad47 GG |
292 | break; |
293 | case PROCESSOR_BDVER4: | |
294 | def_or_undef (parse_in, "__tune_bdver4__"); | |
eb2f2b44 | 295 | break; |
9ce29eb0 VK |
296 | case PROCESSOR_ZNVER1: |
297 | def_or_undef (parse_in, "__tune_znver1__"); | |
298 | break; | |
2901f42f VK |
299 | case PROCESSOR_ZNVER2: |
300 | def_or_undef (parse_in, "__tune_znver2__"); | |
301 | break; | |
eb2f2b44 | 302 | case PROCESSOR_BTVER1: |
14b52538 CF |
303 | def_or_undef (parse_in, "__tune_btver1__"); |
304 | break; | |
e32bfc16 VK |
305 | case PROCESSOR_BTVER2: |
306 | def_or_undef (parse_in, "__tune_btver2__"); | |
307 | break; | |
ab442df7 MM |
308 | case PROCESSOR_PENTIUM4: |
309 | def_or_undef (parse_in, "__tune_pentium4__"); | |
310 | break; | |
311 | case PROCESSOR_NOCONA: | |
312 | def_or_undef (parse_in, "__tune_nocona__"); | |
313 | break; | |
340ef734 | 314 | case PROCESSOR_CORE2: |
ab442df7 MM |
315 | def_or_undef (parse_in, "__tune_core2__"); |
316 | break; | |
d3c11974 | 317 | case PROCESSOR_NEHALEM: |
b2b01543 | 318 | def_or_undef (parse_in, "__tune_corei7__"); |
d3c11974 | 319 | def_or_undef (parse_in, "__tune_nehalem__"); |
b2b01543 | 320 | break; |
d3c11974 | 321 | case PROCESSOR_SANDYBRIDGE: |
fd5564d3 | 322 | def_or_undef (parse_in, "__tune_corei7_avx__"); |
d3c11974 | 323 | def_or_undef (parse_in, "__tune_sandybridge__"); |
fd5564d3 | 324 | break; |
3a579e09 VY |
325 | case PROCESSOR_HASWELL: |
326 | def_or_undef (parse_in, "__tune_core_avx2__"); | |
d3c11974 | 327 | def_or_undef (parse_in, "__tune_haswell__"); |
3a579e09 | 328 | break; |
d3c11974 | 329 | case PROCESSOR_BONNELL: |
b6837b94 | 330 | def_or_undef (parse_in, "__tune_atom__"); |
d3c11974 | 331 | def_or_undef (parse_in, "__tune_bonnell__"); |
b6837b94 | 332 | break; |
d3c11974 | 333 | case PROCESSOR_SILVERMONT: |
0b871ccf | 334 | def_or_undef (parse_in, "__tune_slm__"); |
d3c11974 | 335 | def_or_undef (parse_in, "__tune_silvermont__"); |
0b871ccf | 336 | break; |
50e461df OM |
337 | case PROCESSOR_GOLDMONT: |
338 | def_or_undef (parse_in, "__tune_goldmont__"); | |
339 | break; | |
74b2bb19 OM |
340 | case PROCESSOR_GOLDMONT_PLUS: |
341 | def_or_undef (parse_in, "__tune_goldmont_plus__"); | |
342 | break; | |
a548a5a1 OM |
343 | case PROCESSOR_TREMONT: |
344 | def_or_undef (parse_in, "__tune_tremont__"); | |
345 | break; | |
52747219 IT |
346 | case PROCESSOR_KNL: |
347 | def_or_undef (parse_in, "__tune_knl__"); | |
348 | break; | |
cace2309 SP |
349 | case PROCESSOR_KNM: |
350 | def_or_undef (parse_in, "__tune_knm__"); | |
351 | break; | |
176a3386 OM |
352 | case PROCESSOR_SKYLAKE: |
353 | def_or_undef (parse_in, "__tune_skylake__"); | |
354 | break; | |
06caf59d KY |
355 | case PROCESSOR_SKYLAKE_AVX512: |
356 | def_or_undef (parse_in, "__tune_skylake_avx512__"); | |
357 | break; | |
c234d831 UB |
358 | case PROCESSOR_CANNONLAKE: |
359 | def_or_undef (parse_in, "__tune_cannonlake__"); | |
360 | break; | |
79ab5364 JK |
361 | case PROCESSOR_ICELAKE_CLIENT: |
362 | def_or_undef (parse_in, "__tune_icelake_client__"); | |
363 | break; | |
364 | case PROCESSOR_ICELAKE_SERVER: | |
365 | def_or_undef (parse_in, "__tune_icelake_server__"); | |
02da1e9c | 366 | break; |
2d6b2e28 L |
367 | case PROCESSOR_LAKEMONT: |
368 | def_or_undef (parse_in, "__tune_lakemont__"); | |
45cef0e9 | 369 | break; |
7cab07f0 WX |
370 | case PROCESSOR_CASCADELAKE: |
371 | def_or_undef (parse_in, "__tune_cascadelake__"); | |
372 | break; | |
9a7f94d7 | 373 | case PROCESSOR_INTEL: |
9d532162 | 374 | case PROCESSOR_GENERIC: |
ab442df7 MM |
375 | break; |
376 | /* use PROCESSOR_max to not set/unset the tune macro. */ | |
377 | case PROCESSOR_max: | |
378 | break; | |
379 | } | |
380 | ||
bb664f09 UB |
381 | switch (ix86_cmodel) |
382 | { | |
383 | case CM_SMALL: | |
384 | case CM_SMALL_PIC: | |
385 | def_or_undef (parse_in, "__code_model_small__"); | |
386 | break; | |
387 | case CM_MEDIUM: | |
388 | case CM_MEDIUM_PIC: | |
389 | def_or_undef (parse_in, "__code_model_medium__"); | |
390 | break; | |
391 | case CM_LARGE: | |
392 | case CM_LARGE_PIC: | |
393 | def_or_undef (parse_in, "__code_model_large__"); | |
394 | break; | |
395 | case CM_32: | |
396 | def_or_undef (parse_in, "__code_model_32__"); | |
397 | break; | |
398 | case CM_KERNEL: | |
399 | def_or_undef (parse_in, "__code_model_kernel__"); | |
400 | break; | |
401 | default: | |
402 | ; | |
403 | } | |
404 | ||
13b93d4b OM |
405 | if (isa_flag2 & OPTION_MASK_ISA_WBNOINVD) |
406 | def_or_undef (parse_in, "__WBNOINVD__"); | |
ab442df7 MM |
407 | if (isa_flag & OPTION_MASK_ISA_MMX) |
408 | def_or_undef (parse_in, "__MMX__"); | |
409 | if (isa_flag & OPTION_MASK_ISA_3DNOW) | |
410 | def_or_undef (parse_in, "__3dNOW__"); | |
411 | if (isa_flag & OPTION_MASK_ISA_3DNOW_A) | |
412 | def_or_undef (parse_in, "__3dNOW_A__"); | |
413 | if (isa_flag & OPTION_MASK_ISA_SSE) | |
414 | def_or_undef (parse_in, "__SSE__"); | |
415 | if (isa_flag & OPTION_MASK_ISA_SSE2) | |
416 | def_or_undef (parse_in, "__SSE2__"); | |
417 | if (isa_flag & OPTION_MASK_ISA_SSE3) | |
418 | def_or_undef (parse_in, "__SSE3__"); | |
419 | if (isa_flag & OPTION_MASK_ISA_SSSE3) | |
420 | def_or_undef (parse_in, "__SSSE3__"); | |
421 | if (isa_flag & OPTION_MASK_ISA_SSE4_1) | |
422 | def_or_undef (parse_in, "__SSE4_1__"); | |
423 | if (isa_flag & OPTION_MASK_ISA_SSE4_2) | |
424 | def_or_undef (parse_in, "__SSE4_2__"); | |
425 | if (isa_flag & OPTION_MASK_ISA_AES) | |
426 | def_or_undef (parse_in, "__AES__"); | |
c1618f82 AI |
427 | if (isa_flag & OPTION_MASK_ISA_SHA) |
428 | def_or_undef (parse_in, "__SHA__"); | |
ab442df7 MM |
429 | if (isa_flag & OPTION_MASK_ISA_PCLMUL) |
430 | def_or_undef (parse_in, "__PCLMUL__"); | |
95879c72 L |
431 | if (isa_flag & OPTION_MASK_ISA_AVX) |
432 | def_or_undef (parse_in, "__AVX__"); | |
7afac110 KY |
433 | if (isa_flag & OPTION_MASK_ISA_AVX2) |
434 | def_or_undef (parse_in, "__AVX2__"); | |
3f97cb0b AI |
435 | if (isa_flag & OPTION_MASK_ISA_AVX512F) |
436 | def_or_undef (parse_in, "__AVX512F__"); | |
437 | if (isa_flag & OPTION_MASK_ISA_AVX512ER) | |
438 | def_or_undef (parse_in, "__AVX512ER__"); | |
439 | if (isa_flag & OPTION_MASK_ISA_AVX512CD) | |
440 | def_or_undef (parse_in, "__AVX512CD__"); | |
441 | if (isa_flag & OPTION_MASK_ISA_AVX512PF) | |
442 | def_or_undef (parse_in, "__AVX512PF__"); | |
07165dd7 AI |
443 | if (isa_flag & OPTION_MASK_ISA_AVX512DQ) |
444 | def_or_undef (parse_in, "__AVX512DQ__"); | |
b525d943 AI |
445 | if (isa_flag & OPTION_MASK_ISA_AVX512BW) |
446 | def_or_undef (parse_in, "__AVX512BW__"); | |
f4af595f AI |
447 | if (isa_flag & OPTION_MASK_ISA_AVX512VL) |
448 | def_or_undef (parse_in, "__AVX512VL__"); | |
3dcc8af5 IT |
449 | if (isa_flag & OPTION_MASK_ISA_AVX512VBMI) |
450 | def_or_undef (parse_in, "__AVX512VBMI__"); | |
4190ea38 IT |
451 | if (isa_flag & OPTION_MASK_ISA_AVX512IFMA) |
452 | def_or_undef (parse_in, "__AVX512IFMA__"); | |
5fbb13a7 KY |
453 | if (isa_flag2 & OPTION_MASK_ISA_AVX5124VNNIW) |
454 | def_or_undef (parse_in, "__AVX5124VNNIW__"); | |
b1ccd09a | 455 | if (isa_flag & OPTION_MASK_ISA_AVX512VBMI2) |
fca51879 | 456 | def_or_undef (parse_in, "__AVX512VBMI2__"); |
fefab953 | 457 | if (isa_flag & OPTION_MASK_ISA_AVX512VNNI) |
98966963 | 458 | def_or_undef (parse_in, "__AVX512VNNI__"); |
13b93d4b OM |
459 | if (isa_flag2 & OPTION_MASK_ISA_PCONFIG) |
460 | def_or_undef (parse_in, "__PCONFIG__"); | |
73e32c47 JK |
461 | if (isa_flag2 & OPTION_MASK_ISA_SGX) |
462 | def_or_undef (parse_in, "__SGX__"); | |
5fbb13a7 KY |
463 | if (isa_flag2 & OPTION_MASK_ISA_AVX5124FMAPS) |
464 | def_or_undef (parse_in, "__AVX5124FMAPS__"); | |
2e34b5bc | 465 | if (isa_flag & OPTION_MASK_ISA_AVX512BITALG) |
e2a29465 | 466 | def_or_undef (parse_in, "__AVX512BITALG__"); |
2e34b5bc | 467 | if (isa_flag & OPTION_MASK_ISA_AVX512VPOPCNTDQ) |
79fc8ffe | 468 | def_or_undef (parse_in, "__AVX512VPOPCNTDQ__"); |
95879c72 L |
469 | if (isa_flag & OPTION_MASK_ISA_FMA) |
470 | def_or_undef (parse_in, "__FMA__"); | |
bf2eaa3f KY |
471 | if (isa_flag & OPTION_MASK_ISA_RTM) |
472 | def_or_undef (parse_in, "__RTM__"); | |
ab442df7 MM |
473 | if (isa_flag & OPTION_MASK_ISA_SSE4A) |
474 | def_or_undef (parse_in, "__SSE4A__"); | |
cbf2e4d4 HJ |
475 | if (isa_flag & OPTION_MASK_ISA_FMA4) |
476 | def_or_undef (parse_in, "__FMA4__"); | |
43a8b705 HJ |
477 | if (isa_flag & OPTION_MASK_ISA_XOP) |
478 | def_or_undef (parse_in, "__XOP__"); | |
3e901069 HJ |
479 | if (isa_flag & OPTION_MASK_ISA_LWP) |
480 | def_or_undef (parse_in, "__LWP__"); | |
13c0eb43 SP |
481 | if (isa_flag & OPTION_MASK_ISA_ABM) |
482 | def_or_undef (parse_in, "__ABM__"); | |
91afcfa3 QN |
483 | if (isa_flag & OPTION_MASK_ISA_BMI) |
484 | def_or_undef (parse_in, "__BMI__"); | |
82feeb8d L |
485 | if (isa_flag & OPTION_MASK_ISA_BMI2) |
486 | def_or_undef (parse_in, "__BMI2__"); | |
5fcafa60 KY |
487 | if (isa_flag & OPTION_MASK_ISA_LZCNT) |
488 | def_or_undef (parse_in, "__LZCNT__"); | |
94d13ad1 QN |
489 | if (isa_flag & OPTION_MASK_ISA_TBM) |
490 | def_or_undef (parse_in, "__TBM__"); | |
3bccee03 SP |
491 | if (isa_flag & OPTION_MASK_ISA_POPCNT) |
492 | def_or_undef (parse_in, "__POPCNT__"); | |
4ee89d5f L |
493 | if (isa_flag & OPTION_MASK_ISA_FSGSBASE) |
494 | def_or_undef (parse_in, "__FSGSBASE__"); | |
495 | if (isa_flag & OPTION_MASK_ISA_RDRND) | |
496 | def_or_undef (parse_in, "__RDRND__"); | |
497 | if (isa_flag & OPTION_MASK_ISA_F16C) | |
498 | def_or_undef (parse_in, "__F16C__"); | |
4c340b5d KY |
499 | if (isa_flag & OPTION_MASK_ISA_RDSEED) |
500 | def_or_undef (parse_in, "__RDSEED__"); | |
e61c94dd KY |
501 | if (isa_flag & OPTION_MASK_ISA_PRFCHW) |
502 | def_or_undef (parse_in, "__PRFCHW__"); | |
d05e383b MZ |
503 | if (isa_flag & OPTION_MASK_ISA_ADX) |
504 | def_or_undef (parse_in, "__ADX__"); | |
3a0d99bb AI |
505 | if (isa_flag & OPTION_MASK_ISA_FXSR) |
506 | def_or_undef (parse_in, "__FXSR__"); | |
507 | if (isa_flag & OPTION_MASK_ISA_XSAVE) | |
508 | def_or_undef (parse_in, "__XSAVE__"); | |
509 | if (isa_flag & OPTION_MASK_ISA_XSAVEOPT) | |
510 | def_or_undef (parse_in, "__XSAVEOPT__"); | |
43b3f52f IT |
511 | if (isa_flag & OPTION_MASK_ISA_PREFETCHWT1) |
512 | def_or_undef (parse_in, "__PREFETCHWT1__"); | |
ab442df7 MM |
513 | if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE)) |
514 | def_or_undef (parse_in, "__SSE_MATH__"); | |
515 | if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2)) | |
516 | def_or_undef (parse_in, "__SSE2_MATH__"); | |
9cdea277 IT |
517 | if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT) |
518 | def_or_undef (parse_in, "__CLFLUSHOPT__"); | |
b1ccd09a | 519 | if (isa_flag2 & OPTION_MASK_ISA_CLZERO) |
9ce29eb0 | 520 | def_or_undef (parse_in, "__CLZERO__"); |
9cdea277 IT |
521 | if (isa_flag & OPTION_MASK_ISA_XSAVEC) |
522 | def_or_undef (parse_in, "__XSAVEC__"); | |
523 | if (isa_flag & OPTION_MASK_ISA_XSAVES) | |
524 | def_or_undef (parse_in, "__XSAVES__"); | |
9c3bca11 IT |
525 | if (isa_flag & OPTION_MASK_ISA_CLWB) |
526 | def_or_undef (parse_in, "__CLWB__"); | |
b1ccd09a | 527 | if (isa_flag2 & OPTION_MASK_ISA_MWAITX) |
500a08b2 | 528 | def_or_undef (parse_in, "__MWAITX__"); |
41a4ef22 KY |
529 | if (isa_flag & OPTION_MASK_ISA_PKU) |
530 | def_or_undef (parse_in, "__PKU__"); | |
1d516992 JK |
531 | if (isa_flag2 & OPTION_MASK_ISA_RDPID) |
532 | def_or_undef (parse_in, "__RDPID__"); | |
d4bc3829 | 533 | if (isa_flag & OPTION_MASK_ISA_GFNI) |
b8cca31c | 534 | def_or_undef (parse_in, "__GFNI__"); |
e95dda95 L |
535 | if ((isa_flag & OPTION_MASK_ISA_SHSTK)) |
536 | def_or_undef (parse_in, "__SHSTK__"); | |
b7b0a4fa JK |
537 | if (isa_flag2 & OPTION_MASK_ISA_VAES) |
538 | def_or_undef (parse_in, "__VAES__"); | |
6557be99 JK |
539 | if (isa_flag & OPTION_MASK_ISA_VPCLMULQDQ) |
540 | def_or_undef (parse_in, "__VPCLMULQDQ__"); | |
37d51c75 SP |
541 | if (isa_flag & OPTION_MASK_ISA_MOVDIRI) |
542 | def_or_undef (parse_in, "__MOVDIRI__"); | |
543 | if (isa_flag2 & OPTION_MASK_ISA_MOVDIR64B) | |
544 | def_or_undef (parse_in, "__MOVDIR64B__"); | |
55f31ed1 SP |
545 | if (isa_flag2 & OPTION_MASK_ISA_WAITPKG) |
546 | def_or_undef (parse_in, "__WAITPKG__"); | |
f8d9957e SP |
547 | if (isa_flag2 & OPTION_MASK_ISA_CLDEMOTE) |
548 | def_or_undef (parse_in, "__CLDEMOTE__"); | |
41f8d1fc AK |
549 | if (isa_flag2 & OPTION_MASK_ISA_PTWRITE) |
550 | def_or_undef (parse_in, "__PTWRITE__"); | |
4f0e90fa HL |
551 | if (isa_flag2 & OPTION_MASK_ISA_AVX512BF16) |
552 | def_or_undef (parse_in, "__AVX512BF16__"); | |
d9063947 L |
553 | if (TARGET_IAMCU) |
554 | { | |
555 | def_or_undef (parse_in, "__iamcu"); | |
556 | def_or_undef (parse_in, "__iamcu__"); | |
557 | } | |
ab442df7 MM |
558 | } |
559 | ||
560 | \f | |
5779e713 MM |
561 | /* Hook to validate the current #pragma GCC target and set the state, and |
562 | update the macros based on what was changed. If ARGS is NULL, then | |
563 | POP_TARGET is used to reset the options. */ | |
ab442df7 MM |
564 | |
565 | static bool | |
5779e713 | 566 | ix86_pragma_target_parse (tree args, tree pop_target) |
ab442df7 | 567 | { |
bf7b5747 | 568 | tree prev_tree = build_target_option_node (&global_options); |
ab442df7 MM |
569 | tree cur_tree; |
570 | struct cl_target_option *prev_opt; | |
571 | struct cl_target_option *cur_opt; | |
df385b9c L |
572 | HOST_WIDE_INT prev_isa; |
573 | HOST_WIDE_INT cur_isa; | |
574 | HOST_WIDE_INT diff_isa; | |
5fbb13a7 KY |
575 | HOST_WIDE_INT prev_isa2; |
576 | HOST_WIDE_INT cur_isa2; | |
577 | HOST_WIDE_INT diff_isa2; | |
ab442df7 MM |
578 | enum processor_type prev_arch; |
579 | enum processor_type prev_tune; | |
580 | enum processor_type cur_arch; | |
581 | enum processor_type cur_tune; | |
582 | ||
583 | if (! args) | |
584 | { | |
97db2bf7 | 585 | cur_tree = (pop_target ? pop_target : target_option_default_node); |
46625112 JM |
586 | cl_target_option_restore (&global_options, |
587 | TREE_TARGET_OPTION (cur_tree)); | |
ab442df7 MM |
588 | } |
589 | else | |
590 | { | |
cc2a672a ML |
591 | cur_tree = ix86_valid_target_attribute_tree (NULL_TREE, args, |
592 | &global_options, | |
593 | &global_options_set, 0); | |
97db2bf7 ST |
594 | if (!cur_tree || cur_tree == error_mark_node) |
595 | { | |
596 | cl_target_option_restore (&global_options, | |
597 | TREE_TARGET_OPTION (prev_tree)); | |
598 | return false; | |
599 | } | |
ab442df7 MM |
600 | } |
601 | ||
602 | target_option_current_node = cur_tree; | |
97db2bf7 | 603 | ix86_reset_previous_fndecl (); |
ab442df7 MM |
604 | |
605 | /* Figure out the previous/current isa, arch, tune and the differences. */ | |
606 | prev_opt = TREE_TARGET_OPTION (prev_tree); | |
607 | cur_opt = TREE_TARGET_OPTION (cur_tree); | |
e3339d0f JM |
608 | prev_isa = prev_opt->x_ix86_isa_flags; |
609 | cur_isa = cur_opt->x_ix86_isa_flags; | |
ab442df7 | 610 | diff_isa = (prev_isa ^ cur_isa); |
5fbb13a7 KY |
611 | prev_isa2 = prev_opt->x_ix86_isa_flags2; |
612 | cur_isa2 = cur_opt->x_ix86_isa_flags2; | |
613 | diff_isa2 = (prev_isa2 ^ cur_isa2); | |
32e8bb8e ILT |
614 | prev_arch = (enum processor_type) prev_opt->arch; |
615 | prev_tune = (enum processor_type) prev_opt->tune; | |
616 | cur_arch = (enum processor_type) cur_opt->arch; | |
617 | cur_tune = (enum processor_type) cur_opt->tune; | |
ab442df7 MM |
618 | |
619 | /* If the same processor is used for both previous and current options, don't | |
620 | change the macros. */ | |
621 | if (cur_arch == prev_arch) | |
622 | cur_arch = prev_arch = PROCESSOR_max; | |
623 | ||
624 | if (cur_tune == prev_tune) | |
625 | cur_tune = prev_tune = PROCESSOR_max; | |
626 | ||
627 | /* Undef all of the macros for that are no longer current. */ | |
628 | ix86_target_macros_internal (prev_isa & diff_isa, | |
5fbb13a7 | 629 | prev_isa2 & diff_isa2, |
ab442df7 MM |
630 | prev_arch, |
631 | prev_tune, | |
8023568e | 632 | (enum fpmath_unit) prev_opt->x_ix86_fpmath, |
ab442df7 MM |
633 | cpp_undef); |
634 | ||
fa5d6c75 JJ |
635 | /* For the definitions, ensure all newly defined macros are considered |
636 | as used for -Wunused-macros. There is no point warning about the | |
637 | compiler predefined macros. */ | |
638 | cpp_options *cpp_opts = cpp_get_options (parse_in); | |
639 | unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros; | |
640 | cpp_opts->warn_unused_macros = 0; | |
641 | ||
ab442df7 MM |
642 | /* Define all of the macros for new options that were just turned on. */ |
643 | ix86_target_macros_internal (cur_isa & diff_isa, | |
5fbb13a7 | 644 | cur_isa2 & diff_isa2, |
ab442df7 MM |
645 | cur_arch, |
646 | cur_tune, | |
8023568e | 647 | (enum fpmath_unit) cur_opt->x_ix86_fpmath, |
ab442df7 MM |
648 | cpp_define); |
649 | ||
fa5d6c75 JJ |
650 | cpp_opts->warn_unused_macros = saved_warn_unused_macros; |
651 | ||
ab442df7 MM |
652 | return true; |
653 | } | |
654 | \f | |
655 | /* Function to tell the preprocessor about the defines for the current target. */ | |
656 | ||
657 | void | |
658 | ix86_target_macros (void) | |
659 | { | |
660 | /* 32/64-bit won't change with target specific options, so do the assert and | |
661 | builtin_define_std calls here. */ | |
662 | if (TARGET_64BIT) | |
663 | { | |
664 | cpp_assert (parse_in, "cpu=x86_64"); | |
665 | cpp_assert (parse_in, "machine=x86_64"); | |
666 | cpp_define (parse_in, "__amd64"); | |
667 | cpp_define (parse_in, "__amd64__"); | |
668 | cpp_define (parse_in, "__x86_64"); | |
669 | cpp_define (parse_in, "__x86_64__"); | |
6573c644 L |
670 | if (TARGET_X32) |
671 | { | |
672 | cpp_define (parse_in, "_ILP32"); | |
673 | cpp_define (parse_in, "__ILP32__"); | |
674 | } | |
ab442df7 MM |
675 | } |
676 | else | |
677 | { | |
678 | cpp_assert (parse_in, "cpu=i386"); | |
679 | cpp_assert (parse_in, "machine=i386"); | |
680 | builtin_define_std ("i386"); | |
681 | } | |
682 | ||
02ac9503 UB |
683 | if (!TARGET_80387) |
684 | cpp_define (parse_in, "_SOFT_FLOAT"); | |
685 | ||
c637141a L |
686 | if (TARGET_LONG_DOUBLE_64) |
687 | cpp_define (parse_in, "__LONG_DOUBLE_64__"); | |
688 | ||
a2a1ddb5 L |
689 | if (TARGET_LONG_DOUBLE_128) |
690 | cpp_define (parse_in, "__LONG_DOUBLE_128__"); | |
691 | ||
30c0a59a MG |
692 | if (TARGET_128BIT_LONG_DOUBLE) |
693 | cpp_define (parse_in, "__SIZEOF_FLOAT80__=16"); | |
694 | else | |
695 | cpp_define (parse_in, "__SIZEOF_FLOAT80__=12"); | |
696 | ||
697 | cpp_define (parse_in, "__SIZEOF_FLOAT128__=16"); | |
698 | ||
d5becc11 JJ |
699 | cpp_define_formatted (parse_in, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE); |
700 | cpp_define_formatted (parse_in, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE); | |
701 | ||
f767f583 RH |
702 | cpp_define (parse_in, "__GCC_ASM_FLAG_OUTPUTS__"); |
703 | ||
ab442df7 | 704 | ix86_target_macros_internal (ix86_isa_flags, |
5fbb13a7 | 705 | ix86_isa_flags2, |
ab442df7 MM |
706 | ix86_arch, |
707 | ix86_tune, | |
708 | ix86_fpmath, | |
709 | cpp_define); | |
00402c94 RH |
710 | |
711 | cpp_define (parse_in, "__SEG_FS"); | |
712 | cpp_define (parse_in, "__SEG_GS"); | |
e95dda95 L |
713 | |
714 | if (flag_cf_protection != CF_NONE) | |
715 | cpp_define_formatted (parse_in, "__CET__=%d", | |
716 | flag_cf_protection & ~CF_SET); | |
ab442df7 MM |
717 | } |
718 | ||
719 | \f | |
720 | /* Register target pragmas. We need to add the hook for parsing #pragma GCC | |
721 | option here rather than in i386.c since it will pull in various preprocessor | |
722 | functions, and those are not present in languages like fortran without a | |
723 | preprocessor. */ | |
724 | ||
725 | void | |
726 | ix86_register_pragmas (void) | |
727 | { | |
5779e713 MM |
728 | /* Update pragma hook to allow parsing #pragma GCC target. */ |
729 | targetm.target_option.pragma_parse = ix86_pragma_target_parse; | |
ab442df7 | 730 | |
00402c94 RH |
731 | c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS); |
732 | c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS); | |
00402c94 | 733 | |
ab442df7 MM |
734 | #ifdef REGISTER_SUBTARGET_PRAGMAS |
735 | REGISTER_SUBTARGET_PRAGMAS (); | |
736 | #endif | |
737 | } |