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ab442df7 1/* Subroutines used for macro/preprocessor support on the ia-32.
8d9254fc 2 Copyright (C) 2008-2020 Free Software Foundation, Inc.
ab442df7
MM		 3
4This file is part of GCC.
5
6GCC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 3, or (at your option)
9any later version.
10
11GCC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GCC; see the file COPYING3. If not see
18<http://www.gnu.org/licenses/>. */
19
8fcc61f8
RS		 20#define IN_TARGET_CODE 1
21
ab442df7
MM		 22#include "config.h"
23#include "system.h"
24#include "coretypes.h"
ab442df7 25#include "target.h"
e11c4407 26#include "c-family/c-common.h"
4d0cdd0c 27#include "memmodel.h"
e11c4407 28#include "tm_p.h"
39dabefd 29#include "c-family/c-pragma.h"
ab442df7 30
5779e713 31static bool ix86_pragma_target_parse (tree, tree);
ab442df7 32static void ix86_target_macros_internal
5fbb13a7 33 (HOST_WIDE_INT, HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit,
ab442df7
MM		 34 void (*def_or_undef) (cpp_reader *, const char *));
35
ab442df7
MM		 36/* Internal function to either define or undef the appropriate system
37 macros. */
38static void
df385b9c 39ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
5fbb13a7 40 HOST_WIDE_INT isa_flag2,
ab442df7
MM		 41 enum processor_type arch,
42 enum processor_type tune,
43 enum fpmath_unit fpmath,
44 void (*def_or_undef) (cpp_reader *,
45 const char *))
46{
073a8998 47 /* For some of the k6/pentium varients there weren't separate ISA bits to
ab442df7
MM		 48 identify which tune/arch flag was passed, so figure it out here. */
49 size_t arch_len = strlen (ix86_arch_string);
50 size_t tune_len = strlen (ix86_tune_string);
51 int last_arch_char = ix86_arch_string[arch_len - 1];
52 int last_tune_char = ix86_tune_string[tune_len - 1];
53
54 /* Built-ins based on -march=. */
55 switch (arch)
56 {
57 case PROCESSOR_I386:
58 break;
59 case PROCESSOR_I486:
60 def_or_undef (parse_in, "__i486");
61 def_or_undef (parse_in, "__i486__");
62 break;
2d6b2e28 63 case PROCESSOR_LAKEMONT:
45cef0e9 64 /* Intel MCU is based on Intel Pentium CPU. */
ab442df7
MM		 65 case PROCESSOR_PENTIUM:
66 def_or_undef (parse_in, "__i586");
67 def_or_undef (parse_in, "__i586__");
68 def_or_undef (parse_in, "__pentium");
69 def_or_undef (parse_in, "__pentium__");
70 if (isa_flag & OPTION_MASK_ISA_MMX)
71 def_or_undef (parse_in, "__pentium_mmx__");
72 break;
73 case PROCESSOR_PENTIUMPRO:
74 def_or_undef (parse_in, "__i686");
75 def_or_undef (parse_in, "__i686__");
76 def_or_undef (parse_in, "__pentiumpro");
77 def_or_undef (parse_in, "__pentiumpro__");
78 break;
79 case PROCESSOR_GEODE:
80 def_or_undef (parse_in, "__geode");
81 def_or_undef (parse_in, "__geode__");
82 break;
83 case PROCESSOR_K6:
84 def_or_undef (parse_in, "__k6");
85 def_or_undef (parse_in, "__k6__");
86 if (last_arch_char == '2')
87 def_or_undef (parse_in, "__k6_2__");
88 else if (last_arch_char == '3')
89 def_or_undef (parse_in, "__k6_3__");
90 else if (isa_flag & OPTION_MASK_ISA_3DNOW)
91 def_or_undef (parse_in, "__k6_3__");
92 break;
93 case PROCESSOR_ATHLON:
94 def_or_undef (parse_in, "__athlon");
95 def_or_undef (parse_in, "__athlon__");
96 if (isa_flag & OPTION_MASK_ISA_SSE)
97 def_or_undef (parse_in, "__athlon_sse__");
98 break;
99 case PROCESSOR_K8:
100 def_or_undef (parse_in, "__k8");
101 def_or_undef (parse_in, "__k8__");
102 break;
103 case PROCESSOR_AMDFAM10:
104 def_or_undef (parse_in, "__amdfam10");
105 def_or_undef (parse_in, "__amdfam10__");
106 break;
1133125e
HJ		 107 case PROCESSOR_BDVER1:
108 def_or_undef (parse_in, "__bdver1");
109 def_or_undef (parse_in, "__bdver1__");
110 break;
4d652a18
HJ		 111 case PROCESSOR_BDVER2:
112 def_or_undef (parse_in, "__bdver2");
113 def_or_undef (parse_in, "__bdver2__");
114 break;
eb2f2b44
GG		 115 case PROCESSOR_BDVER3:
116 def_or_undef (parse_in, "__bdver3");
117 def_or_undef (parse_in, "__bdver3__");
118 break;
ed97ad47
GG		 119 case PROCESSOR_BDVER4:
120 def_or_undef (parse_in, "__bdver4");
121 def_or_undef (parse_in, "__bdver4__");
122 break;
9ce29eb0
VK		 123 case PROCESSOR_ZNVER1:
124 def_or_undef (parse_in, "__znver1");
125 def_or_undef (parse_in, "__znver1__");
126 break;
2901f42f
VK		 127 case PROCESSOR_ZNVER2:
128 def_or_undef (parse_in, "__znver2");
129 def_or_undef (parse_in, "__znver2__");
130 break;
14b52538
CF		 131 case PROCESSOR_BTVER1:
132 def_or_undef (parse_in, "__btver1");
133 def_or_undef (parse_in, "__btver1__");
134 break;
e32bfc16
VK		 135 case PROCESSOR_BTVER2:
136 def_or_undef (parse_in, "__btver2");
137 def_or_undef (parse_in, "__btver2__");
138 break;
ab442df7
MM		 139 case PROCESSOR_PENTIUM4:
140 def_or_undef (parse_in, "__pentium4");
141 def_or_undef (parse_in, "__pentium4__");
142 break;
143 case PROCESSOR_NOCONA:
144 def_or_undef (parse_in, "__nocona");
145 def_or_undef (parse_in, "__nocona__");
146 break;
340ef734 147 case PROCESSOR_CORE2:
ab442df7
MM		 148 def_or_undef (parse_in, "__core2");
149 def_or_undef (parse_in, "__core2__");
150 break;
d3c11974 151 case PROCESSOR_NEHALEM:
b2b01543
BS		 152 def_or_undef (parse_in, "__corei7");
153 def_or_undef (parse_in, "__corei7__");
d3c11974
L		 154 def_or_undef (parse_in, "__nehalem");
155 def_or_undef (parse_in, "__nehalem__");
b2b01543 156 break;
d3c11974 157 case PROCESSOR_SANDYBRIDGE:
fd5564d3
WM		 158 def_or_undef (parse_in, "__corei7_avx");
159 def_or_undef (parse_in, "__corei7_avx__");
d3c11974
L		 160 def_or_undef (parse_in, "__sandybridge");
161 def_or_undef (parse_in, "__sandybridge__");
fd5564d3 162 break;
3a579e09
VY		 163 case PROCESSOR_HASWELL:
164 def_or_undef (parse_in, "__core_avx2");
165 def_or_undef (parse_in, "__core_avx2__");
d3c11974
L		 166 def_or_undef (parse_in, "__haswell");
167 def_or_undef (parse_in, "__haswell__");
3a579e09 168 break;
d3c11974 169 case PROCESSOR_BONNELL:
b6837b94
JY		 170 def_or_undef (parse_in, "__atom");
171 def_or_undef (parse_in, "__atom__");
d3c11974
L		 172 def_or_undef (parse_in, "__bonnell");
173 def_or_undef (parse_in, "__bonnell__");
b6837b94 174 break;
d3c11974 175 case PROCESSOR_SILVERMONT:
0b871ccf
YR		 176 def_or_undef (parse_in, "__slm");
177 def_or_undef (parse_in, "__slm__");
d3c11974
L		 178 def_or_undef (parse_in, "__silvermont");
179 def_or_undef (parse_in, "__silvermont__");
0b871ccf 180 break;
50e461df
OM		 181 case PROCESSOR_GOLDMONT:
182 def_or_undef (parse_in, "__goldmont");
183 def_or_undef (parse_in, "__goldmont__");
184 break;
74b2bb19
OM		 185 case PROCESSOR_GOLDMONT_PLUS:
186 def_or_undef (parse_in, "__goldmont_plus");
187 def_or_undef (parse_in, "__goldmont_plus__");
188 break;
a548a5a1
OM		 189 case PROCESSOR_TREMONT:
190 def_or_undef (parse_in, "__tremont");
191 def_or_undef (parse_in, "__tremont__");
192 break;
52747219
IT		 193 case PROCESSOR_KNL:
194 def_or_undef (parse_in, "__knl");
195 def_or_undef (parse_in, "__knl__");
196 break;
cace2309
SP		 197 case PROCESSOR_KNM:
198 def_or_undef (parse_in, "__knm");
199 def_or_undef (parse_in, "__knm__");
200 break;
176a3386
OM		 201 case PROCESSOR_SKYLAKE:
202 def_or_undef (parse_in, "__skylake");
203 def_or_undef (parse_in, "__skylake__");
204 break;
06caf59d
KY		 205 case PROCESSOR_SKYLAKE_AVX512:
206 def_or_undef (parse_in, "__skylake_avx512");
207 def_or_undef (parse_in, "__skylake_avx512__");
208 break;
c234d831
UB		 209 case PROCESSOR_CANNONLAKE:
210 def_or_undef (parse_in, "__cannonlake");
211 def_or_undef (parse_in, "__cannonlake__");
212 break;
79ab5364
JK		 213 case PROCESSOR_ICELAKE_CLIENT:
214 def_or_undef (parse_in, "__icelake_client");
215 def_or_undef (parse_in, "__icelake_client__");
216 break;
217 case PROCESSOR_ICELAKE_SERVER:
218 def_or_undef (parse_in, "__icelake_server");
219 def_or_undef (parse_in, "__icelake_server__");
02da1e9c 220 break;
7cab07f0
WX		 221 case PROCESSOR_CASCADELAKE:
222 def_or_undef (parse_in, "__cascadelake");
223 def_or_undef (parse_in, "__cascadelake__");
224 break;
a9fcfec3
HL		 225 case PROCESSOR_TIGERLAKE:
226 def_or_undef (parse_in, "__tigerlake");
227 def_or_undef (parse_in, "__tigerlake__");
228 break;
229 case PROCESSOR_COOPERLAKE:
230 def_or_undef (parse_in, "__cooperlake");
231 def_or_undef (parse_in, "__cooperlake__");
ba9c87d3
CL		 232 break;
233 case PROCESSOR_SAPPHIRERAPIDS:
234 def_or_undef (parse_in, "__sapphirerapids");
235 def_or_undef (parse_in, "__sapphirerapids__");
236 break;
237 case PROCESSOR_ALDERLAKE:
238 def_or_undef (parse_in, "__alderlake");
239 def_or_undef (parse_in, "__alderlake__");
240 break;
ab442df7
MM		 241 /* use PROCESSOR_max to not set/unset the arch macro. */
242 case PROCESSOR_max:
243 break;
9a7f94d7 244 case PROCESSOR_INTEL:
9d532162 245 case PROCESSOR_GENERIC:
ab442df7
MM		 246 gcc_unreachable ();
247 }
248
249 /* Built-ins based on -mtune=. */
250 switch (tune)
251 {
252 case PROCESSOR_I386:
253 def_or_undef (parse_in, "__tune_i386__");
254 break;
255 case PROCESSOR_I486:
256 def_or_undef (parse_in, "__tune_i486__");
257 break;
258 case PROCESSOR_PENTIUM:
259 def_or_undef (parse_in, "__tune_i586__");
260 def_or_undef (parse_in, "__tune_pentium__");
261 if (last_tune_char == 'x')
262 def_or_undef (parse_in, "__tune_pentium_mmx__");
263 break;
264 case PROCESSOR_PENTIUMPRO:
265 def_or_undef (parse_in, "__tune_i686__");
266 def_or_undef (parse_in, "__tune_pentiumpro__");
267 switch (last_tune_char)
268 {
269 case '3':
270 def_or_undef (parse_in, "__tune_pentium3__");
271 /* FALLTHRU */
272 case '2':
273 def_or_undef (parse_in, "__tune_pentium2__");
274 break;
275 }
276 break;
277 case PROCESSOR_GEODE:
278 def_or_undef (parse_in, "__tune_geode__");
279 break;
280 case PROCESSOR_K6:
281 def_or_undef (parse_in, "__tune_k6__");
282 if (last_tune_char == '2')
283 def_or_undef (parse_in, "__tune_k6_2__");
284 else if (last_tune_char == '3')
285 def_or_undef (parse_in, "__tune_k6_3__");
286 else if (isa_flag & OPTION_MASK_ISA_3DNOW)
287 def_or_undef (parse_in, "__tune_k6_3__");
288 break;
289 case PROCESSOR_ATHLON:
290 def_or_undef (parse_in, "__tune_athlon__");
291 if (isa_flag & OPTION_MASK_ISA_SSE)
292 def_or_undef (parse_in, "__tune_athlon_sse__");
293 break;
294 case PROCESSOR_K8:
295 def_or_undef (parse_in, "__tune_k8__");
296 break;
297 case PROCESSOR_AMDFAM10:
298 def_or_undef (parse_in, "__tune_amdfam10__");
299 break;
1133125e
HJ		 300 case PROCESSOR_BDVER1:
301 def_or_undef (parse_in, "__tune_bdver1__");
302 break;
4d652a18
HJ		 303 case PROCESSOR_BDVER2:
304 def_or_undef (parse_in, "__tune_bdver2__");
305 break;
eb2f2b44
GG		 306 case PROCESSOR_BDVER3:
307 def_or_undef (parse_in, "__tune_bdver3__");
ed97ad47
GG		 308 break;
309 case PROCESSOR_BDVER4:
310 def_or_undef (parse_in, "__tune_bdver4__");
eb2f2b44 311 break;
9ce29eb0
VK		 312 case PROCESSOR_ZNVER1:
313 def_or_undef (parse_in, "__tune_znver1__");
314 break;
2901f42f
VK		 315 case PROCESSOR_ZNVER2:
316 def_or_undef (parse_in, "__tune_znver2__");
317 break;
eb2f2b44 318 case PROCESSOR_BTVER1:
14b52538
CF		 319 def_or_undef (parse_in, "__tune_btver1__");
320 break;
e32bfc16
VK		 321 case PROCESSOR_BTVER2:
322 def_or_undef (parse_in, "__tune_btver2__");
323 break;
ab442df7
MM		 324 case PROCESSOR_PENTIUM4:
325 def_or_undef (parse_in, "__tune_pentium4__");
326 break;
327 case PROCESSOR_NOCONA:
328 def_or_undef (parse_in, "__tune_nocona__");
329 break;
340ef734 330 case PROCESSOR_CORE2:
ab442df7
MM		 331 def_or_undef (parse_in, "__tune_core2__");
332 break;
d3c11974 333 case PROCESSOR_NEHALEM:
b2b01543 334 def_or_undef (parse_in, "__tune_corei7__");
d3c11974 335 def_or_undef (parse_in, "__tune_nehalem__");
b2b01543 336 break;
d3c11974 337 case PROCESSOR_SANDYBRIDGE:
fd5564d3 338 def_or_undef (parse_in, "__tune_corei7_avx__");
d3c11974 339 def_or_undef (parse_in, "__tune_sandybridge__");
fd5564d3 340 break;
3a579e09
VY		 341 case PROCESSOR_HASWELL:
342 def_or_undef (parse_in, "__tune_core_avx2__");
d3c11974 343 def_or_undef (parse_in, "__tune_haswell__");
3a579e09 344 break;
d3c11974 345 case PROCESSOR_BONNELL:
b6837b94 346 def_or_undef (parse_in, "__tune_atom__");
d3c11974 347 def_or_undef (parse_in, "__tune_bonnell__");
b6837b94 348 break;
d3c11974 349 case PROCESSOR_SILVERMONT:
0b871ccf 350 def_or_undef (parse_in, "__tune_slm__");
d3c11974 351 def_or_undef (parse_in, "__tune_silvermont__");
0b871ccf 352 break;
50e461df
OM		 353 case PROCESSOR_GOLDMONT:
354 def_or_undef (parse_in, "__tune_goldmont__");
355 break;
74b2bb19
OM		 356 case PROCESSOR_GOLDMONT_PLUS:
357 def_or_undef (parse_in, "__tune_goldmont_plus__");
358 break;
a548a5a1
OM		 359 case PROCESSOR_TREMONT:
360 def_or_undef (parse_in, "__tune_tremont__");
361 break;
52747219
IT		 362 case PROCESSOR_KNL:
363 def_or_undef (parse_in, "__tune_knl__");
364 break;
cace2309
SP		 365 case PROCESSOR_KNM:
366 def_or_undef (parse_in, "__tune_knm__");
367 break;
176a3386
OM		 368 case PROCESSOR_SKYLAKE:
369 def_or_undef (parse_in, "__tune_skylake__");
370 break;
06caf59d
KY		 371 case PROCESSOR_SKYLAKE_AVX512:
372 def_or_undef (parse_in, "__tune_skylake_avx512__");
373 break;
c234d831
UB		 374 case PROCESSOR_CANNONLAKE:
375 def_or_undef (parse_in, "__tune_cannonlake__");
376 break;
79ab5364
JK		 377 case PROCESSOR_ICELAKE_CLIENT:
378 def_or_undef (parse_in, "__tune_icelake_client__");
379 break;
380 case PROCESSOR_ICELAKE_SERVER:
381 def_or_undef (parse_in, "__tune_icelake_server__");
02da1e9c 382 break;
2d6b2e28
L		 383 case PROCESSOR_LAKEMONT:
384 def_or_undef (parse_in, "__tune_lakemont__");
45cef0e9 385 break;
7cab07f0
WX		 386 case PROCESSOR_CASCADELAKE:
387 def_or_undef (parse_in, "__tune_cascadelake__");
388 break;
a9fcfec3
HL		 389 case PROCESSOR_TIGERLAKE:
390 def_or_undef (parse_in, "__tune_tigerlake__");
391 break;
392 case PROCESSOR_COOPERLAKE:
393 def_or_undef (parse_in, "__tune_cooperlake__");
394 break;
ba9c87d3
CL		 395 case PROCESSOR_SAPPHIRERAPIDS:
396 def_or_undef (parse_in, "__tune_sapphirerapids__");
397 break;
398 case PROCESSOR_ALDERLAKE:
399 def_or_undef (parse_in, "__tune_alderlake__");
400 break;
9a7f94d7 401 case PROCESSOR_INTEL:
9d532162 402 case PROCESSOR_GENERIC:
ab442df7
MM		 403 break;
404 /* use PROCESSOR_max to not set/unset the tune macro. */
405 case PROCESSOR_max:
406 break;
407 }
408
bb664f09
UB		 409 switch (ix86_cmodel)
410 {
411 case CM_SMALL:
412 case CM_SMALL_PIC:
413 def_or_undef (parse_in, "__code_model_small__");
414 break;
415 case CM_MEDIUM:
416 case CM_MEDIUM_PIC:
417 def_or_undef (parse_in, "__code_model_medium__");
418 break;
419 case CM_LARGE:
420 case CM_LARGE_PIC:
421 def_or_undef (parse_in, "__code_model_large__");
422 break;
423 case CM_32:
424 def_or_undef (parse_in, "__code_model_32__");
425 break;
426 case CM_KERNEL:
427 def_or_undef (parse_in, "__code_model_kernel__");
428 break;
429 default:
430 ;
431 }
432
8cf86e14 433 if (isa_flag2 & OPTION_MASK_ISA2_WBNOINVD)
13b93d4b 434 def_or_undef (parse_in, "__WBNOINVD__");
8cf86e14 435 if (isa_flag2 & OPTION_MASK_ISA2_AVX512VP2INTERSECT)
e21b52af 436 def_or_undef (parse_in, "__AVX512VP2INTERSECT__");
ab442df7
MM		 437 if (isa_flag & OPTION_MASK_ISA_MMX)
438 def_or_undef (parse_in, "__MMX__");
439 if (isa_flag & OPTION_MASK_ISA_3DNOW)
440 def_or_undef (parse_in, "__3dNOW__");
441 if (isa_flag & OPTION_MASK_ISA_3DNOW_A)
442 def_or_undef (parse_in, "__3dNOW_A__");
443 if (isa_flag & OPTION_MASK_ISA_SSE)
444 def_or_undef (parse_in, "__SSE__");
445 if (isa_flag & OPTION_MASK_ISA_SSE2)
446 def_or_undef (parse_in, "__SSE2__");
447 if (isa_flag & OPTION_MASK_ISA_SSE3)
448 def_or_undef (parse_in, "__SSE3__");
449 if (isa_flag & OPTION_MASK_ISA_SSSE3)
450 def_or_undef (parse_in, "__SSSE3__");
451 if (isa_flag & OPTION_MASK_ISA_SSE4_1)
452 def_or_undef (parse_in, "__SSE4_1__");
453 if (isa_flag & OPTION_MASK_ISA_SSE4_2)
454 def_or_undef (parse_in, "__SSE4_2__");
455 if (isa_flag & OPTION_MASK_ISA_AES)
456 def_or_undef (parse_in, "__AES__");
c1618f82
AI		 457 if (isa_flag & OPTION_MASK_ISA_SHA)
458 def_or_undef (parse_in, "__SHA__");
ab442df7
MM		 459 if (isa_flag & OPTION_MASK_ISA_PCLMUL)
460 def_or_undef (parse_in, "__PCLMUL__");
95879c72
L		 461 if (isa_flag & OPTION_MASK_ISA_AVX)
462 def_or_undef (parse_in, "__AVX__");
7afac110
KY		 463 if (isa_flag & OPTION_MASK_ISA_AVX2)
464 def_or_undef (parse_in, "__AVX2__");
3f97cb0b
AI		 465 if (isa_flag & OPTION_MASK_ISA_AVX512F)
466 def_or_undef (parse_in, "__AVX512F__");
467 if (isa_flag & OPTION_MASK_ISA_AVX512ER)
468 def_or_undef (parse_in, "__AVX512ER__");
469 if (isa_flag & OPTION_MASK_ISA_AVX512CD)
470 def_or_undef (parse_in, "__AVX512CD__");
471 if (isa_flag & OPTION_MASK_ISA_AVX512PF)
472 def_or_undef (parse_in, "__AVX512PF__");
07165dd7
AI		 473 if (isa_flag & OPTION_MASK_ISA_AVX512DQ)
474 def_or_undef (parse_in, "__AVX512DQ__");
b525d943
AI		 475 if (isa_flag & OPTION_MASK_ISA_AVX512BW)
476 def_or_undef (parse_in, "__AVX512BW__");
f4af595f
AI		 477 if (isa_flag & OPTION_MASK_ISA_AVX512VL)
478 def_or_undef (parse_in, "__AVX512VL__");
3dcc8af5
IT		 479 if (isa_flag & OPTION_MASK_ISA_AVX512VBMI)
480 def_or_undef (parse_in, "__AVX512VBMI__");
4190ea38
IT		 481 if (isa_flag & OPTION_MASK_ISA_AVX512IFMA)
482 def_or_undef (parse_in, "__AVX512IFMA__");
8cf86e14 483 if (isa_flag2 & OPTION_MASK_ISA2_AVX5124VNNIW)
5fbb13a7 484 def_or_undef (parse_in, "__AVX5124VNNIW__");
b1ccd09a 485 if (isa_flag & OPTION_MASK_ISA_AVX512VBMI2)
fca51879 486 def_or_undef (parse_in, "__AVX512VBMI2__");
fefab953 487 if (isa_flag & OPTION_MASK_ISA_AVX512VNNI)
98966963 488 def_or_undef (parse_in, "__AVX512VNNI__");
8cf86e14 489 if (isa_flag2 & OPTION_MASK_ISA2_PCONFIG)
13b93d4b 490 def_or_undef (parse_in, "__PCONFIG__");
8cf86e14 491 if (isa_flag2 & OPTION_MASK_ISA2_SGX)
73e32c47 492 def_or_undef (parse_in, "__SGX__");
8cf86e14 493 if (isa_flag2 & OPTION_MASK_ISA2_AVX5124FMAPS)
5fbb13a7 494 def_or_undef (parse_in, "__AVX5124FMAPS__");
2e34b5bc 495 if (isa_flag & OPTION_MASK_ISA_AVX512BITALG)
e2a29465 496 def_or_undef (parse_in, "__AVX512BITALG__");
2e34b5bc 497 if (isa_flag & OPTION_MASK_ISA_AVX512VPOPCNTDQ)
79fc8ffe 498 def_or_undef (parse_in, "__AVX512VPOPCNTDQ__");
95879c72
L		 499 if (isa_flag & OPTION_MASK_ISA_FMA)
500 def_or_undef (parse_in, "__FMA__");
bf2eaa3f
KY		 501 if (isa_flag & OPTION_MASK_ISA_RTM)
502 def_or_undef (parse_in, "__RTM__");
ab442df7
MM		 503 if (isa_flag & OPTION_MASK_ISA_SSE4A)
504 def_or_undef (parse_in, "__SSE4A__");
cbf2e4d4
HJ		 505 if (isa_flag & OPTION_MASK_ISA_FMA4)
506 def_or_undef (parse_in, "__FMA4__");
43a8b705
HJ		 507 if (isa_flag & OPTION_MASK_ISA_XOP)
508 def_or_undef (parse_in, "__XOP__");
3e901069
HJ		 509 if (isa_flag & OPTION_MASK_ISA_LWP)
510 def_or_undef (parse_in, "__LWP__");
13c0eb43
SP		 511 if (isa_flag & OPTION_MASK_ISA_ABM)
512 def_or_undef (parse_in, "__ABM__");
91afcfa3
QN		 513 if (isa_flag & OPTION_MASK_ISA_BMI)
514 def_or_undef (parse_in, "__BMI__");
82feeb8d
L		 515 if (isa_flag & OPTION_MASK_ISA_BMI2)
516 def_or_undef (parse_in, "__BMI2__");
5fcafa60
KY		 517 if (isa_flag & OPTION_MASK_ISA_LZCNT)
518 def_or_undef (parse_in, "__LZCNT__");
94d13ad1
QN		 519 if (isa_flag & OPTION_MASK_ISA_TBM)
520 def_or_undef (parse_in, "__TBM__");
3bccee03
SP		 521 if (isa_flag & OPTION_MASK_ISA_POPCNT)
522 def_or_undef (parse_in, "__POPCNT__");
4ee89d5f
L		 523 if (isa_flag & OPTION_MASK_ISA_FSGSBASE)
524 def_or_undef (parse_in, "__FSGSBASE__");
525 if (isa_flag & OPTION_MASK_ISA_RDRND)
526 def_or_undef (parse_in, "__RDRND__");
527 if (isa_flag & OPTION_MASK_ISA_F16C)
528 def_or_undef (parse_in, "__F16C__");
4c340b5d
KY		 529 if (isa_flag & OPTION_MASK_ISA_RDSEED)
530 def_or_undef (parse_in, "__RDSEED__");
e61c94dd
KY		 531 if (isa_flag & OPTION_MASK_ISA_PRFCHW)
532 def_or_undef (parse_in, "__PRFCHW__");
d05e383b
MZ		 533 if (isa_flag & OPTION_MASK_ISA_ADX)
534 def_or_undef (parse_in, "__ADX__");
3a0d99bb
AI		 535 if (isa_flag & OPTION_MASK_ISA_FXSR)
536 def_or_undef (parse_in, "__FXSR__");
537 if (isa_flag & OPTION_MASK_ISA_XSAVE)
538 def_or_undef (parse_in, "__XSAVE__");
539 if (isa_flag & OPTION_MASK_ISA_XSAVEOPT)
540 def_or_undef (parse_in, "__XSAVEOPT__");
43b3f52f
IT		 541 if (isa_flag & OPTION_MASK_ISA_PREFETCHWT1)
542 def_or_undef (parse_in, "__PREFETCHWT1__");
ab442df7
MM		 543 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE))
544 def_or_undef (parse_in, "__SSE_MATH__");
545 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2))
546 def_or_undef (parse_in, "__SSE2_MATH__");
9cdea277
IT		 547 if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT)
548 def_or_undef (parse_in, "__CLFLUSHOPT__");
8cf86e14 549 if (isa_flag2 & OPTION_MASK_ISA2_CLZERO)
9ce29eb0 550 def_or_undef (parse_in, "__CLZERO__");
9cdea277
IT		 551 if (isa_flag & OPTION_MASK_ISA_XSAVEC)
552 def_or_undef (parse_in, "__XSAVEC__");
553 if (isa_flag & OPTION_MASK_ISA_XSAVES)
554 def_or_undef (parse_in, "__XSAVES__");
9c3bca11
IT		 555 if (isa_flag & OPTION_MASK_ISA_CLWB)
556 def_or_undef (parse_in, "__CLWB__");
8cf86e14 557 if (isa_flag2 & OPTION_MASK_ISA2_MWAITX)
500a08b2 558 def_or_undef (parse_in, "__MWAITX__");
41a4ef22
KY		 559 if (isa_flag & OPTION_MASK_ISA_PKU)
560 def_or_undef (parse_in, "__PKU__");
8cf86e14 561 if (isa_flag2 & OPTION_MASK_ISA2_RDPID)
1d516992 562 def_or_undef (parse_in, "__RDPID__");
d4bc3829 563 if (isa_flag & OPTION_MASK_ISA_GFNI)
b8cca31c 564 def_or_undef (parse_in, "__GFNI__");
e95dda95
L		 565 if ((isa_flag & OPTION_MASK_ISA_SHSTK))
566 def_or_undef (parse_in, "__SHSTK__");
8cf86e14 567 if (isa_flag2 & OPTION_MASK_ISA2_VAES)
b7b0a4fa 568 def_or_undef (parse_in, "__VAES__");
6557be99
JK		 569 if (isa_flag & OPTION_MASK_ISA_VPCLMULQDQ)
570 def_or_undef (parse_in, "__VPCLMULQDQ__");
37d51c75
SP		 571 if (isa_flag & OPTION_MASK_ISA_MOVDIRI)
572 def_or_undef (parse_in, "__MOVDIRI__");
8cf86e14 573 if (isa_flag2 & OPTION_MASK_ISA2_MOVDIR64B)
37d51c75 574 def_or_undef (parse_in, "__MOVDIR64B__");
8cf86e14 575 if (isa_flag2 & OPTION_MASK_ISA2_WAITPKG)
55f31ed1 576 def_or_undef (parse_in, "__WAITPKG__");
8cf86e14 577 if (isa_flag2 & OPTION_MASK_ISA2_CLDEMOTE)
f8d9957e 578 def_or_undef (parse_in, "__CLDEMOTE__");
366386c7 579 if (isa_flag2 & OPTION_MASK_ISA2_SERIALIZE)
580 def_or_undef (parse_in, "__SERIALIZE__");
8cf86e14 581 if (isa_flag2 & OPTION_MASK_ISA2_PTWRITE)
41f8d1fc 582 def_or_undef (parse_in, "__PTWRITE__");
8cf86e14 583 if (isa_flag2 & OPTION_MASK_ISA2_AVX512BF16)
4f0e90fa 584 def_or_undef (parse_in, "__AVX512BF16__");
dfa61b9e
L		 585 if (TARGET_MMX_WITH_SSE)
586 def_or_undef (parse_in, "__MMX_WITH_SSE__");
8cf86e14 587 if (isa_flag2 & OPTION_MASK_ISA2_ENQCMD)
6a10feda 588 def_or_undef (parse_in, "__ENQCMD__");
1e47cb35 589 if (isa_flag2 & OPTION_MASK_ISA2_TSXLDTRK)
590 def_or_undef (parse_in, "__TSXLDTRK__");
d9063947
L		 591 if (TARGET_IAMCU)
592 {
593 def_or_undef (parse_in, "__iamcu");
594 def_or_undef (parse_in, "__iamcu__");
595 }
ab442df7
MM		 596}
597
598\f
5779e713
MM		 599/* Hook to validate the current #pragma GCC target and set the state, and
600 update the macros based on what was changed. If ARGS is NULL, then
601 POP_TARGET is used to reset the options. */
ab442df7
MM		 602
603static bool
5779e713 604ix86_pragma_target_parse (tree args, tree pop_target)
ab442df7 605{
ba948b37
JJ		 606 tree prev_tree
607 = build_target_option_node (&global_options, &global_options_set);
ab442df7
MM		 608 tree cur_tree;
609 struct cl_target_option *prev_opt;
610 struct cl_target_option *cur_opt;
df385b9c
L		 611 HOST_WIDE_INT prev_isa;
612 HOST_WIDE_INT cur_isa;
613 HOST_WIDE_INT diff_isa;
5fbb13a7
KY		 614 HOST_WIDE_INT prev_isa2;
615 HOST_WIDE_INT cur_isa2;
616 HOST_WIDE_INT diff_isa2;
ab442df7
MM		 617 enum processor_type prev_arch;
618 enum processor_type prev_tune;
619 enum processor_type cur_arch;
620 enum processor_type cur_tune;
621
622 if (! args)
623 {
97db2bf7 624 cur_tree = (pop_target ? pop_target : target_option_default_node);
ba948b37 625 cl_target_option_restore (&global_options, &global_options_set,
46625112 626 TREE_TARGET_OPTION (cur_tree));
ab442df7
MM		 627 }
628 else
629 {
cc2a672a
ML		 630 cur_tree = ix86_valid_target_attribute_tree (NULL_TREE, args,
631 &global_options,
632 &global_options_set, 0);
97db2bf7
ST		 633 if (!cur_tree || cur_tree == error_mark_node)
634 {
ba948b37 635 cl_target_option_restore (&global_options, &global_options_set,
97db2bf7
ST		 636 TREE_TARGET_OPTION (prev_tree));
637 return false;
638 }
ab442df7
MM		 639 }
640
641 target_option_current_node = cur_tree;
97db2bf7 642 ix86_reset_previous_fndecl ();
ab442df7
MM		 643
644 /* Figure out the previous/current isa, arch, tune and the differences. */
645 prev_opt = TREE_TARGET_OPTION (prev_tree);
646 cur_opt = TREE_TARGET_OPTION (cur_tree);
e3339d0f
JM		 647 prev_isa = prev_opt->x_ix86_isa_flags;
648 cur_isa = cur_opt->x_ix86_isa_flags;
ab442df7 649 diff_isa = (prev_isa ^ cur_isa);
5fbb13a7
KY		 650 prev_isa2 = prev_opt->x_ix86_isa_flags2;
651 cur_isa2 = cur_opt->x_ix86_isa_flags2;
652 diff_isa2 = (prev_isa2 ^ cur_isa2);
32e8bb8e
ILT		 653 prev_arch = (enum processor_type) prev_opt->arch;
654 prev_tune = (enum processor_type) prev_opt->tune;
655 cur_arch = (enum processor_type) cur_opt->arch;
656 cur_tune = (enum processor_type) cur_opt->tune;
ab442df7
MM		 657
658 /* If the same processor is used for both previous and current options, don't
659 change the macros. */
660 if (cur_arch == prev_arch)
661 cur_arch = prev_arch = PROCESSOR_max;
662
663 if (cur_tune == prev_tune)
664 cur_tune = prev_tune = PROCESSOR_max;
665
666 /* Undef all of the macros for that are no longer current. */
667 ix86_target_macros_internal (prev_isa & diff_isa,
5fbb13a7 668 prev_isa2 & diff_isa2,
ab442df7
MM		 669 prev_arch,
670 prev_tune,
8023568e 671 (enum fpmath_unit) prev_opt->x_ix86_fpmath,
ab442df7
MM		 672 cpp_undef);
673
fa5d6c75
JJ		 674 /* For the definitions, ensure all newly defined macros are considered
675 as used for -Wunused-macros. There is no point warning about the
676 compiler predefined macros. */
677 cpp_options *cpp_opts = cpp_get_options (parse_in);
678 unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros;
679 cpp_opts->warn_unused_macros = 0;
680
ab442df7
MM		 681 /* Define all of the macros for new options that were just turned on. */
682 ix86_target_macros_internal (cur_isa & diff_isa,
5fbb13a7 683 cur_isa2 & diff_isa2,
ab442df7
MM		 684 cur_arch,
685 cur_tune,
8023568e 686 (enum fpmath_unit) cur_opt->x_ix86_fpmath,
ab442df7
MM		 687 cpp_define);
688
fa5d6c75
JJ		 689 cpp_opts->warn_unused_macros = saved_warn_unused_macros;
690
ab442df7
MM		 691 return true;
692}
693\f
694/* Function to tell the preprocessor about the defines for the current target. */
695
696void
697ix86_target_macros (void)
698{
699 /* 32/64-bit won't change with target specific options, so do the assert and
700 builtin_define_std calls here. */
701 if (TARGET_64BIT)
702 {
703 cpp_assert (parse_in, "cpu=x86_64");
704 cpp_assert (parse_in, "machine=x86_64");
705 cpp_define (parse_in, "__amd64");
706 cpp_define (parse_in, "__amd64__");
707 cpp_define (parse_in, "__x86_64");
708 cpp_define (parse_in, "__x86_64__");
6573c644
L		 709 if (TARGET_X32)
710 {
711 cpp_define (parse_in, "_ILP32");
712 cpp_define (parse_in, "__ILP32__");
713 }
ab442df7
MM		 714 }
715 else
716 {
717 cpp_assert (parse_in, "cpu=i386");
718 cpp_assert (parse_in, "machine=i386");
719 builtin_define_std ("i386");
13a46321
GP		 720 cpp_define (parse_in, "_ILP32");
721 cpp_define (parse_in, "__ILP32__");
ab442df7
MM		 722 }
723
02ac9503
UB		 724 if (!TARGET_80387)
725 cpp_define (parse_in, "_SOFT_FLOAT");
726
c637141a
L		 727 if (TARGET_LONG_DOUBLE_64)
728 cpp_define (parse_in, "__LONG_DOUBLE_64__");
729
a2a1ddb5
L		 730 if (TARGET_LONG_DOUBLE_128)
731 cpp_define (parse_in, "__LONG_DOUBLE_128__");
732
30c0a59a
MG		 733 if (TARGET_128BIT_LONG_DOUBLE)
734 cpp_define (parse_in, "__SIZEOF_FLOAT80__=16");
735 else
736 cpp_define (parse_in, "__SIZEOF_FLOAT80__=12");
737
738 cpp_define (parse_in, "__SIZEOF_FLOAT128__=16");
739
d5becc11
JJ		 740 cpp_define_formatted (parse_in, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE);
741 cpp_define_formatted (parse_in, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE);
742
f767f583
RH		 743 cpp_define (parse_in, "__GCC_ASM_FLAG_OUTPUTS__");
744
ab442df7 745 ix86_target_macros_internal (ix86_isa_flags,
5fbb13a7 746 ix86_isa_flags2,
ab442df7
MM		 747 ix86_arch,
748 ix86_tune,
749 ix86_fpmath,
750 cpp_define);
00402c94
RH		 751
752 cpp_define (parse_in, "__SEG_FS");
753 cpp_define (parse_in, "__SEG_GS");
e95dda95
L		 754
755 if (flag_cf_protection != CF_NONE)
756 cpp_define_formatted (parse_in, "__CET__=%d",
757 flag_cf_protection & ~CF_SET);
ab442df7
MM		 758}
759
760\f
761/* Register target pragmas. We need to add the hook for parsing #pragma GCC
762 option here rather than in i386.c since it will pull in various preprocessor
763 functions, and those are not present in languages like fortran without a
764 preprocessor. */
765
766void
767ix86_register_pragmas (void)
768{
5779e713
MM		 769 /* Update pragma hook to allow parsing #pragma GCC target. */
770 targetm.target_option.pragma_parse = ix86_pragma_target_parse;
ab442df7 771
00402c94
RH		 772 c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS);
773 c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS);
00402c94 774
ab442df7
MM		 775#ifdef REGISTER_SUBTARGET_PRAGMAS
776 REGISTER_SUBTARGET_PRAGMAS ();
777#endif
778}
Mirror of https://gcc.gnu.org/git/gcc.git