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ab442df7 1/* Subroutines used for macro/preprocessor support on the ia-32.
d5becc11 2 Copyright (C) 2008, 2009, 2010, 2011, 2012
ab442df7
MM		 3 Free Software Foundation, Inc.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 3, or (at your option)
10any later version.
11
12GCC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
20
21#include "config.h"
22#include "system.h"
23#include "coretypes.h"
24#include "tm.h"
ab442df7
MM		 25#include "tree.h"
26#include "tm_p.h"
27#include "flags.h"
39dabefd 28#include "c-family/c-common.h"
ab442df7
MM		 29#include "ggc.h"
30#include "target.h"
31#include "target-def.h"
32#include "cpplib.h"
39dabefd 33#include "c-family/c-pragma.h"
ab442df7 34
5779e713 35static bool ix86_pragma_target_parse (tree, tree);
ab442df7 36static void ix86_target_macros_internal
df385b9c 37 (HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit,
ab442df7
MM		 38 void (*def_or_undef) (cpp_reader *, const char *));
39
40\f
41/* Internal function to either define or undef the appropriate system
42 macros. */
43static void
df385b9c 44ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
ab442df7
MM		 45 enum processor_type arch,
46 enum processor_type tune,
47 enum fpmath_unit fpmath,
48 void (*def_or_undef) (cpp_reader *,
49 const char *))
50{
073a8998 51 /* For some of the k6/pentium varients there weren't separate ISA bits to
ab442df7
MM		 52 identify which tune/arch flag was passed, so figure it out here. */
53 size_t arch_len = strlen (ix86_arch_string);
54 size_t tune_len = strlen (ix86_tune_string);
55 int last_arch_char = ix86_arch_string[arch_len - 1];
56 int last_tune_char = ix86_tune_string[tune_len - 1];
57
58 /* Built-ins based on -march=. */
59 switch (arch)
60 {
61 case PROCESSOR_I386:
62 break;
63 case PROCESSOR_I486:
64 def_or_undef (parse_in, "__i486");
65 def_or_undef (parse_in, "__i486__");
66 break;
67 case PROCESSOR_PENTIUM:
68 def_or_undef (parse_in, "__i586");
69 def_or_undef (parse_in, "__i586__");
70 def_or_undef (parse_in, "__pentium");
71 def_or_undef (parse_in, "__pentium__");
72 if (isa_flag & OPTION_MASK_ISA_MMX)
73 def_or_undef (parse_in, "__pentium_mmx__");
74 break;
75 case PROCESSOR_PENTIUMPRO:
76 def_or_undef (parse_in, "__i686");
77 def_or_undef (parse_in, "__i686__");
78 def_or_undef (parse_in, "__pentiumpro");
79 def_or_undef (parse_in, "__pentiumpro__");
80 break;
81 case PROCESSOR_GEODE:
82 def_or_undef (parse_in, "__geode");
83 def_or_undef (parse_in, "__geode__");
84 break;
85 case PROCESSOR_K6:
86 def_or_undef (parse_in, "__k6");
87 def_or_undef (parse_in, "__k6__");
88 if (last_arch_char == '2')
89 def_or_undef (parse_in, "__k6_2__");
90 else if (last_arch_char == '3')
91 def_or_undef (parse_in, "__k6_3__");
92 else if (isa_flag & OPTION_MASK_ISA_3DNOW)
93 def_or_undef (parse_in, "__k6_3__");
94 break;
95 case PROCESSOR_ATHLON:
96 def_or_undef (parse_in, "__athlon");
97 def_or_undef (parse_in, "__athlon__");
98 if (isa_flag & OPTION_MASK_ISA_SSE)
99 def_or_undef (parse_in, "__athlon_sse__");
100 break;
101 case PROCESSOR_K8:
102 def_or_undef (parse_in, "__k8");
103 def_or_undef (parse_in, "__k8__");
104 break;
105 case PROCESSOR_AMDFAM10:
106 def_or_undef (parse_in, "__amdfam10");
107 def_or_undef (parse_in, "__amdfam10__");
108 break;
1133125e
HJ		 109 case PROCESSOR_BDVER1:
110 def_or_undef (parse_in, "__bdver1");
111 def_or_undef (parse_in, "__bdver1__");
112 break;
4d652a18
HJ		 113 case PROCESSOR_BDVER2:
114 def_or_undef (parse_in, "__bdver2");
115 def_or_undef (parse_in, "__bdver2__");
116 break;
14b52538
CF		 117 case PROCESSOR_BTVER1:
118 def_or_undef (parse_in, "__btver1");
119 def_or_undef (parse_in, "__btver1__");
120 break;
e32bfc16
VK		 121 case PROCESSOR_BTVER2:
122 def_or_undef (parse_in, "__btver2");
123 def_or_undef (parse_in, "__btver2__");
124 break;
ab442df7
MM		 125 case PROCESSOR_PENTIUM4:
126 def_or_undef (parse_in, "__pentium4");
127 def_or_undef (parse_in, "__pentium4__");
128 break;
129 case PROCESSOR_NOCONA:
130 def_or_undef (parse_in, "__nocona");
131 def_or_undef (parse_in, "__nocona__");
132 break;
ab247762
MK		 133 case PROCESSOR_CORE2_32:
134 case PROCESSOR_CORE2_64:
ab442df7
MM		 135 def_or_undef (parse_in, "__core2");
136 def_or_undef (parse_in, "__core2__");
137 break;
b2b01543
BS		 138 case PROCESSOR_COREI7_32:
139 case PROCESSOR_COREI7_64:
140 def_or_undef (parse_in, "__corei7");
141 def_or_undef (parse_in, "__corei7__");
142 break;
b6837b94
JY		 143 case PROCESSOR_ATOM:
144 def_or_undef (parse_in, "__atom");
145 def_or_undef (parse_in, "__atom__");
146 break;
ab442df7
MM		 147 /* use PROCESSOR_max to not set/unset the arch macro. */
148 case PROCESSOR_max:
149 break;
150 case PROCESSOR_GENERIC32:
151 case PROCESSOR_GENERIC64:
152 gcc_unreachable ();
153 }
154
155 /* Built-ins based on -mtune=. */
156 switch (tune)
157 {
158 case PROCESSOR_I386:
159 def_or_undef (parse_in, "__tune_i386__");
160 break;
161 case PROCESSOR_I486:
162 def_or_undef (parse_in, "__tune_i486__");
163 break;
164 case PROCESSOR_PENTIUM:
165 def_or_undef (parse_in, "__tune_i586__");
166 def_or_undef (parse_in, "__tune_pentium__");
167 if (last_tune_char == 'x')
168 def_or_undef (parse_in, "__tune_pentium_mmx__");
169 break;
170 case PROCESSOR_PENTIUMPRO:
171 def_or_undef (parse_in, "__tune_i686__");
172 def_or_undef (parse_in, "__tune_pentiumpro__");
173 switch (last_tune_char)
174 {
175 case '3':
176 def_or_undef (parse_in, "__tune_pentium3__");
177 /* FALLTHRU */
178 case '2':
179 def_or_undef (parse_in, "__tune_pentium2__");
180 break;
181 }
182 break;
183 case PROCESSOR_GEODE:
184 def_or_undef (parse_in, "__tune_geode__");
185 break;
186 case PROCESSOR_K6:
187 def_or_undef (parse_in, "__tune_k6__");
188 if (last_tune_char == '2')
189 def_or_undef (parse_in, "__tune_k6_2__");
190 else if (last_tune_char == '3')
191 def_or_undef (parse_in, "__tune_k6_3__");
192 else if (isa_flag & OPTION_MASK_ISA_3DNOW)
193 def_or_undef (parse_in, "__tune_k6_3__");
194 break;
195 case PROCESSOR_ATHLON:
196 def_or_undef (parse_in, "__tune_athlon__");
197 if (isa_flag & OPTION_MASK_ISA_SSE)
198 def_or_undef (parse_in, "__tune_athlon_sse__");
199 break;
200 case PROCESSOR_K8:
201 def_or_undef (parse_in, "__tune_k8__");
202 break;
203 case PROCESSOR_AMDFAM10:
204 def_or_undef (parse_in, "__tune_amdfam10__");
205 break;
1133125e
HJ		 206 case PROCESSOR_BDVER1:
207 def_or_undef (parse_in, "__tune_bdver1__");
208 break;
4d652a18
HJ		 209 case PROCESSOR_BDVER2:
210 def_or_undef (parse_in, "__tune_bdver2__");
211 break;
14b52538
CF		 212 case PROCESSOR_BTVER1:
213 def_or_undef (parse_in, "__tune_btver1__");
214 break;
e32bfc16
VK		 215 case PROCESSOR_BTVER2:
216 def_or_undef (parse_in, "__tune_btver2__");
217 break;
ab442df7
MM		 218 case PROCESSOR_PENTIUM4:
219 def_or_undef (parse_in, "__tune_pentium4__");
220 break;
221 case PROCESSOR_NOCONA:
222 def_or_undef (parse_in, "__tune_nocona__");
223 break;
ab247762
MK		 224 case PROCESSOR_CORE2_32:
225 case PROCESSOR_CORE2_64:
ab442df7
MM		 226 def_or_undef (parse_in, "__tune_core2__");
227 break;
b2b01543
BS		 228 case PROCESSOR_COREI7_32:
229 case PROCESSOR_COREI7_64:
230 def_or_undef (parse_in, "__tune_corei7__");
231 break;
b6837b94
JY		 232 case PROCESSOR_ATOM:
233 def_or_undef (parse_in, "__tune_atom__");
234 break;
ab442df7
MM		 235 case PROCESSOR_GENERIC32:
236 case PROCESSOR_GENERIC64:
237 break;
238 /* use PROCESSOR_max to not set/unset the tune macro. */
239 case PROCESSOR_max:
240 break;
241 }
242
243 if (isa_flag & OPTION_MASK_ISA_MMX)
244 def_or_undef (parse_in, "__MMX__");
245 if (isa_flag & OPTION_MASK_ISA_3DNOW)
246 def_or_undef (parse_in, "__3dNOW__");
247 if (isa_flag & OPTION_MASK_ISA_3DNOW_A)
248 def_or_undef (parse_in, "__3dNOW_A__");
249 if (isa_flag & OPTION_MASK_ISA_SSE)
250 def_or_undef (parse_in, "__SSE__");
251 if (isa_flag & OPTION_MASK_ISA_SSE2)
252 def_or_undef (parse_in, "__SSE2__");
253 if (isa_flag & OPTION_MASK_ISA_SSE3)
254 def_or_undef (parse_in, "__SSE3__");
255 if (isa_flag & OPTION_MASK_ISA_SSSE3)
256 def_or_undef (parse_in, "__SSSE3__");
257 if (isa_flag & OPTION_MASK_ISA_SSE4_1)
258 def_or_undef (parse_in, "__SSE4_1__");
259 if (isa_flag & OPTION_MASK_ISA_SSE4_2)
260 def_or_undef (parse_in, "__SSE4_2__");
261 if (isa_flag & OPTION_MASK_ISA_AES)
262 def_or_undef (parse_in, "__AES__");
263 if (isa_flag & OPTION_MASK_ISA_PCLMUL)
264 def_or_undef (parse_in, "__PCLMUL__");
95879c72
L		 265 if (isa_flag & OPTION_MASK_ISA_AVX)
266 def_or_undef (parse_in, "__AVX__");
7afac110
KY		 267 if (isa_flag & OPTION_MASK_ISA_AVX2)
268 def_or_undef (parse_in, "__AVX2__");
95879c72
L		 269 if (isa_flag & OPTION_MASK_ISA_FMA)
270 def_or_undef (parse_in, "__FMA__");
bf2eaa3f
KY		 271 if (isa_flag & OPTION_MASK_ISA_RTM)
272 def_or_undef (parse_in, "__RTM__");
ab442df7
MM		 273 if (isa_flag & OPTION_MASK_ISA_SSE4A)
274 def_or_undef (parse_in, "__SSE4A__");
cbf2e4d4
HJ		 275 if (isa_flag & OPTION_MASK_ISA_FMA4)
276 def_or_undef (parse_in, "__FMA4__");
43a8b705
HJ		 277 if (isa_flag & OPTION_MASK_ISA_XOP)
278 def_or_undef (parse_in, "__XOP__");
3e901069
HJ		 279 if (isa_flag & OPTION_MASK_ISA_LWP)
280 def_or_undef (parse_in, "__LWP__");
13c0eb43
SP		 281 if (isa_flag & OPTION_MASK_ISA_ABM)
282 def_or_undef (parse_in, "__ABM__");
91afcfa3
QN		 283 if (isa_flag & OPTION_MASK_ISA_BMI)
284 def_or_undef (parse_in, "__BMI__");
82feeb8d
L		 285 if (isa_flag & OPTION_MASK_ISA_BMI2)
286 def_or_undef (parse_in, "__BMI2__");
5fcafa60
KY		 287 if (isa_flag & OPTION_MASK_ISA_LZCNT)
288 def_or_undef (parse_in, "__LZCNT__");
94d13ad1
QN		 289 if (isa_flag & OPTION_MASK_ISA_TBM)
290 def_or_undef (parse_in, "__TBM__");
3bccee03
SP		 291 if (isa_flag & OPTION_MASK_ISA_POPCNT)
292 def_or_undef (parse_in, "__POPCNT__");
4ee89d5f
L		 293 if (isa_flag & OPTION_MASK_ISA_FSGSBASE)
294 def_or_undef (parse_in, "__FSGSBASE__");
295 if (isa_flag & OPTION_MASK_ISA_RDRND)
296 def_or_undef (parse_in, "__RDRND__");
297 if (isa_flag & OPTION_MASK_ISA_F16C)
298 def_or_undef (parse_in, "__F16C__");
e61c94dd
KY		 299 if (isa_flag & OPTION_MASK_ISA_PRFCHW)
300 def_or_undef (parse_in, "__PRFCHW__");
ab442df7
MM		 301 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE))
302 def_or_undef (parse_in, "__SSE_MATH__");
303 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2))
304 def_or_undef (parse_in, "__SSE2_MATH__");
305}
306
307\f
5779e713
MM		 308/* Hook to validate the current #pragma GCC target and set the state, and
309 update the macros based on what was changed. If ARGS is NULL, then
310 POP_TARGET is used to reset the options. */
ab442df7
MM		 311
312static bool
5779e713 313ix86_pragma_target_parse (tree args, tree pop_target)
ab442df7
MM		 314{
315 tree prev_tree = build_target_option_node ();
316 tree cur_tree;
317 struct cl_target_option *prev_opt;
318 struct cl_target_option *cur_opt;
df385b9c
L		 319 HOST_WIDE_INT prev_isa;
320 HOST_WIDE_INT cur_isa;
321 HOST_WIDE_INT diff_isa;
ab442df7
MM		 322 enum processor_type prev_arch;
323 enum processor_type prev_tune;
324 enum processor_type cur_arch;
325 enum processor_type cur_tune;
326
327 if (! args)
328 {
5779e713
MM		 329 cur_tree = ((pop_target)
330 ? pop_target
331 : target_option_default_node);
46625112
JM		 332 cl_target_option_restore (&global_options,
333 TREE_TARGET_OPTION (cur_tree));
ab442df7
MM		 334 }
335 else
336 {
5779e713 337 cur_tree = ix86_valid_target_attribute_tree (args);
ab442df7
MM		 338 if (!cur_tree)
339 return false;
340 }
341
342 target_option_current_node = cur_tree;
343
344 /* Figure out the previous/current isa, arch, tune and the differences. */
345 prev_opt = TREE_TARGET_OPTION (prev_tree);
346 cur_opt = TREE_TARGET_OPTION (cur_tree);
e3339d0f
JM		 347 prev_isa = prev_opt->x_ix86_isa_flags;
348 cur_isa = cur_opt->x_ix86_isa_flags;
ab442df7 349 diff_isa = (prev_isa ^ cur_isa);
32e8bb8e
ILT		 350 prev_arch = (enum processor_type) prev_opt->arch;
351 prev_tune = (enum processor_type) prev_opt->tune;
352 cur_arch = (enum processor_type) cur_opt->arch;
353 cur_tune = (enum processor_type) cur_opt->tune;
ab442df7
MM		 354
355 /* If the same processor is used for both previous and current options, don't
356 change the macros. */
357 if (cur_arch == prev_arch)
358 cur_arch = prev_arch = PROCESSOR_max;
359
360 if (cur_tune == prev_tune)
361 cur_tune = prev_tune = PROCESSOR_max;
362
363 /* Undef all of the macros for that are no longer current. */
364 ix86_target_macros_internal (prev_isa & diff_isa,
365 prev_arch,
366 prev_tune,
8023568e 367 (enum fpmath_unit) prev_opt->x_ix86_fpmath,
ab442df7
MM		 368 cpp_undef);
369
370 /* Define all of the macros for new options that were just turned on. */
371 ix86_target_macros_internal (cur_isa & diff_isa,
372 cur_arch,
373 cur_tune,
8023568e 374 (enum fpmath_unit) cur_opt->x_ix86_fpmath,
ab442df7
MM		 375 cpp_define);
376
377 return true;
378}
379\f
380/* Function to tell the preprocessor about the defines for the current target. */
381
382void
383ix86_target_macros (void)
384{
385 /* 32/64-bit won't change with target specific options, so do the assert and
386 builtin_define_std calls here. */
387 if (TARGET_64BIT)
388 {
389 cpp_assert (parse_in, "cpu=x86_64");
390 cpp_assert (parse_in, "machine=x86_64");
391 cpp_define (parse_in, "__amd64");
392 cpp_define (parse_in, "__amd64__");
393 cpp_define (parse_in, "__x86_64");
394 cpp_define (parse_in, "__x86_64__");
6573c644
L		 395 if (TARGET_X32)
396 {
397 cpp_define (parse_in, "_ILP32");
398 cpp_define (parse_in, "__ILP32__");
399 }
ab442df7
MM		 400 }
401 else
402 {
403 cpp_assert (parse_in, "cpu=i386");
404 cpp_assert (parse_in, "machine=i386");
405 builtin_define_std ("i386");
406 }
407
d5becc11
JJ		 408 cpp_define_formatted (parse_in, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE);
409 cpp_define_formatted (parse_in, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE);
410
ab442df7
MM		 411 ix86_target_macros_internal (ix86_isa_flags,
412 ix86_arch,
413 ix86_tune,
414 ix86_fpmath,
415 cpp_define);
416}
417
418\f
419/* Register target pragmas. We need to add the hook for parsing #pragma GCC
420 option here rather than in i386.c since it will pull in various preprocessor
421 functions, and those are not present in languages like fortran without a
422 preprocessor. */
423
424void
425ix86_register_pragmas (void)
426{
5779e713
MM		 427 /* Update pragma hook to allow parsing #pragma GCC target. */
428 targetm.target_option.pragma_parse = ix86_pragma_target_parse;
ab442df7
MM		 429
430#ifdef REGISTER_SUBTARGET_PRAGMAS
431 REGISTER_SUBTARGET_PRAGMAS ();
432#endif
433}
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