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Handle EXEC_IOLENGTH in doloop_contained_procedure_code.
[thirdparty/gcc.git] / gcc / config / i386 / i386-options.c
CommitLineData
99dee823 1/* Copyright (C) 1988-2021 Free Software Foundation, Inc.
2bf6d935
ML		 2
3This file is part of GCC.
4
5GCC is free software; you can redistribute it and/or modify
6it under the terms of the GNU General Public License as published by
7the Free Software Foundation; either version 3, or (at your option)
8any later version.
9
10GCC is distributed in the hope that it will be useful,
11but WITHOUT ANY WARRANTY; without even the implied warranty of
12MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13GNU General Public License for more details.
14
15You should have received a copy of the GNU General Public License
16along with GCC; see the file COPYING3. If not see
17<http://www.gnu.org/licenses/>. */
18
19#define IN_TARGET_CODE 1
20
21#include "config.h"
22#include "system.h"
23#include "coretypes.h"
24#include "backend.h"
25#include "rtl.h"
26#include "tree.h"
27#include "memmodel.h"
28#include "gimple.h"
29#include "cfghooks.h"
30#include "cfgloop.h"
31#include "df.h"
32#include "tm_p.h"
33#include "stringpool.h"
34#include "expmed.h"
35#include "optabs.h"
36#include "regs.h"
37#include "emit-rtl.h"
38#include "recog.h"
39#include "cgraph.h"
40#include "diagnostic.h"
41#include "cfgbuild.h"
42#include "alias.h"
43#include "fold-const.h"
44#include "attribs.h"
45#include "calls.h"
46#include "stor-layout.h"
47#include "varasm.h"
48#include "output.h"
49#include "insn-attr.h"
50#include "flags.h"
51#include "except.h"
52#include "explow.h"
53#include "expr.h"
54#include "cfgrtl.h"
55#include "common/common-target.h"
56#include "langhooks.h"
57#include "reload.h"
58#include "gimplify.h"
59#include "dwarf2.h"
60#include "tm-constrs.h"
2bf6d935
ML		 61#include "cselib.h"
62#include "sched-int.h"
63#include "opts.h"
64#include "tree-pass.h"
65#include "context.h"
66#include "pass_manager.h"
67#include "target-globals.h"
68#include "gimple-iterator.h"
69#include "tree-vectorizer.h"
70#include "shrink-wrap.h"
71#include "builtins.h"
72#include "rtl-iter.h"
73#include "tree-iterator.h"
74#include "dbgcnt.h"
75#include "case-cfn-macros.h"
76#include "dojump.h"
77#include "fold-const-call.h"
78#include "tree-vrp.h"
79#include "tree-ssanames.h"
80#include "selftest.h"
81#include "selftest-rtl.h"
82#include "print-rtl.h"
83#include "intl.h"
84#include "ifcvt.h"
85#include "symbol-summary.h"
86#include "ipa-prop.h"
87#include "ipa-fnsummary.h"
88#include "wide-int-bitmask.h"
89#include "tree-vector-builder.h"
90#include "debug.h"
91#include "dwarf2out.h"
92#include "i386-options.h"
93
94#include "x86-tune-costs.h"
95
96#ifndef SUBTARGET32_DEFAULT_CPU
97#define SUBTARGET32_DEFAULT_CPU "i386"
98#endif
99
100/* Processor feature/optimization bitmasks. */
37876976
JJ		 101#define m_NONE HOST_WIDE_INT_0U
102#define m_ALL (~HOST_WIDE_INT_0U)
2bf6d935
ML		 103#define m_386 (HOST_WIDE_INT_1U<<PROCESSOR_I386)
104#define m_486 (HOST_WIDE_INT_1U<<PROCESSOR_I486)
105#define m_PENT (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUM)
106#define m_LAKEMONT (HOST_WIDE_INT_1U<<PROCESSOR_LAKEMONT)
107#define m_PPRO (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUMPRO)
108#define m_PENT4 (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUM4)
109#define m_NOCONA (HOST_WIDE_INT_1U<<PROCESSOR_NOCONA)
110#define m_P4_NOCONA (m_PENT4 | m_NOCONA)
111#define m_CORE2 (HOST_WIDE_INT_1U<<PROCESSOR_CORE2)
112#define m_NEHALEM (HOST_WIDE_INT_1U<<PROCESSOR_NEHALEM)
113#define m_SANDYBRIDGE (HOST_WIDE_INT_1U<<PROCESSOR_SANDYBRIDGE)
114#define m_HASWELL (HOST_WIDE_INT_1U<<PROCESSOR_HASWELL)
115#define m_BONNELL (HOST_WIDE_INT_1U<<PROCESSOR_BONNELL)
116#define m_SILVERMONT (HOST_WIDE_INT_1U<<PROCESSOR_SILVERMONT)
117#define m_KNL (HOST_WIDE_INT_1U<<PROCESSOR_KNL)
118#define m_KNM (HOST_WIDE_INT_1U<<PROCESSOR_KNM)
119#define m_SKYLAKE (HOST_WIDE_INT_1U<<PROCESSOR_SKYLAKE)
120#define m_SKYLAKE_AVX512 (HOST_WIDE_INT_1U<<PROCESSOR_SKYLAKE_AVX512)
121#define m_CANNONLAKE (HOST_WIDE_INT_1U<<PROCESSOR_CANNONLAKE)
122#define m_ICELAKE_CLIENT (HOST_WIDE_INT_1U<<PROCESSOR_ICELAKE_CLIENT)
123#define m_ICELAKE_SERVER (HOST_WIDE_INT_1U<<PROCESSOR_ICELAKE_SERVER)
124#define m_CASCADELAKE (HOST_WIDE_INT_1U<<PROCESSOR_CASCADELAKE)
a9fcfec3
HL		 125#define m_TIGERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_TIGERLAKE)
126#define m_COOPERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_COOPERLAKE)
ba9c87d3
CL		 127#define m_SAPPHIRERAPIDS (HOST_WIDE_INT_1U<<PROCESSOR_SAPPHIRERAPIDS)
128#define m_ALDERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_ALDERLAKE)
2bf6d935 129#define m_CORE_AVX512 (m_SKYLAKE_AVX512 | m_CANNONLAKE \
a9fcfec3 130 | m_ICELAKE_CLIENT | m_ICELAKE_SERVER | m_CASCADELAKE \
ba9c87d3 131 | m_TIGERLAKE | m_COOPERLAKE | m_SAPPHIRERAPIDS)
2bf6d935
ML		 132#define m_CORE_AVX2 (m_HASWELL | m_SKYLAKE | m_CORE_AVX512)
133#define m_CORE_ALL (m_CORE2 | m_NEHALEM | m_SANDYBRIDGE | m_CORE_AVX2)
134#define m_GOLDMONT (HOST_WIDE_INT_1U<<PROCESSOR_GOLDMONT)
135#define m_GOLDMONT_PLUS (HOST_WIDE_INT_1U<<PROCESSOR_GOLDMONT_PLUS)
136#define m_TREMONT (HOST_WIDE_INT_1U<<PROCESSOR_TREMONT)
137#define m_INTEL (HOST_WIDE_INT_1U<<PROCESSOR_INTEL)
138
139#define m_GEODE (HOST_WIDE_INT_1U<<PROCESSOR_GEODE)
140#define m_K6 (HOST_WIDE_INT_1U<<PROCESSOR_K6)
141#define m_K6_GEODE (m_K6 | m_GEODE)
142#define m_K8 (HOST_WIDE_INT_1U<<PROCESSOR_K8)
143#define m_ATHLON (HOST_WIDE_INT_1U<<PROCESSOR_ATHLON)
144#define m_ATHLON_K8 (m_K8 | m_ATHLON)
145#define m_AMDFAM10 (HOST_WIDE_INT_1U<<PROCESSOR_AMDFAM10)
146#define m_BDVER1 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER1)
147#define m_BDVER2 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER2)
148#define m_BDVER3 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER3)
149#define m_BDVER4 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER4)
150#define m_ZNVER1 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER1)
151#define m_ZNVER2 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER2)
3e2ae3ee 152#define m_ZNVER3 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER3)
2bf6d935
ML		 153#define m_BTVER1 (HOST_WIDE_INT_1U<<PROCESSOR_BTVER1)
154#define m_BTVER2 (HOST_WIDE_INT_1U<<PROCESSOR_BTVER2)
155#define m_BDVER (m_BDVER1 | m_BDVER2 | m_BDVER3 | m_BDVER4)
156#define m_BTVER (m_BTVER1 | m_BTVER2)
3e2ae3ee 157#define m_ZNVER (m_ZNVER1 | m_ZNVER2 | m_ZNVER3)
2bf6d935
ML		 158#define m_AMD_MULTIPLE (m_ATHLON_K8 | m_AMDFAM10 | m_BDVER | m_BTVER \
159 | m_ZNVER)
160
161#define m_GENERIC (HOST_WIDE_INT_1U<<PROCESSOR_GENERIC)
162
163const char* ix86_tune_feature_names[X86_TUNE_LAST] = {
164#undef DEF_TUNE
165#define DEF_TUNE(tune, name, selector) name,
166#include "x86-tune.def"
167#undef DEF_TUNE
168};
169
170/* Feature tests against the various tunings. */
171unsigned char ix86_tune_features[X86_TUNE_LAST];
172
173/* Feature tests against the various tunings used to create ix86_tune_features
174 based on the processor mask. */
175static unsigned HOST_WIDE_INT initial_ix86_tune_features[X86_TUNE_LAST] = {
176#undef DEF_TUNE
177#define DEF_TUNE(tune, name, selector) selector,
178#include "x86-tune.def"
179#undef DEF_TUNE
180};
181
182/* Feature tests against the various architecture variations. */
183unsigned char ix86_arch_features[X86_ARCH_LAST];
184
9ba66bf5
JJ		 185struct ix86_target_opts
186{
187 const char *option; /* option string */
188 HOST_WIDE_INT mask; /* isa mask options */
189};
190
191/* This table is ordered so that options like -msse4.2 that imply other
192 ISAs come first. Target string will be displayed in the same order. */
193static struct ix86_target_opts isa2_opts[] =
194{
8cf86e14
HL		 195 { "-mcx16", OPTION_MASK_ISA2_CX16 },
196 { "-mvaes", OPTION_MASK_ISA2_VAES },
197 { "-mrdpid", OPTION_MASK_ISA2_RDPID },
198 { "-mpconfig", OPTION_MASK_ISA2_PCONFIG },
199 { "-mwbnoinvd", OPTION_MASK_ISA2_WBNOINVD },
200 { "-mavx512vp2intersect", OPTION_MASK_ISA2_AVX512VP2INTERSECT },
201 { "-msgx", OPTION_MASK_ISA2_SGX },
202 { "-mavx5124vnniw", OPTION_MASK_ISA2_AVX5124VNNIW },
203 { "-mavx5124fmaps", OPTION_MASK_ISA2_AVX5124FMAPS },
204 { "-mhle", OPTION_MASK_ISA2_HLE },
205 { "-mmovbe", OPTION_MASK_ISA2_MOVBE },
206 { "-mclzero", OPTION_MASK_ISA2_CLZERO },
207 { "-mmwaitx", OPTION_MASK_ISA2_MWAITX },
208 { "-mmovdir64b", OPTION_MASK_ISA2_MOVDIR64B },
209 { "-mwaitpkg", OPTION_MASK_ISA2_WAITPKG },
210 { "-mcldemote", OPTION_MASK_ISA2_CLDEMOTE },
211 { "-mptwrite", OPTION_MASK_ISA2_PTWRITE },
212 { "-mavx512bf16", OPTION_MASK_ISA2_AVX512BF16 },
366386c7 213 { "-menqcmd", OPTION_MASK_ISA2_ENQCMD },
1e47cb35 214 { "-mserialize", OPTION_MASK_ISA2_SERIALIZE },
5c609842 215 { "-mtsxldtrk", OPTION_MASK_ISA2_TSXLDTRK },
216 { "-mamx-tile", OPTION_MASK_ISA2_AMX_TILE },
217 { "-mamx-int8", OPTION_MASK_ISA2_AMX_INT8 },
299a53d7 218 { "-mamx-bf16", OPTION_MASK_ISA2_AMX_BF16 },
83927c63 219 { "-muintr", OPTION_MASK_ISA2_UINTR },
632a2f50 220 { "-mhreset", OPTION_MASK_ISA2_HRESET },
221 { "-mkl", OPTION_MASK_ISA2_KL },
ca813880 222 { "-mwidekl", OPTION_MASK_ISA2_WIDEKL },
223 { "-mavxvnni", OPTION_MASK_ISA2_AVXVNNI }
9ba66bf5
JJ		 224};
225static struct ix86_target_opts isa_opts[] =
226{
227 { "-mavx512vpopcntdq", OPTION_MASK_ISA_AVX512VPOPCNTDQ },
228 { "-mavx512bitalg", OPTION_MASK_ISA_AVX512BITALG },
229 { "-mvpclmulqdq", OPTION_MASK_ISA_VPCLMULQDQ },
230 { "-mgfni", OPTION_MASK_ISA_GFNI },
231 { "-mavx512vnni", OPTION_MASK_ISA_AVX512VNNI },
232 { "-mavx512vbmi2", OPTION_MASK_ISA_AVX512VBMI2 },
233 { "-mavx512vbmi", OPTION_MASK_ISA_AVX512VBMI },
234 { "-mavx512ifma", OPTION_MASK_ISA_AVX512IFMA },
235 { "-mavx512vl", OPTION_MASK_ISA_AVX512VL },
236 { "-mavx512bw", OPTION_MASK_ISA_AVX512BW },
237 { "-mavx512dq", OPTION_MASK_ISA_AVX512DQ },
238 { "-mavx512er", OPTION_MASK_ISA_AVX512ER },
239 { "-mavx512pf", OPTION_MASK_ISA_AVX512PF },
240 { "-mavx512cd", OPTION_MASK_ISA_AVX512CD },
241 { "-mavx512f", OPTION_MASK_ISA_AVX512F },
242 { "-mavx2", OPTION_MASK_ISA_AVX2 },
243 { "-mfma", OPTION_MASK_ISA_FMA },
244 { "-mxop", OPTION_MASK_ISA_XOP },
245 { "-mfma4", OPTION_MASK_ISA_FMA4 },
246 { "-mf16c", OPTION_MASK_ISA_F16C },
247 { "-mavx", OPTION_MASK_ISA_AVX },
248/*{ "-msse4" OPTION_MASK_ISA_SSE4 }, */
249 { "-msse4.2", OPTION_MASK_ISA_SSE4_2 },
250 { "-msse4.1", OPTION_MASK_ISA_SSE4_1 },
251 { "-msse4a", OPTION_MASK_ISA_SSE4A },
252 { "-mssse3", OPTION_MASK_ISA_SSSE3 },
253 { "-msse3", OPTION_MASK_ISA_SSE3 },
254 { "-maes", OPTION_MASK_ISA_AES },
255 { "-msha", OPTION_MASK_ISA_SHA },
256 { "-mpclmul", OPTION_MASK_ISA_PCLMUL },
257 { "-msse2", OPTION_MASK_ISA_SSE2 },
258 { "-msse", OPTION_MASK_ISA_SSE },
259 { "-m3dnowa", OPTION_MASK_ISA_3DNOW_A },
260 { "-m3dnow", OPTION_MASK_ISA_3DNOW },
261 { "-mmmx", OPTION_MASK_ISA_MMX },
262 { "-mrtm", OPTION_MASK_ISA_RTM },
263 { "-mprfchw", OPTION_MASK_ISA_PRFCHW },
264 { "-mrdseed", OPTION_MASK_ISA_RDSEED },
265 { "-madx", OPTION_MASK_ISA_ADX },
266 { "-mprefetchwt1", OPTION_MASK_ISA_PREFETCHWT1 },
267 { "-mclflushopt", OPTION_MASK_ISA_CLFLUSHOPT },
268 { "-mxsaves", OPTION_MASK_ISA_XSAVES },
269 { "-mxsavec", OPTION_MASK_ISA_XSAVEC },
270 { "-mxsaveopt", OPTION_MASK_ISA_XSAVEOPT },
271 { "-mxsave", OPTION_MASK_ISA_XSAVE },
272 { "-mabm", OPTION_MASK_ISA_ABM },
273 { "-mbmi", OPTION_MASK_ISA_BMI },
274 { "-mbmi2", OPTION_MASK_ISA_BMI2 },
275 { "-mlzcnt", OPTION_MASK_ISA_LZCNT },
276 { "-mtbm", OPTION_MASK_ISA_TBM },
277 { "-mpopcnt", OPTION_MASK_ISA_POPCNT },
278 { "-msahf", OPTION_MASK_ISA_SAHF },
279 { "-mcrc32", OPTION_MASK_ISA_CRC32 },
280 { "-mfsgsbase", OPTION_MASK_ISA_FSGSBASE },
281 { "-mrdrnd", OPTION_MASK_ISA_RDRND },
282 { "-mpku", OPTION_MASK_ISA_PKU },
283 { "-mlwp", OPTION_MASK_ISA_LWP },
284 { "-mfxsr", OPTION_MASK_ISA_FXSR },
285 { "-mclwb", OPTION_MASK_ISA_CLWB },
286 { "-mshstk", OPTION_MASK_ISA_SHSTK },
287 { "-mmovdiri", OPTION_MASK_ISA_MOVDIRI }
288};
289
290/* Return 1 if TRAIT NAME is present in the OpenMP context's
291 device trait set, return 0 if not present in any OpenMP context in the
292 whole translation unit, or -1 if not present in the current OpenMP context
293 but might be present in another OpenMP context in the same TU. */
294
295int
296ix86_omp_device_kind_arch_isa (enum omp_device_kind_arch_isa trait,
297 const char *name)
298{
299 switch (trait)
300 {
301 case omp_device_kind:
302 return strcmp (name, "cpu") == 0;
303 case omp_device_arch:
304 if (strcmp (name, "x86") == 0)
305 return 1;
306 if (TARGET_64BIT)
307 {
308 if (TARGET_X32)
309 return strcmp (name, "x32") == 0;
310 else
311 return strcmp (name, "x86_64") == 0;
312 }
313 if (strcmp (name, "ia32") == 0 || strcmp (name, "i386") == 0)
314 return 1;
315 if (strcmp (name, "i486") == 0)
316 return ix86_arch != PROCESSOR_I386 ? 1 : -1;
317 if (strcmp (name, "i586") == 0)
318 return (ix86_arch != PROCESSOR_I386
319 && ix86_arch != PROCESSOR_I486) ? 1 : -1;
320 if (strcmp (name, "i686") == 0)
321 return (ix86_arch != PROCESSOR_I386
322 && ix86_arch != PROCESSOR_I486
323 && ix86_arch != PROCESSOR_LAKEMONT
324 && ix86_arch != PROCESSOR_PENTIUM) ? 1 : -1;
325 return 0;
326 case omp_device_isa:
327 for (int i = 0; i < 2; i++)
328 {
329 struct ix86_target_opts *opts = i ? isa2_opts : isa_opts;
330 size_t nopts = i ? ARRAY_SIZE (isa2_opts) : ARRAY_SIZE (isa_opts);
331 HOST_WIDE_INT mask = i ? ix86_isa_flags2 : ix86_isa_flags;
332 for (size_t n = 0; n < nopts; n++)
333 {
aa16689e 334 /* Handle sse4 as an alias to sse4.2. */
9ba66bf5
JJ		 335 if (opts[n].mask == OPTION_MASK_ISA_SSE4_2)
336 {
9ba66bf5
JJ		 337 if (strcmp (name, "sse4") == 0)
338 return (mask & opts[n].mask) != 0 ? 1 : -1;
339 }
aa16689e 340 if (strcmp (name, opts[n].option + 2) == 0)
9ba66bf5
JJ		 341 return (mask & opts[n].mask) != 0 ? 1 : -1;
342 }
343 }
344 return 0;
345 default:
346 gcc_unreachable ();
347 }
348}
349
2bf6d935
ML		 350/* Return a string that documents the current -m options. The caller is
351 responsible for freeing the string. */
352
353char *
354ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2,
355 int flags, int flags2,
356 const char *arch, const char *tune,
46e6341f
JJ		 357 enum fpmath_unit fpmath,
358 enum prefer_vector_width pvw,
359 bool add_nl_p, bool add_abi_p)
2bf6d935 360{
2bf6d935
ML		 361 /* Flag options. */
362 static struct ix86_target_opts flag_opts[] =
363 {
364 { "-m128bit-long-double", MASK_128BIT_LONG_DOUBLE },
365 { "-mlong-double-128", MASK_LONG_DOUBLE_128 },
366 { "-mlong-double-64", MASK_LONG_DOUBLE_64 },
367 { "-m80387", MASK_80387 },
368 { "-maccumulate-outgoing-args", MASK_ACCUMULATE_OUTGOING_ARGS },
369 { "-malign-double", MASK_ALIGN_DOUBLE },
370 { "-mcld", MASK_CLD },
371 { "-mfp-ret-in-387", MASK_FLOAT_RETURNS },
372 { "-mieee-fp", MASK_IEEE_FP },
373 { "-minline-all-stringops", MASK_INLINE_ALL_STRINGOPS },
374 { "-minline-stringops-dynamically", MASK_INLINE_STRINGOPS_DYNAMICALLY },
375 { "-mms-bitfields", MASK_MS_BITFIELD_LAYOUT },
376 { "-mno-align-stringops", MASK_NO_ALIGN_STRINGOPS },
377 { "-mno-fancy-math-387", MASK_NO_FANCY_MATH_387 },
378 { "-mno-push-args", MASK_NO_PUSH_ARGS },
379 { "-mno-red-zone", MASK_NO_RED_ZONE },
380 { "-momit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER },
381 { "-mrecip", MASK_RECIP },
382 { "-mrtd", MASK_RTD },
383 { "-msseregparm", MASK_SSEREGPARM },
384 { "-mstack-arg-probe", MASK_STACK_PROBE },
385 { "-mtls-direct-seg-refs", MASK_TLS_DIRECT_SEG_REFS },
386 { "-mvect8-ret-in-mem", MASK_VECT8_RETURNS },
387 { "-m8bit-idiv", MASK_USE_8BIT_IDIV },
388 { "-mvzeroupper", MASK_VZEROUPPER },
389 { "-mstv", MASK_STV },
390 { "-mavx256-split-unaligned-load", MASK_AVX256_SPLIT_UNALIGNED_LOAD },
391 { "-mavx256-split-unaligned-store", MASK_AVX256_SPLIT_UNALIGNED_STORE },
392 { "-mcall-ms2sysv-xlogues", MASK_CALL_MS2SYSV_XLOGUES }
393 };
394
395 /* Additional flag options. */
396 static struct ix86_target_opts flag2_opts[] =
397 {
398 { "-mgeneral-regs-only", OPTION_MASK_GENERAL_REGS_ONLY }
399 };
400
401 const char *opts[ARRAY_SIZE (isa_opts) + ARRAY_SIZE (isa2_opts)
402 + ARRAY_SIZE (flag_opts) + ARRAY_SIZE (flag2_opts) + 6][2];
403
404 char isa_other[40];
405 char isa2_other[40];
406 char flags_other[40];
407 char flags2_other[40];
408 unsigned num = 0;
409 unsigned i, j;
410 char *ret;
411 char *ptr;
412 size_t len;
413 size_t line_len;
414 size_t sep_len;
415 const char *abi;
416
417 memset (opts, '\0', sizeof (opts));
418
419 /* Add -march= option. */
420 if (arch)
421 {
422 opts[num][0] = "-march=";
423 opts[num++][1] = arch;
424 }
425
426 /* Add -mtune= option. */
427 if (tune)
428 {
429 opts[num][0] = "-mtune=";
430 opts[num++][1] = tune;
431 }
432
433 /* Add -m32/-m64/-mx32. */
434 if (add_abi_p)
435 {
436 if ((isa & OPTION_MASK_ISA_64BIT) != 0)
437 {
438 if ((isa & OPTION_MASK_ABI_64) != 0)
439 abi = "-m64";
440 else
441 abi = "-mx32";
442 }
443 else
444 abi = "-m32";
445 opts[num++][0] = abi;
446 }
447 isa &= ~(OPTION_MASK_ISA_64BIT | OPTION_MASK_ABI_64 | OPTION_MASK_ABI_X32);
448
449 /* Pick out the options in isa2 options. */
450 for (i = 0; i < ARRAY_SIZE (isa2_opts); i++)
451 {
452 if ((isa2 & isa2_opts[i].mask) != 0)
453 {
454 opts[num++][0] = isa2_opts[i].option;
455 isa2 &= ~ isa2_opts[i].mask;
456 }
457 }
458
459 if (isa2 && add_nl_p)
460 {
461 opts[num++][0] = isa2_other;
462 sprintf (isa2_other, "(other isa2: %#" HOST_WIDE_INT_PRINT "x)", isa2);
463 }
464
465 /* Pick out the options in isa options. */
466 for (i = 0; i < ARRAY_SIZE (isa_opts); i++)
467 {
468 if ((isa & isa_opts[i].mask) != 0)
469 {
470 opts[num++][0] = isa_opts[i].option;
471 isa &= ~ isa_opts[i].mask;
472 }
473 }
474
475 if (isa && add_nl_p)
476 {
477 opts[num++][0] = isa_other;
478 sprintf (isa_other, "(other isa: %#" HOST_WIDE_INT_PRINT "x)", isa);
479 }
480
481 /* Add flag options. */
482 for (i = 0; i < ARRAY_SIZE (flag_opts); i++)
483 {
484 if ((flags & flag_opts[i].mask) != 0)
485 {
486 opts[num++][0] = flag_opts[i].option;
487 flags &= ~ flag_opts[i].mask;
488 }
489 }
490
491 if (flags && add_nl_p)
492 {
493 opts[num++][0] = flags_other;
494 sprintf (flags_other, "(other flags: %#x)", flags);
495 }
496
497 /* Add additional flag options. */
498 for (i = 0; i < ARRAY_SIZE (flag2_opts); i++)
499 {
500 if ((flags2 & flag2_opts[i].mask) != 0)
501 {
502 opts[num++][0] = flag2_opts[i].option;
503 flags2 &= ~ flag2_opts[i].mask;
504 }
505 }
506
507 if (flags2 && add_nl_p)
508 {
509 opts[num++][0] = flags2_other;
510 sprintf (flags2_other, "(other flags2: %#x)", flags2);
511 }
512
46e6341f 513 /* Add -mfpmath= option. */
2bf6d935
ML		 514 if (fpmath)
515 {
516 opts[num][0] = "-mfpmath=";
517 switch ((int) fpmath)
518 {
519 case FPMATH_387:
520 opts[num++][1] = "387";
521 break;
522
523 case FPMATH_SSE:
524 opts[num++][1] = "sse";
525 break;
526
527 case FPMATH_387 | FPMATH_SSE:
528 opts[num++][1] = "sse+387";
529 break;
530
531 default:
532 gcc_unreachable ();
533 }
534 }
535
46e6341f
JJ		 536 /* Add -mprefer-vector-width= option. */
537 if (pvw)
538 {
539 opts[num][0] = "-mprefer-vector-width=";
540 switch ((int) pvw)
541 {
542 case PVW_AVX128:
543 opts[num++][1] = "128";
544 break;
545
546 case PVW_AVX256:
547 opts[num++][1] = "256";
548 break;
549
550 case PVW_AVX512:
551 opts[num++][1] = "512";
552 break;
553
554 default:
555 gcc_unreachable ();
556 }
557 }
558
2bf6d935
ML		 559 /* Any options? */
560 if (num == 0)
561 return NULL;
562
563 gcc_assert (num < ARRAY_SIZE (opts));
564
565 /* Size the string. */
566 len = 0;
567 sep_len = (add_nl_p) ? 3 : 1;
568 for (i = 0; i < num; i++)
569 {
570 len += sep_len;
571 for (j = 0; j < 2; j++)
572 if (opts[i][j])
573 len += strlen (opts[i][j]);
574 }
575
576 /* Build the string. */
577 ret = ptr = (char *) xmalloc (len);
578 line_len = 0;
579
580 for (i = 0; i < num; i++)
581 {
582 size_t len2[2];
583
584 for (j = 0; j < 2; j++)
585 len2[j] = (opts[i][j]) ? strlen (opts[i][j]) : 0;
586
587 if (i != 0)
588 {
589 *ptr++ = ' ';
590 line_len++;
591
592 if (add_nl_p && line_len + len2[0] + len2[1] > 70)
593 {
594 *ptr++ = '\\';
595 *ptr++ = '\n';
596 line_len = 0;
597 }
598 }
599
600 for (j = 0; j < 2; j++)
601 if (opts[i][j])
602 {
603 memcpy (ptr, opts[i][j], len2[j]);
604 ptr += len2[j];
605 line_len += len2[j];
606 }
607 }
608
609 *ptr = '\0';
610 gcc_assert (ret + len >= ptr);
611
612 return ret;
613}
614
615/* Function that is callable from the debugger to print the current
616 options. */
617void ATTRIBUTE_UNUSED
618ix86_debug_options (void)
619{
620 char *opts = ix86_target_string (ix86_isa_flags, ix86_isa_flags2,
621 target_flags, ix86_target_flags,
46e6341f
JJ		 622 ix86_arch_string, ix86_tune_string,
623 ix86_fpmath, prefer_vector_width_type,
624 true, true);
2bf6d935
ML		 625
626 if (opts)
627 {
628 fprintf (stderr, "%s\n\n", opts);
629 free (opts);
630 }
631 else
632 fputs ("<no options>\n\n", stderr);
633
634 return;
635}
636
637/* Save the current options */
638
639void
640ix86_function_specific_save (struct cl_target_option *ptr,
ba948b37
JJ		 641 struct gcc_options *opts,
642 struct gcc_options */* opts_set */)
2bf6d935
ML		 643{
644 ptr->arch = ix86_arch;
645 ptr->schedule = ix86_schedule;
08a4adcf 646 ptr->prefetch_sse = ix86_prefetch_sse;
2bf6d935
ML		 647 ptr->tune = ix86_tune;
648 ptr->branch_cost = ix86_branch_cost;
649 ptr->tune_defaulted = ix86_tune_defaulted;
650 ptr->arch_specified = ix86_arch_specified;
651 ptr->x_ix86_isa_flags_explicit = opts->x_ix86_isa_flags_explicit;
652 ptr->x_ix86_isa_flags2_explicit = opts->x_ix86_isa_flags2_explicit;
653 ptr->x_recip_mask_explicit = opts->x_recip_mask_explicit;
654 ptr->x_ix86_arch_string = opts->x_ix86_arch_string;
655 ptr->x_ix86_tune_string = opts->x_ix86_tune_string;
2bf6d935
ML		 656 ptr->x_ix86_abi = opts->x_ix86_abi;
657 ptr->x_ix86_asm_dialect = opts->x_ix86_asm_dialect;
658 ptr->x_ix86_branch_cost = opts->x_ix86_branch_cost;
659 ptr->x_ix86_dump_tunes = opts->x_ix86_dump_tunes;
660 ptr->x_ix86_force_align_arg_pointer = opts->x_ix86_force_align_arg_pointer;
661 ptr->x_ix86_force_drap = opts->x_ix86_force_drap;
2bf6d935 662 ptr->x_ix86_recip_name = opts->x_ix86_recip_name;
2bf6d935
ML		 663 ptr->x_ix86_section_threshold = opts->x_ix86_section_threshold;
664 ptr->x_ix86_sse2avx = opts->x_ix86_sse2avx;
665 ptr->x_ix86_stack_protector_guard = opts->x_ix86_stack_protector_guard;
666 ptr->x_ix86_stringop_alg = opts->x_ix86_stringop_alg;
667 ptr->x_ix86_tls_dialect = opts->x_ix86_tls_dialect;
668 ptr->x_ix86_tune_ctrl_string = opts->x_ix86_tune_ctrl_string;
669 ptr->x_ix86_tune_memcpy_strategy = opts->x_ix86_tune_memcpy_strategy;
670 ptr->x_ix86_tune_memset_strategy = opts->x_ix86_tune_memset_strategy;
671 ptr->x_ix86_tune_no_default = opts->x_ix86_tune_no_default;
2bf6d935
ML		 672
673 /* The fields are char but the variables are not; make sure the
674 values fit in the fields. */
675 gcc_assert (ptr->arch == ix86_arch);
676 gcc_assert (ptr->schedule == ix86_schedule);
677 gcc_assert (ptr->tune == ix86_tune);
678 gcc_assert (ptr->branch_cost == ix86_branch_cost);
679}
680
681/* Feature tests against the various architecture variations, used to create
682 ix86_arch_features based on the processor mask. */
683static unsigned HOST_WIDE_INT initial_ix86_arch_features[X86_ARCH_LAST] = {
684 /* X86_ARCH_CMOV: Conditional move was added for pentiumpro. */
685 ~(m_386 | m_486 | m_PENT | m_LAKEMONT | m_K6),
686
687 /* X86_ARCH_CMPXCHG: Compare and exchange was added for 80486. */
688 ~m_386,
689
690 /* X86_ARCH_CMPXCHG8B: Compare and exchange 8 bytes was added for pentium. */
691 ~(m_386 | m_486),
692
693 /* X86_ARCH_XADD: Exchange and add was added for 80486. */
694 ~m_386,
695
696 /* X86_ARCH_BSWAP: Byteswap was added for 80486. */
697 ~m_386,
698};
699
700/* This table must be in sync with enum processor_type in i386.h. */
701static const struct processor_costs *processor_cost_table[] =
702{
703 &generic_cost,
704 &i386_cost,
705 &i486_cost,
706 &pentium_cost,
707 &lakemont_cost,
708 &pentiumpro_cost,
709 &pentium4_cost,
710 &nocona_cost,
711 &core_cost,
712 &core_cost,
713 &core_cost,
714 &core_cost,
715 &atom_cost,
716 &slm_cost,
717 &slm_cost,
718 &slm_cost,
719 &slm_cost,
720 &slm_cost,
721 &slm_cost,
722 &skylake_cost,
723 &skylake_cost,
724 &skylake_cost,
725 &skylake_cost,
726 &skylake_cost,
727 &skylake_cost,
a9fcfec3
HL		 728 &skylake_cost,
729 &skylake_cost,
ba9c87d3
CL		 730 &skylake_cost,
731 &skylake_cost,
2bf6d935
ML		 732 &intel_cost,
733 &geode_cost,
734 &k6_cost,
735 &athlon_cost,
736 &k8_cost,
737 &amdfam10_cost,
738 &bdver_cost,
739 &bdver_cost,
740 &bdver_cost,
741 &bdver_cost,
742 &btver1_cost,
743 &btver2_cost,
744 &znver1_cost,
3e2ae3ee 745 &znver2_cost,
2bf6d935
ML		 746 &znver2_cost
747};
748
749/* Guarantee that the array is aligned with enum processor_type. */
750STATIC_ASSERT (ARRAY_SIZE (processor_cost_table) == PROCESSOR_max);
751
752static bool
753ix86_option_override_internal (bool main_args_p,
754 struct gcc_options *opts,
755 struct gcc_options *opts_set);
756static void
1e964774
L		 757set_ix86_tune_features (struct gcc_options *opts,
758 enum processor_type ix86_tune, bool dump);
2bf6d935
ML		 759
760/* Restore the current options */
761
762void
763ix86_function_specific_restore (struct gcc_options *opts,
ba948b37 764 struct gcc_options */* opts_set */,
2bf6d935
ML		 765 struct cl_target_option *ptr)
766{
767 enum processor_type old_tune = ix86_tune;
768 enum processor_type old_arch = ix86_arch;
769 unsigned HOST_WIDE_INT ix86_arch_mask;
770 int i;
771
772 /* We don't change -fPIC. */
773 opts->x_flag_pic = flag_pic;
774
775 ix86_arch = (enum processor_type) ptr->arch;
776 ix86_schedule = (enum attr_cpu) ptr->schedule;
777 ix86_tune = (enum processor_type) ptr->tune;
08a4adcf 778 ix86_prefetch_sse = ptr->prefetch_sse;
2bf6d935
ML		 779 ix86_tune_defaulted = ptr->tune_defaulted;
780 ix86_arch_specified = ptr->arch_specified;
781 opts->x_ix86_isa_flags_explicit = ptr->x_ix86_isa_flags_explicit;
782 opts->x_ix86_isa_flags2_explicit = ptr->x_ix86_isa_flags2_explicit;
783 opts->x_recip_mask_explicit = ptr->x_recip_mask_explicit;
784 opts->x_ix86_arch_string = ptr->x_ix86_arch_string;
785 opts->x_ix86_tune_string = ptr->x_ix86_tune_string;
2bf6d935
ML		 786 opts->x_ix86_abi = ptr->x_ix86_abi;
787 opts->x_ix86_asm_dialect = ptr->x_ix86_asm_dialect;
788 opts->x_ix86_branch_cost = ptr->x_ix86_branch_cost;
789 opts->x_ix86_dump_tunes = ptr->x_ix86_dump_tunes;
790 opts->x_ix86_force_align_arg_pointer = ptr->x_ix86_force_align_arg_pointer;
791 opts->x_ix86_force_drap = ptr->x_ix86_force_drap;
2bf6d935 792 opts->x_ix86_recip_name = ptr->x_ix86_recip_name;
2bf6d935
ML		 793 opts->x_ix86_section_threshold = ptr->x_ix86_section_threshold;
794 opts->x_ix86_sse2avx = ptr->x_ix86_sse2avx;
795 opts->x_ix86_stack_protector_guard = ptr->x_ix86_stack_protector_guard;
796 opts->x_ix86_stringop_alg = ptr->x_ix86_stringop_alg;
797 opts->x_ix86_tls_dialect = ptr->x_ix86_tls_dialect;
798 opts->x_ix86_tune_ctrl_string = ptr->x_ix86_tune_ctrl_string;
799 opts->x_ix86_tune_memcpy_strategy = ptr->x_ix86_tune_memcpy_strategy;
800 opts->x_ix86_tune_memset_strategy = ptr->x_ix86_tune_memset_strategy;
801 opts->x_ix86_tune_no_default = ptr->x_ix86_tune_no_default;
2bf6d935
ML		 802 ix86_tune_cost = processor_cost_table[ix86_tune];
803 /* TODO: ix86_cost should be chosen at instruction or function granuality
804 so for cold code we use size_cost even in !optimize_size compilation. */
805 if (opts->x_optimize_size)
806 ix86_cost = &ix86_size_cost;
807 else
808 ix86_cost = ix86_tune_cost;
809
810 /* Recreate the arch feature tests if the arch changed */
811 if (old_arch != ix86_arch)
812 {
813 ix86_arch_mask = HOST_WIDE_INT_1U << ix86_arch;
814 for (i = 0; i < X86_ARCH_LAST; ++i)
815 ix86_arch_features[i]
816 = !!(initial_ix86_arch_features[i] & ix86_arch_mask);
817 }
818
819 /* Recreate the tune optimization tests */
820 if (old_tune != ix86_tune)
1e964774 821 set_ix86_tune_features (opts, ix86_tune, false);
2bf6d935
ML		 822}
823
824/* Adjust target options after streaming them in. This is mainly about
825 reconciling them with global options. */
826
827void
828ix86_function_specific_post_stream_in (struct cl_target_option *ptr)
829{
830 /* flag_pic is a global option, but ix86_cmodel is target saved option
831 partly computed from flag_pic. If flag_pic is on, adjust x_ix86_cmodel
832 for PIC, or error out. */
833 if (flag_pic)
834 switch (ptr->x_ix86_cmodel)
835 {
836 case CM_SMALL:
837 ptr->x_ix86_cmodel = CM_SMALL_PIC;
838 break;
839
840 case CM_MEDIUM:
841 ptr->x_ix86_cmodel = CM_MEDIUM_PIC;
842 break;
843
844 case CM_LARGE:
845 ptr->x_ix86_cmodel = CM_LARGE_PIC;
846 break;
847
848 case CM_KERNEL:
849 error ("code model %s does not support PIC mode", "kernel");
850 break;
851
852 default:
853 break;
854 }
855 else
856 switch (ptr->x_ix86_cmodel)
857 {
858 case CM_SMALL_PIC:
859 ptr->x_ix86_cmodel = CM_SMALL;
860 break;
861
862 case CM_MEDIUM_PIC:
863 ptr->x_ix86_cmodel = CM_MEDIUM;
864 break;
865
866 case CM_LARGE_PIC:
867 ptr->x_ix86_cmodel = CM_LARGE;
868 break;
869
870 default:
871 break;
872 }
873}
874
875/* Print the current options */
876
877void
878ix86_function_specific_print (FILE *file, int indent,
879 struct cl_target_option *ptr)
880{
881 char *target_string
882 = ix86_target_string (ptr->x_ix86_isa_flags, ptr->x_ix86_isa_flags2,
883 ptr->x_target_flags, ptr->x_ix86_target_flags,
46e6341f
JJ		 884 NULL, NULL, ptr->x_ix86_fpmath,
885 ptr->x_prefer_vector_width_type, false, true);
2bf6d935
ML		 886
887 gcc_assert (ptr->arch < PROCESSOR_max);
888 fprintf (file, "%*sarch = %d (%s)\n",
889 indent, "",
890 ptr->arch, processor_names[ptr->arch]);
891
892 gcc_assert (ptr->tune < PROCESSOR_max);
893 fprintf (file, "%*stune = %d (%s)\n",
894 indent, "",
895 ptr->tune, processor_names[ptr->tune]);
896
897 fprintf (file, "%*sbranch_cost = %d\n", indent, "", ptr->branch_cost);
898
899 if (target_string)
900 {
901 fprintf (file, "%*s%s\n", indent, "", target_string);
902 free (target_string);
903 }
904}
905
906\f
907/* Inner function to process the attribute((target(...))), take an argument and
908 set the current options from the argument. If we have a list, recursively go
909 over the list. */
910
911static bool
912ix86_valid_target_attribute_inner_p (tree fndecl, tree args, char *p_strings[],
913 struct gcc_options *opts,
914 struct gcc_options *opts_set,
915 struct gcc_options *enum_opts_set,
916 bool target_clone_attr)
917{
918 char *next_optstr;
919 bool ret = true;
920
921#define IX86_ATTR_ISA(S,O) { S, sizeof (S)-1, ix86_opt_isa, O, 0 }
922#define IX86_ATTR_STR(S,O) { S, sizeof (S)-1, ix86_opt_str, O, 0 }
923#define IX86_ATTR_ENUM(S,O) { S, sizeof (S)-1, ix86_opt_enum, O, 0 }
924#define IX86_ATTR_YES(S,O,M) { S, sizeof (S)-1, ix86_opt_yes, O, M }
925#define IX86_ATTR_NO(S,O,M) { S, sizeof (S)-1, ix86_opt_no, O, M }
87c753ac
L		 926#define IX86_ATTR_IX86_YES(S,O,M) \
927 { S, sizeof (S)-1, ix86_opt_ix86_yes, O, M }
928#define IX86_ATTR_IX86_NO(S,O,M) \
929 { S, sizeof (S)-1, ix86_opt_ix86_no, O, M }
2bf6d935
ML		 930
931 enum ix86_opt_type
932 {
933 ix86_opt_unknown,
934 ix86_opt_yes,
935 ix86_opt_no,
87c753ac
L		 936 ix86_opt_ix86_yes,
937 ix86_opt_ix86_no,
2bf6d935
ML		 938 ix86_opt_str,
939 ix86_opt_enum,
940 ix86_opt_isa
941 };
942
943 static const struct
944 {
945 const char *string;
946 size_t len;
947 enum ix86_opt_type type;
948 int opt;
949 int mask;
950 } attrs[] = {
951 /* isa options */
952 IX86_ATTR_ISA ("pconfig", OPT_mpconfig),
953 IX86_ATTR_ISA ("wbnoinvd", OPT_mwbnoinvd),
954 IX86_ATTR_ISA ("sgx", OPT_msgx),
955 IX86_ATTR_ISA ("avx5124fmaps", OPT_mavx5124fmaps),
956 IX86_ATTR_ISA ("avx5124vnniw", OPT_mavx5124vnniw),
957 IX86_ATTR_ISA ("avx512vpopcntdq", OPT_mavx512vpopcntdq),
958 IX86_ATTR_ISA ("avx512vbmi2", OPT_mavx512vbmi2),
959 IX86_ATTR_ISA ("avx512vnni", OPT_mavx512vnni),
960 IX86_ATTR_ISA ("avx512bitalg", OPT_mavx512bitalg),
e21b52af 961 IX86_ATTR_ISA ("avx512vp2intersect", OPT_mavx512vp2intersect),
2bf6d935
ML		 962
963 IX86_ATTR_ISA ("avx512vbmi", OPT_mavx512vbmi),
964 IX86_ATTR_ISA ("avx512ifma", OPT_mavx512ifma),
965 IX86_ATTR_ISA ("avx512vl", OPT_mavx512vl),
966 IX86_ATTR_ISA ("avx512bw", OPT_mavx512bw),
967 IX86_ATTR_ISA ("avx512dq", OPT_mavx512dq),
968 IX86_ATTR_ISA ("avx512er", OPT_mavx512er),
969 IX86_ATTR_ISA ("avx512pf", OPT_mavx512pf),
970 IX86_ATTR_ISA ("avx512cd", OPT_mavx512cd),
971 IX86_ATTR_ISA ("avx512f", OPT_mavx512f),
972 IX86_ATTR_ISA ("avx2", OPT_mavx2),
973 IX86_ATTR_ISA ("fma", OPT_mfma),
974 IX86_ATTR_ISA ("xop", OPT_mxop),
975 IX86_ATTR_ISA ("fma4", OPT_mfma4),
976 IX86_ATTR_ISA ("f16c", OPT_mf16c),
977 IX86_ATTR_ISA ("avx", OPT_mavx),
978 IX86_ATTR_ISA ("sse4", OPT_msse4),
979 IX86_ATTR_ISA ("sse4.2", OPT_msse4_2),
980 IX86_ATTR_ISA ("sse4.1", OPT_msse4_1),
981 IX86_ATTR_ISA ("sse4a", OPT_msse4a),
982 IX86_ATTR_ISA ("ssse3", OPT_mssse3),
983 IX86_ATTR_ISA ("sse3", OPT_msse3),
984 IX86_ATTR_ISA ("aes", OPT_maes),
985 IX86_ATTR_ISA ("sha", OPT_msha),
986 IX86_ATTR_ISA ("pclmul", OPT_mpclmul),
987 IX86_ATTR_ISA ("sse2", OPT_msse2),
988 IX86_ATTR_ISA ("sse", OPT_msse),
989 IX86_ATTR_ISA ("3dnowa", OPT_m3dnowa),
990 IX86_ATTR_ISA ("3dnow", OPT_m3dnow),
991 IX86_ATTR_ISA ("mmx", OPT_mmmx),
992 IX86_ATTR_ISA ("rtm", OPT_mrtm),
993 IX86_ATTR_ISA ("prfchw", OPT_mprfchw),
994 IX86_ATTR_ISA ("rdseed", OPT_mrdseed),
995 IX86_ATTR_ISA ("adx", OPT_madx),
996 IX86_ATTR_ISA ("prefetchwt1", OPT_mprefetchwt1),
997 IX86_ATTR_ISA ("clflushopt", OPT_mclflushopt),
998 IX86_ATTR_ISA ("xsaves", OPT_mxsaves),
999 IX86_ATTR_ISA ("xsavec", OPT_mxsavec),
1000 IX86_ATTR_ISA ("xsaveopt", OPT_mxsaveopt),
1001 IX86_ATTR_ISA ("xsave", OPT_mxsave),
1002 IX86_ATTR_ISA ("abm", OPT_mabm),
1003 IX86_ATTR_ISA ("bmi", OPT_mbmi),
1004 IX86_ATTR_ISA ("bmi2", OPT_mbmi2),
1005 IX86_ATTR_ISA ("lzcnt", OPT_mlzcnt),
1006 IX86_ATTR_ISA ("tbm", OPT_mtbm),
1007 IX86_ATTR_ISA ("popcnt", OPT_mpopcnt),
1008 IX86_ATTR_ISA ("cx16", OPT_mcx16),
1009 IX86_ATTR_ISA ("sahf", OPT_msahf),
1010 IX86_ATTR_ISA ("movbe", OPT_mmovbe),
1011 IX86_ATTR_ISA ("crc32", OPT_mcrc32),
1012 IX86_ATTR_ISA ("fsgsbase", OPT_mfsgsbase),
1013 IX86_ATTR_ISA ("rdrnd", OPT_mrdrnd),
1014 IX86_ATTR_ISA ("mwaitx", OPT_mmwaitx),
1015 IX86_ATTR_ISA ("clzero", OPT_mclzero),
1016 IX86_ATTR_ISA ("pku", OPT_mpku),
1017 IX86_ATTR_ISA ("lwp", OPT_mlwp),
1018 IX86_ATTR_ISA ("hle", OPT_mhle),
1019 IX86_ATTR_ISA ("fxsr", OPT_mfxsr),
1020 IX86_ATTR_ISA ("clwb", OPT_mclwb),
1021 IX86_ATTR_ISA ("rdpid", OPT_mrdpid),
1022 IX86_ATTR_ISA ("gfni", OPT_mgfni),
1023 IX86_ATTR_ISA ("shstk", OPT_mshstk),
1024 IX86_ATTR_ISA ("vaes", OPT_mvaes),
1025 IX86_ATTR_ISA ("vpclmulqdq", OPT_mvpclmulqdq),
1026 IX86_ATTR_ISA ("movdiri", OPT_mmovdiri),
1027 IX86_ATTR_ISA ("movdir64b", OPT_mmovdir64b),
1028 IX86_ATTR_ISA ("waitpkg", OPT_mwaitpkg),
1029 IX86_ATTR_ISA ("cldemote", OPT_mcldemote),
299a53d7 1030 IX86_ATTR_ISA ("uintr", OPT_muintr),
2bf6d935 1031 IX86_ATTR_ISA ("ptwrite", OPT_mptwrite),
632a2f50 1032 IX86_ATTR_ISA ("kl", OPT_mkl),
1033 IX86_ATTR_ISA ("widekl", OPT_mwidekl),
4f0e90fa 1034 IX86_ATTR_ISA ("avx512bf16", OPT_mavx512bf16),
6a10feda 1035 IX86_ATTR_ISA ("enqcmd", OPT_menqcmd),
366386c7 1036 IX86_ATTR_ISA ("serialize", OPT_mserialize),
1e47cb35 1037 IX86_ATTR_ISA ("tsxldtrk", OPT_mtsxldtrk),
5c609842 1038 IX86_ATTR_ISA ("amx-tile", OPT_mamx_tile),
1039 IX86_ATTR_ISA ("amx-int8", OPT_mamx_int8),
1040 IX86_ATTR_ISA ("amx-bf16", OPT_mamx_bf16),
83927c63 1041 IX86_ATTR_ISA ("hreset", OPT_mhreset),
ca813880 1042 IX86_ATTR_ISA ("avxvnni", OPT_mavxvnni),
2bf6d935
ML		 1043
1044 /* enum options */
1045 IX86_ATTR_ENUM ("fpmath=", OPT_mfpmath_),
46e6341f 1046 IX86_ATTR_ENUM ("prefer-vector-width=", OPT_mprefer_vector_width_),
2bf6d935
ML		 1047
1048 /* string options */
1049 IX86_ATTR_STR ("arch=", IX86_FUNCTION_SPECIFIC_ARCH),
1050 IX86_ATTR_STR ("tune=", IX86_FUNCTION_SPECIFIC_TUNE),
1051
1052 /* flag options */
1053 IX86_ATTR_YES ("cld",
1054 OPT_mcld,
1055 MASK_CLD),
1056
1057 IX86_ATTR_NO ("fancy-math-387",
1058 OPT_mfancy_math_387,
1059 MASK_NO_FANCY_MATH_387),
1060
1061 IX86_ATTR_YES ("ieee-fp",
1062 OPT_mieee_fp,
1063 MASK_IEEE_FP),
1064
1065 IX86_ATTR_YES ("inline-all-stringops",
1066 OPT_minline_all_stringops,
1067 MASK_INLINE_ALL_STRINGOPS),
1068
1069 IX86_ATTR_YES ("inline-stringops-dynamically",
1070 OPT_minline_stringops_dynamically,
1071 MASK_INLINE_STRINGOPS_DYNAMICALLY),
1072
1073 IX86_ATTR_NO ("align-stringops",
1074 OPT_mno_align_stringops,
1075 MASK_NO_ALIGN_STRINGOPS),
1076
1077 IX86_ATTR_YES ("recip",
1078 OPT_mrecip,
1079 MASK_RECIP),
87c753ac
L		 1080
1081 IX86_ATTR_IX86_YES ("general-regs-only",
1082 OPT_mgeneral_regs_only,
1083 OPTION_MASK_GENERAL_REGS_ONLY),
2bf6d935
ML		 1084 };
1085
1086 location_t loc
1087 = fndecl == NULL ? UNKNOWN_LOCATION : DECL_SOURCE_LOCATION (fndecl);
1088 const char *attr_name = target_clone_attr ? "target_clone" : "target";
1089
1090 /* If this is a list, recurse to get the options. */
1091 if (TREE_CODE (args) == TREE_LIST)
1092 {
2bf6d935
ML		 1093 for (; args; args = TREE_CHAIN (args))
1094 if (TREE_VALUE (args)
1095 && !ix86_valid_target_attribute_inner_p (fndecl, TREE_VALUE (args),
1096 p_strings, opts, opts_set,
1097 enum_opts_set,
1098 target_clone_attr))
1099 ret = false;
1100
1101 return ret;
1102 }
1103
1104 else if (TREE_CODE (args) != STRING_CST)
1105 {
1106 error_at (loc, "attribute %qs argument is not a string", attr_name);
1107 return false;
1108 }
1109
1110 /* Handle multiple arguments separated by commas. */
1111 next_optstr = ASTRDUP (TREE_STRING_POINTER (args));
1112
1113 while (next_optstr && *next_optstr != '\0')
1114 {
1115 char *p = next_optstr;
1116 char *orig_p = p;
1117 char *comma = strchr (next_optstr, ',');
1118 size_t len, opt_len;
1119 int opt;
1120 bool opt_set_p;
1121 char ch;
1122 unsigned i;
1123 enum ix86_opt_type type = ix86_opt_unknown;
1124 int mask = 0;
1125
1126 if (comma)
1127 {
1128 *comma = '\0';
1129 len = comma - next_optstr;
1130 next_optstr = comma + 1;
1131 }
1132 else
1133 {
1134 len = strlen (p);
1135 next_optstr = NULL;
1136 }
1137
1138 /* Recognize no-xxx. */
1139 if (len > 3 && p[0] == 'n' && p[1] == 'o' && p[2] == '-')
1140 {
1141 opt_set_p = false;
1142 p += 3;
1143 len -= 3;
1144 }
1145 else
1146 opt_set_p = true;
1147
1148 /* Find the option. */
1149 ch = *p;
1150 opt = N_OPTS;
1151 for (i = 0; i < ARRAY_SIZE (attrs); i++)
1152 {
1153 type = attrs[i].type;
1154 opt_len = attrs[i].len;
1155 if (ch == attrs[i].string[0]
1156 && ((type != ix86_opt_str && type != ix86_opt_enum)
1157 ? len == opt_len
1158 : len > opt_len)
1159 && memcmp (p, attrs[i].string, opt_len) == 0)
1160 {
1161 opt = attrs[i].opt;
1162 mask = attrs[i].mask;
1163 break;
1164 }
1165 }
1166
1167 /* Process the option. */
1168 if (opt == N_OPTS)
1169 {
1170 error_at (loc, "attribute %qs argument %qs is unknown",
1171 orig_p, attr_name);
1172 ret = false;
1173 }
1174
1175 else if (type == ix86_opt_isa)
1176 {
1177 struct cl_decoded_option decoded;
1178
1179 generate_option (opt, NULL, opt_set_p, CL_TARGET, &decoded);
1180 ix86_handle_option (opts, opts_set,
1181 &decoded, input_location);
1182 }
1183
1184 else if (type == ix86_opt_yes || type == ix86_opt_no)
1185 {
1186 if (type == ix86_opt_no)
1187 opt_set_p = !opt_set_p;
1188
1189 if (opt_set_p)
1190 opts->x_target_flags |= mask;
1191 else
1192 opts->x_target_flags &= ~mask;
1193 }
1194
87c753ac
L		 1195 else if (type == ix86_opt_ix86_yes || type == ix86_opt_ix86_no)
1196 {
1197 if (mask == OPTION_MASK_GENERAL_REGS_ONLY)
1198 {
8f1ea8dd
L		 1199 if (!opt_set_p)
1200 {
ca23341b 1201 error_at (loc, "pragma or attribute %<target(\"%s\")%> "
8f1ea8dd
L		 1202 "does not allow a negated form", p);
1203 return false;
1204 }
1205
87c753ac
L		 1206 if (type != ix86_opt_ix86_yes)
1207 gcc_unreachable ();
1208
1209 opts->x_ix86_target_flags |= mask;
1210
1211 struct cl_decoded_option decoded;
1212 generate_option (opt, NULL, opt_set_p, CL_TARGET,
1213 &decoded);
1214 ix86_handle_option (opts, opts_set, &decoded,
1215 input_location);
1216 }
1217 else
1218 {
1219 if (type == ix86_opt_ix86_no)
1220 opt_set_p = !opt_set_p;
1221
1222 if (opt_set_p)
1223 opts->x_ix86_target_flags |= mask;
1224 else
1225 opts->x_ix86_target_flags &= ~mask;
1226 }
1227 }
1228
2bf6d935
ML		 1229 else if (type == ix86_opt_str)
1230 {
1231 if (p_strings[opt])
1232 {
1233 error_at (loc, "attribute value %qs was already specified "
1234 "in %qs attribute", orig_p, attr_name);
1235 ret = false;
1236 }
1237 else
94cdd3b7
JJ		 1238 {
1239 p_strings[opt] = xstrdup (p + opt_len);
1240 if (opt == IX86_FUNCTION_SPECIFIC_ARCH)
1241 {
1242 /* If arch= is set, clear all bits in x_ix86_isa_flags,
1243 except for ISA_64BIT, ABI_64, ABI_X32, and CODE16
1244 and all bits in x_ix86_isa_flags2. */
1245 opts->x_ix86_isa_flags &= (OPTION_MASK_ISA_64BIT
1246 | OPTION_MASK_ABI_64
1247 | OPTION_MASK_ABI_X32
1248 | OPTION_MASK_CODE16);
1249 opts->x_ix86_isa_flags_explicit &= (OPTION_MASK_ISA_64BIT
1250 | OPTION_MASK_ABI_64
1251 | OPTION_MASK_ABI_X32
1252 | OPTION_MASK_CODE16);
1253 opts->x_ix86_isa_flags2 = 0;
1254 opts->x_ix86_isa_flags2_explicit = 0;
1255 }
1256 }
2bf6d935
ML		 1257 }
1258
1259 else if (type == ix86_opt_enum)
1260 {
1261 bool arg_ok;
1262 int value;
1263
1264 arg_ok = opt_enum_arg_to_value (opt, p + opt_len, &value, CL_TARGET);
1265 if (arg_ok)
1266 set_option (opts, enum_opts_set, opt, value,
1267 p + opt_len, DK_UNSPECIFIED, input_location,
1268 global_dc);
1269 else
1270 {
1271 error_at (loc, "attribute value %qs is unknown in %qs attribute",
1272 orig_p, attr_name);
1273 ret = false;
1274 }
1275 }
1276
1277 else
1278 gcc_unreachable ();
1279 }
1280
1281 return ret;
1282}
1283
1284/* Release allocated strings. */
1285static void
1286release_options_strings (char **option_strings)
1287{
1288 /* Free up memory allocated to hold the strings */
1289 for (unsigned i = 0; i < IX86_FUNCTION_SPECIFIC_MAX; i++)
1290 free (option_strings[i]);
1291}
1292
1293/* Return a TARGET_OPTION_NODE tree of the target options listed or NULL. */
1294
1295tree
1296ix86_valid_target_attribute_tree (tree fndecl, tree args,
1297 struct gcc_options *opts,
1298 struct gcc_options *opts_set,
1299 bool target_clone_attr)
1300{
1301 const char *orig_arch_string = opts->x_ix86_arch_string;
1302 const char *orig_tune_string = opts->x_ix86_tune_string;
1303 enum fpmath_unit orig_fpmath_set = opts_set->x_ix86_fpmath;
46e6341f 1304 enum prefer_vector_width orig_pvw_set = opts_set->x_prefer_vector_width_type;
2bf6d935
ML		 1305 int orig_tune_defaulted = ix86_tune_defaulted;
1306 int orig_arch_specified = ix86_arch_specified;
1307 char *option_strings[IX86_FUNCTION_SPECIFIC_MAX] = { NULL, NULL };
1308 tree t = NULL_TREE;
1309 struct cl_target_option *def
1310 = TREE_TARGET_OPTION (target_option_default_node);
1311 struct gcc_options enum_opts_set;
1312
1313 memset (&enum_opts_set, 0, sizeof (enum_opts_set));
1314
1315 /* Process each of the options on the chain. */
1316 if (!ix86_valid_target_attribute_inner_p (fndecl, args, option_strings, opts,
1317 opts_set, &enum_opts_set,
1318 target_clone_attr))
1319 return error_mark_node;
1320
1321 /* If the changed options are different from the default, rerun
1322 ix86_option_override_internal, and then save the options away.
1323 The string options are attribute options, and will be undone
1324 when we copy the save structure. */
1325 if (opts->x_ix86_isa_flags != def->x_ix86_isa_flags
1326 || opts->x_ix86_isa_flags2 != def->x_ix86_isa_flags2
1327 || opts->x_target_flags != def->x_target_flags
1328 || option_strings[IX86_FUNCTION_SPECIFIC_ARCH]
1329 || option_strings[IX86_FUNCTION_SPECIFIC_TUNE]
46e6341f
JJ		 1330 || enum_opts_set.x_ix86_fpmath
1331 || enum_opts_set.x_prefer_vector_width_type)
2bf6d935
ML		 1332 {
1333 /* If we are using the default tune= or arch=, undo the string assigned,
1334 and use the default. */
1335 if (option_strings[IX86_FUNCTION_SPECIFIC_ARCH])
94cdd3b7
JJ		 1336 opts->x_ix86_arch_string
1337 = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_ARCH]);
2bf6d935
ML		 1338 else if (!orig_arch_specified)
1339 opts->x_ix86_arch_string = NULL;
1340
1341 if (option_strings[IX86_FUNCTION_SPECIFIC_TUNE])
1342 opts->x_ix86_tune_string
1343 = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_TUNE]);
1344 else if (orig_tune_defaulted)
1345 opts->x_ix86_tune_string = NULL;
1346
1347 /* If fpmath= is not set, and we now have sse2 on 32-bit, use it. */
1348 if (enum_opts_set.x_ix86_fpmath)
1349 opts_set->x_ix86_fpmath = (enum fpmath_unit) 1;
46e6341f
JJ		 1350 if (enum_opts_set.x_prefer_vector_width_type)
1351 opts_set->x_prefer_vector_width_type = (enum prefer_vector_width) 1;
2bf6d935
ML		 1352
1353 /* Do any overrides, such as arch=xxx, or tune=xxx support. */
1354 bool r = ix86_option_override_internal (false, opts, opts_set);
1355 if (!r)
1356 {
1357 release_options_strings (option_strings);
1358 return error_mark_node;
1359 }
1360
1361 /* Add any builtin functions with the new isa if any. */
1362 ix86_add_new_builtins (opts->x_ix86_isa_flags, opts->x_ix86_isa_flags2);
1363
e401db7b
JJ		 1364 enum excess_precision orig_ix86_excess_precision
1365 = opts->x_ix86_excess_precision;
1366 bool orig_ix86_unsafe_math_optimizations
1367 = opts->x_ix86_unsafe_math_optimizations;
1368 opts->x_ix86_excess_precision = opts->x_flag_excess_precision;
1369 opts->x_ix86_unsafe_math_optimizations
1370 = opts->x_flag_unsafe_math_optimizations;
1371
2bf6d935
ML		 1372 /* Save the current options unless we are validating options for
1373 #pragma. */
ba948b37 1374 t = build_target_option_node (opts, opts_set);
2bf6d935
ML		 1375
1376 opts->x_ix86_arch_string = orig_arch_string;
1377 opts->x_ix86_tune_string = orig_tune_string;
1378 opts_set->x_ix86_fpmath = orig_fpmath_set;
46e6341f 1379 opts_set->x_prefer_vector_width_type = orig_pvw_set;
e401db7b
JJ		 1380 opts->x_ix86_excess_precision = orig_ix86_excess_precision;
1381 opts->x_ix86_unsafe_math_optimizations
1382 = orig_ix86_unsafe_math_optimizations;
2bf6d935
ML		 1383
1384 release_options_strings (option_strings);
1385 }
1386
1387 return t;
1388}
1389
1390/* Hook to validate attribute((target("string"))). */
1391
1392bool
1393ix86_valid_target_attribute_p (tree fndecl,
1394 tree ARG_UNUSED (name),
1395 tree args,
1396 int flags)
1397{
ba948b37 1398 struct gcc_options func_options, func_options_set;
2bf6d935
ML		 1399 tree new_target, new_optimize;
1400 bool ret = true;
1401
1402 /* attribute((target("default"))) does nothing, beyond
1403 affecting multi-versioning. */
1404 if (TREE_VALUE (args)
1405 && TREE_CODE (TREE_VALUE (args)) == STRING_CST
1406 && TREE_CHAIN (args) == NULL_TREE
1407 && strcmp (TREE_STRING_POINTER (TREE_VALUE (args)), "default") == 0)
1408 return true;
1409
ba948b37
JJ		 1410 tree old_optimize = build_optimization_node (&global_options,
1411 &global_options_set);
2bf6d935
ML		 1412
1413 /* Get the optimization options of the current function. */
1414 tree func_optimize = DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl);
1415
1416 if (!func_optimize)
1417 func_optimize = old_optimize;
1418
1419 /* Init func_options. */
1420 memset (&func_options, 0, sizeof (func_options));
1421 init_options_struct (&func_options, NULL);
1422 lang_hooks.init_options_struct (&func_options);
ba948b37
JJ		 1423 memset (&func_options_set, 0, sizeof (func_options_set));
1424
1425 cl_optimization_restore (&func_options, &func_options_set,
2bf6d935
ML		 1426 TREE_OPTIMIZATION (func_optimize));
1427
1428 /* Initialize func_options to the default before its target options can
1429 be set. */
ba948b37 1430 cl_target_option_restore (&func_options, &func_options_set,
2bf6d935
ML		 1431 TREE_TARGET_OPTION (target_option_default_node));
1432
1433 /* FLAGS == 1 is used for target_clones attribute. */
1434 new_target
1435 = ix86_valid_target_attribute_tree (fndecl, args, &func_options,
ba948b37 1436 &func_options_set, flags == 1);
2bf6d935 1437
ba948b37 1438 new_optimize = build_optimization_node (&func_options, &func_options_set);
2bf6d935
ML		 1439
1440 if (new_target == error_mark_node)
1441 ret = false;
1442
1443 else if (fndecl && new_target)
1444 {
1445 DECL_FUNCTION_SPECIFIC_TARGET (fndecl) = new_target;
1446
1447 if (old_optimize != new_optimize)
1448 DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl) = new_optimize;
1449 }
1450
2bf6d935
ML		 1451 return ret;
1452}
1453
1454const char *stringop_alg_names[] = {
1455#define DEF_ENUM
1456#define DEF_ALG(alg, name) #name,
1457#include "stringop.def"
1458#undef DEF_ENUM
1459#undef DEF_ALG
1460};
1461
1462/* Parse parameter string passed to -mmemcpy-strategy= or -mmemset-strategy=.
1463 The string is of the following form (or comma separated list of it):
1464
1465 strategy_alg:max_size:[align|noalign]
1466
1467 where the full size range for the strategy is either [0, max_size] or
1468 [min_size, max_size], in which min_size is the max_size + 1 of the
1469 preceding range. The last size range must have max_size == -1.
1470
1471 Examples:
1472
1473 1.
1474 -mmemcpy-strategy=libcall:-1:noalign
1475
1476 this is equivalent to (for known size memcpy) -mstringop-strategy=libcall
1477
1478
1479 2.
1480 -mmemset-strategy=rep_8byte:16:noalign,vector_loop:2048:align,libcall:-1:noalign
1481
1482 This is to tell the compiler to use the following strategy for memset
1483 1) when the expected size is between [1, 16], use rep_8byte strategy;
1484 2) when the size is between [17, 2048], use vector_loop;
1485 3) when the size is > 2048, use libcall. */
1486
1487struct stringop_size_range
1488{
1489 int max;
1490 stringop_alg alg;
1491 bool noalign;
1492};
1493
1494static void
1495ix86_parse_stringop_strategy_string (char *strategy_str, bool is_memset)
1496{
1497 const struct stringop_algs *default_algs;
1498 stringop_size_range input_ranges[MAX_STRINGOP_ALGS];
1499 char *curr_range_str, *next_range_str;
1500 const char *opt = is_memset ? "-mmemset_strategy=" : "-mmemcpy_strategy=";
1501 int i = 0, n = 0;
1502
1503 if (is_memset)
1504 default_algs = &ix86_cost->memset[TARGET_64BIT != 0];
1505 else
1506 default_algs = &ix86_cost->memcpy[TARGET_64BIT != 0];
1507
1508 curr_range_str = strategy_str;
1509
1510 do
1511 {
1512 int maxs;
1513 char alg_name[128];
1514 char align[16];
1515 next_range_str = strchr (curr_range_str, ',');
1516 if (next_range_str)
1517 *next_range_str++ = '\0';
1518
1519 if (sscanf (curr_range_str, "%20[^:]:%d:%10s", alg_name, &maxs,
1520 align) != 3)
1521 {
1522 error ("wrong argument %qs to option %qs", curr_range_str, opt);
1523 return;
1524 }
1525
1526 if (n > 0 && (maxs < (input_ranges[n - 1].max + 1) && maxs != -1))
1527 {
1528 error ("size ranges of option %qs should be increasing", opt);
1529 return;
1530 }
1531
1532 for (i = 0; i < last_alg; i++)
1533 if (!strcmp (alg_name, stringop_alg_names[i]))
1534 break;
1535
1536 if (i == last_alg)
1537 {
1538 error ("wrong strategy name %qs specified for option %qs",
1539 alg_name, opt);
1540
1541 auto_vec <const char *> candidates;
1542 for (i = 0; i < last_alg; i++)
1543 if ((stringop_alg) i != rep_prefix_8_byte || TARGET_64BIT)
1544 candidates.safe_push (stringop_alg_names[i]);
1545
1546 char *s;
1547 const char *hint
1548 = candidates_list_and_hint (alg_name, s, candidates);
1549 if (hint)
1550 inform (input_location,
1551 "valid arguments to %qs are: %s; did you mean %qs?",
1552 opt, s, hint);
1553 else
1554 inform (input_location, "valid arguments to %qs are: %s",
1555 opt, s);
1556 XDELETEVEC (s);
1557 return;
1558 }
1559
1560 if ((stringop_alg) i == rep_prefix_8_byte
1561 && !TARGET_64BIT)
1562 {
1563 /* rep; movq isn't available in 32-bit code. */
1564 error ("strategy name %qs specified for option %qs "
1565 "not supported for 32-bit code", alg_name, opt);
1566 return;
1567 }
1568
1569 input_ranges[n].max = maxs;
1570 input_ranges[n].alg = (stringop_alg) i;
1571 if (!strcmp (align, "align"))
1572 input_ranges[n].noalign = false;
1573 else if (!strcmp (align, "noalign"))
1574 input_ranges[n].noalign = true;
1575 else
1576 {
1577 error ("unknown alignment %qs specified for option %qs", align, opt);
1578 return;
1579 }
1580 n++;
1581 curr_range_str = next_range_str;
1582 }
1583 while (curr_range_str);
1584
1585 if (input_ranges[n - 1].max != -1)
1586 {
1587 error ("the max value for the last size range should be -1"
1588 " for option %qs", opt);
1589 return;
1590 }
1591
1592 if (n > MAX_STRINGOP_ALGS)
1593 {
1594 error ("too many size ranges specified in option %qs", opt);
1595 return;
1596 }
1597
1598 /* Now override the default algs array. */
1599 for (i = 0; i < n; i++)
1600 {
1601 *const_cast<int *>(&default_algs->size[i].max) = input_ranges[i].max;
1602 *const_cast<stringop_alg *>(&default_algs->size[i].alg)
1603 = input_ranges[i].alg;
1604 *const_cast<int *>(&default_algs->size[i].noalign)
1605 = input_ranges[i].noalign;
1606 }
1607}
1608
1609\f
1610/* parse -mtune-ctrl= option. When DUMP is true,
1611 print the features that are explicitly set. */
1612
1613static void
1e964774 1614parse_mtune_ctrl_str (struct gcc_options *opts, bool dump)
2bf6d935 1615{
1e964774 1616 if (!opts->x_ix86_tune_ctrl_string)
2bf6d935
ML		 1617 return;
1618
1619 char *next_feature_string = NULL;
1e964774 1620 char *curr_feature_string = xstrdup (opts->x_ix86_tune_ctrl_string);
2bf6d935
ML		 1621 char *orig = curr_feature_string;
1622 int i;
1623 do
1624 {
1625 bool clear = false;
1626
1627 next_feature_string = strchr (curr_feature_string, ',');
1628 if (next_feature_string)
1629 *next_feature_string++ = '\0';
1630 if (*curr_feature_string == '^')
1631 {
1632 curr_feature_string++;
1633 clear = true;
1634 }
1635 for (i = 0; i < X86_TUNE_LAST; i++)
1636 {
1637 if (!strcmp (curr_feature_string, ix86_tune_feature_names[i]))
1638 {
1639 ix86_tune_features[i] = !clear;
1640 if (dump)
1641 fprintf (stderr, "Explicitly %s feature %s\n",
1642 clear ? "clear" : "set", ix86_tune_feature_names[i]);
1643 break;
1644 }
1645 }
1646 if (i == X86_TUNE_LAST)
1647 error ("unknown parameter to option %<-mtune-ctrl%>: %s",
1648 clear ? curr_feature_string - 1 : curr_feature_string);
1649 curr_feature_string = next_feature_string;
1650 }
1651 while (curr_feature_string);
1652 free (orig);
1653}
1654
1655/* Helper function to set ix86_tune_features. IX86_TUNE is the
1656 processor type. */
1657
1658static void
1e964774
L		 1659set_ix86_tune_features (struct gcc_options *opts,
1660 enum processor_type ix86_tune, bool dump)
2bf6d935
ML		 1661{
1662 unsigned HOST_WIDE_INT ix86_tune_mask = HOST_WIDE_INT_1U << ix86_tune;
1663 int i;
1664
1665 for (i = 0; i < X86_TUNE_LAST; ++i)
1666 {
1667 if (ix86_tune_no_default)
1668 ix86_tune_features[i] = 0;
1669 else
1670 ix86_tune_features[i]
1671 = !!(initial_ix86_tune_features[i] & ix86_tune_mask);
1672 }
1673
1674 if (dump)
1675 {
1676 fprintf (stderr, "List of x86 specific tuning parameter names:\n");
1677 for (i = 0; i < X86_TUNE_LAST; i++)
1678 fprintf (stderr, "%s : %s\n", ix86_tune_feature_names[i],
1679 ix86_tune_features[i] ? "on" : "off");
1680 }
1681
1e964774 1682 parse_mtune_ctrl_str (opts, dump);
2bf6d935
ML		 1683}
1684
1685
1686/* Default align_* from the processor table. */
1687
1688static void
1689ix86_default_align (struct gcc_options *opts)
1690{
1691 /* -falign-foo without argument: supply one. */
1692 if (opts->x_flag_align_loops && !opts->x_str_align_loops)
1693 opts->x_str_align_loops = processor_cost_table[ix86_tune]->align_loop;
1694 if (opts->x_flag_align_jumps && !opts->x_str_align_jumps)
1695 opts->x_str_align_jumps = processor_cost_table[ix86_tune]->align_jump;
1696 if (opts->x_flag_align_labels && !opts->x_str_align_labels)
1697 opts->x_str_align_labels = processor_cost_table[ix86_tune]->align_label;
1698 if (opts->x_flag_align_functions && !opts->x_str_align_functions)
1699 opts->x_str_align_functions = processor_cost_table[ix86_tune]->align_func;
1700}
1701
6bc89193
AO		 1702#ifndef USE_IX86_FRAME_POINTER
1703#define USE_IX86_FRAME_POINTER 0
1704#endif
1705
1706/* (Re)compute option overrides affected by optimization levels in
1707 target-specific ways. */
1708
1709static void
1710ix86_recompute_optlev_based_flags (struct gcc_options *opts,
1711 struct gcc_options *opts_set)
1712{
1713 /* Set the default values for switches whose default depends on TARGET_64BIT
1714 in case they weren't overwritten by command line options. */
1715 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
1716 {
6ed76044
ML		 1717 if (opts->x_optimize >= 1)
1718 SET_OPTION_IF_UNSET (opts, opts_set, flag_omit_frame_pointer,
1719 !USE_IX86_FRAME_POINTER);
6bc89193 1720 if (opts->x_flag_asynchronous_unwind_tables
6bc89193 1721 && TARGET_64BIT_MS_ABI)
6ed76044 1722 SET_OPTION_IF_UNSET (opts, opts_set, flag_unwind_tables, 1);
6bc89193
AO		 1723 if (opts->x_flag_asynchronous_unwind_tables == 2)
1724 opts->x_flag_unwind_tables
1725 = opts->x_flag_asynchronous_unwind_tables = 1;
1726 if (opts->x_flag_pcc_struct_return == 2)
1727 opts->x_flag_pcc_struct_return = 0;
1728 }
1729 else
1730 {
6ed76044
ML		 1731 if (opts->x_optimize >= 1)
1732 SET_OPTION_IF_UNSET (opts, opts_set, flag_omit_frame_pointer,
1733 !(USE_IX86_FRAME_POINTER || opts->x_optimize_size));
6bc89193
AO		 1734 if (opts->x_flag_asynchronous_unwind_tables == 2)
1735 opts->x_flag_asynchronous_unwind_tables = !USE_IX86_FRAME_POINTER;
1736 if (opts->x_flag_pcc_struct_return == 2)
1737 {
1738 /* Intel MCU psABI specifies that -freg-struct-return should
c4f63307 1739 be on. Instead of setting DEFAULT_PCC_STRUCT_RETURN to 0,
6bc89193
AO		 1740 we check -miamcu so that -freg-struct-return is always
1741 turned on if -miamcu is used. */
1742 if (TARGET_IAMCU_P (opts->x_target_flags))
1743 opts->x_flag_pcc_struct_return = 0;
1744 else
1745 opts->x_flag_pcc_struct_return = DEFAULT_PCC_STRUCT_RETURN;
1746 }
1747 }
1748}
1749
2bf6d935
ML		 1750/* Implement TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE hook. */
1751
1752void
1753ix86_override_options_after_change (void)
1754{
1755 ix86_default_align (&global_options);
6bc89193 1756 ix86_recompute_optlev_based_flags (&global_options, &global_options_set);
2bf6d935
ML		 1757}
1758
1759/* Clear stack slot assignments remembered from previous functions.
1760 This is called from INIT_EXPANDERS once before RTL is emitted for each
1761 function. */
1762
1763static struct machine_function *
1764ix86_init_machine_status (void)
1765{
1766 struct machine_function *f;
1767
1768 f = ggc_cleared_alloc<machine_function> ();
1769 f->call_abi = ix86_abi;
c2080a1f 1770 f->stack_frame_required = true;
2bf6d935
ML		 1771
1772 return f;
1773}
1774
1775/* Override various settings based on options. If MAIN_ARGS_P, the
1776 options are from the command line, otherwise they are from
1777 attributes. Return true if there's an error related to march
1778 option. */
1779
1780static bool
1781ix86_option_override_internal (bool main_args_p,
1782 struct gcc_options *opts,
1783 struct gcc_options *opts_set)
1784{
5ebdd535 1785 unsigned int i;
2bf6d935
ML		 1786 unsigned HOST_WIDE_INT ix86_arch_mask;
1787 const bool ix86_tune_specified = (opts->x_ix86_tune_string != NULL);
1788
1789 /* -mrecip options. */
1790 static struct
1791 {
1792 const char *string; /* option name */
1793 unsigned int mask; /* mask bits to set */
1794 }
1795 const recip_options[] =
1796 {
1797 { "all", RECIP_MASK_ALL },
1798 { "none", RECIP_MASK_NONE },
1799 { "div", RECIP_MASK_DIV },
1800 { "sqrt", RECIP_MASK_SQRT },
1801 { "vec-div", RECIP_MASK_VEC_DIV },
1802 { "vec-sqrt", RECIP_MASK_VEC_SQRT },
1803 };
1804
1805
1806 /* Turn off both OPTION_MASK_ABI_64 and OPTION_MASK_ABI_X32 if
1807 TARGET_64BIT_DEFAULT is true and TARGET_64BIT is false. */
1808 if (TARGET_64BIT_DEFAULT && !TARGET_64BIT_P (opts->x_ix86_isa_flags))
1809 opts->x_ix86_isa_flags &= ~(OPTION_MASK_ABI_64 | OPTION_MASK_ABI_X32);
1810#ifdef TARGET_BI_ARCH
1811 else
1812 {
1813#if TARGET_BI_ARCH == 1
1814 /* When TARGET_BI_ARCH == 1, by default, OPTION_MASK_ABI_64
1815 is on and OPTION_MASK_ABI_X32 is off. We turn off
1816 OPTION_MASK_ABI_64 if OPTION_MASK_ABI_X32 is turned on by
1817 -mx32. */
1818 if (TARGET_X32_P (opts->x_ix86_isa_flags))
1819 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_64;
1820#else
1821 /* When TARGET_BI_ARCH == 2, by default, OPTION_MASK_ABI_X32 is
1822 on and OPTION_MASK_ABI_64 is off. We turn off
1823 OPTION_MASK_ABI_X32 if OPTION_MASK_ABI_64 is turned on by
1824 -m64 or OPTION_MASK_CODE16 is turned on by -m16. */
1825 if (TARGET_LP64_P (opts->x_ix86_isa_flags)
1826 || TARGET_16BIT_P (opts->x_ix86_isa_flags))
1827 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_X32;
1828#endif
1829 if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
1830 && TARGET_IAMCU_P (opts->x_target_flags))
1831 sorry ("Intel MCU psABI isn%'t supported in %s mode",
1832 TARGET_X32_P (opts->x_ix86_isa_flags) ? "x32" : "64-bit");
1833 }
1834#endif
1835
1836 if (TARGET_X32_P (opts->x_ix86_isa_flags))
1837 {
1838 /* Always turn on OPTION_MASK_ISA_64BIT and turn off
1839 OPTION_MASK_ABI_64 for TARGET_X32. */
1840 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
1841 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_64;
1842 }
1843 else if (TARGET_16BIT_P (opts->x_ix86_isa_flags))
1844 opts->x_ix86_isa_flags &= ~(OPTION_MASK_ISA_64BIT
1845 | OPTION_MASK_ABI_X32
1846 | OPTION_MASK_ABI_64);
1847 else if (TARGET_LP64_P (opts->x_ix86_isa_flags))
1848 {
1849 /* Always turn on OPTION_MASK_ISA_64BIT and turn off
1850 OPTION_MASK_ABI_X32 for TARGET_LP64. */
1851 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
1852 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_X32;
1853 }
1854
1855#ifdef SUBTARGET_OVERRIDE_OPTIONS
1856 SUBTARGET_OVERRIDE_OPTIONS;
1857#endif
1858
1859#ifdef SUBSUBTARGET_OVERRIDE_OPTIONS
1860 SUBSUBTARGET_OVERRIDE_OPTIONS;
1861#endif
1862
1863 /* -fPIC is the default for x86_64. */
1864 if (TARGET_MACHO && TARGET_64BIT_P (opts->x_ix86_isa_flags))
1865 opts->x_flag_pic = 2;
1866
1867 /* Need to check -mtune=generic first. */
1868 if (opts->x_ix86_tune_string)
1869 {
1870 /* As special support for cross compilers we read -mtune=native
1871 as -mtune=generic. With native compilers we won't see the
1872 -mtune=native, as it was changed by the driver. */
1873 if (!strcmp (opts->x_ix86_tune_string, "native"))
69bd5d47 1874 opts->x_ix86_tune_string = "generic";
2bf6d935
ML		 1875 else if (!strcmp (opts->x_ix86_tune_string, "x86-64"))
1876 warning (OPT_Wdeprecated,
1877 main_args_p
1878 ? G_("%<-mtune=x86-64%> is deprecated; use %<-mtune=k8%> "
1879 "or %<-mtune=generic%> instead as appropriate")
1880 : G_("%<target(\"tune=x86-64\")%> is deprecated; use "
1881 "%<target(\"tune=k8\")%> or %<target(\"tune=generic\")%>"
1882 " instead as appropriate"));
1883 }
1884 else
1885 {
1886 if (opts->x_ix86_arch_string)
1887 opts->x_ix86_tune_string = opts->x_ix86_arch_string;
1888 if (!opts->x_ix86_tune_string)
1889 {
1890 opts->x_ix86_tune_string = processor_names[TARGET_CPU_DEFAULT];
1891 ix86_tune_defaulted = 1;
1892 }
1893
1894 /* opts->x_ix86_tune_string is set to opts->x_ix86_arch_string
1895 or defaulted. We need to use a sensible tune option. */
69bd5d47
JJ		 1896 if (!strncmp (opts->x_ix86_tune_string, "x86-64", 6)
1897 && (opts->x_ix86_tune_string[6] == '\0'
1898 || (!strcmp (opts->x_ix86_tune_string + 6, "-v2")
1899 || !strcmp (opts->x_ix86_tune_string + 6, "-v3")
1900 || !strcmp (opts->x_ix86_tune_string + 6, "-v4"))))
1901 opts->x_ix86_tune_string = "generic";
2bf6d935
ML		 1902 }
1903
1904 if (opts->x_ix86_stringop_alg == rep_prefix_8_byte
1905 && !TARGET_64BIT_P (opts->x_ix86_isa_flags))
1906 {
1907 /* rep; movq isn't available in 32-bit code. */
1908 error ("%<-mstringop-strategy=rep_8byte%> not supported for 32-bit code");
1909 opts->x_ix86_stringop_alg = no_stringop;
1910 }
1911
299a53d7 1912 if (TARGET_UINTR && !TARGET_64BIT)
1913 error ("%<-muintr%> not supported for 32-bit code");
1914
2bf6d935
ML		 1915 if (!opts->x_ix86_arch_string)
1916 opts->x_ix86_arch_string
1917 = TARGET_64BIT_P (opts->x_ix86_isa_flags)
1918 ? "x86-64" : SUBTARGET32_DEFAULT_CPU;
1919 else
1920 ix86_arch_specified = 1;
1921
1922 if (opts_set->x_ix86_pmode)
1923 {
1924 if ((TARGET_LP64_P (opts->x_ix86_isa_flags)
1925 && opts->x_ix86_pmode == PMODE_SI)
1926 || (!TARGET_64BIT_P (opts->x_ix86_isa_flags)
1927 && opts->x_ix86_pmode == PMODE_DI))
1928 error ("address mode %qs not supported in the %s bit mode",
1929 TARGET_64BIT_P (opts->x_ix86_isa_flags) ? "short" : "long",
1930 TARGET_64BIT_P (opts->x_ix86_isa_flags) ? "64" : "32");
1931 }
1932 else
1933 opts->x_ix86_pmode = TARGET_LP64_P (opts->x_ix86_isa_flags)
1934 ? PMODE_DI : PMODE_SI;
1935
6ed76044 1936 SET_OPTION_IF_UNSET (opts, opts_set, ix86_abi, DEFAULT_ABI);
2bf6d935
ML		 1937
1938 if (opts->x_ix86_abi == MS_ABI && TARGET_X32_P (opts->x_ix86_isa_flags))
1939 error ("%<-mabi=ms%> not supported with X32 ABI");
1940 gcc_assert (opts->x_ix86_abi == SYSV_ABI || opts->x_ix86_abi == MS_ABI);
1941
080629d3
ML		 1942 const char *abi_name = opts->x_ix86_abi == MS_ABI ? "ms" : "sysv";
1943 if ((opts->x_flag_sanitize & SANITIZE_USER_ADDRESS)
1944 && opts->x_ix86_abi != DEFAULT_ABI)
1945 error ("%<-mabi=%s%> not supported with %<-fsanitize=address%>", abi_name);
1946 if ((opts->x_flag_sanitize & SANITIZE_KERNEL_ADDRESS)
1947 && opts->x_ix86_abi != DEFAULT_ABI)
1948 error ("%<-mabi=%s%> not supported with %<-fsanitize=kernel-address%>",
1949 abi_name);
1950 if ((opts->x_flag_sanitize & SANITIZE_THREAD)
1951 && opts->x_ix86_abi != DEFAULT_ABI)
1952 error ("%<-mabi=%s%> not supported with %<-fsanitize=thread%>", abi_name);
2bf6d935
ML		 1953
1954 /* For targets using ms ABI enable ms-extensions, if not
1955 explicit turned off. For non-ms ABI we turn off this
1956 option. */
6ed76044
ML		 1957 SET_OPTION_IF_UNSET (opts, opts_set, flag_ms_extensions,
1958 (MS_ABI == DEFAULT_ABI));
2bf6d935
ML		 1959
1960 if (opts_set->x_ix86_cmodel)
1961 {
1962 switch (opts->x_ix86_cmodel)
1963 {
1964 case CM_SMALL:
1965 case CM_SMALL_PIC:
1966 if (opts->x_flag_pic)
1967 opts->x_ix86_cmodel = CM_SMALL_PIC;
1968 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
1969 error ("code model %qs not supported in the %s bit mode",
1970 "small", "32");
1971 break;
1972
1973 case CM_MEDIUM:
1974 case CM_MEDIUM_PIC:
1975 if (opts->x_flag_pic)
1976 opts->x_ix86_cmodel = CM_MEDIUM_PIC;
1977 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
1978 error ("code model %qs not supported in the %s bit mode",
1979 "medium", "32");
1980 else if (TARGET_X32_P (opts->x_ix86_isa_flags))
1981 error ("code model %qs not supported in x32 mode",
1982 "medium");
1983 break;
1984
1985 case CM_LARGE:
1986 case CM_LARGE_PIC:
1987 if (opts->x_flag_pic)
1988 opts->x_ix86_cmodel = CM_LARGE_PIC;
1989 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
1990 error ("code model %qs not supported in the %s bit mode",
1991 "large", "32");
1992 else if (TARGET_X32_P (opts->x_ix86_isa_flags))
1993 error ("code model %qs not supported in x32 mode",
1994 "large");
1995 break;
1996
1997 case CM_32:
1998 if (opts->x_flag_pic)
1999 error ("code model %s does not support PIC mode", "32");
2000 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2001 error ("code model %qs not supported in the %s bit mode",
2002 "32", "64");
2003 break;
2004
2005 case CM_KERNEL:
2006 if (opts->x_flag_pic)
2007 {
2008 error ("code model %s does not support PIC mode", "kernel");
2009 opts->x_ix86_cmodel = CM_32;
2010 }
2011 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
2012 error ("code model %qs not supported in the %s bit mode",
2013 "kernel", "32");
2014 break;
2015
2016 default:
2017 gcc_unreachable ();
2018 }
2019 }
2020 else
2021 {
2022 /* For TARGET_64BIT and MS_ABI, force pic on, in order to enable the
2023 use of rip-relative addressing. This eliminates fixups that
2024 would otherwise be needed if this object is to be placed in a
2025 DLL, and is essentially just as efficient as direct addressing. */
2026 if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
2027 && (TARGET_RDOS || TARGET_PECOFF))
2028 opts->x_ix86_cmodel = CM_MEDIUM_PIC, opts->x_flag_pic = 1;
2029 else if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2030 opts->x_ix86_cmodel = opts->x_flag_pic ? CM_SMALL_PIC : CM_SMALL;
2031 else
2032 opts->x_ix86_cmodel = CM_32;
2033 }
2034 if (TARGET_MACHO && opts->x_ix86_asm_dialect == ASM_INTEL)
2035 {
2036 error ("%<-masm=intel%> not supported in this configuration");
2037 opts->x_ix86_asm_dialect = ASM_ATT;
2038 }
2039 if ((TARGET_64BIT_P (opts->x_ix86_isa_flags) != 0)
2040 != ((opts->x_ix86_isa_flags & OPTION_MASK_ISA_64BIT) != 0))
2041 sorry ("%i-bit mode not compiled in",
2042 (opts->x_ix86_isa_flags & OPTION_MASK_ISA_64BIT) ? 64 : 32);
2043
2044 for (i = 0; i < pta_size; i++)
2045 if (! strcmp (opts->x_ix86_arch_string, processor_alias_table[i].name))
2046 {
2047 if (!strcmp (opts->x_ix86_arch_string, "generic"))
2048 {
2049 error (main_args_p
2050 ? G_("%<generic%> CPU can be used only for %<-mtune=%> "
2051 "switch")
2052 : G_("%<generic%> CPU can be used only for "
2053 "%<target(\"tune=\")%> attribute"));
2054 return false;
2055 }
2056 else if (!strcmp (opts->x_ix86_arch_string, "intel"))
2057 {
2058 error (main_args_p
2059 ? G_("%<intel%> CPU can be used only for %<-mtune=%> "
2060 "switch")
2061 : G_("%<intel%> CPU can be used only for "
2062 "%<target(\"tune=\")%> attribute"));
2063 return false;
2064 }
2065
2066 if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
2067 && !((processor_alias_table[i].flags & PTA_64BIT) != 0))
2068 {
2069 error ("CPU you selected does not support x86-64 "
2070 "instruction set");
2071 return false;
2072 }
2073
2074 ix86_schedule = processor_alias_table[i].schedule;
2075 ix86_arch = processor_alias_table[i].processor;
324bec55
FW		 2076
2077 /* Default cpu tuning to the architecture, unless the table
2078 entry requests not to do this. Used by the x86-64 psABI
2079 micro-architecture levels. */
2080 if ((processor_alias_table[i].flags & PTA_NO_TUNE) == 0)
2081 ix86_tune = ix86_arch;
2082 else
2083 ix86_tune = PROCESSOR_GENERIC;
2bf6d935
ML		 2084
2085 if (((processor_alias_table[i].flags & PTA_MMX) != 0)
2086 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_MMX))
2087 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MMX;
2088 if (((processor_alias_table[i].flags & PTA_3DNOW) != 0)
2089 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_3DNOW))
2090 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_3DNOW;
2091 if (((processor_alias_table[i].flags & PTA_3DNOW_A) != 0)
2092 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_3DNOW_A))
2093 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_3DNOW_A;
2094 if (((processor_alias_table[i].flags & PTA_SSE) != 0)
2095 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE))
2096 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE;
2097 if (((processor_alias_table[i].flags & PTA_SSE2) != 0)
2098 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE2))
2099 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE2;
2100 if (((processor_alias_table[i].flags & PTA_SSE3) != 0)
2101 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE3))
2102 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE3;
2103 if (((processor_alias_table[i].flags & PTA_SSSE3) != 0)
2104 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSSE3))
2105 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSSE3;
2106 if (((processor_alias_table[i].flags & PTA_SSE4_1) != 0)
2107 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE4_1))
2108 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_1;
2109 if (((processor_alias_table[i].flags & PTA_SSE4_2) != 0)
2110 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE4_2))
2111 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_2;
2112 if (((processor_alias_table[i].flags & PTA_AVX) != 0)
2113 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX))
2114 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX;
2115 if (((processor_alias_table[i].flags & PTA_AVX2) != 0)
2116 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX2))
2117 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2;
2118 if (((processor_alias_table[i].flags & PTA_FMA) != 0)
2119 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FMA))
2120 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA;
2121 if (((processor_alias_table[i].flags & PTA_SSE4A) != 0)
2122 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE4A))
2123 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4A;
2124 if (((processor_alias_table[i].flags & PTA_FMA4) != 0)
2125 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FMA4))
2126 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA4;
2127 if (((processor_alias_table[i].flags & PTA_XOP) != 0)
2128 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XOP))
2129 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XOP;
2130 if (((processor_alias_table[i].flags & PTA_LWP) != 0)
2131 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_LWP))
2132 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LWP;
2133 if (((processor_alias_table[i].flags & PTA_ABM) != 0)
2134 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_ABM))
2135 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ABM;
2136 if (((processor_alias_table[i].flags & PTA_BMI) != 0)
2137 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_BMI))
2138 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI;
2139 if (((processor_alias_table[i].flags & (PTA_LZCNT | PTA_ABM)) != 0)
2140 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_LZCNT))
2141 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LZCNT;
2142 if (((processor_alias_table[i].flags & PTA_TBM) != 0)
2143 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_TBM))
2144 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_TBM;
2145 if (((processor_alias_table[i].flags & PTA_BMI2) != 0)
2146 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_BMI2))
2147 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI2;
2148 if (((processor_alias_table[i].flags & PTA_CX16) != 0)
8cf86e14
HL		 2149 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_CX16))
2150 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_CX16;
2bf6d935
ML		 2151 if (((processor_alias_table[i].flags & (PTA_POPCNT | PTA_ABM)) != 0)
2152 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_POPCNT))
2153 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_POPCNT;
2154 if (!(TARGET_64BIT_P (opts->x_ix86_isa_flags)
2155 && ((processor_alias_table[i].flags & PTA_NO_SAHF) != 0))
2156 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SAHF))
2157 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SAHF;
2158 if (((processor_alias_table[i].flags & PTA_MOVBE) != 0)
8cf86e14
HL		 2159 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_MOVBE))
2160 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_MOVBE;
2bf6d935 2161 if (((processor_alias_table[i].flags & PTA_AES) != 0)
eb5e1998
ML		 2162 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AES))
2163 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AES;
2bf6d935 2164 if (((processor_alias_table[i].flags & PTA_SHA) != 0)
eb5e1998
ML		 2165 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SHA))
2166 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SHA;
2bf6d935
ML		 2167 if (((processor_alias_table[i].flags & PTA_PCLMUL) != 0)
2168 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PCLMUL))
2169 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PCLMUL;
2170 if (((processor_alias_table[i].flags & PTA_FSGSBASE) != 0)
2171 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FSGSBASE))
2172 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FSGSBASE;
2173 if (((processor_alias_table[i].flags & PTA_RDRND) != 0)
2174 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_RDRND))
2175 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDRND;
2176 if (((processor_alias_table[i].flags & PTA_F16C) != 0)
2177 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_F16C))
2178 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_F16C;
2179 if (((processor_alias_table[i].flags & PTA_RTM) != 0)
2180 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_RTM))
2181 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RTM;
2182 if (((processor_alias_table[i].flags & PTA_HLE) != 0)
8cf86e14
HL		 2183 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_HLE))
2184 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_HLE;
2bf6d935
ML		 2185 if (((processor_alias_table[i].flags & PTA_PRFCHW) != 0)
2186 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PRFCHW))
2187 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PRFCHW;
2188 if (((processor_alias_table[i].flags & PTA_RDSEED) != 0)
2189 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_RDSEED))
2190 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDSEED;
2191 if (((processor_alias_table[i].flags & PTA_ADX) != 0)
2192 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_ADX))
2193 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ADX;
2194 if (((processor_alias_table[i].flags & PTA_FXSR) != 0)
2195 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FXSR))
2196 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FXSR;
2197 if (((processor_alias_table[i].flags & PTA_XSAVE) != 0)
2198 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVE))
2199 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVE;
2200 if (((processor_alias_table[i].flags & PTA_XSAVEOPT) != 0)
2201 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVEOPT))
2202 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVEOPT;
2203 if (((processor_alias_table[i].flags & PTA_AVX512F) != 0)
2204 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512F))
2205 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F;
2206 if (((processor_alias_table[i].flags & PTA_AVX512ER) != 0)
2207 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512ER))
2208 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512ER;
2209 if (((processor_alias_table[i].flags & PTA_AVX512PF) != 0)
2210 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512PF))
2211 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512PF;
2212 if (((processor_alias_table[i].flags & PTA_AVX512CD) != 0)
2213 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512CD))
2214 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512CD;
2215 if (((processor_alias_table[i].flags & PTA_PREFETCHWT1) != 0)
2216 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PREFETCHWT1))
2217 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PREFETCHWT1;
2218 if (((processor_alias_table[i].flags & PTA_CLWB) != 0)
2219 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_CLWB))
2220 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLWB;
2221 if (((processor_alias_table[i].flags & PTA_CLFLUSHOPT) != 0)
2222 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_CLFLUSHOPT))
2223 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLFLUSHOPT;
2224 if (((processor_alias_table[i].flags & PTA_CLZERO) != 0)
8cf86e14
HL		 2225 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_CLZERO))
2226 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_CLZERO;
2bf6d935
ML		 2227 if (((processor_alias_table[i].flags & PTA_XSAVEC) != 0)
2228 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVEC))
2229 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVEC;
2230 if (((processor_alias_table[i].flags & PTA_XSAVES) != 0)
2231 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVES))
2232 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVES;
2233 if (((processor_alias_table[i].flags & PTA_AVX512DQ) != 0)
2234 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512DQ))
2235 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512DQ;
2236 if (((processor_alias_table[i].flags & PTA_AVX512BW) != 0)
2237 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512BW))
2238 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512BW;
2239 if (((processor_alias_table[i].flags & PTA_AVX512VL) != 0)
2240 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512VL))
2241 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VL;
2242 if (((processor_alias_table[i].flags & PTA_AVX512VBMI) != 0)
2243 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512VBMI))
2244 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VBMI;
2245 if (((processor_alias_table[i].flags & PTA_AVX512IFMA) != 0)
2246 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512IFMA))
2247 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512IFMA;
2248 if (((processor_alias_table[i].flags & PTA_AVX512VNNI) != 0)
2249 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512VNNI))
2250 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VNNI;
2251 if (((processor_alias_table[i].flags & PTA_GFNI) != 0)
2252 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_GFNI))
2253 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_GFNI;
2254 if (((processor_alias_table[i].flags & PTA_AVX512VBMI2) != 0)
2255 && !(opts->x_ix86_isa_flags_explicit
2256 & OPTION_MASK_ISA_AVX512VBMI2))
2257 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VBMI2;
2258 if (((processor_alias_table[i].flags & PTA_VPCLMULQDQ) != 0)
2259 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_VPCLMULQDQ))
2260 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_VPCLMULQDQ;
2261 if (((processor_alias_table[i].flags & PTA_AVX512BITALG) != 0)
2262 && !(opts->x_ix86_isa_flags_explicit
2263 & OPTION_MASK_ISA_AVX512BITALG))
2264 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512BITALG;
2265
e21b52af
HL		 2266 if (((processor_alias_table[i].flags & PTA_AVX512VP2INTERSECT) != 0)
2267 && !(opts->x_ix86_isa_flags2_explicit
8cf86e14
HL		 2268 & OPTION_MASK_ISA2_AVX512VP2INTERSECT))
2269 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX512VP2INTERSECT;
2bf6d935
ML		 2270 if (((processor_alias_table[i].flags & PTA_AVX5124VNNIW) != 0)
2271 && !(opts->x_ix86_isa_flags2_explicit
8cf86e14
HL		 2272 & OPTION_MASK_ISA2_AVX5124VNNIW))
2273 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX5124VNNIW;
2bf6d935
ML		 2274 if (((processor_alias_table[i].flags & PTA_AVX5124FMAPS) != 0)
2275 && !(opts->x_ix86_isa_flags2_explicit
8cf86e14
HL		 2276 & OPTION_MASK_ISA2_AVX5124FMAPS))
2277 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX5124FMAPS;
2bf6d935
ML		 2278 if (((processor_alias_table[i].flags & PTA_AVX512VPOPCNTDQ) != 0)
2279 && !(opts->x_ix86_isa_flags_explicit
2280 & OPTION_MASK_ISA_AVX512VPOPCNTDQ))
2281 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VPOPCNTDQ;
4f0e90fa
HL		 2282 if (((processor_alias_table[i].flags & PTA_AVX512BF16) != 0)
2283 && !(opts->x_ix86_isa_flags2_explicit
8cf86e14
HL		 2284 & OPTION_MASK_ISA2_AVX512BF16))
2285 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX512BF16;
5c609842 2286 if (((processor_alias_table[i].flags & PTA_AMX_TILE) != 0)
2287 && !(opts->x_ix86_isa_flags2_explicit
2288 & OPTION_MASK_ISA2_AMX_TILE))
2289 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AMX_TILE;
2290 if (((processor_alias_table[i].flags & PTA_AMX_INT8) != 0)
2291 && !(opts->x_ix86_isa_flags2_explicit
2292 & OPTION_MASK_ISA2_AMX_INT8))
2293 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AMX_INT8;
2294 if (((processor_alias_table[i].flags & PTA_AMX_BF16) != 0)
2295 && !(opts->x_ix86_isa_flags2_explicit
2296 & OPTION_MASK_ISA2_AMX_BF16))
2297 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AMX_BF16;
ca813880 2298 if (((processor_alias_table[i].flags & PTA_AVXVNNI) != 0)
2299 && !(opts->x_ix86_isa_flags2_explicit
2300 & OPTION_MASK_ISA2_AVXVNNI))
2301 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVXVNNI;
a9fcfec3
HL		 2302 if (((processor_alias_table[i].flags & PTA_MOVDIRI) != 0)
2303 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_MOVDIRI))
2304 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MOVDIRI;
2305 if (((processor_alias_table[i].flags & PTA_MOVDIR64B) != 0)
8cf86e14
HL		 2306 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_MOVDIR64B))
2307 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_MOVDIR64B;
2bf6d935 2308 if (((processor_alias_table[i].flags & PTA_SGX) != 0)
8cf86e14
HL		 2309 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_SGX))
2310 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_SGX;
2bf6d935 2311 if (((processor_alias_table[i].flags & PTA_VAES) != 0)
8cf86e14
HL		 2312 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_VAES))
2313 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_VAES;
2bf6d935 2314 if (((processor_alias_table[i].flags & PTA_RDPID) != 0)
8cf86e14
HL		 2315 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_RDPID))
2316 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_RDPID;
2bf6d935 2317 if (((processor_alias_table[i].flags & PTA_PCONFIG) != 0)
8cf86e14
HL		 2318 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_PCONFIG))
2319 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_PCONFIG;
2bf6d935 2320 if (((processor_alias_table[i].flags & PTA_WBNOINVD) != 0)
8cf86e14
HL		 2321 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_WBNOINVD))
2322 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_WBNOINVD;
2bf6d935 2323 if (((processor_alias_table[i].flags & PTA_PTWRITE) != 0)
8cf86e14
HL		 2324 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_PTWRITE))
2325 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_PTWRITE;
ba9c87d3
CL		 2326 if (((processor_alias_table[i].flags & PTA_WAITPKG) != 0)
2327 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_WAITPKG))
2328 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_WAITPKG;
2329 if (((processor_alias_table[i].flags & PTA_ENQCMD) != 0)
2330 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_ENQCMD))
2331 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_ENQCMD;
2332 if (((processor_alias_table[i].flags & PTA_CLDEMOTE) != 0)
2333 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_CLDEMOTE))
2334 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_CLDEMOTE;
2335 if (((processor_alias_table[i].flags & PTA_SERIALIZE) != 0)
2336 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_SERIALIZE))
2337 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_SERIALIZE;
2338 if (((processor_alias_table[i].flags & PTA_TSXLDTRK) != 0)
2339 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_TSXLDTRK))
2340 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_TSXLDTRK;
632a2f50 2341 if (((processor_alias_table[i].flags & PTA_KL) != 0)
2342 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_KL))
2343 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_KL;
2344 if (((processor_alias_table[i].flags & PTA_WIDEKL) != 0)
2345 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_WIDEKL))
2346 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_WIDEKL;
2bf6d935
ML		 2347
2348 if ((processor_alias_table[i].flags
2349 & (PTA_PREFETCH_SSE | PTA_SSE)) != 0)
08a4adcf 2350 ix86_prefetch_sse = true;
2bf6d935 2351 if (((processor_alias_table[i].flags & PTA_MWAITX) != 0)
8cf86e14
HL		 2352 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_MWAITX))
2353 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_MWAITX;
2bf6d935
ML		 2354 if (((processor_alias_table[i].flags & PTA_PKU) != 0)
2355 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PKU))
2356 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PKU;
e95554da
ML		 2357 if (((processor_alias_table[i].flags & PTA_UINTR) != 0)
2358 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_UINTR))
2359 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_UINTR;
2360 if (((processor_alias_table[i].flags & PTA_HRESET) != 0)
2361 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_HRESET))
2362 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_HRESET;
2363
2bf6d935 2364
87c753ac
L		 2365 /* Don't enable x87 instructions if only general registers are
2366 allowed by target("general-regs-only") function attribute or
2367 -mgeneral-regs-only. */
2368 if (!(opts->x_ix86_target_flags & OPTION_MASK_GENERAL_REGS_ONLY)
2bf6d935
ML		 2369 && !(opts_set->x_target_flags & MASK_80387))
2370 {
2371 if (((processor_alias_table[i].flags & PTA_NO_80387) != 0))
2372 opts->x_target_flags &= ~MASK_80387;
2373 else
2374 opts->x_target_flags |= MASK_80387;
2375 }
2376 break;
2377 }
2378
2379 if (i == pta_size)
2380 {
2381 error (main_args_p
2382 ? G_("bad value (%qs) for %<-march=%> switch")
2383 : G_("bad value (%qs) for %<target(\"arch=\")%> attribute"),
2384 opts->x_ix86_arch_string);
2385
2386 auto_vec <const char *> candidates;
2387 for (i = 0; i < pta_size; i++)
2388 if (strcmp (processor_alias_table[i].name, "generic")
2389 && strcmp (processor_alias_table[i].name, "intel")
2390 && (!TARGET_64BIT_P (opts->x_ix86_isa_flags)
2391 || ((processor_alias_table[i].flags & PTA_64BIT) != 0)))
2392 candidates.safe_push (processor_alias_table[i].name);
2393
2394#ifdef HAVE_LOCAL_CPU_DETECT
2395 /* Add also "native" as possible value. */
2396 candidates.safe_push ("native");
2397#endif
2398
2399 char *s;
2400 const char *hint
2401 = candidates_list_and_hint (opts->x_ix86_arch_string, s, candidates);
2402 if (hint)
2403 inform (input_location,
2404 main_args_p
2405 ? G_("valid arguments to %<-march=%> switch are: "
2406 "%s; did you mean %qs?")
2407 : G_("valid arguments to %<target(\"arch=\")%> attribute are: "
2408 "%s; did you mean %qs?"), s, hint);
2409 else
2410 inform (input_location,
2411 main_args_p
2412 ? G_("valid arguments to %<-march=%> switch are: %s")
2413 : G_("valid arguments to %<target(\"arch=\")%> attribute "
2414 "are: %s"), s);
2415 XDELETEVEC (s);
2416 }
2417
2418 ix86_arch_mask = HOST_WIDE_INT_1U << ix86_arch;
2419 for (i = 0; i < X86_ARCH_LAST; ++i)
2420 ix86_arch_features[i] = !!(initial_ix86_arch_features[i] & ix86_arch_mask);
2421
2422 for (i = 0; i < pta_size; i++)
324bec55
FW		 2423 if (! strcmp (opts->x_ix86_tune_string, processor_alias_table[i].name)
2424 && (processor_alias_table[i].flags & PTA_NO_TUNE) == 0)
2bf6d935
ML		 2425 {
2426 ix86_schedule = processor_alias_table[i].schedule;
2427 ix86_tune = processor_alias_table[i].processor;
2428 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2429 {
2430 if (!((processor_alias_table[i].flags & PTA_64BIT) != 0))
2431 {
2432 if (ix86_tune_defaulted)
2433 {
2434 opts->x_ix86_tune_string = "x86-64";
2435 for (i = 0; i < pta_size; i++)
2436 if (! strcmp (opts->x_ix86_tune_string,
2437 processor_alias_table[i].name))
2438 break;
2439 ix86_schedule = processor_alias_table[i].schedule;
2440 ix86_tune = processor_alias_table[i].processor;
2441 }
2442 else
2443 error ("CPU you selected does not support x86-64 "
2444 "instruction set");
2445 }
2446 }
2447 /* Intel CPUs have always interpreted SSE prefetch instructions as
2448 NOPs; so, we can enable SSE prefetch instructions even when
2449 -mtune (rather than -march) points us to a processor that has them.
2450 However, the VIA C3 gives a SIGILL, so we only do that for i686 and
2451 higher processors. */
2452 if (TARGET_CMOV
2453 && ((processor_alias_table[i].flags
2454 & (PTA_PREFETCH_SSE | PTA_SSE)) != 0))
08a4adcf 2455 ix86_prefetch_sse = true;
2bf6d935
ML		 2456 break;
2457 }
2458
2459 if (ix86_tune_specified && i == pta_size)
2460 {
2461 error (main_args_p
2462 ? G_("bad value (%qs) for %<-mtune=%> switch")
2463 : G_("bad value (%qs) for %<target(\"tune=\")%> attribute"),
2464 opts->x_ix86_tune_string);
2465
2466 auto_vec <const char *> candidates;
2467 for (i = 0; i < pta_size; i++)
324bec55
FW		 2468 if ((!TARGET_64BIT_P (opts->x_ix86_isa_flags)
2469 || ((processor_alias_table[i].flags & PTA_64BIT) != 0))
2470 && (processor_alias_table[i].flags & PTA_NO_TUNE) == 0)
2bf6d935
ML		 2471 candidates.safe_push (processor_alias_table[i].name);
2472
2473#ifdef HAVE_LOCAL_CPU_DETECT
2474 /* Add also "native" as possible value. */
2475 candidates.safe_push ("native");
2476#endif
2477
2478 char *s;
2479 const char *hint
2480 = candidates_list_and_hint (opts->x_ix86_tune_string, s, candidates);
2481 if (hint)
2482 inform (input_location,
2483 main_args_p
2484 ? G_("valid arguments to %<-mtune=%> switch are: "
2485 "%s; did you mean %qs?")
2486 : G_("valid arguments to %<target(\"tune=\")%> attribute are: "
2487 "%s; did you mean %qs?"), s, hint);
2488 else
2489 inform (input_location,
2490 main_args_p
2491 ? G_("valid arguments to %<-mtune=%> switch are: %s")
2492 : G_("valid arguments to %<target(\"tune=\")%> attribute "
2493 "are: %s"), s);
2494 XDELETEVEC (s);
2495 }
2496
1e964774 2497 set_ix86_tune_features (opts, ix86_tune, opts->x_ix86_dump_tunes);
2bf6d935 2498
6bc89193 2499 ix86_recompute_optlev_based_flags (opts, opts_set);
2bf6d935
ML		 2500
2501 ix86_tune_cost = processor_cost_table[ix86_tune];
2502 /* TODO: ix86_cost should be chosen at instruction or function granuality
2503 so for cold code we use size_cost even in !optimize_size compilation. */
2504 if (opts->x_optimize_size)
2505 ix86_cost = &ix86_size_cost;
2506 else
2507 ix86_cost = ix86_tune_cost;
2508
2509 /* Arrange to set up i386_stack_locals for all functions. */
2510 init_machine_status = ix86_init_machine_status;
2511
2512 /* Validate -mregparm= value. */
2513 if (opts_set->x_ix86_regparm)
2514 {
2515 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2516 warning (0, "%<-mregparm%> is ignored in 64-bit mode");
2517 else if (TARGET_IAMCU_P (opts->x_target_flags))
2518 warning (0, "%<-mregparm%> is ignored for Intel MCU psABI");
2519 if (opts->x_ix86_regparm > REGPARM_MAX)
2520 {
2521 error ("%<-mregparm=%d%> is not between 0 and %d",
2522 opts->x_ix86_regparm, REGPARM_MAX);
2523 opts->x_ix86_regparm = 0;
2524 }
2525 }
2526 if (TARGET_IAMCU_P (opts->x_target_flags)
2527 || TARGET_64BIT_P (opts->x_ix86_isa_flags))
2528 opts->x_ix86_regparm = REGPARM_MAX;
2529
2530 /* Default align_* from the processor table. */
2531 ix86_default_align (opts);
2532
2533 /* Provide default for -mbranch-cost= value. */
6ed76044
ML		 2534 SET_OPTION_IF_UNSET (opts, opts_set, ix86_branch_cost,
2535 ix86_tune_cost->branch_cost);
2bf6d935
ML		 2536
2537 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2538 {
2539 opts->x_target_flags
2540 |= TARGET_SUBTARGET64_DEFAULT & ~opts_set->x_target_flags;
2541
2542 if (!ix86_arch_specified)
2543 opts->x_ix86_isa_flags
2544 |= TARGET_SUBTARGET64_ISA_DEFAULT & ~opts->x_ix86_isa_flags_explicit;
2545
2546 if (TARGET_RTD_P (opts->x_target_flags))
2547 warning (0,
2548 main_args_p
2549 ? G_("%<-mrtd%> is ignored in 64bit mode")
2550 : G_("%<target(\"rtd\")%> is ignored in 64bit mode"));
2551 }
2552 else
2553 {
2554 opts->x_target_flags
2555 |= TARGET_SUBTARGET32_DEFAULT & ~opts_set->x_target_flags;
2556
2557 if (!ix86_arch_specified)
2558 opts->x_ix86_isa_flags
2559 |= TARGET_SUBTARGET32_ISA_DEFAULT & ~opts->x_ix86_isa_flags_explicit;
2560
2561 /* i386 ABI does not specify red zone. It still makes sense to use it
2562 when programmer takes care to stack from being destroyed. */
2563 if (!(opts_set->x_target_flags & MASK_NO_RED_ZONE))
2564 opts->x_target_flags |= MASK_NO_RED_ZONE;
2565 }
2566
2567 /* Keep nonleaf frame pointers. */
2568 if (opts->x_flag_omit_frame_pointer)
2569 opts->x_target_flags &= ~MASK_OMIT_LEAF_FRAME_POINTER;
2570 else if (TARGET_OMIT_LEAF_FRAME_POINTER_P (opts->x_target_flags))
2571 opts->x_flag_omit_frame_pointer = 1;
2572
2573 /* If we're doing fast math, we don't care about comparison order
2574 wrt NaNs. This lets us use a shorter comparison sequence. */
2575 if (opts->x_flag_finite_math_only)
2576 opts->x_target_flags &= ~MASK_IEEE_FP;
2577
2578 /* If the architecture always has an FPU, turn off NO_FANCY_MATH_387,
2579 since the insns won't need emulation. */
2580 if (ix86_tune_features [X86_TUNE_ALWAYS_FANCY_MATH_387])
2581 opts->x_target_flags &= ~MASK_NO_FANCY_MATH_387;
2582
2583 /* Likewise, if the target doesn't have a 387, or we've specified
2584 software floating point, don't use 387 inline intrinsics. */
2585 if (!TARGET_80387_P (opts->x_target_flags))
2586 opts->x_target_flags |= MASK_NO_FANCY_MATH_387;
2587
2588 /* Turn on MMX builtins for -msse. */
2589 if (TARGET_SSE_P (opts->x_ix86_isa_flags))
2590 opts->x_ix86_isa_flags
2591 |= OPTION_MASK_ISA_MMX & ~opts->x_ix86_isa_flags_explicit;
2592
2593 /* Enable SSE prefetch. */
2594 if (TARGET_SSE_P (opts->x_ix86_isa_flags)
2595 || (TARGET_PRFCHW_P (opts->x_ix86_isa_flags)
2596 && !TARGET_3DNOW_P (opts->x_ix86_isa_flags))
2597 || TARGET_PREFETCHWT1_P (opts->x_ix86_isa_flags))
08a4adcf 2598 ix86_prefetch_sse = true;
2bf6d935
ML		 2599
2600 /* Enable popcnt instruction for -msse4.2 or -mabm. */
2601 if (TARGET_SSE4_2_P (opts->x_ix86_isa_flags)
2602 || TARGET_ABM_P (opts->x_ix86_isa_flags))
2603 opts->x_ix86_isa_flags
2604 |= OPTION_MASK_ISA_POPCNT & ~opts->x_ix86_isa_flags_explicit;
2605
2606 /* Enable lzcnt instruction for -mabm. */
2607 if (TARGET_ABM_P(opts->x_ix86_isa_flags))
2608 opts->x_ix86_isa_flags
2609 |= OPTION_MASK_ISA_LZCNT & ~opts->x_ix86_isa_flags_explicit;
2610
2611 /* Disable BMI, BMI2 and TBM instructions for -m16. */
2612 if (TARGET_16BIT_P(opts->x_ix86_isa_flags))
2613 opts->x_ix86_isa_flags
2614 &= ~((OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_TBM)
2615 & ~opts->x_ix86_isa_flags_explicit);
2616
2617 /* Validate -mpreferred-stack-boundary= value or default it to
2618 PREFERRED_STACK_BOUNDARY_DEFAULT. */
2619 ix86_preferred_stack_boundary = PREFERRED_STACK_BOUNDARY_DEFAULT;
2620 if (opts_set->x_ix86_preferred_stack_boundary_arg)
2621 {
2622 int min = TARGET_64BIT_P (opts->x_ix86_isa_flags)? 3 : 2;
2623 int max = TARGET_SEH ? 4 : 12;
2624
2625 if (opts->x_ix86_preferred_stack_boundary_arg < min
2626 || opts->x_ix86_preferred_stack_boundary_arg > max)
2627 {
2628 if (min == max)
2629 error ("%<-mpreferred-stack-boundary%> is not supported "
2630 "for this target");
2631 else
2632 error ("%<-mpreferred-stack-boundary=%d%> is not between %d and %d",
2633 opts->x_ix86_preferred_stack_boundary_arg, min, max);
2634 }
2635 else
2636 ix86_preferred_stack_boundary
2637 = (1 << opts->x_ix86_preferred_stack_boundary_arg) * BITS_PER_UNIT;
2638 }
2639
2640 /* Set the default value for -mstackrealign. */
6ed76044
ML		 2641 SET_OPTION_IF_UNSET (opts, opts_set, ix86_force_align_arg_pointer,
2642 STACK_REALIGN_DEFAULT);
2bf6d935
ML		 2643
2644 ix86_default_incoming_stack_boundary = PREFERRED_STACK_BOUNDARY;
2645
2646 /* Validate -mincoming-stack-boundary= value or default it to
2647 MIN_STACK_BOUNDARY/PREFERRED_STACK_BOUNDARY. */
2648 ix86_incoming_stack_boundary = ix86_default_incoming_stack_boundary;
2649 if (opts_set->x_ix86_incoming_stack_boundary_arg)
2650 {
2651 int min = TARGET_64BIT_P (opts->x_ix86_isa_flags) ? 3 : 2;
2652
2653 if (opts->x_ix86_incoming_stack_boundary_arg < min
2654 || opts->x_ix86_incoming_stack_boundary_arg > 12)
2655 error ("%<-mincoming-stack-boundary=%d%> is not between %d and 12",
2656 opts->x_ix86_incoming_stack_boundary_arg, min);
2657 else
2658 {
2659 ix86_user_incoming_stack_boundary
2660 = (1 << opts->x_ix86_incoming_stack_boundary_arg) * BITS_PER_UNIT;
2661 ix86_incoming_stack_boundary
2662 = ix86_user_incoming_stack_boundary;
2663 }
2664 }
2665
2666#ifndef NO_PROFILE_COUNTERS
2667 if (flag_nop_mcount)
2668 error ("%<-mnop-mcount%> is not compatible with this target");
2669#endif
2670 if (flag_nop_mcount && flag_pic)
2671 error ("%<-mnop-mcount%> is not implemented for %<-fPIC%>");
2672
2673 /* Accept -msseregparm only if at least SSE support is enabled. */
2674 if (TARGET_SSEREGPARM_P (opts->x_target_flags)
2675 && ! TARGET_SSE_P (opts->x_ix86_isa_flags))
2676 error (main_args_p
2677 ? G_("%<-msseregparm%> used without SSE enabled")
2678 : G_("%<target(\"sseregparm\")%> used without SSE enabled"));
2679
2680 if (opts_set->x_ix86_fpmath)
2681 {
2682 if (opts->x_ix86_fpmath & FPMATH_SSE)
2683 {
2684 if (!TARGET_SSE_P (opts->x_ix86_isa_flags))
2685 {
2686 if (TARGET_80387_P (opts->x_target_flags))
2687 {
2688 warning (0, "SSE instruction set disabled, using 387 arithmetics");
2689 opts->x_ix86_fpmath = FPMATH_387;
2690 }
2691 }
2692 else if ((opts->x_ix86_fpmath & FPMATH_387)
2693 && !TARGET_80387_P (opts->x_target_flags))
2694 {
2695 warning (0, "387 instruction set disabled, using SSE arithmetics");
2696 opts->x_ix86_fpmath = FPMATH_SSE;
2697 }
2698 }
2699 }
2700 /* For all chips supporting SSE2, -mfpmath=sse performs better than
2701 fpmath=387. The second is however default at many targets since the
2702 extra 80bit precision of temporaries is considered to be part of ABI.
2703 Overwrite the default at least for -ffast-math.
2704 TODO: -mfpmath=both seems to produce same performing code with bit
2705 smaller binaries. It is however not clear if register allocation is
2706 ready for this setting.
2707 Also -mfpmath=387 is overall a lot more compact (bout 4-5%) than SSE
2708 codegen. We may switch to 387 with -ffast-math for size optimized
2709 functions. */
2710 else if (fast_math_flags_set_p (&global_options)
2711 && TARGET_SSE2_P (opts->x_ix86_isa_flags))
2712 opts->x_ix86_fpmath = FPMATH_SSE;
2713 else
2714 opts->x_ix86_fpmath = TARGET_FPMATH_DEFAULT_P (opts->x_ix86_isa_flags);
2715
2716 /* Use external vectorized library in vectorizing intrinsics. */
2717 if (opts_set->x_ix86_veclibabi_type)
2718 switch (opts->x_ix86_veclibabi_type)
2719 {
2720 case ix86_veclibabi_type_svml:
2721 ix86_veclib_handler = &ix86_veclibabi_svml;
2722 break;
2723
2724 case ix86_veclibabi_type_acml:
2725 ix86_veclib_handler = &ix86_veclibabi_acml;
2726 break;
2727
2728 default:
2729 gcc_unreachable ();
2730 }
2731
2732 if (ix86_tune_features [X86_TUNE_ACCUMULATE_OUTGOING_ARGS]
2733 && !(opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
2734 opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
2735
2736 /* If stack probes are required, the space used for large function
2737 arguments on the stack must also be probed, so enable
2738 -maccumulate-outgoing-args so this happens in the prologue. */
2739 if (TARGET_STACK_PROBE_P (opts->x_target_flags)
2740 && !(opts->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
2741 {
2742 if (opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)
2743 warning (0,
2744 main_args_p
2745 ? G_("stack probing requires %<-maccumulate-outgoing-args%> "
2746 "for correctness")
2747 : G_("stack probing requires "
2748 "%<target(\"accumulate-outgoing-args\")%> for "
2749 "correctness"));
2750 opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
2751 }
2752
2753 /* Stack realignment without -maccumulate-outgoing-args requires %ebp,
2754 so enable -maccumulate-outgoing-args when %ebp is fixed. */
2755 if (fixed_regs[BP_REG]
2756 && !(opts->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
2757 {
2758 if (opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)
2759 warning (0,
2760 main_args_p
2761 ? G_("fixed ebp register requires "
2762 "%<-maccumulate-outgoing-args%>")
2763 : G_("fixed ebp register requires "
2764 "%<target(\"accumulate-outgoing-args\")%>"));
2765 opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
2766 }
2767
2768 /* Figure out what ASM_GENERATE_INTERNAL_LABEL builds as a prefix. */
2769 {
2770 char *p;
2771 ASM_GENERATE_INTERNAL_LABEL (internal_label_prefix, "LX", 0);
2772 p = strchr (internal_label_prefix, 'X');
2773 internal_label_prefix_len = p - internal_label_prefix;
2774 *p = '\0';
2775 }
2776
2777 /* When scheduling description is not available, disable scheduler pass
2778 so it won't slow down the compilation and make x87 code slower. */
2779 if (!TARGET_SCHEDULE)
2780 opts->x_flag_schedule_insns_after_reload = opts->x_flag_schedule_insns = 0;
2781
028d4092
ML		 2782 SET_OPTION_IF_UNSET (opts, opts_set, param_simultaneous_prefetches,
2783 ix86_tune_cost->simultaneous_prefetches);
2784 SET_OPTION_IF_UNSET (opts, opts_set, param_l1_cache_line_size,
2785 ix86_tune_cost->prefetch_block);
2786 SET_OPTION_IF_UNSET (opts, opts_set, param_l1_cache_size,
2787 ix86_tune_cost->l1_cache_size);
2788 SET_OPTION_IF_UNSET (opts, opts_set, param_l2_cache_size,
2789 ix86_tune_cost->l2_cache_size);
2bf6d935
ML		 2790
2791 /* Enable sw prefetching at -O3 for CPUS that prefetching is helpful. */
2792 if (opts->x_flag_prefetch_loop_arrays < 0
2793 && HAVE_prefetch
2794 && (opts->x_optimize >= 3 || opts->x_flag_profile_use)
2795 && !opts->x_optimize_size
2796 && TARGET_SOFTWARE_PREFETCHING_BENEFICIAL)
2797 opts->x_flag_prefetch_loop_arrays = 1;
2798
2799 /* If using typedef char *va_list, signal that __builtin_va_start (&ap, 0)
2800 can be opts->x_optimized to ap = __builtin_next_arg (0). */
2801 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags) && !opts->x_flag_split_stack)
2802 targetm.expand_builtin_va_start = NULL;
2803
2bf6d935
ML		 2804#ifdef USE_IX86_CLD
2805 /* Use -mcld by default for 32-bit code if configured with --enable-cld. */
2806 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
2807 opts->x_target_flags |= MASK_CLD & ~opts_set->x_target_flags;
2808#endif
2809
2810 /* Set the default value for -mfentry. */
2811 if (!opts_set->x_flag_fentry)
2812 opts->x_flag_fentry = TARGET_SEH;
2813 else
2814 {
2815 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags) && opts->x_flag_pic
2816 && opts->x_flag_fentry)
2817 sorry ("%<-mfentry%> isn%'t supported for 32-bit in combination "
2818 "with %<-fpic%>");
2819 else if (TARGET_SEH && !opts->x_flag_fentry)
2820 sorry ("%<-mno-fentry%> isn%'t compatible with SEH");
2821 }
2822
2823 if (TARGET_SEH && TARGET_CALL_MS2SYSV_XLOGUES)
2824 sorry ("%<-mcall-ms2sysv-xlogues%> isn%'t currently supported with SEH");
2825
2826 if (!(opts_set->x_target_flags & MASK_VZEROUPPER)
2827 && TARGET_EMIT_VZEROUPPER)
2828 opts->x_target_flags |= MASK_VZEROUPPER;
2829 if (!(opts_set->x_target_flags & MASK_STV))
2830 opts->x_target_flags |= MASK_STV;
2831 /* Disable STV if -mpreferred-stack-boundary={2,3} or
2832 -mincoming-stack-boundary={2,3} or -mstackrealign - the needed
2833 stack realignment will be extra cost the pass doesn't take into
2834 account and the pass can't realign the stack. */
2835 if (ix86_preferred_stack_boundary < 128
2836 || ix86_incoming_stack_boundary < 128
2837 || opts->x_ix86_force_align_arg_pointer)
2838 opts->x_target_flags &= ~MASK_STV;
2839 if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL]
2840 && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_LOAD))
2841 opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_LOAD;
2842 if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL]
2843 && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_STORE))
2844 opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_STORE;
2845
2846 /* Enable 128-bit AVX instruction generation
2847 for the auto-vectorizer. */
586bbef1 2848 if (ix86_tune_features[X86_TUNE_AVX128_OPTIMAL]
2bf6d935
ML		 2849 && (opts_set->x_prefer_vector_width_type == PVW_NONE))
2850 opts->x_prefer_vector_width_type = PVW_AVX128;
2851
2852 /* Use 256-bit AVX instruction generation
2853 in the auto-vectorizer. */
2854 if (ix86_tune_features[X86_TUNE_AVX256_OPTIMAL]
2855 && (opts_set->x_prefer_vector_width_type == PVW_NONE))
2856 opts->x_prefer_vector_width_type = PVW_AVX256;
2857
2858 if (opts->x_ix86_recip_name)
2859 {
2860 char *p = ASTRDUP (opts->x_ix86_recip_name);
2861 char *q;
5ebdd535 2862 unsigned int mask;
2bf6d935
ML		 2863 bool invert;
2864
2865 while ((q = strtok (p, ",")) != NULL)
2866 {
2867 p = NULL;
2868 if (*q == '!')
2869 {
2870 invert = true;
2871 q++;
2872 }
2873 else
2874 invert = false;
2875
2876 if (!strcmp (q, "default"))
2877 mask = RECIP_MASK_ALL;
2878 else
2879 {
2880 for (i = 0; i < ARRAY_SIZE (recip_options); i++)
2881 if (!strcmp (q, recip_options[i].string))
2882 {
2883 mask = recip_options[i].mask;
2884 break;
2885 }
2886
2887 if (i == ARRAY_SIZE (recip_options))
2888 {
2889 error ("unknown option for %<-mrecip=%s%>", q);
2890 invert = false;
2891 mask = RECIP_MASK_NONE;
2892 }
2893 }
2894
2895 opts->x_recip_mask_explicit |= mask;
2896 if (invert)
2897 opts->x_recip_mask &= ~mask;
2898 else
2899 opts->x_recip_mask |= mask;
2900 }
2901 }
2902
2903 if (TARGET_RECIP_P (opts->x_target_flags))
2904 opts->x_recip_mask |= RECIP_MASK_ALL & ~opts->x_recip_mask_explicit;
2905 else if (opts_set->x_target_flags & MASK_RECIP)
2906 opts->x_recip_mask &= ~(RECIP_MASK_ALL & ~opts->x_recip_mask_explicit);
2907
2908 /* Default long double to 64-bit for 32-bit Bionic and to __float128
2909 for 64-bit Bionic. Also default long double to 64-bit for Intel
2910 MCU psABI. */
2911 if ((TARGET_HAS_BIONIC || TARGET_IAMCU)
2912 && !(opts_set->x_target_flags
2913 & (MASK_LONG_DOUBLE_64 | MASK_LONG_DOUBLE_128)))
2914 opts->x_target_flags |= (TARGET_64BIT
2915 ? MASK_LONG_DOUBLE_128
2916 : MASK_LONG_DOUBLE_64);
2917
2918 /* Only one of them can be active. */
2919 gcc_assert ((opts->x_target_flags & MASK_LONG_DOUBLE_64) == 0
2920 || (opts->x_target_flags & MASK_LONG_DOUBLE_128) == 0);
2921
2922 /* Handle stack protector */
2923 if (!opts_set->x_ix86_stack_protector_guard)
2924 {
2925#ifdef TARGET_THREAD_SSP_OFFSET
2926 if (!TARGET_HAS_BIONIC)
2927 opts->x_ix86_stack_protector_guard = SSP_TLS;
2928 else
2929#endif
2930 opts->x_ix86_stack_protector_guard = SSP_GLOBAL;
2931 }
2932
2933 if (opts_set->x_ix86_stack_protector_guard_offset_str)
2934 {
2935 char *endp;
2936 const char *str = opts->x_ix86_stack_protector_guard_offset_str;
2937
2938 errno = 0;
2939 int64_t offset;
2940
2941#if defined(INT64_T_IS_LONG)
2942 offset = strtol (str, &endp, 0);
2943#else
2944 offset = strtoll (str, &endp, 0);
2945#endif
2946
2947 if (!*str || *endp || errno)
2948 error ("%qs is not a valid number "
2949 "in %<-mstack-protector-guard-offset=%>", str);
2950
2951 if (!IN_RANGE (offset, HOST_WIDE_INT_C (-0x80000000),
2952 HOST_WIDE_INT_C (0x7fffffff)))
2953 error ("%qs is not a valid offset "
2954 "in %<-mstack-protector-guard-offset=%>", str);
2955
2956 opts->x_ix86_stack_protector_guard_offset = offset;
2957 }
2958#ifdef TARGET_THREAD_SSP_OFFSET
2959 else
2960 opts->x_ix86_stack_protector_guard_offset = TARGET_THREAD_SSP_OFFSET;
2961#endif
2962
2963 if (opts_set->x_ix86_stack_protector_guard_reg_str)
2964 {
2965 const char *str = opts->x_ix86_stack_protector_guard_reg_str;
2966 addr_space_t seg = ADDR_SPACE_GENERIC;
2967
2968 /* Discard optional register prefix. */
2969 if (str[0] == '%')
2970 str++;
2971
2972 if (strlen (str) == 2 && str[1] == 's')
2973 {
2974 if (str[0] == 'f')
2975 seg = ADDR_SPACE_SEG_FS;
2976 else if (str[0] == 'g')
2977 seg = ADDR_SPACE_SEG_GS;
2978 }
2979
2980 if (seg == ADDR_SPACE_GENERIC)
2981 error ("%qs is not a valid base register "
2982 "in %<-mstack-protector-guard-reg=%>",
2983 opts->x_ix86_stack_protector_guard_reg_str);
2984
2985 opts->x_ix86_stack_protector_guard_reg = seg;
2986 }
2987 else
2988 {
2989 opts->x_ix86_stack_protector_guard_reg = DEFAULT_TLS_SEG_REG;
2990
2991 /* The kernel uses a different segment register for performance
2992 reasons; a system call would not have to trash the userspace
2993 segment register, which would be expensive. */
2994 if (opts->x_ix86_cmodel == CM_KERNEL)
2995 opts->x_ix86_stack_protector_guard_reg = ADDR_SPACE_SEG_GS;
2996 }
2997
2998 /* Handle -mmemcpy-strategy= and -mmemset-strategy= */
2999 if (opts->x_ix86_tune_memcpy_strategy)
3000 {
3001 char *str = xstrdup (opts->x_ix86_tune_memcpy_strategy);
3002 ix86_parse_stringop_strategy_string (str, false);
3003 free (str);
3004 }
3005
3006 if (opts->x_ix86_tune_memset_strategy)
3007 {
3008 char *str = xstrdup (opts->x_ix86_tune_memset_strategy);
3009 ix86_parse_stringop_strategy_string (str, true);
3010 free (str);
3011 }
3012
3013 /* Save the initial options in case the user does function specific
3014 options. */
3015 if (main_args_p)
e401db7b
JJ		 3016 {
3017 opts->x_ix86_excess_precision
3018 = opts->x_flag_excess_precision;
3019 opts->x_ix86_unsafe_math_optimizations
3020 = opts->x_flag_unsafe_math_optimizations;
3021 target_option_default_node = target_option_current_node
3022 = build_target_option_node (opts, opts_set);
3023 }
2bf6d935
ML		 3024
3025 if (opts->x_flag_cf_protection != CF_NONE)
77d372ab
L		 3026 {
3027 if ((opts->x_flag_cf_protection & CF_BRANCH) == CF_BRANCH
3028 && !TARGET_64BIT && !TARGET_CMOV)
3029 error ("%<-fcf-protection%> is not compatible with this target");
3030
3031 opts->x_flag_cf_protection
2bf6d935 3032 = (cf_protection_level) (opts->x_flag_cf_protection | CF_SET);
77d372ab 3033 }
2bf6d935 3034
105c2795 3035 if (ix86_tune_features [X86_TUNE_AVOID_256FMA_CHAINS])
028d4092 3036 SET_OPTION_IF_UNSET (opts, opts_set, param_avoid_fma_max_bits, 256);
105c2795 3037 else if (ix86_tune_features [X86_TUNE_AVOID_128FMA_CHAINS])
028d4092 3038 SET_OPTION_IF_UNSET (opts, opts_set, param_avoid_fma_max_bits, 128);
2bf6d935
ML		 3039
3040 /* PR86952: jump table usage with retpolines is slow.
3041 The PR provides some numbers about the slowness. */
6ed76044
ML		 3042 if (ix86_indirect_branch != indirect_branch_keep)
3043 SET_OPTION_IF_UNSET (opts, opts_set, flag_jump_tables, 0);
2bf6d935
ML		 3044
3045 return true;
3046}
3047
3048/* Implement the TARGET_OPTION_OVERRIDE hook. */
3049
3050void
3051ix86_option_override (void)
3052{
3053 ix86_option_override_internal (true, &global_options, &global_options_set);
3054}
3055
3056/* Remember the last target of ix86_set_current_function. */
3057static GTY(()) tree ix86_previous_fndecl;
3058
3059/* Set targets globals to the default (or current #pragma GCC target
3060 if active). Invalidate ix86_previous_fndecl cache. */
3061
3062void
3063ix86_reset_previous_fndecl (void)
3064{
3065 tree new_tree = target_option_current_node;
ba948b37
JJ		 3066 cl_target_option_restore (&global_options, &global_options_set,
3067 TREE_TARGET_OPTION (new_tree));
2bf6d935
ML		 3068 if (TREE_TARGET_GLOBALS (new_tree))
3069 restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
3070 else if (new_tree == target_option_default_node)
3071 restore_target_globals (&default_target_globals);
3072 else
3073 TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
3074 ix86_previous_fndecl = NULL_TREE;
3075}
3076
3077/* Add target attribute to SIMD clone NODE if needed. */
3078
3079void
3080ix86_simd_clone_adjust (struct cgraph_node *node)
3081{
3082 const char *str = NULL;
3083
3084 /* Attributes need to be adjusted for definitions, not declarations. */
3085 if (!node->definition)
3086 return;
3087
3088 gcc_assert (node->decl == cfun->decl);
3089 switch (node->simdclone->vecsize_mangle)
3090 {
3091 case 'b':
3092 if (!TARGET_SSE2)
3093 str = "sse2";
3094 break;
3095 case 'c':
1609bedd
JJ		 3096 if (TARGET_PREFER_AVX128)
3097 {
3098 if (!TARGET_AVX)
3099 str = "avx,prefer-vector-width=256";
3100 else
3101 str = "prefer-vector-width=256";
3102 }
3103 else if (!TARGET_AVX)
2bf6d935
ML		 3104 str = "avx";
3105 break;
3106 case 'd':
1609bedd
JJ		 3107 if (TARGET_PREFER_AVX128)
3108 {
3109 if (!TARGET_AVX2)
3110 str = "avx2,prefer-vector-width=256";
3111 else
3112 str = "prefer-vector-width=256";
3113 }
3114 else if (!TARGET_AVX2)
2bf6d935
ML		 3115 str = "avx2";
3116 break;
3117 case 'e':
1609bedd
JJ		 3118 if (TARGET_PREFER_AVX256)
3119 {
3120 if (!TARGET_AVX512F)
3121 str = "avx512f,prefer-vector-width=512";
3122 else
3123 str = "prefer-vector-width=512";
3124 }
3125 else if (!TARGET_AVX512F)
2bf6d935
ML		 3126 str = "avx512f";
3127 break;
3128 default:
3129 gcc_unreachable ();
3130 }
3131 if (str == NULL)
3132 return;
3133 push_cfun (NULL);
3134 tree args = build_tree_list (NULL_TREE, build_string (strlen (str), str));
3135 bool ok = ix86_valid_target_attribute_p (node->decl, NULL, args, 0);
3136 gcc_assert (ok);
3137 pop_cfun ();
3138 ix86_reset_previous_fndecl ();
3139 ix86_set_current_function (node->decl);
3140}
3141
3142
3143
3144/* Set the func_type field from the function FNDECL. */
3145
3146static void
3147ix86_set_func_type (tree fndecl)
3148{
3149 if (cfun->machine->func_type == TYPE_UNKNOWN)
3150 {
3151 if (lookup_attribute ("interrupt",
3152 TYPE_ATTRIBUTES (TREE_TYPE (fndecl))))
3153 {
3154 if (ix86_function_naked (fndecl))
3155 error_at (DECL_SOURCE_LOCATION (fndecl),
3156 "interrupt and naked attributes are not compatible");
3157
3158 int nargs = 0;
3159 for (tree arg = DECL_ARGUMENTS (fndecl);
3160 arg;
3161 arg = TREE_CHAIN (arg))
3162 nargs++;
3163 cfun->machine->no_caller_saved_registers = true;
3164 cfun->machine->func_type
3165 = nargs == 2 ? TYPE_EXCEPTION : TYPE_INTERRUPT;
3166
3167 ix86_optimize_mode_switching[X86_DIRFLAG] = 1;
3168
3169 /* Only dwarf2out.c can handle -WORD(AP) as a pointer argument. */
3170 if (write_symbols != NO_DEBUG && write_symbols != DWARF2_DEBUG)
3171 sorry ("only DWARF debug format is supported for interrupt "
3172 "service routine");
3173 }
3174 else
3175 {
3176 cfun->machine->func_type = TYPE_NORMAL;
3177 if (lookup_attribute ("no_caller_saved_registers",
3178 TYPE_ATTRIBUTES (TREE_TYPE (fndecl))))
3179 cfun->machine->no_caller_saved_registers = true;
3180 }
3181 }
3182}
3183
3184/* Set the indirect_branch_type field from the function FNDECL. */
3185
3186static void
3187ix86_set_indirect_branch_type (tree fndecl)
3188{
3189 if (cfun->machine->indirect_branch_type == indirect_branch_unset)
3190 {
3191 tree attr = lookup_attribute ("indirect_branch",
3192 DECL_ATTRIBUTES (fndecl));
3193 if (attr != NULL)
3194 {
3195 tree args = TREE_VALUE (attr);
3196 if (args == NULL)
3197 gcc_unreachable ();
3198 tree cst = TREE_VALUE (args);
3199 if (strcmp (TREE_STRING_POINTER (cst), "keep") == 0)
3200 cfun->machine->indirect_branch_type = indirect_branch_keep;
3201 else if (strcmp (TREE_STRING_POINTER (cst), "thunk") == 0)
3202 cfun->machine->indirect_branch_type = indirect_branch_thunk;
3203 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-inline") == 0)
3204 cfun->machine->indirect_branch_type = indirect_branch_thunk_inline;
3205 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-extern") == 0)
3206 cfun->machine->indirect_branch_type = indirect_branch_thunk_extern;
3207 else
3208 gcc_unreachable ();
3209 }
3210 else
3211 cfun->machine->indirect_branch_type = ix86_indirect_branch;
3212
3213 /* -mcmodel=large is not compatible with -mindirect-branch=thunk
3214 nor -mindirect-branch=thunk-extern. */
3215 if ((ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3216 && ((cfun->machine->indirect_branch_type
3217 == indirect_branch_thunk_extern)
3218 || (cfun->machine->indirect_branch_type
3219 == indirect_branch_thunk)))
3220 error ("%<-mindirect-branch=%s%> and %<-mcmodel=large%> are not "
3221 "compatible",
3222 ((cfun->machine->indirect_branch_type
3223 == indirect_branch_thunk_extern)
3224 ? "thunk-extern" : "thunk"));
3225
3226 if (cfun->machine->indirect_branch_type != indirect_branch_keep
9be3bb2c
L		 3227 && (cfun->machine->indirect_branch_type
3228 != indirect_branch_thunk_extern)
2bf6d935
ML		 3229 && (flag_cf_protection & CF_RETURN))
3230 error ("%<-mindirect-branch%> and %<-fcf-protection%> are not "
3231 "compatible");
3232 }
3233
3234 if (cfun->machine->function_return_type == indirect_branch_unset)
3235 {
3236 tree attr = lookup_attribute ("function_return",
3237 DECL_ATTRIBUTES (fndecl));
3238 if (attr != NULL)
3239 {
3240 tree args = TREE_VALUE (attr);
3241 if (args == NULL)
3242 gcc_unreachable ();
3243 tree cst = TREE_VALUE (args);
3244 if (strcmp (TREE_STRING_POINTER (cst), "keep") == 0)
3245 cfun->machine->function_return_type = indirect_branch_keep;
3246 else if (strcmp (TREE_STRING_POINTER (cst), "thunk") == 0)
3247 cfun->machine->function_return_type = indirect_branch_thunk;
3248 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-inline") == 0)
3249 cfun->machine->function_return_type = indirect_branch_thunk_inline;
3250 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-extern") == 0)
3251 cfun->machine->function_return_type = indirect_branch_thunk_extern;
3252 else
3253 gcc_unreachable ();
3254 }
3255 else
3256 cfun->machine->function_return_type = ix86_function_return;
3257
3258 /* -mcmodel=large is not compatible with -mfunction-return=thunk
3259 nor -mfunction-return=thunk-extern. */
3260 if ((ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3261 && ((cfun->machine->function_return_type
3262 == indirect_branch_thunk_extern)
3263 || (cfun->machine->function_return_type
3264 == indirect_branch_thunk)))
3265 error ("%<-mfunction-return=%s%> and %<-mcmodel=large%> are not "
3266 "compatible",
3267 ((cfun->machine->function_return_type
3268 == indirect_branch_thunk_extern)
3269 ? "thunk-extern" : "thunk"));
3270
3271 if (cfun->machine->function_return_type != indirect_branch_keep
9be3bb2c
L		 3272 && (cfun->machine->function_return_type
3273 != indirect_branch_thunk_extern)
2bf6d935
ML		 3274 && (flag_cf_protection & CF_RETURN))
3275 error ("%<-mfunction-return%> and %<-fcf-protection%> are not "
3276 "compatible");
3277 }
3278}
3279
3280/* Establish appropriate back-end context for processing the function
3281 FNDECL. The argument might be NULL to indicate processing at top
3282 level, outside of any function scope. */
3283void
3284ix86_set_current_function (tree fndecl)
3285{
3286 /* Only change the context if the function changes. This hook is called
3287 several times in the course of compiling a function, and we don't want to
3288 slow things down too much or call target_reinit when it isn't safe. */
3289 if (fndecl == ix86_previous_fndecl)
3290 {
3291 /* There may be 2 function bodies for the same function FNDECL,
3292 one is extern inline and one isn't. Call ix86_set_func_type
3293 to set the func_type field. */
3294 if (fndecl != NULL_TREE)
3295 {
3296 ix86_set_func_type (fndecl);
3297 ix86_set_indirect_branch_type (fndecl);
3298 }
3299 return;
3300 }
3301
3302 tree old_tree;
3303 if (ix86_previous_fndecl == NULL_TREE)
3304 old_tree = target_option_current_node;
3305 else if (DECL_FUNCTION_SPECIFIC_TARGET (ix86_previous_fndecl))
3306 old_tree = DECL_FUNCTION_SPECIFIC_TARGET (ix86_previous_fndecl);
3307 else
3308 old_tree = target_option_default_node;
3309
3310 if (fndecl == NULL_TREE)
3311 {
3312 if (old_tree != target_option_current_node)
3313 ix86_reset_previous_fndecl ();
3314 return;
3315 }
3316
3317 ix86_set_func_type (fndecl);
3318 ix86_set_indirect_branch_type (fndecl);
3319
3320 tree new_tree = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
3321 if (new_tree == NULL_TREE)
3322 new_tree = target_option_default_node;
3323
3324 if (old_tree != new_tree)
3325 {
ba948b37
JJ		 3326 cl_target_option_restore (&global_options, &global_options_set,
3327 TREE_TARGET_OPTION (new_tree));
2bf6d935
ML		 3328 if (TREE_TARGET_GLOBALS (new_tree))
3329 restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
3330 else if (new_tree == target_option_default_node)
3331 restore_target_globals (&default_target_globals);
3332 else
3333 TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
3334 }
e401db7b
JJ		 3335 else if (flag_unsafe_math_optimizations
3336 != TREE_TARGET_OPTION (new_tree)->x_ix86_unsafe_math_optimizations
3337 || (flag_excess_precision
3338 != TREE_TARGET_OPTION (new_tree)->x_ix86_excess_precision))
3339 {
3340 cl_target_option_restore (&global_options, &global_options_set,
3341 TREE_TARGET_OPTION (new_tree));
3342 ix86_excess_precision = flag_excess_precision;
3343 ix86_unsafe_math_optimizations = flag_unsafe_math_optimizations;
3344 DECL_FUNCTION_SPECIFIC_TARGET (fndecl) = new_tree
3345 = build_target_option_node (&global_options, &global_options_set);
3346 if (TREE_TARGET_GLOBALS (new_tree))
3347 restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
3348 else if (new_tree == target_option_default_node)
3349 restore_target_globals (&default_target_globals);
3350 else
3351 TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
3352 }
2bf6d935
ML		 3353 ix86_previous_fndecl = fndecl;
3354
3355 static bool prev_no_caller_saved_registers;
3356
3357 /* 64-bit MS and SYSV ABI have different set of call used registers.
3358 Avoid expensive re-initialization of init_regs each time we switch
3359 function context. */
3360 if (TARGET_64BIT
a365fa06 3361 && (call_used_or_fixed_reg_p (SI_REG)
2bf6d935
ML		 3362 == (cfun->machine->call_abi == MS_ABI)))
3363 reinit_regs ();
3364 /* Need to re-initialize init_regs if caller-saved registers are
3365 changed. */
3366 else if (prev_no_caller_saved_registers
3367 != cfun->machine->no_caller_saved_registers)
3368 reinit_regs ();
3369
3370 if (cfun->machine->func_type != TYPE_NORMAL
3371 || cfun->machine->no_caller_saved_registers)
3372 {
3373 /* Don't allow SSE, MMX nor x87 instructions since they
3374 may change processor state. */
3375 const char *isa;
3376 if (TARGET_SSE)
3377 isa = "SSE";
3378 else if (TARGET_MMX)
3379 isa = "MMX/3Dnow";
3380 else if (TARGET_80387)
3381 isa = "80387";
3382 else
3383 isa = NULL;
3384 if (isa != NULL)
3385 {
3386 if (cfun->machine->func_type != TYPE_NORMAL)
3387 sorry (cfun->machine->func_type == TYPE_EXCEPTION
3388 ? G_("%s instructions aren%'t allowed in an"
3389 " exception service routine")
3390 : G_("%s instructions aren%'t allowed in an"
3391 " interrupt service routine"),
3392 isa);
3393 else
3394 sorry ("%s instructions aren%'t allowed in a function with "
3395 "the %<no_caller_saved_registers%> attribute", isa);
3396 /* Don't issue the same error twice. */
3397 cfun->machine->func_type = TYPE_NORMAL;
3398 cfun->machine->no_caller_saved_registers = false;
3399 }
3400 }
3401
3402 prev_no_caller_saved_registers
3403 = cfun->machine->no_caller_saved_registers;
3404}
3405
3406/* Implement the TARGET_OFFLOAD_OPTIONS hook. */
3407char *
3408ix86_offload_options (void)
3409{
3410 if (TARGET_LP64)
3411 return xstrdup ("-foffload-abi=lp64");
3412 return xstrdup ("-foffload-abi=ilp32");
3413}
3414
3415/* Handle "cdecl", "stdcall", "fastcall", "regparm", "thiscall",
3416 and "sseregparm" calling convention attributes;
3417 arguments as in struct attribute_spec.handler. */
3418
3419static tree
3420ix86_handle_cconv_attribute (tree *node, tree name, tree args, int,
3421 bool *no_add_attrs)
3422{
3423 if (TREE_CODE (*node) != FUNCTION_TYPE
3424 && TREE_CODE (*node) != METHOD_TYPE
3425 && TREE_CODE (*node) != FIELD_DECL
3426 && TREE_CODE (*node) != TYPE_DECL)
3427 {
3428 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3429 name);
3430 *no_add_attrs = true;
3431 return NULL_TREE;
3432 }
3433
3434 /* Can combine regparm with all attributes but fastcall, and thiscall. */
3435 if (is_attribute_p ("regparm", name))
3436 {
3437 tree cst;
3438
3439 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3440 {
3441 error ("fastcall and regparm attributes are not compatible");
3442 }
3443
3444 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3445 {
3446 error ("regparam and thiscall attributes are not compatible");
3447 }
3448
3449 cst = TREE_VALUE (args);
3450 if (TREE_CODE (cst) != INTEGER_CST)
3451 {
3452 warning (OPT_Wattributes,
3453 "%qE attribute requires an integer constant argument",
3454 name);
3455 *no_add_attrs = true;
3456 }
3457 else if (compare_tree_int (cst, REGPARM_MAX) > 0)
3458 {
3459 warning (OPT_Wattributes, "argument to %qE attribute larger than %d",
3460 name, REGPARM_MAX);
3461 *no_add_attrs = true;
3462 }
3463
3464 return NULL_TREE;
3465 }
3466
3467 if (TARGET_64BIT)
3468 {
3469 /* Do not warn when emulating the MS ABI. */
3470 if ((TREE_CODE (*node) != FUNCTION_TYPE
3471 && TREE_CODE (*node) != METHOD_TYPE)
3472 || ix86_function_type_abi (*node) != MS_ABI)
3473 warning (OPT_Wattributes, "%qE attribute ignored",
3474 name);
3475 *no_add_attrs = true;
3476 return NULL_TREE;
3477 }
3478
3479 /* Can combine fastcall with stdcall (redundant) and sseregparm. */
3480 if (is_attribute_p ("fastcall", name))
3481 {
3482 if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
3483 {
3484 error ("fastcall and cdecl attributes are not compatible");
3485 }
3486 if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
3487 {
3488 error ("fastcall and stdcall attributes are not compatible");
3489 }
3490 if (lookup_attribute ("regparm", TYPE_ATTRIBUTES (*node)))
3491 {
3492 error ("fastcall and regparm attributes are not compatible");
3493 }
3494 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3495 {
3496 error ("fastcall and thiscall attributes are not compatible");
3497 }
3498 }
3499
3500 /* Can combine stdcall with fastcall (redundant), regparm and
3501 sseregparm. */
3502 else if (is_attribute_p ("stdcall", name))
3503 {
3504 if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
3505 {
3506 error ("stdcall and cdecl attributes are not compatible");
3507 }
3508 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3509 {
3510 error ("stdcall and fastcall attributes are not compatible");
3511 }
3512 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3513 {
3514 error ("stdcall and thiscall attributes are not compatible");
3515 }
3516 }
3517
3518 /* Can combine cdecl with regparm and sseregparm. */
3519 else if (is_attribute_p ("cdecl", name))
3520 {
3521 if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
3522 {
3523 error ("stdcall and cdecl attributes are not compatible");
3524 }
3525 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3526 {
3527 error ("fastcall and cdecl attributes are not compatible");
3528 }
3529 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3530 {
3531 error ("cdecl and thiscall attributes are not compatible");
3532 }
3533 }
3534 else if (is_attribute_p ("thiscall", name))
3535 {
3536 if (TREE_CODE (*node) != METHOD_TYPE && pedantic)
3537 warning (OPT_Wattributes, "%qE attribute is used for non-class method",
3538 name);
3539 if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
3540 {
3541 error ("stdcall and thiscall attributes are not compatible");
3542 }
3543 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3544 {
3545 error ("fastcall and thiscall attributes are not compatible");
3546 }
3547 if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
3548 {
3549 error ("cdecl and thiscall attributes are not compatible");
3550 }
3551 }
3552
3553 /* Can combine sseregparm with all attributes. */
3554
3555 return NULL_TREE;
3556}
3557
3558#ifndef CHECK_STACK_LIMIT
3559#define CHECK_STACK_LIMIT (-1)
3560#endif
3561
3562/* The transactional memory builtins are implicitly regparm or fastcall
3563 depending on the ABI. Override the generic do-nothing attribute that
3564 these builtins were declared with, and replace it with one of the two
3565 attributes that we expect elsewhere. */
3566
3567static tree
3568ix86_handle_tm_regparm_attribute (tree *node, tree, tree,
3569 int flags, bool *no_add_attrs)
3570{
3571 tree alt;
3572
3573 /* In no case do we want to add the placeholder attribute. */
3574 *no_add_attrs = true;
3575
3576 /* The 64-bit ABI is unchanged for transactional memory. */
3577 if (TARGET_64BIT)
3578 return NULL_TREE;
3579
3580 /* ??? Is there a better way to validate 32-bit windows? We have
3581 cfun->machine->call_abi, but that seems to be set only for 64-bit. */
3582 if (CHECK_STACK_LIMIT > 0)
3583 alt = tree_cons (get_identifier ("fastcall"), NULL, NULL);
3584 else
3585 {
3586 alt = tree_cons (NULL, build_int_cst (NULL, 2), NULL);
3587 alt = tree_cons (get_identifier ("regparm"), alt, NULL);
3588 }
3589 decl_attributes (node, alt, flags);
3590
3591 return NULL_TREE;
3592}
3593
3594/* Handle a "force_align_arg_pointer" attribute. */
3595
3596static tree
3597ix86_handle_force_align_arg_pointer_attribute (tree *node, tree name,
3598 tree, int, bool *no_add_attrs)
3599{
3600 if (TREE_CODE (*node) != FUNCTION_TYPE
3601 && TREE_CODE (*node) != METHOD_TYPE
3602 && TREE_CODE (*node) != FIELD_DECL
3603 && TREE_CODE (*node) != TYPE_DECL)
3604 {
3605 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3606 name);
3607 *no_add_attrs = true;
3608 }
3609
3610 return NULL_TREE;
3611}
3612
3613/* Handle a "ms_struct" or "gcc_struct" attribute; arguments as in
3614 struct attribute_spec.handler. */
3615
3616static tree
3617ix86_handle_struct_attribute (tree *node, tree name, tree, int,
3618 bool *no_add_attrs)
3619{
3620 tree *type = NULL;
3621 if (DECL_P (*node))
3622 {
3623 if (TREE_CODE (*node) == TYPE_DECL)
3624 type = &TREE_TYPE (*node);
3625 }
3626 else
3627 type = node;
3628
3629 if (!(type && RECORD_OR_UNION_TYPE_P (*type)))
3630 {
3631 warning (OPT_Wattributes, "%qE attribute ignored",
3632 name);
3633 *no_add_attrs = true;
3634 }
3635
3636 else if ((is_attribute_p ("ms_struct", name)
3637 && lookup_attribute ("gcc_struct", TYPE_ATTRIBUTES (*type)))
3638 || ((is_attribute_p ("gcc_struct", name)
3639 && lookup_attribute ("ms_struct", TYPE_ATTRIBUTES (*type)))))
3640 {
3641 warning (OPT_Wattributes, "%qE incompatible attribute ignored",
3642 name);
3643 *no_add_attrs = true;
3644 }
3645
3646 return NULL_TREE;
3647}
3648
3649/* Handle a "callee_pop_aggregate_return" attribute; arguments as
3650 in struct attribute_spec handler. */
3651
3652static tree
3653ix86_handle_callee_pop_aggregate_return (tree *node, tree name, tree args, int,
3654 bool *no_add_attrs)
3655{
3656 if (TREE_CODE (*node) != FUNCTION_TYPE
3657 && TREE_CODE (*node) != METHOD_TYPE
3658 && TREE_CODE (*node) != FIELD_DECL
3659 && TREE_CODE (*node) != TYPE_DECL)
3660 {
3661 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3662 name);
3663 *no_add_attrs = true;
3664 return NULL_TREE;
3665 }
3666 if (TARGET_64BIT)
3667 {
3668 warning (OPT_Wattributes, "%qE attribute only available for 32-bit",
3669 name);
3670 *no_add_attrs = true;
3671 return NULL_TREE;
3672 }
3673 if (is_attribute_p ("callee_pop_aggregate_return", name))
3674 {
3675 tree cst;
3676
3677 cst = TREE_VALUE (args);
3678 if (TREE_CODE (cst) != INTEGER_CST)
3679 {
3680 warning (OPT_Wattributes,
3681 "%qE attribute requires an integer constant argument",
3682 name);
3683 *no_add_attrs = true;
3684 }
3685 else if (compare_tree_int (cst, 0) != 0
3686 && compare_tree_int (cst, 1) != 0)
3687 {
3688 warning (OPT_Wattributes,
3689 "argument to %qE attribute is neither zero, nor one",
3690 name);
3691 *no_add_attrs = true;
3692 }
3693
3694 return NULL_TREE;
3695 }
3696
3697 return NULL_TREE;
3698}
3699
3700/* Handle a "ms_abi" or "sysv" attribute; arguments as in
3701 struct attribute_spec.handler. */
3702
3703static tree
3704ix86_handle_abi_attribute (tree *node, tree name, tree, int,
3705 bool *no_add_attrs)
3706{
3707 if (TREE_CODE (*node) != FUNCTION_TYPE
3708 && TREE_CODE (*node) != METHOD_TYPE
3709 && TREE_CODE (*node) != FIELD_DECL
3710 && TREE_CODE (*node) != TYPE_DECL)
3711 {
3712 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3713 name);
3714 *no_add_attrs = true;
3715 return NULL_TREE;
3716 }
3717
3718 /* Can combine regparm with all attributes but fastcall. */
3719 if (is_attribute_p ("ms_abi", name))
3720 {
3721 if (lookup_attribute ("sysv_abi", TYPE_ATTRIBUTES (*node)))
3722 {
a9c697b8
MS		 3723 error ("%qs and %qs attributes are not compatible",
3724 "ms_abi", "sysv_abi");
2bf6d935
ML		 3725 }
3726
3727 return NULL_TREE;
3728 }
3729 else if (is_attribute_p ("sysv_abi", name))
3730 {
3731 if (lookup_attribute ("ms_abi", TYPE_ATTRIBUTES (*node)))
3732 {
a9c697b8
MS		 3733 error ("%qs and %qs attributes are not compatible",
3734 "ms_abi", "sysv_abi");
2bf6d935
ML		 3735 }
3736
3737 return NULL_TREE;
3738 }
3739
3740 return NULL_TREE;
3741}
3742
3743static tree
3744ix86_handle_fndecl_attribute (tree *node, tree name, tree args, int,
3745 bool *no_add_attrs)
3746{
3747 if (TREE_CODE (*node) != FUNCTION_DECL)
3748 {
3749 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3750 name);
3751 *no_add_attrs = true;
3752 }
3753
3754 if (is_attribute_p ("indirect_branch", name))
3755 {
3756 tree cst = TREE_VALUE (args);
3757 if (TREE_CODE (cst) != STRING_CST)
3758 {
3759 warning (OPT_Wattributes,
3760 "%qE attribute requires a string constant argument",
3761 name);
3762 *no_add_attrs = true;
3763 }
3764 else if (strcmp (TREE_STRING_POINTER (cst), "keep") != 0
3765 && strcmp (TREE_STRING_POINTER (cst), "thunk") != 0
3766 && strcmp (TREE_STRING_POINTER (cst), "thunk-inline") != 0
3767 && strcmp (TREE_STRING_POINTER (cst), "thunk-extern") != 0)
3768 {
3769 warning (OPT_Wattributes,
3770 "argument to %qE attribute is not "
3771 "(keep|thunk|thunk-inline|thunk-extern)", name);
3772 *no_add_attrs = true;
3773 }
3774 }
3775
3776 if (is_attribute_p ("function_return", name))
3777 {
3778 tree cst = TREE_VALUE (args);
3779 if (TREE_CODE (cst) != STRING_CST)
3780 {
3781 warning (OPT_Wattributes,
3782 "%qE attribute requires a string constant argument",
3783 name);
3784 *no_add_attrs = true;
3785 }
3786 else if (strcmp (TREE_STRING_POINTER (cst), "keep") != 0
3787 && strcmp (TREE_STRING_POINTER (cst), "thunk") != 0
3788 && strcmp (TREE_STRING_POINTER (cst), "thunk-inline") != 0
3789 && strcmp (TREE_STRING_POINTER (cst), "thunk-extern") != 0)
3790 {
3791 warning (OPT_Wattributes,
3792 "argument to %qE attribute is not "
3793 "(keep|thunk|thunk-inline|thunk-extern)", name);
3794 *no_add_attrs = true;
3795 }
3796 }
3797
3798 return NULL_TREE;
3799}
3800
3801static tree
3802ix86_handle_no_caller_saved_registers_attribute (tree *, tree, tree,
3803 int, bool *)
3804{
3805 return NULL_TREE;
3806}
3807
3808static tree
3809ix86_handle_interrupt_attribute (tree *node, tree, tree, int, bool *)
3810{
3811 /* DECL_RESULT and DECL_ARGUMENTS do not exist there yet,
3812 but the function type contains args and return type data. */
3813 tree func_type = *node;
3814 tree return_type = TREE_TYPE (func_type);
3815
3816 int nargs = 0;
3817 tree current_arg_type = TYPE_ARG_TYPES (func_type);
3818 while (current_arg_type
3819 && ! VOID_TYPE_P (TREE_VALUE (current_arg_type)))
3820 {
3821 if (nargs == 0)
3822 {
3823 if (! POINTER_TYPE_P (TREE_VALUE (current_arg_type)))
3824 error ("interrupt service routine should have a pointer "
3825 "as the first argument");
3826 }
3827 else if (nargs == 1)
3828 {
3829 if (TREE_CODE (TREE_VALUE (current_arg_type)) != INTEGER_TYPE
3830 || TYPE_MODE (TREE_VALUE (current_arg_type)) != word_mode)
3831 error ("interrupt service routine should have %qs "
3832 "as the second argument",
3833 TARGET_64BIT
3834 ? (TARGET_X32 ? "unsigned long long int"
3835 : "unsigned long int")
3836 : "unsigned int");
3837 }
3838 nargs++;
3839 current_arg_type = TREE_CHAIN (current_arg_type);
3840 }
3841 if (!nargs || nargs > 2)
3842 error ("interrupt service routine can only have a pointer argument "
3843 "and an optional integer argument");
3844 if (! VOID_TYPE_P (return_type))
a9c697b8 3845 error ("interrupt service routine must return %<void%>");
2bf6d935
ML		 3846
3847 return NULL_TREE;
3848}
3849
3850/* Handle fentry_name / fentry_section attribute. */
3851
3852static tree
3853ix86_handle_fentry_name (tree *node, tree name, tree args,
3854 int, bool *no_add_attrs)
3855{
3856 if (TREE_CODE (*node) == FUNCTION_DECL
3857 && TREE_CODE (TREE_VALUE (args)) == STRING_CST)
3858 /* Do nothing else, just set the attribute. We'll get at
3859 it later with lookup_attribute. */
3860 ;
3861 else
3862 {
3863 warning (OPT_Wattributes, "%qE attribute ignored", name);
3864 *no_add_attrs = true;
3865 }
3866
3867 return NULL_TREE;
3868}
3869
3870/* Table of valid machine attributes. */
3871const struct attribute_spec ix86_attribute_table[] =
3872{
3873 /* { name, min_len, max_len, decl_req, type_req, fn_type_req,
3874 affects_type_identity, handler, exclude } */
3875 /* Stdcall attribute says callee is responsible for popping arguments
3876 if they are not variable. */
3877 { "stdcall", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3878 NULL },
3879 /* Fastcall attribute says callee is responsible for popping arguments
3880 if they are not variable. */
3881 { "fastcall", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3882 NULL },
3883 /* Thiscall attribute says callee is responsible for popping arguments
3884 if they are not variable. */
3885 { "thiscall", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3886 NULL },
3887 /* Cdecl attribute says the callee is a normal C declaration */
3888 { "cdecl", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3889 NULL },
3890 /* Regparm attribute specifies how many integer arguments are to be
3891 passed in registers. */
3892 { "regparm", 1, 1, false, true, true, true, ix86_handle_cconv_attribute,
3893 NULL },
3894 /* Sseregparm attribute says we are using x86_64 calling conventions
3895 for FP arguments. */
3896 { "sseregparm", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3897 NULL },
3898 /* The transactional memory builtins are implicitly regparm or fastcall
3899 depending on the ABI. Override the generic do-nothing attribute that
3900 these builtins were declared with. */
3901 { "*tm regparm", 0, 0, false, true, true, true,
3902 ix86_handle_tm_regparm_attribute, NULL },
3903 /* force_align_arg_pointer says this function realigns the stack at entry. */
3904 { "force_align_arg_pointer", 0, 0,
3905 false, true, true, false, ix86_handle_force_align_arg_pointer_attribute,
3906 NULL },
3907#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
3908 { "dllimport", 0, 0, false, false, false, false, handle_dll_attribute,
3909 NULL },
3910 { "dllexport", 0, 0, false, false, false, false, handle_dll_attribute,
3911 NULL },
3912 { "shared", 0, 0, true, false, false, false,
3913 ix86_handle_shared_attribute, NULL },
3914#endif
3915 { "ms_struct", 0, 0, false, false, false, false,
3916 ix86_handle_struct_attribute, NULL },
3917 { "gcc_struct", 0, 0, false, false, false, false,
3918 ix86_handle_struct_attribute, NULL },
3919#ifdef SUBTARGET_ATTRIBUTE_TABLE
3920 SUBTARGET_ATTRIBUTE_TABLE,
3921#endif
3922 /* ms_abi and sysv_abi calling convention function attributes. */
3923 { "ms_abi", 0, 0, false, true, true, true, ix86_handle_abi_attribute, NULL },
3924 { "sysv_abi", 0, 0, false, true, true, true, ix86_handle_abi_attribute,
3925 NULL },
3926 { "ms_abi va_list", 0, 0, false, false, false, false, NULL, NULL },
3927 { "sysv_abi va_list", 0, 0, false, false, false, false, NULL, NULL },
3928 { "ms_hook_prologue", 0, 0, true, false, false, false,
3929 ix86_handle_fndecl_attribute, NULL },
3930 { "callee_pop_aggregate_return", 1, 1, false, true, true, true,
3931 ix86_handle_callee_pop_aggregate_return, NULL },
3932 { "interrupt", 0, 0, false, true, true, false,
3933 ix86_handle_interrupt_attribute, NULL },
3934 { "no_caller_saved_registers", 0, 0, false, true, true, false,
3935 ix86_handle_no_caller_saved_registers_attribute, NULL },
3936 { "naked", 0, 0, true, false, false, false,
3937 ix86_handle_fndecl_attribute, NULL },
3938 { "indirect_branch", 1, 1, true, false, false, false,
3939 ix86_handle_fndecl_attribute, NULL },
3940 { "function_return", 1, 1, true, false, false, false,
3941 ix86_handle_fndecl_attribute, NULL },
3942 { "indirect_return", 0, 0, false, true, true, false,
3943 NULL, NULL },
3944 { "fentry_name", 1, 1, true, false, false, false,
3945 ix86_handle_fentry_name, NULL },
3946 { "fentry_section", 1, 1, true, false, false, false,
3947 ix86_handle_fentry_name, NULL },
3948 { "cf_check", 0, 0, true, false, false, false,
3949 ix86_handle_fndecl_attribute, NULL },
3950
3951 /* End element. */
3952 { NULL, 0, 0, false, false, false, false, NULL, NULL }
3953};
3954
3955#include "gt-i386-options.h"
Mirror of https://gcc.gnu.org/git/gcc.git