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i386: Resolve variable shadowing in i386-options.c [PR98671]
[thirdparty/gcc.git] / gcc / config / i386 / i386-options.c
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99dee823 1/* Copyright (C) 1988-2021 Free Software Foundation, Inc.
2bf6d935
ML
2
3This file is part of GCC.
4
5GCC is free software; you can redistribute it and/or modify
6it under the terms of the GNU General Public License as published by
7the Free Software Foundation; either version 3, or (at your option)
8any later version.
9
10GCC is distributed in the hope that it will be useful,
11but WITHOUT ANY WARRANTY; without even the implied warranty of
12MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13GNU General Public License for more details.
14
15You should have received a copy of the GNU General Public License
16along with GCC; see the file COPYING3. If not see
17<http://www.gnu.org/licenses/>. */
18
19#define IN_TARGET_CODE 1
20
21#include "config.h"
22#include "system.h"
23#include "coretypes.h"
24#include "backend.h"
25#include "rtl.h"
26#include "tree.h"
27#include "memmodel.h"
28#include "gimple.h"
29#include "cfghooks.h"
30#include "cfgloop.h"
31#include "df.h"
32#include "tm_p.h"
33#include "stringpool.h"
34#include "expmed.h"
35#include "optabs.h"
36#include "regs.h"
37#include "emit-rtl.h"
38#include "recog.h"
39#include "cgraph.h"
40#include "diagnostic.h"
41#include "cfgbuild.h"
42#include "alias.h"
43#include "fold-const.h"
44#include "attribs.h"
45#include "calls.h"
46#include "stor-layout.h"
47#include "varasm.h"
48#include "output.h"
49#include "insn-attr.h"
50#include "flags.h"
51#include "except.h"
52#include "explow.h"
53#include "expr.h"
54#include "cfgrtl.h"
55#include "common/common-target.h"
56#include "langhooks.h"
57#include "reload.h"
58#include "gimplify.h"
59#include "dwarf2.h"
60#include "tm-constrs.h"
2bf6d935
ML
61#include "cselib.h"
62#include "sched-int.h"
63#include "opts.h"
64#include "tree-pass.h"
65#include "context.h"
66#include "pass_manager.h"
67#include "target-globals.h"
68#include "gimple-iterator.h"
69#include "tree-vectorizer.h"
70#include "shrink-wrap.h"
71#include "builtins.h"
72#include "rtl-iter.h"
73#include "tree-iterator.h"
74#include "dbgcnt.h"
75#include "case-cfn-macros.h"
76#include "dojump.h"
77#include "fold-const-call.h"
78#include "tree-vrp.h"
79#include "tree-ssanames.h"
80#include "selftest.h"
81#include "selftest-rtl.h"
82#include "print-rtl.h"
83#include "intl.h"
84#include "ifcvt.h"
85#include "symbol-summary.h"
86#include "ipa-prop.h"
87#include "ipa-fnsummary.h"
88#include "wide-int-bitmask.h"
89#include "tree-vector-builder.h"
90#include "debug.h"
91#include "dwarf2out.h"
92#include "i386-options.h"
93
94#include "x86-tune-costs.h"
95
96#ifndef SUBTARGET32_DEFAULT_CPU
97#define SUBTARGET32_DEFAULT_CPU "i386"
98#endif
99
100/* Processor feature/optimization bitmasks. */
101#define m_386 (HOST_WIDE_INT_1U<<PROCESSOR_I386)
102#define m_486 (HOST_WIDE_INT_1U<<PROCESSOR_I486)
103#define m_PENT (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUM)
104#define m_LAKEMONT (HOST_WIDE_INT_1U<<PROCESSOR_LAKEMONT)
105#define m_PPRO (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUMPRO)
106#define m_PENT4 (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUM4)
107#define m_NOCONA (HOST_WIDE_INT_1U<<PROCESSOR_NOCONA)
108#define m_P4_NOCONA (m_PENT4 | m_NOCONA)
109#define m_CORE2 (HOST_WIDE_INT_1U<<PROCESSOR_CORE2)
110#define m_NEHALEM (HOST_WIDE_INT_1U<<PROCESSOR_NEHALEM)
111#define m_SANDYBRIDGE (HOST_WIDE_INT_1U<<PROCESSOR_SANDYBRIDGE)
112#define m_HASWELL (HOST_WIDE_INT_1U<<PROCESSOR_HASWELL)
113#define m_BONNELL (HOST_WIDE_INT_1U<<PROCESSOR_BONNELL)
114#define m_SILVERMONT (HOST_WIDE_INT_1U<<PROCESSOR_SILVERMONT)
115#define m_KNL (HOST_WIDE_INT_1U<<PROCESSOR_KNL)
116#define m_KNM (HOST_WIDE_INT_1U<<PROCESSOR_KNM)
117#define m_SKYLAKE (HOST_WIDE_INT_1U<<PROCESSOR_SKYLAKE)
118#define m_SKYLAKE_AVX512 (HOST_WIDE_INT_1U<<PROCESSOR_SKYLAKE_AVX512)
119#define m_CANNONLAKE (HOST_WIDE_INT_1U<<PROCESSOR_CANNONLAKE)
120#define m_ICELAKE_CLIENT (HOST_WIDE_INT_1U<<PROCESSOR_ICELAKE_CLIENT)
121#define m_ICELAKE_SERVER (HOST_WIDE_INT_1U<<PROCESSOR_ICELAKE_SERVER)
122#define m_CASCADELAKE (HOST_WIDE_INT_1U<<PROCESSOR_CASCADELAKE)
a9fcfec3
HL
123#define m_TIGERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_TIGERLAKE)
124#define m_COOPERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_COOPERLAKE)
ba9c87d3
CL
125#define m_SAPPHIRERAPIDS (HOST_WIDE_INT_1U<<PROCESSOR_SAPPHIRERAPIDS)
126#define m_ALDERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_ALDERLAKE)
2bf6d935 127#define m_CORE_AVX512 (m_SKYLAKE_AVX512 | m_CANNONLAKE \
a9fcfec3 128 | m_ICELAKE_CLIENT | m_ICELAKE_SERVER | m_CASCADELAKE \
ba9c87d3 129 | m_TIGERLAKE | m_COOPERLAKE | m_SAPPHIRERAPIDS)
2bf6d935
ML
130#define m_CORE_AVX2 (m_HASWELL | m_SKYLAKE | m_CORE_AVX512)
131#define m_CORE_ALL (m_CORE2 | m_NEHALEM | m_SANDYBRIDGE | m_CORE_AVX2)
132#define m_GOLDMONT (HOST_WIDE_INT_1U<<PROCESSOR_GOLDMONT)
133#define m_GOLDMONT_PLUS (HOST_WIDE_INT_1U<<PROCESSOR_GOLDMONT_PLUS)
134#define m_TREMONT (HOST_WIDE_INT_1U<<PROCESSOR_TREMONT)
135#define m_INTEL (HOST_WIDE_INT_1U<<PROCESSOR_INTEL)
136
137#define m_GEODE (HOST_WIDE_INT_1U<<PROCESSOR_GEODE)
138#define m_K6 (HOST_WIDE_INT_1U<<PROCESSOR_K6)
139#define m_K6_GEODE (m_K6 | m_GEODE)
140#define m_K8 (HOST_WIDE_INT_1U<<PROCESSOR_K8)
141#define m_ATHLON (HOST_WIDE_INT_1U<<PROCESSOR_ATHLON)
142#define m_ATHLON_K8 (m_K8 | m_ATHLON)
143#define m_AMDFAM10 (HOST_WIDE_INT_1U<<PROCESSOR_AMDFAM10)
144#define m_BDVER1 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER1)
145#define m_BDVER2 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER2)
146#define m_BDVER3 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER3)
147#define m_BDVER4 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER4)
148#define m_ZNVER1 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER1)
149#define m_ZNVER2 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER2)
3e2ae3ee 150#define m_ZNVER3 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER3)
2bf6d935
ML
151#define m_BTVER1 (HOST_WIDE_INT_1U<<PROCESSOR_BTVER1)
152#define m_BTVER2 (HOST_WIDE_INT_1U<<PROCESSOR_BTVER2)
153#define m_BDVER (m_BDVER1 | m_BDVER2 | m_BDVER3 | m_BDVER4)
154#define m_BTVER (m_BTVER1 | m_BTVER2)
3e2ae3ee 155#define m_ZNVER (m_ZNVER1 | m_ZNVER2 | m_ZNVER3)
2bf6d935
ML
156#define m_AMD_MULTIPLE (m_ATHLON_K8 | m_AMDFAM10 | m_BDVER | m_BTVER \
157 | m_ZNVER)
158
159#define m_GENERIC (HOST_WIDE_INT_1U<<PROCESSOR_GENERIC)
160
161const char* ix86_tune_feature_names[X86_TUNE_LAST] = {
162#undef DEF_TUNE
163#define DEF_TUNE(tune, name, selector) name,
164#include "x86-tune.def"
165#undef DEF_TUNE
166};
167
168/* Feature tests against the various tunings. */
169unsigned char ix86_tune_features[X86_TUNE_LAST];
170
171/* Feature tests against the various tunings used to create ix86_tune_features
172 based on the processor mask. */
173static unsigned HOST_WIDE_INT initial_ix86_tune_features[X86_TUNE_LAST] = {
174#undef DEF_TUNE
175#define DEF_TUNE(tune, name, selector) selector,
176#include "x86-tune.def"
177#undef DEF_TUNE
178};
179
180/* Feature tests against the various architecture variations. */
181unsigned char ix86_arch_features[X86_ARCH_LAST];
182
9ba66bf5
JJ
183struct ix86_target_opts
184{
185 const char *option; /* option string */
186 HOST_WIDE_INT mask; /* isa mask options */
187};
188
189/* This table is ordered so that options like -msse4.2 that imply other
190 ISAs come first. Target string will be displayed in the same order. */
191static struct ix86_target_opts isa2_opts[] =
192{
8cf86e14
HL
193 { "-mcx16", OPTION_MASK_ISA2_CX16 },
194 { "-mvaes", OPTION_MASK_ISA2_VAES },
195 { "-mrdpid", OPTION_MASK_ISA2_RDPID },
196 { "-mpconfig", OPTION_MASK_ISA2_PCONFIG },
197 { "-mwbnoinvd", OPTION_MASK_ISA2_WBNOINVD },
198 { "-mavx512vp2intersect", OPTION_MASK_ISA2_AVX512VP2INTERSECT },
199 { "-msgx", OPTION_MASK_ISA2_SGX },
200 { "-mavx5124vnniw", OPTION_MASK_ISA2_AVX5124VNNIW },
201 { "-mavx5124fmaps", OPTION_MASK_ISA2_AVX5124FMAPS },
202 { "-mhle", OPTION_MASK_ISA2_HLE },
203 { "-mmovbe", OPTION_MASK_ISA2_MOVBE },
204 { "-mclzero", OPTION_MASK_ISA2_CLZERO },
205 { "-mmwaitx", OPTION_MASK_ISA2_MWAITX },
206 { "-mmovdir64b", OPTION_MASK_ISA2_MOVDIR64B },
207 { "-mwaitpkg", OPTION_MASK_ISA2_WAITPKG },
208 { "-mcldemote", OPTION_MASK_ISA2_CLDEMOTE },
209 { "-mptwrite", OPTION_MASK_ISA2_PTWRITE },
210 { "-mavx512bf16", OPTION_MASK_ISA2_AVX512BF16 },
366386c7 211 { "-menqcmd", OPTION_MASK_ISA2_ENQCMD },
1e47cb35 212 { "-mserialize", OPTION_MASK_ISA2_SERIALIZE },
5c609842 213 { "-mtsxldtrk", OPTION_MASK_ISA2_TSXLDTRK },
214 { "-mamx-tile", OPTION_MASK_ISA2_AMX_TILE },
215 { "-mamx-int8", OPTION_MASK_ISA2_AMX_INT8 },
299a53d7 216 { "-mamx-bf16", OPTION_MASK_ISA2_AMX_BF16 },
83927c63 217 { "-muintr", OPTION_MASK_ISA2_UINTR },
632a2f50 218 { "-mhreset", OPTION_MASK_ISA2_HRESET },
219 { "-mkl", OPTION_MASK_ISA2_KL },
ca813880 220 { "-mwidekl", OPTION_MASK_ISA2_WIDEKL },
221 { "-mavxvnni", OPTION_MASK_ISA2_AVXVNNI }
9ba66bf5
JJ
222};
223static struct ix86_target_opts isa_opts[] =
224{
225 { "-mavx512vpopcntdq", OPTION_MASK_ISA_AVX512VPOPCNTDQ },
226 { "-mavx512bitalg", OPTION_MASK_ISA_AVX512BITALG },
227 { "-mvpclmulqdq", OPTION_MASK_ISA_VPCLMULQDQ },
228 { "-mgfni", OPTION_MASK_ISA_GFNI },
229 { "-mavx512vnni", OPTION_MASK_ISA_AVX512VNNI },
230 { "-mavx512vbmi2", OPTION_MASK_ISA_AVX512VBMI2 },
231 { "-mavx512vbmi", OPTION_MASK_ISA_AVX512VBMI },
232 { "-mavx512ifma", OPTION_MASK_ISA_AVX512IFMA },
233 { "-mavx512vl", OPTION_MASK_ISA_AVX512VL },
234 { "-mavx512bw", OPTION_MASK_ISA_AVX512BW },
235 { "-mavx512dq", OPTION_MASK_ISA_AVX512DQ },
236 { "-mavx512er", OPTION_MASK_ISA_AVX512ER },
237 { "-mavx512pf", OPTION_MASK_ISA_AVX512PF },
238 { "-mavx512cd", OPTION_MASK_ISA_AVX512CD },
239 { "-mavx512f", OPTION_MASK_ISA_AVX512F },
240 { "-mavx2", OPTION_MASK_ISA_AVX2 },
241 { "-mfma", OPTION_MASK_ISA_FMA },
242 { "-mxop", OPTION_MASK_ISA_XOP },
243 { "-mfma4", OPTION_MASK_ISA_FMA4 },
244 { "-mf16c", OPTION_MASK_ISA_F16C },
245 { "-mavx", OPTION_MASK_ISA_AVX },
246/*{ "-msse4" OPTION_MASK_ISA_SSE4 }, */
247 { "-msse4.2", OPTION_MASK_ISA_SSE4_2 },
248 { "-msse4.1", OPTION_MASK_ISA_SSE4_1 },
249 { "-msse4a", OPTION_MASK_ISA_SSE4A },
250 { "-mssse3", OPTION_MASK_ISA_SSSE3 },
251 { "-msse3", OPTION_MASK_ISA_SSE3 },
252 { "-maes", OPTION_MASK_ISA_AES },
253 { "-msha", OPTION_MASK_ISA_SHA },
254 { "-mpclmul", OPTION_MASK_ISA_PCLMUL },
255 { "-msse2", OPTION_MASK_ISA_SSE2 },
256 { "-msse", OPTION_MASK_ISA_SSE },
257 { "-m3dnowa", OPTION_MASK_ISA_3DNOW_A },
258 { "-m3dnow", OPTION_MASK_ISA_3DNOW },
259 { "-mmmx", OPTION_MASK_ISA_MMX },
260 { "-mrtm", OPTION_MASK_ISA_RTM },
261 { "-mprfchw", OPTION_MASK_ISA_PRFCHW },
262 { "-mrdseed", OPTION_MASK_ISA_RDSEED },
263 { "-madx", OPTION_MASK_ISA_ADX },
264 { "-mprefetchwt1", OPTION_MASK_ISA_PREFETCHWT1 },
265 { "-mclflushopt", OPTION_MASK_ISA_CLFLUSHOPT },
266 { "-mxsaves", OPTION_MASK_ISA_XSAVES },
267 { "-mxsavec", OPTION_MASK_ISA_XSAVEC },
268 { "-mxsaveopt", OPTION_MASK_ISA_XSAVEOPT },
269 { "-mxsave", OPTION_MASK_ISA_XSAVE },
270 { "-mabm", OPTION_MASK_ISA_ABM },
271 { "-mbmi", OPTION_MASK_ISA_BMI },
272 { "-mbmi2", OPTION_MASK_ISA_BMI2 },
273 { "-mlzcnt", OPTION_MASK_ISA_LZCNT },
274 { "-mtbm", OPTION_MASK_ISA_TBM },
275 { "-mpopcnt", OPTION_MASK_ISA_POPCNT },
276 { "-msahf", OPTION_MASK_ISA_SAHF },
277 { "-mcrc32", OPTION_MASK_ISA_CRC32 },
278 { "-mfsgsbase", OPTION_MASK_ISA_FSGSBASE },
279 { "-mrdrnd", OPTION_MASK_ISA_RDRND },
280 { "-mpku", OPTION_MASK_ISA_PKU },
281 { "-mlwp", OPTION_MASK_ISA_LWP },
282 { "-mfxsr", OPTION_MASK_ISA_FXSR },
283 { "-mclwb", OPTION_MASK_ISA_CLWB },
284 { "-mshstk", OPTION_MASK_ISA_SHSTK },
285 { "-mmovdiri", OPTION_MASK_ISA_MOVDIRI }
286};
287
288/* Return 1 if TRAIT NAME is present in the OpenMP context's
289 device trait set, return 0 if not present in any OpenMP context in the
290 whole translation unit, or -1 if not present in the current OpenMP context
291 but might be present in another OpenMP context in the same TU. */
292
293int
294ix86_omp_device_kind_arch_isa (enum omp_device_kind_arch_isa trait,
295 const char *name)
296{
297 switch (trait)
298 {
299 case omp_device_kind:
300 return strcmp (name, "cpu") == 0;
301 case omp_device_arch:
302 if (strcmp (name, "x86") == 0)
303 return 1;
304 if (TARGET_64BIT)
305 {
306 if (TARGET_X32)
307 return strcmp (name, "x32") == 0;
308 else
309 return strcmp (name, "x86_64") == 0;
310 }
311 if (strcmp (name, "ia32") == 0 || strcmp (name, "i386") == 0)
312 return 1;
313 if (strcmp (name, "i486") == 0)
314 return ix86_arch != PROCESSOR_I386 ? 1 : -1;
315 if (strcmp (name, "i586") == 0)
316 return (ix86_arch != PROCESSOR_I386
317 && ix86_arch != PROCESSOR_I486) ? 1 : -1;
318 if (strcmp (name, "i686") == 0)
319 return (ix86_arch != PROCESSOR_I386
320 && ix86_arch != PROCESSOR_I486
321 && ix86_arch != PROCESSOR_LAKEMONT
322 && ix86_arch != PROCESSOR_PENTIUM) ? 1 : -1;
323 return 0;
324 case omp_device_isa:
325 for (int i = 0; i < 2; i++)
326 {
327 struct ix86_target_opts *opts = i ? isa2_opts : isa_opts;
328 size_t nopts = i ? ARRAY_SIZE (isa2_opts) : ARRAY_SIZE (isa_opts);
329 HOST_WIDE_INT mask = i ? ix86_isa_flags2 : ix86_isa_flags;
330 for (size_t n = 0; n < nopts; n++)
331 {
aa16689e 332 /* Handle sse4 as an alias to sse4.2. */
9ba66bf5
JJ
333 if (opts[n].mask == OPTION_MASK_ISA_SSE4_2)
334 {
9ba66bf5
JJ
335 if (strcmp (name, "sse4") == 0)
336 return (mask & opts[n].mask) != 0 ? 1 : -1;
337 }
aa16689e 338 if (strcmp (name, opts[n].option + 2) == 0)
9ba66bf5
JJ
339 return (mask & opts[n].mask) != 0 ? 1 : -1;
340 }
341 }
342 return 0;
343 default:
344 gcc_unreachable ();
345 }
346}
347
2bf6d935
ML
348/* Return a string that documents the current -m options. The caller is
349 responsible for freeing the string. */
350
351char *
352ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2,
353 int flags, int flags2,
354 const char *arch, const char *tune,
46e6341f
JJ
355 enum fpmath_unit fpmath,
356 enum prefer_vector_width pvw,
357 bool add_nl_p, bool add_abi_p)
2bf6d935 358{
2bf6d935
ML
359 /* Flag options. */
360 static struct ix86_target_opts flag_opts[] =
361 {
362 { "-m128bit-long-double", MASK_128BIT_LONG_DOUBLE },
363 { "-mlong-double-128", MASK_LONG_DOUBLE_128 },
364 { "-mlong-double-64", MASK_LONG_DOUBLE_64 },
365 { "-m80387", MASK_80387 },
366 { "-maccumulate-outgoing-args", MASK_ACCUMULATE_OUTGOING_ARGS },
367 { "-malign-double", MASK_ALIGN_DOUBLE },
368 { "-mcld", MASK_CLD },
369 { "-mfp-ret-in-387", MASK_FLOAT_RETURNS },
370 { "-mieee-fp", MASK_IEEE_FP },
371 { "-minline-all-stringops", MASK_INLINE_ALL_STRINGOPS },
372 { "-minline-stringops-dynamically", MASK_INLINE_STRINGOPS_DYNAMICALLY },
373 { "-mms-bitfields", MASK_MS_BITFIELD_LAYOUT },
374 { "-mno-align-stringops", MASK_NO_ALIGN_STRINGOPS },
375 { "-mno-fancy-math-387", MASK_NO_FANCY_MATH_387 },
376 { "-mno-push-args", MASK_NO_PUSH_ARGS },
377 { "-mno-red-zone", MASK_NO_RED_ZONE },
378 { "-momit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER },
379 { "-mrecip", MASK_RECIP },
380 { "-mrtd", MASK_RTD },
381 { "-msseregparm", MASK_SSEREGPARM },
382 { "-mstack-arg-probe", MASK_STACK_PROBE },
383 { "-mtls-direct-seg-refs", MASK_TLS_DIRECT_SEG_REFS },
384 { "-mvect8-ret-in-mem", MASK_VECT8_RETURNS },
385 { "-m8bit-idiv", MASK_USE_8BIT_IDIV },
386 { "-mvzeroupper", MASK_VZEROUPPER },
387 { "-mstv", MASK_STV },
388 { "-mavx256-split-unaligned-load", MASK_AVX256_SPLIT_UNALIGNED_LOAD },
389 { "-mavx256-split-unaligned-store", MASK_AVX256_SPLIT_UNALIGNED_STORE },
390 { "-mcall-ms2sysv-xlogues", MASK_CALL_MS2SYSV_XLOGUES }
391 };
392
393 /* Additional flag options. */
394 static struct ix86_target_opts flag2_opts[] =
395 {
396 { "-mgeneral-regs-only", OPTION_MASK_GENERAL_REGS_ONLY }
397 };
398
399 const char *opts[ARRAY_SIZE (isa_opts) + ARRAY_SIZE (isa2_opts)
400 + ARRAY_SIZE (flag_opts) + ARRAY_SIZE (flag2_opts) + 6][2];
401
402 char isa_other[40];
403 char isa2_other[40];
404 char flags_other[40];
405 char flags2_other[40];
406 unsigned num = 0;
407 unsigned i, j;
408 char *ret;
409 char *ptr;
410 size_t len;
411 size_t line_len;
412 size_t sep_len;
413 const char *abi;
414
415 memset (opts, '\0', sizeof (opts));
416
417 /* Add -march= option. */
418 if (arch)
419 {
420 opts[num][0] = "-march=";
421 opts[num++][1] = arch;
422 }
423
424 /* Add -mtune= option. */
425 if (tune)
426 {
427 opts[num][0] = "-mtune=";
428 opts[num++][1] = tune;
429 }
430
431 /* Add -m32/-m64/-mx32. */
432 if (add_abi_p)
433 {
434 if ((isa & OPTION_MASK_ISA_64BIT) != 0)
435 {
436 if ((isa & OPTION_MASK_ABI_64) != 0)
437 abi = "-m64";
438 else
439 abi = "-mx32";
440 }
441 else
442 abi = "-m32";
443 opts[num++][0] = abi;
444 }
445 isa &= ~(OPTION_MASK_ISA_64BIT | OPTION_MASK_ABI_64 | OPTION_MASK_ABI_X32);
446
447 /* Pick out the options in isa2 options. */
448 for (i = 0; i < ARRAY_SIZE (isa2_opts); i++)
449 {
450 if ((isa2 & isa2_opts[i].mask) != 0)
451 {
452 opts[num++][0] = isa2_opts[i].option;
453 isa2 &= ~ isa2_opts[i].mask;
454 }
455 }
456
457 if (isa2 && add_nl_p)
458 {
459 opts[num++][0] = isa2_other;
460 sprintf (isa2_other, "(other isa2: %#" HOST_WIDE_INT_PRINT "x)", isa2);
461 }
462
463 /* Pick out the options in isa options. */
464 for (i = 0; i < ARRAY_SIZE (isa_opts); i++)
465 {
466 if ((isa & isa_opts[i].mask) != 0)
467 {
468 opts[num++][0] = isa_opts[i].option;
469 isa &= ~ isa_opts[i].mask;
470 }
471 }
472
473 if (isa && add_nl_p)
474 {
475 opts[num++][0] = isa_other;
476 sprintf (isa_other, "(other isa: %#" HOST_WIDE_INT_PRINT "x)", isa);
477 }
478
479 /* Add flag options. */
480 for (i = 0; i < ARRAY_SIZE (flag_opts); i++)
481 {
482 if ((flags & flag_opts[i].mask) != 0)
483 {
484 opts[num++][0] = flag_opts[i].option;
485 flags &= ~ flag_opts[i].mask;
486 }
487 }
488
489 if (flags && add_nl_p)
490 {
491 opts[num++][0] = flags_other;
492 sprintf (flags_other, "(other flags: %#x)", flags);
493 }
494
495 /* Add additional flag options. */
496 for (i = 0; i < ARRAY_SIZE (flag2_opts); i++)
497 {
498 if ((flags2 & flag2_opts[i].mask) != 0)
499 {
500 opts[num++][0] = flag2_opts[i].option;
501 flags2 &= ~ flag2_opts[i].mask;
502 }
503 }
504
505 if (flags2 && add_nl_p)
506 {
507 opts[num++][0] = flags2_other;
508 sprintf (flags2_other, "(other flags2: %#x)", flags2);
509 }
510
46e6341f 511 /* Add -mfpmath= option. */
2bf6d935
ML
512 if (fpmath)
513 {
514 opts[num][0] = "-mfpmath=";
515 switch ((int) fpmath)
516 {
517 case FPMATH_387:
518 opts[num++][1] = "387";
519 break;
520
521 case FPMATH_SSE:
522 opts[num++][1] = "sse";
523 break;
524
525 case FPMATH_387 | FPMATH_SSE:
526 opts[num++][1] = "sse+387";
527 break;
528
529 default:
530 gcc_unreachable ();
531 }
532 }
533
46e6341f
JJ
534 /* Add -mprefer-vector-width= option. */
535 if (pvw)
536 {
537 opts[num][0] = "-mprefer-vector-width=";
538 switch ((int) pvw)
539 {
540 case PVW_AVX128:
541 opts[num++][1] = "128";
542 break;
543
544 case PVW_AVX256:
545 opts[num++][1] = "256";
546 break;
547
548 case PVW_AVX512:
549 opts[num++][1] = "512";
550 break;
551
552 default:
553 gcc_unreachable ();
554 }
555 }
556
2bf6d935
ML
557 /* Any options? */
558 if (num == 0)
559 return NULL;
560
561 gcc_assert (num < ARRAY_SIZE (opts));
562
563 /* Size the string. */
564 len = 0;
565 sep_len = (add_nl_p) ? 3 : 1;
566 for (i = 0; i < num; i++)
567 {
568 len += sep_len;
569 for (j = 0; j < 2; j++)
570 if (opts[i][j])
571 len += strlen (opts[i][j]);
572 }
573
574 /* Build the string. */
575 ret = ptr = (char *) xmalloc (len);
576 line_len = 0;
577
578 for (i = 0; i < num; i++)
579 {
580 size_t len2[2];
581
582 for (j = 0; j < 2; j++)
583 len2[j] = (opts[i][j]) ? strlen (opts[i][j]) : 0;
584
585 if (i != 0)
586 {
587 *ptr++ = ' ';
588 line_len++;
589
590 if (add_nl_p && line_len + len2[0] + len2[1] > 70)
591 {
592 *ptr++ = '\\';
593 *ptr++ = '\n';
594 line_len = 0;
595 }
596 }
597
598 for (j = 0; j < 2; j++)
599 if (opts[i][j])
600 {
601 memcpy (ptr, opts[i][j], len2[j]);
602 ptr += len2[j];
603 line_len += len2[j];
604 }
605 }
606
607 *ptr = '\0';
608 gcc_assert (ret + len >= ptr);
609
610 return ret;
611}
612
613/* Function that is callable from the debugger to print the current
614 options. */
615void ATTRIBUTE_UNUSED
616ix86_debug_options (void)
617{
618 char *opts = ix86_target_string (ix86_isa_flags, ix86_isa_flags2,
619 target_flags, ix86_target_flags,
46e6341f
JJ
620 ix86_arch_string, ix86_tune_string,
621 ix86_fpmath, prefer_vector_width_type,
622 true, true);
2bf6d935
ML
623
624 if (opts)
625 {
626 fprintf (stderr, "%s\n\n", opts);
627 free (opts);
628 }
629 else
630 fputs ("<no options>\n\n", stderr);
631
632 return;
633}
634
635/* Save the current options */
636
637void
638ix86_function_specific_save (struct cl_target_option *ptr,
ba948b37
JJ
639 struct gcc_options *opts,
640 struct gcc_options */* opts_set */)
2bf6d935
ML
641{
642 ptr->arch = ix86_arch;
643 ptr->schedule = ix86_schedule;
08a4adcf 644 ptr->prefetch_sse = ix86_prefetch_sse;
2bf6d935
ML
645 ptr->tune = ix86_tune;
646 ptr->branch_cost = ix86_branch_cost;
647 ptr->tune_defaulted = ix86_tune_defaulted;
648 ptr->arch_specified = ix86_arch_specified;
649 ptr->x_ix86_isa_flags_explicit = opts->x_ix86_isa_flags_explicit;
650 ptr->x_ix86_isa_flags2_explicit = opts->x_ix86_isa_flags2_explicit;
651 ptr->x_recip_mask_explicit = opts->x_recip_mask_explicit;
652 ptr->x_ix86_arch_string = opts->x_ix86_arch_string;
653 ptr->x_ix86_tune_string = opts->x_ix86_tune_string;
2bf6d935
ML
654 ptr->x_ix86_abi = opts->x_ix86_abi;
655 ptr->x_ix86_asm_dialect = opts->x_ix86_asm_dialect;
656 ptr->x_ix86_branch_cost = opts->x_ix86_branch_cost;
657 ptr->x_ix86_dump_tunes = opts->x_ix86_dump_tunes;
658 ptr->x_ix86_force_align_arg_pointer = opts->x_ix86_force_align_arg_pointer;
659 ptr->x_ix86_force_drap = opts->x_ix86_force_drap;
2bf6d935 660 ptr->x_ix86_recip_name = opts->x_ix86_recip_name;
2bf6d935
ML
661 ptr->x_ix86_section_threshold = opts->x_ix86_section_threshold;
662 ptr->x_ix86_sse2avx = opts->x_ix86_sse2avx;
663 ptr->x_ix86_stack_protector_guard = opts->x_ix86_stack_protector_guard;
664 ptr->x_ix86_stringop_alg = opts->x_ix86_stringop_alg;
665 ptr->x_ix86_tls_dialect = opts->x_ix86_tls_dialect;
666 ptr->x_ix86_tune_ctrl_string = opts->x_ix86_tune_ctrl_string;
667 ptr->x_ix86_tune_memcpy_strategy = opts->x_ix86_tune_memcpy_strategy;
668 ptr->x_ix86_tune_memset_strategy = opts->x_ix86_tune_memset_strategy;
669 ptr->x_ix86_tune_no_default = opts->x_ix86_tune_no_default;
2bf6d935
ML
670
671 /* The fields are char but the variables are not; make sure the
672 values fit in the fields. */
673 gcc_assert (ptr->arch == ix86_arch);
674 gcc_assert (ptr->schedule == ix86_schedule);
675 gcc_assert (ptr->tune == ix86_tune);
676 gcc_assert (ptr->branch_cost == ix86_branch_cost);
677}
678
679/* Feature tests against the various architecture variations, used to create
680 ix86_arch_features based on the processor mask. */
681static unsigned HOST_WIDE_INT initial_ix86_arch_features[X86_ARCH_LAST] = {
682 /* X86_ARCH_CMOV: Conditional move was added for pentiumpro. */
683 ~(m_386 | m_486 | m_PENT | m_LAKEMONT | m_K6),
684
685 /* X86_ARCH_CMPXCHG: Compare and exchange was added for 80486. */
686 ~m_386,
687
688 /* X86_ARCH_CMPXCHG8B: Compare and exchange 8 bytes was added for pentium. */
689 ~(m_386 | m_486),
690
691 /* X86_ARCH_XADD: Exchange and add was added for 80486. */
692 ~m_386,
693
694 /* X86_ARCH_BSWAP: Byteswap was added for 80486. */
695 ~m_386,
696};
697
698/* This table must be in sync with enum processor_type in i386.h. */
699static const struct processor_costs *processor_cost_table[] =
700{
701 &generic_cost,
702 &i386_cost,
703 &i486_cost,
704 &pentium_cost,
705 &lakemont_cost,
706 &pentiumpro_cost,
707 &pentium4_cost,
708 &nocona_cost,
709 &core_cost,
710 &core_cost,
711 &core_cost,
712 &core_cost,
713 &atom_cost,
714 &slm_cost,
715 &slm_cost,
716 &slm_cost,
717 &slm_cost,
718 &slm_cost,
719 &slm_cost,
720 &skylake_cost,
721 &skylake_cost,
722 &skylake_cost,
723 &skylake_cost,
724 &skylake_cost,
725 &skylake_cost,
a9fcfec3
HL
726 &skylake_cost,
727 &skylake_cost,
ba9c87d3
CL
728 &skylake_cost,
729 &skylake_cost,
2bf6d935
ML
730 &intel_cost,
731 &geode_cost,
732 &k6_cost,
733 &athlon_cost,
734 &k8_cost,
735 &amdfam10_cost,
736 &bdver_cost,
737 &bdver_cost,
738 &bdver_cost,
739 &bdver_cost,
740 &btver1_cost,
741 &btver2_cost,
742 &znver1_cost,
3e2ae3ee 743 &znver2_cost,
2bf6d935
ML
744 &znver2_cost
745};
746
747/* Guarantee that the array is aligned with enum processor_type. */
748STATIC_ASSERT (ARRAY_SIZE (processor_cost_table) == PROCESSOR_max);
749
750static bool
751ix86_option_override_internal (bool main_args_p,
752 struct gcc_options *opts,
753 struct gcc_options *opts_set);
754static void
1e964774
L
755set_ix86_tune_features (struct gcc_options *opts,
756 enum processor_type ix86_tune, bool dump);
2bf6d935
ML
757
758/* Restore the current options */
759
760void
761ix86_function_specific_restore (struct gcc_options *opts,
ba948b37 762 struct gcc_options */* opts_set */,
2bf6d935
ML
763 struct cl_target_option *ptr)
764{
765 enum processor_type old_tune = ix86_tune;
766 enum processor_type old_arch = ix86_arch;
767 unsigned HOST_WIDE_INT ix86_arch_mask;
768 int i;
769
770 /* We don't change -fPIC. */
771 opts->x_flag_pic = flag_pic;
772
773 ix86_arch = (enum processor_type) ptr->arch;
774 ix86_schedule = (enum attr_cpu) ptr->schedule;
775 ix86_tune = (enum processor_type) ptr->tune;
08a4adcf 776 ix86_prefetch_sse = ptr->prefetch_sse;
2bf6d935
ML
777 ix86_tune_defaulted = ptr->tune_defaulted;
778 ix86_arch_specified = ptr->arch_specified;
779 opts->x_ix86_isa_flags_explicit = ptr->x_ix86_isa_flags_explicit;
780 opts->x_ix86_isa_flags2_explicit = ptr->x_ix86_isa_flags2_explicit;
781 opts->x_recip_mask_explicit = ptr->x_recip_mask_explicit;
782 opts->x_ix86_arch_string = ptr->x_ix86_arch_string;
783 opts->x_ix86_tune_string = ptr->x_ix86_tune_string;
2bf6d935
ML
784 opts->x_ix86_abi = ptr->x_ix86_abi;
785 opts->x_ix86_asm_dialect = ptr->x_ix86_asm_dialect;
786 opts->x_ix86_branch_cost = ptr->x_ix86_branch_cost;
787 opts->x_ix86_dump_tunes = ptr->x_ix86_dump_tunes;
788 opts->x_ix86_force_align_arg_pointer = ptr->x_ix86_force_align_arg_pointer;
789 opts->x_ix86_force_drap = ptr->x_ix86_force_drap;
2bf6d935 790 opts->x_ix86_recip_name = ptr->x_ix86_recip_name;
2bf6d935
ML
791 opts->x_ix86_section_threshold = ptr->x_ix86_section_threshold;
792 opts->x_ix86_sse2avx = ptr->x_ix86_sse2avx;
793 opts->x_ix86_stack_protector_guard = ptr->x_ix86_stack_protector_guard;
794 opts->x_ix86_stringop_alg = ptr->x_ix86_stringop_alg;
795 opts->x_ix86_tls_dialect = ptr->x_ix86_tls_dialect;
796 opts->x_ix86_tune_ctrl_string = ptr->x_ix86_tune_ctrl_string;
797 opts->x_ix86_tune_memcpy_strategy = ptr->x_ix86_tune_memcpy_strategy;
798 opts->x_ix86_tune_memset_strategy = ptr->x_ix86_tune_memset_strategy;
799 opts->x_ix86_tune_no_default = ptr->x_ix86_tune_no_default;
2bf6d935
ML
800 ix86_tune_cost = processor_cost_table[ix86_tune];
801 /* TODO: ix86_cost should be chosen at instruction or function granuality
802 so for cold code we use size_cost even in !optimize_size compilation. */
803 if (opts->x_optimize_size)
804 ix86_cost = &ix86_size_cost;
805 else
806 ix86_cost = ix86_tune_cost;
807
808 /* Recreate the arch feature tests if the arch changed */
809 if (old_arch != ix86_arch)
810 {
811 ix86_arch_mask = HOST_WIDE_INT_1U << ix86_arch;
812 for (i = 0; i < X86_ARCH_LAST; ++i)
813 ix86_arch_features[i]
814 = !!(initial_ix86_arch_features[i] & ix86_arch_mask);
815 }
816
817 /* Recreate the tune optimization tests */
818 if (old_tune != ix86_tune)
1e964774 819 set_ix86_tune_features (opts, ix86_tune, false);
2bf6d935
ML
820}
821
822/* Adjust target options after streaming them in. This is mainly about
823 reconciling them with global options. */
824
825void
826ix86_function_specific_post_stream_in (struct cl_target_option *ptr)
827{
828 /* flag_pic is a global option, but ix86_cmodel is target saved option
829 partly computed from flag_pic. If flag_pic is on, adjust x_ix86_cmodel
830 for PIC, or error out. */
831 if (flag_pic)
832 switch (ptr->x_ix86_cmodel)
833 {
834 case CM_SMALL:
835 ptr->x_ix86_cmodel = CM_SMALL_PIC;
836 break;
837
838 case CM_MEDIUM:
839 ptr->x_ix86_cmodel = CM_MEDIUM_PIC;
840 break;
841
842 case CM_LARGE:
843 ptr->x_ix86_cmodel = CM_LARGE_PIC;
844 break;
845
846 case CM_KERNEL:
847 error ("code model %s does not support PIC mode", "kernel");
848 break;
849
850 default:
851 break;
852 }
853 else
854 switch (ptr->x_ix86_cmodel)
855 {
856 case CM_SMALL_PIC:
857 ptr->x_ix86_cmodel = CM_SMALL;
858 break;
859
860 case CM_MEDIUM_PIC:
861 ptr->x_ix86_cmodel = CM_MEDIUM;
862 break;
863
864 case CM_LARGE_PIC:
865 ptr->x_ix86_cmodel = CM_LARGE;
866 break;
867
868 default:
869 break;
870 }
871}
872
873/* Print the current options */
874
875void
876ix86_function_specific_print (FILE *file, int indent,
877 struct cl_target_option *ptr)
878{
879 char *target_string
880 = ix86_target_string (ptr->x_ix86_isa_flags, ptr->x_ix86_isa_flags2,
881 ptr->x_target_flags, ptr->x_ix86_target_flags,
46e6341f
JJ
882 NULL, NULL, ptr->x_ix86_fpmath,
883 ptr->x_prefer_vector_width_type, false, true);
2bf6d935
ML
884
885 gcc_assert (ptr->arch < PROCESSOR_max);
886 fprintf (file, "%*sarch = %d (%s)\n",
887 indent, "",
888 ptr->arch, processor_names[ptr->arch]);
889
890 gcc_assert (ptr->tune < PROCESSOR_max);
891 fprintf (file, "%*stune = %d (%s)\n",
892 indent, "",
893 ptr->tune, processor_names[ptr->tune]);
894
895 fprintf (file, "%*sbranch_cost = %d\n", indent, "", ptr->branch_cost);
896
897 if (target_string)
898 {
899 fprintf (file, "%*s%s\n", indent, "", target_string);
900 free (target_string);
901 }
902}
903
904\f
905/* Inner function to process the attribute((target(...))), take an argument and
906 set the current options from the argument. If we have a list, recursively go
907 over the list. */
908
909static bool
910ix86_valid_target_attribute_inner_p (tree fndecl, tree args, char *p_strings[],
911 struct gcc_options *opts,
912 struct gcc_options *opts_set,
913 struct gcc_options *enum_opts_set,
914 bool target_clone_attr)
915{
916 char *next_optstr;
917 bool ret = true;
918
919#define IX86_ATTR_ISA(S,O) { S, sizeof (S)-1, ix86_opt_isa, O, 0 }
920#define IX86_ATTR_STR(S,O) { S, sizeof (S)-1, ix86_opt_str, O, 0 }
921#define IX86_ATTR_ENUM(S,O) { S, sizeof (S)-1, ix86_opt_enum, O, 0 }
922#define IX86_ATTR_YES(S,O,M) { S, sizeof (S)-1, ix86_opt_yes, O, M }
923#define IX86_ATTR_NO(S,O,M) { S, sizeof (S)-1, ix86_opt_no, O, M }
87c753ac
L
924#define IX86_ATTR_IX86_YES(S,O,M) \
925 { S, sizeof (S)-1, ix86_opt_ix86_yes, O, M }
926#define IX86_ATTR_IX86_NO(S,O,M) \
927 { S, sizeof (S)-1, ix86_opt_ix86_no, O, M }
2bf6d935
ML
928
929 enum ix86_opt_type
930 {
931 ix86_opt_unknown,
932 ix86_opt_yes,
933 ix86_opt_no,
87c753ac
L
934 ix86_opt_ix86_yes,
935 ix86_opt_ix86_no,
2bf6d935
ML
936 ix86_opt_str,
937 ix86_opt_enum,
938 ix86_opt_isa
939 };
940
941 static const struct
942 {
943 const char *string;
944 size_t len;
945 enum ix86_opt_type type;
946 int opt;
947 int mask;
948 } attrs[] = {
949 /* isa options */
950 IX86_ATTR_ISA ("pconfig", OPT_mpconfig),
951 IX86_ATTR_ISA ("wbnoinvd", OPT_mwbnoinvd),
952 IX86_ATTR_ISA ("sgx", OPT_msgx),
953 IX86_ATTR_ISA ("avx5124fmaps", OPT_mavx5124fmaps),
954 IX86_ATTR_ISA ("avx5124vnniw", OPT_mavx5124vnniw),
955 IX86_ATTR_ISA ("avx512vpopcntdq", OPT_mavx512vpopcntdq),
956 IX86_ATTR_ISA ("avx512vbmi2", OPT_mavx512vbmi2),
957 IX86_ATTR_ISA ("avx512vnni", OPT_mavx512vnni),
958 IX86_ATTR_ISA ("avx512bitalg", OPT_mavx512bitalg),
e21b52af 959 IX86_ATTR_ISA ("avx512vp2intersect", OPT_mavx512vp2intersect),
2bf6d935
ML
960
961 IX86_ATTR_ISA ("avx512vbmi", OPT_mavx512vbmi),
962 IX86_ATTR_ISA ("avx512ifma", OPT_mavx512ifma),
963 IX86_ATTR_ISA ("avx512vl", OPT_mavx512vl),
964 IX86_ATTR_ISA ("avx512bw", OPT_mavx512bw),
965 IX86_ATTR_ISA ("avx512dq", OPT_mavx512dq),
966 IX86_ATTR_ISA ("avx512er", OPT_mavx512er),
967 IX86_ATTR_ISA ("avx512pf", OPT_mavx512pf),
968 IX86_ATTR_ISA ("avx512cd", OPT_mavx512cd),
969 IX86_ATTR_ISA ("avx512f", OPT_mavx512f),
970 IX86_ATTR_ISA ("avx2", OPT_mavx2),
971 IX86_ATTR_ISA ("fma", OPT_mfma),
972 IX86_ATTR_ISA ("xop", OPT_mxop),
973 IX86_ATTR_ISA ("fma4", OPT_mfma4),
974 IX86_ATTR_ISA ("f16c", OPT_mf16c),
975 IX86_ATTR_ISA ("avx", OPT_mavx),
976 IX86_ATTR_ISA ("sse4", OPT_msse4),
977 IX86_ATTR_ISA ("sse4.2", OPT_msse4_2),
978 IX86_ATTR_ISA ("sse4.1", OPT_msse4_1),
979 IX86_ATTR_ISA ("sse4a", OPT_msse4a),
980 IX86_ATTR_ISA ("ssse3", OPT_mssse3),
981 IX86_ATTR_ISA ("sse3", OPT_msse3),
982 IX86_ATTR_ISA ("aes", OPT_maes),
983 IX86_ATTR_ISA ("sha", OPT_msha),
984 IX86_ATTR_ISA ("pclmul", OPT_mpclmul),
985 IX86_ATTR_ISA ("sse2", OPT_msse2),
986 IX86_ATTR_ISA ("sse", OPT_msse),
987 IX86_ATTR_ISA ("3dnowa", OPT_m3dnowa),
988 IX86_ATTR_ISA ("3dnow", OPT_m3dnow),
989 IX86_ATTR_ISA ("mmx", OPT_mmmx),
990 IX86_ATTR_ISA ("rtm", OPT_mrtm),
991 IX86_ATTR_ISA ("prfchw", OPT_mprfchw),
992 IX86_ATTR_ISA ("rdseed", OPT_mrdseed),
993 IX86_ATTR_ISA ("adx", OPT_madx),
994 IX86_ATTR_ISA ("prefetchwt1", OPT_mprefetchwt1),
995 IX86_ATTR_ISA ("clflushopt", OPT_mclflushopt),
996 IX86_ATTR_ISA ("xsaves", OPT_mxsaves),
997 IX86_ATTR_ISA ("xsavec", OPT_mxsavec),
998 IX86_ATTR_ISA ("xsaveopt", OPT_mxsaveopt),
999 IX86_ATTR_ISA ("xsave", OPT_mxsave),
1000 IX86_ATTR_ISA ("abm", OPT_mabm),
1001 IX86_ATTR_ISA ("bmi", OPT_mbmi),
1002 IX86_ATTR_ISA ("bmi2", OPT_mbmi2),
1003 IX86_ATTR_ISA ("lzcnt", OPT_mlzcnt),
1004 IX86_ATTR_ISA ("tbm", OPT_mtbm),
1005 IX86_ATTR_ISA ("popcnt", OPT_mpopcnt),
1006 IX86_ATTR_ISA ("cx16", OPT_mcx16),
1007 IX86_ATTR_ISA ("sahf", OPT_msahf),
1008 IX86_ATTR_ISA ("movbe", OPT_mmovbe),
1009 IX86_ATTR_ISA ("crc32", OPT_mcrc32),
1010 IX86_ATTR_ISA ("fsgsbase", OPT_mfsgsbase),
1011 IX86_ATTR_ISA ("rdrnd", OPT_mrdrnd),
1012 IX86_ATTR_ISA ("mwaitx", OPT_mmwaitx),
1013 IX86_ATTR_ISA ("clzero", OPT_mclzero),
1014 IX86_ATTR_ISA ("pku", OPT_mpku),
1015 IX86_ATTR_ISA ("lwp", OPT_mlwp),
1016 IX86_ATTR_ISA ("hle", OPT_mhle),
1017 IX86_ATTR_ISA ("fxsr", OPT_mfxsr),
1018 IX86_ATTR_ISA ("clwb", OPT_mclwb),
1019 IX86_ATTR_ISA ("rdpid", OPT_mrdpid),
1020 IX86_ATTR_ISA ("gfni", OPT_mgfni),
1021 IX86_ATTR_ISA ("shstk", OPT_mshstk),
1022 IX86_ATTR_ISA ("vaes", OPT_mvaes),
1023 IX86_ATTR_ISA ("vpclmulqdq", OPT_mvpclmulqdq),
1024 IX86_ATTR_ISA ("movdiri", OPT_mmovdiri),
1025 IX86_ATTR_ISA ("movdir64b", OPT_mmovdir64b),
1026 IX86_ATTR_ISA ("waitpkg", OPT_mwaitpkg),
1027 IX86_ATTR_ISA ("cldemote", OPT_mcldemote),
299a53d7 1028 IX86_ATTR_ISA ("uintr", OPT_muintr),
2bf6d935 1029 IX86_ATTR_ISA ("ptwrite", OPT_mptwrite),
632a2f50 1030 IX86_ATTR_ISA ("kl", OPT_mkl),
1031 IX86_ATTR_ISA ("widekl", OPT_mwidekl),
4f0e90fa 1032 IX86_ATTR_ISA ("avx512bf16", OPT_mavx512bf16),
6a10feda 1033 IX86_ATTR_ISA ("enqcmd", OPT_menqcmd),
366386c7 1034 IX86_ATTR_ISA ("serialize", OPT_mserialize),
1e47cb35 1035 IX86_ATTR_ISA ("tsxldtrk", OPT_mtsxldtrk),
5c609842 1036 IX86_ATTR_ISA ("amx-tile", OPT_mamx_tile),
1037 IX86_ATTR_ISA ("amx-int8", OPT_mamx_int8),
1038 IX86_ATTR_ISA ("amx-bf16", OPT_mamx_bf16),
83927c63 1039 IX86_ATTR_ISA ("hreset", OPT_mhreset),
ca813880 1040 IX86_ATTR_ISA ("avxvnni", OPT_mavxvnni),
2bf6d935
ML
1041
1042 /* enum options */
1043 IX86_ATTR_ENUM ("fpmath=", OPT_mfpmath_),
46e6341f 1044 IX86_ATTR_ENUM ("prefer-vector-width=", OPT_mprefer_vector_width_),
2bf6d935
ML
1045
1046 /* string options */
1047 IX86_ATTR_STR ("arch=", IX86_FUNCTION_SPECIFIC_ARCH),
1048 IX86_ATTR_STR ("tune=", IX86_FUNCTION_SPECIFIC_TUNE),
1049
1050 /* flag options */
1051 IX86_ATTR_YES ("cld",
1052 OPT_mcld,
1053 MASK_CLD),
1054
1055 IX86_ATTR_NO ("fancy-math-387",
1056 OPT_mfancy_math_387,
1057 MASK_NO_FANCY_MATH_387),
1058
1059 IX86_ATTR_YES ("ieee-fp",
1060 OPT_mieee_fp,
1061 MASK_IEEE_FP),
1062
1063 IX86_ATTR_YES ("inline-all-stringops",
1064 OPT_minline_all_stringops,
1065 MASK_INLINE_ALL_STRINGOPS),
1066
1067 IX86_ATTR_YES ("inline-stringops-dynamically",
1068 OPT_minline_stringops_dynamically,
1069 MASK_INLINE_STRINGOPS_DYNAMICALLY),
1070
1071 IX86_ATTR_NO ("align-stringops",
1072 OPT_mno_align_stringops,
1073 MASK_NO_ALIGN_STRINGOPS),
1074
1075 IX86_ATTR_YES ("recip",
1076 OPT_mrecip,
1077 MASK_RECIP),
87c753ac
L
1078
1079 IX86_ATTR_IX86_YES ("general-regs-only",
1080 OPT_mgeneral_regs_only,
1081 OPTION_MASK_GENERAL_REGS_ONLY),
2bf6d935
ML
1082 };
1083
1084 location_t loc
1085 = fndecl == NULL ? UNKNOWN_LOCATION : DECL_SOURCE_LOCATION (fndecl);
1086 const char *attr_name = target_clone_attr ? "target_clone" : "target";
1087
1088 /* If this is a list, recurse to get the options. */
1089 if (TREE_CODE (args) == TREE_LIST)
1090 {
2bf6d935
ML
1091 for (; args; args = TREE_CHAIN (args))
1092 if (TREE_VALUE (args)
1093 && !ix86_valid_target_attribute_inner_p (fndecl, TREE_VALUE (args),
1094 p_strings, opts, opts_set,
1095 enum_opts_set,
1096 target_clone_attr))
1097 ret = false;
1098
1099 return ret;
1100 }
1101
1102 else if (TREE_CODE (args) != STRING_CST)
1103 {
1104 error_at (loc, "attribute %qs argument is not a string", attr_name);
1105 return false;
1106 }
1107
1108 /* Handle multiple arguments separated by commas. */
1109 next_optstr = ASTRDUP (TREE_STRING_POINTER (args));
1110
1111 while (next_optstr && *next_optstr != '\0')
1112 {
1113 char *p = next_optstr;
1114 char *orig_p = p;
1115 char *comma = strchr (next_optstr, ',');
1116 size_t len, opt_len;
1117 int opt;
1118 bool opt_set_p;
1119 char ch;
1120 unsigned i;
1121 enum ix86_opt_type type = ix86_opt_unknown;
1122 int mask = 0;
1123
1124 if (comma)
1125 {
1126 *comma = '\0';
1127 len = comma - next_optstr;
1128 next_optstr = comma + 1;
1129 }
1130 else
1131 {
1132 len = strlen (p);
1133 next_optstr = NULL;
1134 }
1135
1136 /* Recognize no-xxx. */
1137 if (len > 3 && p[0] == 'n' && p[1] == 'o' && p[2] == '-')
1138 {
1139 opt_set_p = false;
1140 p += 3;
1141 len -= 3;
1142 }
1143 else
1144 opt_set_p = true;
1145
1146 /* Find the option. */
1147 ch = *p;
1148 opt = N_OPTS;
1149 for (i = 0; i < ARRAY_SIZE (attrs); i++)
1150 {
1151 type = attrs[i].type;
1152 opt_len = attrs[i].len;
1153 if (ch == attrs[i].string[0]
1154 && ((type != ix86_opt_str && type != ix86_opt_enum)
1155 ? len == opt_len
1156 : len > opt_len)
1157 && memcmp (p, attrs[i].string, opt_len) == 0)
1158 {
1159 opt = attrs[i].opt;
1160 mask = attrs[i].mask;
1161 break;
1162 }
1163 }
1164
1165 /* Process the option. */
1166 if (opt == N_OPTS)
1167 {
1168 error_at (loc, "attribute %qs argument %qs is unknown",
1169 orig_p, attr_name);
1170 ret = false;
1171 }
1172
1173 else if (type == ix86_opt_isa)
1174 {
1175 struct cl_decoded_option decoded;
1176
1177 generate_option (opt, NULL, opt_set_p, CL_TARGET, &decoded);
1178 ix86_handle_option (opts, opts_set,
1179 &decoded, input_location);
1180 }
1181
1182 else if (type == ix86_opt_yes || type == ix86_opt_no)
1183 {
1184 if (type == ix86_opt_no)
1185 opt_set_p = !opt_set_p;
1186
1187 if (opt_set_p)
1188 opts->x_target_flags |= mask;
1189 else
1190 opts->x_target_flags &= ~mask;
1191 }
1192
87c753ac
L
1193 else if (type == ix86_opt_ix86_yes || type == ix86_opt_ix86_no)
1194 {
1195 if (mask == OPTION_MASK_GENERAL_REGS_ONLY)
1196 {
8f1ea8dd
L
1197 if (!opt_set_p)
1198 {
ca23341b 1199 error_at (loc, "pragma or attribute %<target(\"%s\")%> "
8f1ea8dd
L
1200 "does not allow a negated form", p);
1201 return false;
1202 }
1203
87c753ac
L
1204 if (type != ix86_opt_ix86_yes)
1205 gcc_unreachable ();
1206
1207 opts->x_ix86_target_flags |= mask;
1208
1209 struct cl_decoded_option decoded;
1210 generate_option (opt, NULL, opt_set_p, CL_TARGET,
1211 &decoded);
1212 ix86_handle_option (opts, opts_set, &decoded,
1213 input_location);
1214 }
1215 else
1216 {
1217 if (type == ix86_opt_ix86_no)
1218 opt_set_p = !opt_set_p;
1219
1220 if (opt_set_p)
1221 opts->x_ix86_target_flags |= mask;
1222 else
1223 opts->x_ix86_target_flags &= ~mask;
1224 }
1225 }
1226
2bf6d935
ML
1227 else if (type == ix86_opt_str)
1228 {
1229 if (p_strings[opt])
1230 {
1231 error_at (loc, "attribute value %qs was already specified "
1232 "in %qs attribute", orig_p, attr_name);
1233 ret = false;
1234 }
1235 else
94cdd3b7
JJ
1236 {
1237 p_strings[opt] = xstrdup (p + opt_len);
1238 if (opt == IX86_FUNCTION_SPECIFIC_ARCH)
1239 {
1240 /* If arch= is set, clear all bits in x_ix86_isa_flags,
1241 except for ISA_64BIT, ABI_64, ABI_X32, and CODE16
1242 and all bits in x_ix86_isa_flags2. */
1243 opts->x_ix86_isa_flags &= (OPTION_MASK_ISA_64BIT
1244 | OPTION_MASK_ABI_64
1245 | OPTION_MASK_ABI_X32
1246 | OPTION_MASK_CODE16);
1247 opts->x_ix86_isa_flags_explicit &= (OPTION_MASK_ISA_64BIT
1248 | OPTION_MASK_ABI_64
1249 | OPTION_MASK_ABI_X32
1250 | OPTION_MASK_CODE16);
1251 opts->x_ix86_isa_flags2 = 0;
1252 opts->x_ix86_isa_flags2_explicit = 0;
1253 }
1254 }
2bf6d935
ML
1255 }
1256
1257 else if (type == ix86_opt_enum)
1258 {
1259 bool arg_ok;
1260 int value;
1261
1262 arg_ok = opt_enum_arg_to_value (opt, p + opt_len, &value, CL_TARGET);
1263 if (arg_ok)
1264 set_option (opts, enum_opts_set, opt, value,
1265 p + opt_len, DK_UNSPECIFIED, input_location,
1266 global_dc);
1267 else
1268 {
1269 error_at (loc, "attribute value %qs is unknown in %qs attribute",
1270 orig_p, attr_name);
1271 ret = false;
1272 }
1273 }
1274
1275 else
1276 gcc_unreachable ();
1277 }
1278
1279 return ret;
1280}
1281
1282/* Release allocated strings. */
1283static void
1284release_options_strings (char **option_strings)
1285{
1286 /* Free up memory allocated to hold the strings */
1287 for (unsigned i = 0; i < IX86_FUNCTION_SPECIFIC_MAX; i++)
1288 free (option_strings[i]);
1289}
1290
1291/* Return a TARGET_OPTION_NODE tree of the target options listed or NULL. */
1292
1293tree
1294ix86_valid_target_attribute_tree (tree fndecl, tree args,
1295 struct gcc_options *opts,
1296 struct gcc_options *opts_set,
1297 bool target_clone_attr)
1298{
1299 const char *orig_arch_string = opts->x_ix86_arch_string;
1300 const char *orig_tune_string = opts->x_ix86_tune_string;
1301 enum fpmath_unit orig_fpmath_set = opts_set->x_ix86_fpmath;
46e6341f 1302 enum prefer_vector_width orig_pvw_set = opts_set->x_prefer_vector_width_type;
2bf6d935
ML
1303 int orig_tune_defaulted = ix86_tune_defaulted;
1304 int orig_arch_specified = ix86_arch_specified;
1305 char *option_strings[IX86_FUNCTION_SPECIFIC_MAX] = { NULL, NULL };
1306 tree t = NULL_TREE;
1307 struct cl_target_option *def
1308 = TREE_TARGET_OPTION (target_option_default_node);
1309 struct gcc_options enum_opts_set;
1310
1311 memset (&enum_opts_set, 0, sizeof (enum_opts_set));
1312
1313 /* Process each of the options on the chain. */
1314 if (!ix86_valid_target_attribute_inner_p (fndecl, args, option_strings, opts,
1315 opts_set, &enum_opts_set,
1316 target_clone_attr))
1317 return error_mark_node;
1318
1319 /* If the changed options are different from the default, rerun
1320 ix86_option_override_internal, and then save the options away.
1321 The string options are attribute options, and will be undone
1322 when we copy the save structure. */
1323 if (opts->x_ix86_isa_flags != def->x_ix86_isa_flags
1324 || opts->x_ix86_isa_flags2 != def->x_ix86_isa_flags2
1325 || opts->x_target_flags != def->x_target_flags
1326 || option_strings[IX86_FUNCTION_SPECIFIC_ARCH]
1327 || option_strings[IX86_FUNCTION_SPECIFIC_TUNE]
46e6341f
JJ
1328 || enum_opts_set.x_ix86_fpmath
1329 || enum_opts_set.x_prefer_vector_width_type)
2bf6d935
ML
1330 {
1331 /* If we are using the default tune= or arch=, undo the string assigned,
1332 and use the default. */
1333 if (option_strings[IX86_FUNCTION_SPECIFIC_ARCH])
94cdd3b7
JJ
1334 opts->x_ix86_arch_string
1335 = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_ARCH]);
2bf6d935
ML
1336 else if (!orig_arch_specified)
1337 opts->x_ix86_arch_string = NULL;
1338
1339 if (option_strings[IX86_FUNCTION_SPECIFIC_TUNE])
1340 opts->x_ix86_tune_string
1341 = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_TUNE]);
1342 else if (orig_tune_defaulted)
1343 opts->x_ix86_tune_string = NULL;
1344
1345 /* If fpmath= is not set, and we now have sse2 on 32-bit, use it. */
1346 if (enum_opts_set.x_ix86_fpmath)
1347 opts_set->x_ix86_fpmath = (enum fpmath_unit) 1;
46e6341f
JJ
1348 if (enum_opts_set.x_prefer_vector_width_type)
1349 opts_set->x_prefer_vector_width_type = (enum prefer_vector_width) 1;
2bf6d935
ML
1350
1351 /* Do any overrides, such as arch=xxx, or tune=xxx support. */
1352 bool r = ix86_option_override_internal (false, opts, opts_set);
1353 if (!r)
1354 {
1355 release_options_strings (option_strings);
1356 return error_mark_node;
1357 }
1358
1359 /* Add any builtin functions with the new isa if any. */
1360 ix86_add_new_builtins (opts->x_ix86_isa_flags, opts->x_ix86_isa_flags2);
1361
e401db7b
JJ
1362 enum excess_precision orig_ix86_excess_precision
1363 = opts->x_ix86_excess_precision;
1364 bool orig_ix86_unsafe_math_optimizations
1365 = opts->x_ix86_unsafe_math_optimizations;
1366 opts->x_ix86_excess_precision = opts->x_flag_excess_precision;
1367 opts->x_ix86_unsafe_math_optimizations
1368 = opts->x_flag_unsafe_math_optimizations;
1369
2bf6d935
ML
1370 /* Save the current options unless we are validating options for
1371 #pragma. */
ba948b37 1372 t = build_target_option_node (opts, opts_set);
2bf6d935
ML
1373
1374 opts->x_ix86_arch_string = orig_arch_string;
1375 opts->x_ix86_tune_string = orig_tune_string;
1376 opts_set->x_ix86_fpmath = orig_fpmath_set;
46e6341f 1377 opts_set->x_prefer_vector_width_type = orig_pvw_set;
e401db7b
JJ
1378 opts->x_ix86_excess_precision = orig_ix86_excess_precision;
1379 opts->x_ix86_unsafe_math_optimizations
1380 = orig_ix86_unsafe_math_optimizations;
2bf6d935
ML
1381
1382 release_options_strings (option_strings);
1383 }
1384
1385 return t;
1386}
1387
1388/* Hook to validate attribute((target("string"))). */
1389
1390bool
1391ix86_valid_target_attribute_p (tree fndecl,
1392 tree ARG_UNUSED (name),
1393 tree args,
1394 int flags)
1395{
ba948b37 1396 struct gcc_options func_options, func_options_set;
2bf6d935
ML
1397 tree new_target, new_optimize;
1398 bool ret = true;
1399
1400 /* attribute((target("default"))) does nothing, beyond
1401 affecting multi-versioning. */
1402 if (TREE_VALUE (args)
1403 && TREE_CODE (TREE_VALUE (args)) == STRING_CST
1404 && TREE_CHAIN (args) == NULL_TREE
1405 && strcmp (TREE_STRING_POINTER (TREE_VALUE (args)), "default") == 0)
1406 return true;
1407
ba948b37
JJ
1408 tree old_optimize = build_optimization_node (&global_options,
1409 &global_options_set);
2bf6d935
ML
1410
1411 /* Get the optimization options of the current function. */
1412 tree func_optimize = DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl);
1413
1414 if (!func_optimize)
1415 func_optimize = old_optimize;
1416
1417 /* Init func_options. */
1418 memset (&func_options, 0, sizeof (func_options));
1419 init_options_struct (&func_options, NULL);
1420 lang_hooks.init_options_struct (&func_options);
ba948b37
JJ
1421 memset (&func_options_set, 0, sizeof (func_options_set));
1422
1423 cl_optimization_restore (&func_options, &func_options_set,
2bf6d935
ML
1424 TREE_OPTIMIZATION (func_optimize));
1425
1426 /* Initialize func_options to the default before its target options can
1427 be set. */
ba948b37 1428 cl_target_option_restore (&func_options, &func_options_set,
2bf6d935
ML
1429 TREE_TARGET_OPTION (target_option_default_node));
1430
1431 /* FLAGS == 1 is used for target_clones attribute. */
1432 new_target
1433 = ix86_valid_target_attribute_tree (fndecl, args, &func_options,
ba948b37 1434 &func_options_set, flags == 1);
2bf6d935 1435
ba948b37 1436 new_optimize = build_optimization_node (&func_options, &func_options_set);
2bf6d935
ML
1437
1438 if (new_target == error_mark_node)
1439 ret = false;
1440
1441 else if (fndecl && new_target)
1442 {
1443 DECL_FUNCTION_SPECIFIC_TARGET (fndecl) = new_target;
1444
1445 if (old_optimize != new_optimize)
1446 DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl) = new_optimize;
1447 }
1448
2bf6d935
ML
1449 return ret;
1450}
1451
1452const char *stringop_alg_names[] = {
1453#define DEF_ENUM
1454#define DEF_ALG(alg, name) #name,
1455#include "stringop.def"
1456#undef DEF_ENUM
1457#undef DEF_ALG
1458};
1459
1460/* Parse parameter string passed to -mmemcpy-strategy= or -mmemset-strategy=.
1461 The string is of the following form (or comma separated list of it):
1462
1463 strategy_alg:max_size:[align|noalign]
1464
1465 where the full size range for the strategy is either [0, max_size] or
1466 [min_size, max_size], in which min_size is the max_size + 1 of the
1467 preceding range. The last size range must have max_size == -1.
1468
1469 Examples:
1470
1471 1.
1472 -mmemcpy-strategy=libcall:-1:noalign
1473
1474 this is equivalent to (for known size memcpy) -mstringop-strategy=libcall
1475
1476
1477 2.
1478 -mmemset-strategy=rep_8byte:16:noalign,vector_loop:2048:align,libcall:-1:noalign
1479
1480 This is to tell the compiler to use the following strategy for memset
1481 1) when the expected size is between [1, 16], use rep_8byte strategy;
1482 2) when the size is between [17, 2048], use vector_loop;
1483 3) when the size is > 2048, use libcall. */
1484
1485struct stringop_size_range
1486{
1487 int max;
1488 stringop_alg alg;
1489 bool noalign;
1490};
1491
1492static void
1493ix86_parse_stringop_strategy_string (char *strategy_str, bool is_memset)
1494{
1495 const struct stringop_algs *default_algs;
1496 stringop_size_range input_ranges[MAX_STRINGOP_ALGS];
1497 char *curr_range_str, *next_range_str;
1498 const char *opt = is_memset ? "-mmemset_strategy=" : "-mmemcpy_strategy=";
1499 int i = 0, n = 0;
1500
1501 if (is_memset)
1502 default_algs = &ix86_cost->memset[TARGET_64BIT != 0];
1503 else
1504 default_algs = &ix86_cost->memcpy[TARGET_64BIT != 0];
1505
1506 curr_range_str = strategy_str;
1507
1508 do
1509 {
1510 int maxs;
1511 char alg_name[128];
1512 char align[16];
1513 next_range_str = strchr (curr_range_str, ',');
1514 if (next_range_str)
1515 *next_range_str++ = '\0';
1516
1517 if (sscanf (curr_range_str, "%20[^:]:%d:%10s", alg_name, &maxs,
1518 align) != 3)
1519 {
1520 error ("wrong argument %qs to option %qs", curr_range_str, opt);
1521 return;
1522 }
1523
1524 if (n > 0 && (maxs < (input_ranges[n - 1].max + 1) && maxs != -1))
1525 {
1526 error ("size ranges of option %qs should be increasing", opt);
1527 return;
1528 }
1529
1530 for (i = 0; i < last_alg; i++)
1531 if (!strcmp (alg_name, stringop_alg_names[i]))
1532 break;
1533
1534 if (i == last_alg)
1535 {
1536 error ("wrong strategy name %qs specified for option %qs",
1537 alg_name, opt);
1538
1539 auto_vec <const char *> candidates;
1540 for (i = 0; i < last_alg; i++)
1541 if ((stringop_alg) i != rep_prefix_8_byte || TARGET_64BIT)
1542 candidates.safe_push (stringop_alg_names[i]);
1543
1544 char *s;
1545 const char *hint
1546 = candidates_list_and_hint (alg_name, s, candidates);
1547 if (hint)
1548 inform (input_location,
1549 "valid arguments to %qs are: %s; did you mean %qs?",
1550 opt, s, hint);
1551 else
1552 inform (input_location, "valid arguments to %qs are: %s",
1553 opt, s);
1554 XDELETEVEC (s);
1555 return;
1556 }
1557
1558 if ((stringop_alg) i == rep_prefix_8_byte
1559 && !TARGET_64BIT)
1560 {
1561 /* rep; movq isn't available in 32-bit code. */
1562 error ("strategy name %qs specified for option %qs "
1563 "not supported for 32-bit code", alg_name, opt);
1564 return;
1565 }
1566
1567 input_ranges[n].max = maxs;
1568 input_ranges[n].alg = (stringop_alg) i;
1569 if (!strcmp (align, "align"))
1570 input_ranges[n].noalign = false;
1571 else if (!strcmp (align, "noalign"))
1572 input_ranges[n].noalign = true;
1573 else
1574 {
1575 error ("unknown alignment %qs specified for option %qs", align, opt);
1576 return;
1577 }
1578 n++;
1579 curr_range_str = next_range_str;
1580 }
1581 while (curr_range_str);
1582
1583 if (input_ranges[n - 1].max != -1)
1584 {
1585 error ("the max value for the last size range should be -1"
1586 " for option %qs", opt);
1587 return;
1588 }
1589
1590 if (n > MAX_STRINGOP_ALGS)
1591 {
1592 error ("too many size ranges specified in option %qs", opt);
1593 return;
1594 }
1595
1596 /* Now override the default algs array. */
1597 for (i = 0; i < n; i++)
1598 {
1599 *const_cast<int *>(&default_algs->size[i].max) = input_ranges[i].max;
1600 *const_cast<stringop_alg *>(&default_algs->size[i].alg)
1601 = input_ranges[i].alg;
1602 *const_cast<int *>(&default_algs->size[i].noalign)
1603 = input_ranges[i].noalign;
1604 }
1605}
1606
1607\f
1608/* parse -mtune-ctrl= option. When DUMP is true,
1609 print the features that are explicitly set. */
1610
1611static void
1e964774 1612parse_mtune_ctrl_str (struct gcc_options *opts, bool dump)
2bf6d935 1613{
1e964774 1614 if (!opts->x_ix86_tune_ctrl_string)
2bf6d935
ML
1615 return;
1616
1617 char *next_feature_string = NULL;
1e964774 1618 char *curr_feature_string = xstrdup (opts->x_ix86_tune_ctrl_string);
2bf6d935
ML
1619 char *orig = curr_feature_string;
1620 int i;
1621 do
1622 {
1623 bool clear = false;
1624
1625 next_feature_string = strchr (curr_feature_string, ',');
1626 if (next_feature_string)
1627 *next_feature_string++ = '\0';
1628 if (*curr_feature_string == '^')
1629 {
1630 curr_feature_string++;
1631 clear = true;
1632 }
1633 for (i = 0; i < X86_TUNE_LAST; i++)
1634 {
1635 if (!strcmp (curr_feature_string, ix86_tune_feature_names[i]))
1636 {
1637 ix86_tune_features[i] = !clear;
1638 if (dump)
1639 fprintf (stderr, "Explicitly %s feature %s\n",
1640 clear ? "clear" : "set", ix86_tune_feature_names[i]);
1641 break;
1642 }
1643 }
1644 if (i == X86_TUNE_LAST)
1645 error ("unknown parameter to option %<-mtune-ctrl%>: %s",
1646 clear ? curr_feature_string - 1 : curr_feature_string);
1647 curr_feature_string = next_feature_string;
1648 }
1649 while (curr_feature_string);
1650 free (orig);
1651}
1652
1653/* Helper function to set ix86_tune_features. IX86_TUNE is the
1654 processor type. */
1655
1656static void
1e964774
L
1657set_ix86_tune_features (struct gcc_options *opts,
1658 enum processor_type ix86_tune, bool dump)
2bf6d935
ML
1659{
1660 unsigned HOST_WIDE_INT ix86_tune_mask = HOST_WIDE_INT_1U << ix86_tune;
1661 int i;
1662
1663 for (i = 0; i < X86_TUNE_LAST; ++i)
1664 {
1665 if (ix86_tune_no_default)
1666 ix86_tune_features[i] = 0;
1667 else
1668 ix86_tune_features[i]
1669 = !!(initial_ix86_tune_features[i] & ix86_tune_mask);
1670 }
1671
1672 if (dump)
1673 {
1674 fprintf (stderr, "List of x86 specific tuning parameter names:\n");
1675 for (i = 0; i < X86_TUNE_LAST; i++)
1676 fprintf (stderr, "%s : %s\n", ix86_tune_feature_names[i],
1677 ix86_tune_features[i] ? "on" : "off");
1678 }
1679
1e964774 1680 parse_mtune_ctrl_str (opts, dump);
2bf6d935
ML
1681}
1682
1683
1684/* Default align_* from the processor table. */
1685
1686static void
1687ix86_default_align (struct gcc_options *opts)
1688{
1689 /* -falign-foo without argument: supply one. */
1690 if (opts->x_flag_align_loops && !opts->x_str_align_loops)
1691 opts->x_str_align_loops = processor_cost_table[ix86_tune]->align_loop;
1692 if (opts->x_flag_align_jumps && !opts->x_str_align_jumps)
1693 opts->x_str_align_jumps = processor_cost_table[ix86_tune]->align_jump;
1694 if (opts->x_flag_align_labels && !opts->x_str_align_labels)
1695 opts->x_str_align_labels = processor_cost_table[ix86_tune]->align_label;
1696 if (opts->x_flag_align_functions && !opts->x_str_align_functions)
1697 opts->x_str_align_functions = processor_cost_table[ix86_tune]->align_func;
1698}
1699
6bc89193
AO
1700#ifndef USE_IX86_FRAME_POINTER
1701#define USE_IX86_FRAME_POINTER 0
1702#endif
1703
1704/* (Re)compute option overrides affected by optimization levels in
1705 target-specific ways. */
1706
1707static void
1708ix86_recompute_optlev_based_flags (struct gcc_options *opts,
1709 struct gcc_options *opts_set)
1710{
1711 /* Set the default values for switches whose default depends on TARGET_64BIT
1712 in case they weren't overwritten by command line options. */
1713 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
1714 {
6ed76044
ML
1715 if (opts->x_optimize >= 1)
1716 SET_OPTION_IF_UNSET (opts, opts_set, flag_omit_frame_pointer,
1717 !USE_IX86_FRAME_POINTER);
6bc89193 1718 if (opts->x_flag_asynchronous_unwind_tables
6bc89193 1719 && TARGET_64BIT_MS_ABI)
6ed76044 1720 SET_OPTION_IF_UNSET (opts, opts_set, flag_unwind_tables, 1);
6bc89193
AO
1721 if (opts->x_flag_asynchronous_unwind_tables == 2)
1722 opts->x_flag_unwind_tables
1723 = opts->x_flag_asynchronous_unwind_tables = 1;
1724 if (opts->x_flag_pcc_struct_return == 2)
1725 opts->x_flag_pcc_struct_return = 0;
1726 }
1727 else
1728 {
6ed76044
ML
1729 if (opts->x_optimize >= 1)
1730 SET_OPTION_IF_UNSET (opts, opts_set, flag_omit_frame_pointer,
1731 !(USE_IX86_FRAME_POINTER || opts->x_optimize_size));
6bc89193
AO
1732 if (opts->x_flag_asynchronous_unwind_tables == 2)
1733 opts->x_flag_asynchronous_unwind_tables = !USE_IX86_FRAME_POINTER;
1734 if (opts->x_flag_pcc_struct_return == 2)
1735 {
1736 /* Intel MCU psABI specifies that -freg-struct-return should
c4f63307 1737 be on. Instead of setting DEFAULT_PCC_STRUCT_RETURN to 0,
6bc89193
AO
1738 we check -miamcu so that -freg-struct-return is always
1739 turned on if -miamcu is used. */
1740 if (TARGET_IAMCU_P (opts->x_target_flags))
1741 opts->x_flag_pcc_struct_return = 0;
1742 else
1743 opts->x_flag_pcc_struct_return = DEFAULT_PCC_STRUCT_RETURN;
1744 }
1745 }
1746}
1747
2bf6d935
ML
1748/* Implement TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE hook. */
1749
1750void
1751ix86_override_options_after_change (void)
1752{
1753 ix86_default_align (&global_options);
6bc89193 1754 ix86_recompute_optlev_based_flags (&global_options, &global_options_set);
2bf6d935
ML
1755}
1756
1757/* Clear stack slot assignments remembered from previous functions.
1758 This is called from INIT_EXPANDERS once before RTL is emitted for each
1759 function. */
1760
1761static struct machine_function *
1762ix86_init_machine_status (void)
1763{
1764 struct machine_function *f;
1765
1766 f = ggc_cleared_alloc<machine_function> ();
1767 f->call_abi = ix86_abi;
c2080a1f 1768 f->stack_frame_required = true;
2bf6d935
ML
1769
1770 return f;
1771}
1772
1773/* Override various settings based on options. If MAIN_ARGS_P, the
1774 options are from the command line, otherwise they are from
1775 attributes. Return true if there's an error related to march
1776 option. */
1777
1778static bool
1779ix86_option_override_internal (bool main_args_p,
1780 struct gcc_options *opts,
1781 struct gcc_options *opts_set)
1782{
5ebdd535 1783 unsigned int i;
2bf6d935
ML
1784 unsigned HOST_WIDE_INT ix86_arch_mask;
1785 const bool ix86_tune_specified = (opts->x_ix86_tune_string != NULL);
1786
1787 /* -mrecip options. */
1788 static struct
1789 {
1790 const char *string; /* option name */
1791 unsigned int mask; /* mask bits to set */
1792 }
1793 const recip_options[] =
1794 {
1795 { "all", RECIP_MASK_ALL },
1796 { "none", RECIP_MASK_NONE },
1797 { "div", RECIP_MASK_DIV },
1798 { "sqrt", RECIP_MASK_SQRT },
1799 { "vec-div", RECIP_MASK_VEC_DIV },
1800 { "vec-sqrt", RECIP_MASK_VEC_SQRT },
1801 };
1802
1803
1804 /* Turn off both OPTION_MASK_ABI_64 and OPTION_MASK_ABI_X32 if
1805 TARGET_64BIT_DEFAULT is true and TARGET_64BIT is false. */
1806 if (TARGET_64BIT_DEFAULT && !TARGET_64BIT_P (opts->x_ix86_isa_flags))
1807 opts->x_ix86_isa_flags &= ~(OPTION_MASK_ABI_64 | OPTION_MASK_ABI_X32);
1808#ifdef TARGET_BI_ARCH
1809 else
1810 {
1811#if TARGET_BI_ARCH == 1
1812 /* When TARGET_BI_ARCH == 1, by default, OPTION_MASK_ABI_64
1813 is on and OPTION_MASK_ABI_X32 is off. We turn off
1814 OPTION_MASK_ABI_64 if OPTION_MASK_ABI_X32 is turned on by
1815 -mx32. */
1816 if (TARGET_X32_P (opts->x_ix86_isa_flags))
1817 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_64;
1818#else
1819 /* When TARGET_BI_ARCH == 2, by default, OPTION_MASK_ABI_X32 is
1820 on and OPTION_MASK_ABI_64 is off. We turn off
1821 OPTION_MASK_ABI_X32 if OPTION_MASK_ABI_64 is turned on by
1822 -m64 or OPTION_MASK_CODE16 is turned on by -m16. */
1823 if (TARGET_LP64_P (opts->x_ix86_isa_flags)
1824 || TARGET_16BIT_P (opts->x_ix86_isa_flags))
1825 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_X32;
1826#endif
1827 if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
1828 && TARGET_IAMCU_P (opts->x_target_flags))
1829 sorry ("Intel MCU psABI isn%'t supported in %s mode",
1830 TARGET_X32_P (opts->x_ix86_isa_flags) ? "x32" : "64-bit");
1831 }
1832#endif
1833
1834 if (TARGET_X32_P (opts->x_ix86_isa_flags))
1835 {
1836 /* Always turn on OPTION_MASK_ISA_64BIT and turn off
1837 OPTION_MASK_ABI_64 for TARGET_X32. */
1838 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
1839 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_64;
1840 }
1841 else if (TARGET_16BIT_P (opts->x_ix86_isa_flags))
1842 opts->x_ix86_isa_flags &= ~(OPTION_MASK_ISA_64BIT
1843 | OPTION_MASK_ABI_X32
1844 | OPTION_MASK_ABI_64);
1845 else if (TARGET_LP64_P (opts->x_ix86_isa_flags))
1846 {
1847 /* Always turn on OPTION_MASK_ISA_64BIT and turn off
1848 OPTION_MASK_ABI_X32 for TARGET_LP64. */
1849 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
1850 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_X32;
1851 }
1852
1853#ifdef SUBTARGET_OVERRIDE_OPTIONS
1854 SUBTARGET_OVERRIDE_OPTIONS;
1855#endif
1856
1857#ifdef SUBSUBTARGET_OVERRIDE_OPTIONS
1858 SUBSUBTARGET_OVERRIDE_OPTIONS;
1859#endif
1860
1861 /* -fPIC is the default for x86_64. */
1862 if (TARGET_MACHO && TARGET_64BIT_P (opts->x_ix86_isa_flags))
1863 opts->x_flag_pic = 2;
1864
1865 /* Need to check -mtune=generic first. */
1866 if (opts->x_ix86_tune_string)
1867 {
1868 /* As special support for cross compilers we read -mtune=native
1869 as -mtune=generic. With native compilers we won't see the
1870 -mtune=native, as it was changed by the driver. */
1871 if (!strcmp (opts->x_ix86_tune_string, "native"))
69bd5d47 1872 opts->x_ix86_tune_string = "generic";
2bf6d935
ML
1873 else if (!strcmp (opts->x_ix86_tune_string, "x86-64"))
1874 warning (OPT_Wdeprecated,
1875 main_args_p
1876 ? G_("%<-mtune=x86-64%> is deprecated; use %<-mtune=k8%> "
1877 "or %<-mtune=generic%> instead as appropriate")
1878 : G_("%<target(\"tune=x86-64\")%> is deprecated; use "
1879 "%<target(\"tune=k8\")%> or %<target(\"tune=generic\")%>"
1880 " instead as appropriate"));
1881 }
1882 else
1883 {
1884 if (opts->x_ix86_arch_string)
1885 opts->x_ix86_tune_string = opts->x_ix86_arch_string;
1886 if (!opts->x_ix86_tune_string)
1887 {
1888 opts->x_ix86_tune_string = processor_names[TARGET_CPU_DEFAULT];
1889 ix86_tune_defaulted = 1;
1890 }
1891
1892 /* opts->x_ix86_tune_string is set to opts->x_ix86_arch_string
1893 or defaulted. We need to use a sensible tune option. */
69bd5d47
JJ
1894 if (!strncmp (opts->x_ix86_tune_string, "x86-64", 6)
1895 && (opts->x_ix86_tune_string[6] == '\0'
1896 || (!strcmp (opts->x_ix86_tune_string + 6, "-v2")
1897 || !strcmp (opts->x_ix86_tune_string + 6, "-v3")
1898 || !strcmp (opts->x_ix86_tune_string + 6, "-v4"))))
1899 opts->x_ix86_tune_string = "generic";
2bf6d935
ML
1900 }
1901
1902 if (opts->x_ix86_stringop_alg == rep_prefix_8_byte
1903 && !TARGET_64BIT_P (opts->x_ix86_isa_flags))
1904 {
1905 /* rep; movq isn't available in 32-bit code. */
1906 error ("%<-mstringop-strategy=rep_8byte%> not supported for 32-bit code");
1907 opts->x_ix86_stringop_alg = no_stringop;
1908 }
1909
299a53d7 1910 if (TARGET_UINTR && !TARGET_64BIT)
1911 error ("%<-muintr%> not supported for 32-bit code");
1912
2bf6d935
ML
1913 if (!opts->x_ix86_arch_string)
1914 opts->x_ix86_arch_string
1915 = TARGET_64BIT_P (opts->x_ix86_isa_flags)
1916 ? "x86-64" : SUBTARGET32_DEFAULT_CPU;
1917 else
1918 ix86_arch_specified = 1;
1919
1920 if (opts_set->x_ix86_pmode)
1921 {
1922 if ((TARGET_LP64_P (opts->x_ix86_isa_flags)
1923 && opts->x_ix86_pmode == PMODE_SI)
1924 || (!TARGET_64BIT_P (opts->x_ix86_isa_flags)
1925 && opts->x_ix86_pmode == PMODE_DI))
1926 error ("address mode %qs not supported in the %s bit mode",
1927 TARGET_64BIT_P (opts->x_ix86_isa_flags) ? "short" : "long",
1928 TARGET_64BIT_P (opts->x_ix86_isa_flags) ? "64" : "32");
1929 }
1930 else
1931 opts->x_ix86_pmode = TARGET_LP64_P (opts->x_ix86_isa_flags)
1932 ? PMODE_DI : PMODE_SI;
1933
6ed76044 1934 SET_OPTION_IF_UNSET (opts, opts_set, ix86_abi, DEFAULT_ABI);
2bf6d935
ML
1935
1936 if (opts->x_ix86_abi == MS_ABI && TARGET_X32_P (opts->x_ix86_isa_flags))
1937 error ("%<-mabi=ms%> not supported with X32 ABI");
1938 gcc_assert (opts->x_ix86_abi == SYSV_ABI || opts->x_ix86_abi == MS_ABI);
1939
080629d3
ML
1940 const char *abi_name = opts->x_ix86_abi == MS_ABI ? "ms" : "sysv";
1941 if ((opts->x_flag_sanitize & SANITIZE_USER_ADDRESS)
1942 && opts->x_ix86_abi != DEFAULT_ABI)
1943 error ("%<-mabi=%s%> not supported with %<-fsanitize=address%>", abi_name);
1944 if ((opts->x_flag_sanitize & SANITIZE_KERNEL_ADDRESS)
1945 && opts->x_ix86_abi != DEFAULT_ABI)
1946 error ("%<-mabi=%s%> not supported with %<-fsanitize=kernel-address%>",
1947 abi_name);
1948 if ((opts->x_flag_sanitize & SANITIZE_THREAD)
1949 && opts->x_ix86_abi != DEFAULT_ABI)
1950 error ("%<-mabi=%s%> not supported with %<-fsanitize=thread%>", abi_name);
2bf6d935
ML
1951
1952 /* For targets using ms ABI enable ms-extensions, if not
1953 explicit turned off. For non-ms ABI we turn off this
1954 option. */
6ed76044
ML
1955 SET_OPTION_IF_UNSET (opts, opts_set, flag_ms_extensions,
1956 (MS_ABI == DEFAULT_ABI));
2bf6d935
ML
1957
1958 if (opts_set->x_ix86_cmodel)
1959 {
1960 switch (opts->x_ix86_cmodel)
1961 {
1962 case CM_SMALL:
1963 case CM_SMALL_PIC:
1964 if (opts->x_flag_pic)
1965 opts->x_ix86_cmodel = CM_SMALL_PIC;
1966 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
1967 error ("code model %qs not supported in the %s bit mode",
1968 "small", "32");
1969 break;
1970
1971 case CM_MEDIUM:
1972 case CM_MEDIUM_PIC:
1973 if (opts->x_flag_pic)
1974 opts->x_ix86_cmodel = CM_MEDIUM_PIC;
1975 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
1976 error ("code model %qs not supported in the %s bit mode",
1977 "medium", "32");
1978 else if (TARGET_X32_P (opts->x_ix86_isa_flags))
1979 error ("code model %qs not supported in x32 mode",
1980 "medium");
1981 break;
1982
1983 case CM_LARGE:
1984 case CM_LARGE_PIC:
1985 if (opts->x_flag_pic)
1986 opts->x_ix86_cmodel = CM_LARGE_PIC;
1987 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
1988 error ("code model %qs not supported in the %s bit mode",
1989 "large", "32");
1990 else if (TARGET_X32_P (opts->x_ix86_isa_flags))
1991 error ("code model %qs not supported in x32 mode",
1992 "large");
1993 break;
1994
1995 case CM_32:
1996 if (opts->x_flag_pic)
1997 error ("code model %s does not support PIC mode", "32");
1998 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
1999 error ("code model %qs not supported in the %s bit mode",
2000 "32", "64");
2001 break;
2002
2003 case CM_KERNEL:
2004 if (opts->x_flag_pic)
2005 {
2006 error ("code model %s does not support PIC mode", "kernel");
2007 opts->x_ix86_cmodel = CM_32;
2008 }
2009 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
2010 error ("code model %qs not supported in the %s bit mode",
2011 "kernel", "32");
2012 break;
2013
2014 default:
2015 gcc_unreachable ();
2016 }
2017 }
2018 else
2019 {
2020 /* For TARGET_64BIT and MS_ABI, force pic on, in order to enable the
2021 use of rip-relative addressing. This eliminates fixups that
2022 would otherwise be needed if this object is to be placed in a
2023 DLL, and is essentially just as efficient as direct addressing. */
2024 if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
2025 && (TARGET_RDOS || TARGET_PECOFF))
2026 opts->x_ix86_cmodel = CM_MEDIUM_PIC, opts->x_flag_pic = 1;
2027 else if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2028 opts->x_ix86_cmodel = opts->x_flag_pic ? CM_SMALL_PIC : CM_SMALL;
2029 else
2030 opts->x_ix86_cmodel = CM_32;
2031 }
2032 if (TARGET_MACHO && opts->x_ix86_asm_dialect == ASM_INTEL)
2033 {
2034 error ("%<-masm=intel%> not supported in this configuration");
2035 opts->x_ix86_asm_dialect = ASM_ATT;
2036 }
2037 if ((TARGET_64BIT_P (opts->x_ix86_isa_flags) != 0)
2038 != ((opts->x_ix86_isa_flags & OPTION_MASK_ISA_64BIT) != 0))
2039 sorry ("%i-bit mode not compiled in",
2040 (opts->x_ix86_isa_flags & OPTION_MASK_ISA_64BIT) ? 64 : 32);
2041
2042 for (i = 0; i < pta_size; i++)
2043 if (! strcmp (opts->x_ix86_arch_string, processor_alias_table[i].name))
2044 {
2045 if (!strcmp (opts->x_ix86_arch_string, "generic"))
2046 {
2047 error (main_args_p
2048 ? G_("%<generic%> CPU can be used only for %<-mtune=%> "
2049 "switch")
2050 : G_("%<generic%> CPU can be used only for "
2051 "%<target(\"tune=\")%> attribute"));
2052 return false;
2053 }
2054 else if (!strcmp (opts->x_ix86_arch_string, "intel"))
2055 {
2056 error (main_args_p
2057 ? G_("%<intel%> CPU can be used only for %<-mtune=%> "
2058 "switch")
2059 : G_("%<intel%> CPU can be used only for "
2060 "%<target(\"tune=\")%> attribute"));
2061 return false;
2062 }
2063
2064 if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
2065 && !((processor_alias_table[i].flags & PTA_64BIT) != 0))
2066 {
2067 error ("CPU you selected does not support x86-64 "
2068 "instruction set");
2069 return false;
2070 }
2071
2072 ix86_schedule = processor_alias_table[i].schedule;
2073 ix86_arch = processor_alias_table[i].processor;
324bec55
FW
2074
2075 /* Default cpu tuning to the architecture, unless the table
2076 entry requests not to do this. Used by the x86-64 psABI
2077 micro-architecture levels. */
2078 if ((processor_alias_table[i].flags & PTA_NO_TUNE) == 0)
2079 ix86_tune = ix86_arch;
2080 else
2081 ix86_tune = PROCESSOR_GENERIC;
2bf6d935
ML
2082
2083 if (((processor_alias_table[i].flags & PTA_MMX) != 0)
2084 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_MMX))
2085 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MMX;
2086 if (((processor_alias_table[i].flags & PTA_3DNOW) != 0)
2087 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_3DNOW))
2088 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_3DNOW;
2089 if (((processor_alias_table[i].flags & PTA_3DNOW_A) != 0)
2090 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_3DNOW_A))
2091 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_3DNOW_A;
2092 if (((processor_alias_table[i].flags & PTA_SSE) != 0)
2093 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE))
2094 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE;
2095 if (((processor_alias_table[i].flags & PTA_SSE2) != 0)
2096 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE2))
2097 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE2;
2098 if (((processor_alias_table[i].flags & PTA_SSE3) != 0)
2099 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE3))
2100 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE3;
2101 if (((processor_alias_table[i].flags & PTA_SSSE3) != 0)
2102 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSSE3))
2103 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSSE3;
2104 if (((processor_alias_table[i].flags & PTA_SSE4_1) != 0)
2105 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE4_1))
2106 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_1;
2107 if (((processor_alias_table[i].flags & PTA_SSE4_2) != 0)
2108 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE4_2))
2109 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_2;
2110 if (((processor_alias_table[i].flags & PTA_AVX) != 0)
2111 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX))
2112 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX;
2113 if (((processor_alias_table[i].flags & PTA_AVX2) != 0)
2114 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX2))
2115 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2;
2116 if (((processor_alias_table[i].flags & PTA_FMA) != 0)
2117 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FMA))
2118 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA;
2119 if (((processor_alias_table[i].flags & PTA_SSE4A) != 0)
2120 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE4A))
2121 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4A;
2122 if (((processor_alias_table[i].flags & PTA_FMA4) != 0)
2123 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FMA4))
2124 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA4;
2125 if (((processor_alias_table[i].flags & PTA_XOP) != 0)
2126 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XOP))
2127 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XOP;
2128 if (((processor_alias_table[i].flags & PTA_LWP) != 0)
2129 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_LWP))
2130 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LWP;
2131 if (((processor_alias_table[i].flags & PTA_ABM) != 0)
2132 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_ABM))
2133 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ABM;
2134 if (((processor_alias_table[i].flags & PTA_BMI) != 0)
2135 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_BMI))
2136 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI;
2137 if (((processor_alias_table[i].flags & (PTA_LZCNT | PTA_ABM)) != 0)
2138 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_LZCNT))
2139 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LZCNT;
2140 if (((processor_alias_table[i].flags & PTA_TBM) != 0)
2141 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_TBM))
2142 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_TBM;
2143 if (((processor_alias_table[i].flags & PTA_BMI2) != 0)
2144 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_BMI2))
2145 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI2;
2146 if (((processor_alias_table[i].flags & PTA_CX16) != 0)
8cf86e14
HL
2147 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_CX16))
2148 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_CX16;
2bf6d935
ML
2149 if (((processor_alias_table[i].flags & (PTA_POPCNT | PTA_ABM)) != 0)
2150 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_POPCNT))
2151 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_POPCNT;
2152 if (!(TARGET_64BIT_P (opts->x_ix86_isa_flags)
2153 && ((processor_alias_table[i].flags & PTA_NO_SAHF) != 0))
2154 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_SAHF))
2155 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SAHF;
2156 if (((processor_alias_table[i].flags & PTA_MOVBE) != 0)
8cf86e14
HL
2157 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_MOVBE))
2158 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_MOVBE;
2bf6d935
ML
2159 if (((processor_alias_table[i].flags & PTA_AES) != 0)
2160 && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_AES))
2161 ix86_isa_flags |= OPTION_MASK_ISA_AES;
2162 if (((processor_alias_table[i].flags & PTA_SHA) != 0)
2163 && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_SHA))
2164 ix86_isa_flags |= OPTION_MASK_ISA_SHA;
2165 if (((processor_alias_table[i].flags & PTA_PCLMUL) != 0)
2166 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PCLMUL))
2167 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PCLMUL;
2168 if (((processor_alias_table[i].flags & PTA_FSGSBASE) != 0)
2169 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FSGSBASE))
2170 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FSGSBASE;
2171 if (((processor_alias_table[i].flags & PTA_RDRND) != 0)
2172 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_RDRND))
2173 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDRND;
2174 if (((processor_alias_table[i].flags & PTA_F16C) != 0)
2175 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_F16C))
2176 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_F16C;
2177 if (((processor_alias_table[i].flags & PTA_RTM) != 0)
2178 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_RTM))
2179 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RTM;
2180 if (((processor_alias_table[i].flags & PTA_HLE) != 0)
8cf86e14
HL
2181 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_HLE))
2182 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_HLE;
2bf6d935
ML
2183 if (((processor_alias_table[i].flags & PTA_PRFCHW) != 0)
2184 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PRFCHW))
2185 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PRFCHW;
2186 if (((processor_alias_table[i].flags & PTA_RDSEED) != 0)
2187 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_RDSEED))
2188 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDSEED;
2189 if (((processor_alias_table[i].flags & PTA_ADX) != 0)
2190 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_ADX))
2191 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ADX;
2192 if (((processor_alias_table[i].flags & PTA_FXSR) != 0)
2193 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_FXSR))
2194 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FXSR;
2195 if (((processor_alias_table[i].flags & PTA_XSAVE) != 0)
2196 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVE))
2197 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVE;
2198 if (((processor_alias_table[i].flags & PTA_XSAVEOPT) != 0)
2199 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVEOPT))
2200 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVEOPT;
2201 if (((processor_alias_table[i].flags & PTA_AVX512F) != 0)
2202 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512F))
2203 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F;
2204 if (((processor_alias_table[i].flags & PTA_AVX512ER) != 0)
2205 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512ER))
2206 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512ER;
2207 if (((processor_alias_table[i].flags & PTA_AVX512PF) != 0)
2208 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512PF))
2209 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512PF;
2210 if (((processor_alias_table[i].flags & PTA_AVX512CD) != 0)
2211 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512CD))
2212 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512CD;
2213 if (((processor_alias_table[i].flags & PTA_PREFETCHWT1) != 0)
2214 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PREFETCHWT1))
2215 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PREFETCHWT1;
2216 if (((processor_alias_table[i].flags & PTA_CLWB) != 0)
2217 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_CLWB))
2218 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLWB;
2219 if (((processor_alias_table[i].flags & PTA_CLFLUSHOPT) != 0)
2220 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_CLFLUSHOPT))
2221 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLFLUSHOPT;
2222 if (((processor_alias_table[i].flags & PTA_CLZERO) != 0)
8cf86e14
HL
2223 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_CLZERO))
2224 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_CLZERO;
2bf6d935
ML
2225 if (((processor_alias_table[i].flags & PTA_XSAVEC) != 0)
2226 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVEC))
2227 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVEC;
2228 if (((processor_alias_table[i].flags & PTA_XSAVES) != 0)
2229 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVES))
2230 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVES;
2231 if (((processor_alias_table[i].flags & PTA_AVX512DQ) != 0)
2232 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512DQ))
2233 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512DQ;
2234 if (((processor_alias_table[i].flags & PTA_AVX512BW) != 0)
2235 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512BW))
2236 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512BW;
2237 if (((processor_alias_table[i].flags & PTA_AVX512VL) != 0)
2238 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512VL))
2239 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VL;
2240 if (((processor_alias_table[i].flags & PTA_AVX512VBMI) != 0)
2241 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512VBMI))
2242 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VBMI;
2243 if (((processor_alias_table[i].flags & PTA_AVX512IFMA) != 0)
2244 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512IFMA))
2245 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512IFMA;
2246 if (((processor_alias_table[i].flags & PTA_AVX512VNNI) != 0)
2247 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512VNNI))
2248 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VNNI;
2249 if (((processor_alias_table[i].flags & PTA_GFNI) != 0)
2250 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_GFNI))
2251 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_GFNI;
2252 if (((processor_alias_table[i].flags & PTA_AVX512VBMI2) != 0)
2253 && !(opts->x_ix86_isa_flags_explicit
2254 & OPTION_MASK_ISA_AVX512VBMI2))
2255 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VBMI2;
2256 if (((processor_alias_table[i].flags & PTA_VPCLMULQDQ) != 0)
2257 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_VPCLMULQDQ))
2258 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_VPCLMULQDQ;
2259 if (((processor_alias_table[i].flags & PTA_AVX512BITALG) != 0)
2260 && !(opts->x_ix86_isa_flags_explicit
2261 & OPTION_MASK_ISA_AVX512BITALG))
2262 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512BITALG;
2263
e21b52af
HL
2264 if (((processor_alias_table[i].flags & PTA_AVX512VP2INTERSECT) != 0)
2265 && !(opts->x_ix86_isa_flags2_explicit
8cf86e14
HL
2266 & OPTION_MASK_ISA2_AVX512VP2INTERSECT))
2267 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX512VP2INTERSECT;
2bf6d935
ML
2268 if (((processor_alias_table[i].flags & PTA_AVX5124VNNIW) != 0)
2269 && !(opts->x_ix86_isa_flags2_explicit
8cf86e14
HL
2270 & OPTION_MASK_ISA2_AVX5124VNNIW))
2271 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX5124VNNIW;
2bf6d935
ML
2272 if (((processor_alias_table[i].flags & PTA_AVX5124FMAPS) != 0)
2273 && !(opts->x_ix86_isa_flags2_explicit
8cf86e14
HL
2274 & OPTION_MASK_ISA2_AVX5124FMAPS))
2275 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX5124FMAPS;
2bf6d935
ML
2276 if (((processor_alias_table[i].flags & PTA_AVX512VPOPCNTDQ) != 0)
2277 && !(opts->x_ix86_isa_flags_explicit
2278 & OPTION_MASK_ISA_AVX512VPOPCNTDQ))
2279 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VPOPCNTDQ;
4f0e90fa
HL
2280 if (((processor_alias_table[i].flags & PTA_AVX512BF16) != 0)
2281 && !(opts->x_ix86_isa_flags2_explicit
8cf86e14
HL
2282 & OPTION_MASK_ISA2_AVX512BF16))
2283 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX512BF16;
5c609842 2284 if (((processor_alias_table[i].flags & PTA_AMX_TILE) != 0)
2285 && !(opts->x_ix86_isa_flags2_explicit
2286 & OPTION_MASK_ISA2_AMX_TILE))
2287 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AMX_TILE;
2288 if (((processor_alias_table[i].flags & PTA_AMX_INT8) != 0)
2289 && !(opts->x_ix86_isa_flags2_explicit
2290 & OPTION_MASK_ISA2_AMX_INT8))
2291 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AMX_INT8;
2292 if (((processor_alias_table[i].flags & PTA_AMX_BF16) != 0)
2293 && !(opts->x_ix86_isa_flags2_explicit
2294 & OPTION_MASK_ISA2_AMX_BF16))
2295 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AMX_BF16;
ca813880 2296 if (((processor_alias_table[i].flags & PTA_AVXVNNI) != 0)
2297 && !(opts->x_ix86_isa_flags2_explicit
2298 & OPTION_MASK_ISA2_AVXVNNI))
2299 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVXVNNI;
a9fcfec3
HL
2300 if (((processor_alias_table[i].flags & PTA_MOVDIRI) != 0)
2301 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_MOVDIRI))
2302 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MOVDIRI;
2303 if (((processor_alias_table[i].flags & PTA_MOVDIR64B) != 0)
8cf86e14
HL
2304 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_MOVDIR64B))
2305 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_MOVDIR64B;
2bf6d935 2306 if (((processor_alias_table[i].flags & PTA_SGX) != 0)
8cf86e14
HL
2307 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_SGX))
2308 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_SGX;
2bf6d935 2309 if (((processor_alias_table[i].flags & PTA_VAES) != 0)
8cf86e14
HL
2310 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_VAES))
2311 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_VAES;
2bf6d935 2312 if (((processor_alias_table[i].flags & PTA_RDPID) != 0)
8cf86e14
HL
2313 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_RDPID))
2314 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_RDPID;
2bf6d935 2315 if (((processor_alias_table[i].flags & PTA_PCONFIG) != 0)
8cf86e14
HL
2316 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_PCONFIG))
2317 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_PCONFIG;
2bf6d935 2318 if (((processor_alias_table[i].flags & PTA_WBNOINVD) != 0)
8cf86e14
HL
2319 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_WBNOINVD))
2320 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_WBNOINVD;
2bf6d935 2321 if (((processor_alias_table[i].flags & PTA_PTWRITE) != 0)
8cf86e14
HL
2322 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_PTWRITE))
2323 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_PTWRITE;
ba9c87d3
CL
2324 if (((processor_alias_table[i].flags & PTA_WAITPKG) != 0)
2325 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_WAITPKG))
2326 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_WAITPKG;
2327 if (((processor_alias_table[i].flags & PTA_ENQCMD) != 0)
2328 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_ENQCMD))
2329 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_ENQCMD;
2330 if (((processor_alias_table[i].flags & PTA_CLDEMOTE) != 0)
2331 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_CLDEMOTE))
2332 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_CLDEMOTE;
2333 if (((processor_alias_table[i].flags & PTA_SERIALIZE) != 0)
2334 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_SERIALIZE))
2335 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_SERIALIZE;
2336 if (((processor_alias_table[i].flags & PTA_TSXLDTRK) != 0)
2337 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_TSXLDTRK))
2338 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_TSXLDTRK;
632a2f50 2339 if (((processor_alias_table[i].flags & PTA_KL) != 0)
2340 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_KL))
2341 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_KL;
2342 if (((processor_alias_table[i].flags & PTA_WIDEKL) != 0)
2343 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_WIDEKL))
2344 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_WIDEKL;
2bf6d935
ML
2345
2346 if ((processor_alias_table[i].flags
2347 & (PTA_PREFETCH_SSE | PTA_SSE)) != 0)
08a4adcf 2348 ix86_prefetch_sse = true;
2bf6d935 2349 if (((processor_alias_table[i].flags & PTA_MWAITX) != 0)
8cf86e14
HL
2350 && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_MWAITX))
2351 opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_MWAITX;
2bf6d935
ML
2352 if (((processor_alias_table[i].flags & PTA_PKU) != 0)
2353 && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PKU))
2354 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PKU;
2355
87c753ac
L
2356 /* Don't enable x87 instructions if only general registers are
2357 allowed by target("general-regs-only") function attribute or
2358 -mgeneral-regs-only. */
2359 if (!(opts->x_ix86_target_flags & OPTION_MASK_GENERAL_REGS_ONLY)
2bf6d935
ML
2360 && !(opts_set->x_target_flags & MASK_80387))
2361 {
2362 if (((processor_alias_table[i].flags & PTA_NO_80387) != 0))
2363 opts->x_target_flags &= ~MASK_80387;
2364 else
2365 opts->x_target_flags |= MASK_80387;
2366 }
2367 break;
2368 }
2369
2370 if (i == pta_size)
2371 {
2372 error (main_args_p
2373 ? G_("bad value (%qs) for %<-march=%> switch")
2374 : G_("bad value (%qs) for %<target(\"arch=\")%> attribute"),
2375 opts->x_ix86_arch_string);
2376
2377 auto_vec <const char *> candidates;
2378 for (i = 0; i < pta_size; i++)
2379 if (strcmp (processor_alias_table[i].name, "generic")
2380 && strcmp (processor_alias_table[i].name, "intel")
2381 && (!TARGET_64BIT_P (opts->x_ix86_isa_flags)
2382 || ((processor_alias_table[i].flags & PTA_64BIT) != 0)))
2383 candidates.safe_push (processor_alias_table[i].name);
2384
2385#ifdef HAVE_LOCAL_CPU_DETECT
2386 /* Add also "native" as possible value. */
2387 candidates.safe_push ("native");
2388#endif
2389
2390 char *s;
2391 const char *hint
2392 = candidates_list_and_hint (opts->x_ix86_arch_string, s, candidates);
2393 if (hint)
2394 inform (input_location,
2395 main_args_p
2396 ? G_("valid arguments to %<-march=%> switch are: "
2397 "%s; did you mean %qs?")
2398 : G_("valid arguments to %<target(\"arch=\")%> attribute are: "
2399 "%s; did you mean %qs?"), s, hint);
2400 else
2401 inform (input_location,
2402 main_args_p
2403 ? G_("valid arguments to %<-march=%> switch are: %s")
2404 : G_("valid arguments to %<target(\"arch=\")%> attribute "
2405 "are: %s"), s);
2406 XDELETEVEC (s);
2407 }
2408
2409 ix86_arch_mask = HOST_WIDE_INT_1U << ix86_arch;
2410 for (i = 0; i < X86_ARCH_LAST; ++i)
2411 ix86_arch_features[i] = !!(initial_ix86_arch_features[i] & ix86_arch_mask);
2412
2413 for (i = 0; i < pta_size; i++)
324bec55
FW
2414 if (! strcmp (opts->x_ix86_tune_string, processor_alias_table[i].name)
2415 && (processor_alias_table[i].flags & PTA_NO_TUNE) == 0)
2bf6d935
ML
2416 {
2417 ix86_schedule = processor_alias_table[i].schedule;
2418 ix86_tune = processor_alias_table[i].processor;
2419 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2420 {
2421 if (!((processor_alias_table[i].flags & PTA_64BIT) != 0))
2422 {
2423 if (ix86_tune_defaulted)
2424 {
2425 opts->x_ix86_tune_string = "x86-64";
2426 for (i = 0; i < pta_size; i++)
2427 if (! strcmp (opts->x_ix86_tune_string,
2428 processor_alias_table[i].name))
2429 break;
2430 ix86_schedule = processor_alias_table[i].schedule;
2431 ix86_tune = processor_alias_table[i].processor;
2432 }
2433 else
2434 error ("CPU you selected does not support x86-64 "
2435 "instruction set");
2436 }
2437 }
2438 /* Intel CPUs have always interpreted SSE prefetch instructions as
2439 NOPs; so, we can enable SSE prefetch instructions even when
2440 -mtune (rather than -march) points us to a processor that has them.
2441 However, the VIA C3 gives a SIGILL, so we only do that for i686 and
2442 higher processors. */
2443 if (TARGET_CMOV
2444 && ((processor_alias_table[i].flags
2445 & (PTA_PREFETCH_SSE | PTA_SSE)) != 0))
08a4adcf 2446 ix86_prefetch_sse = true;
2bf6d935
ML
2447 break;
2448 }
2449
2450 if (ix86_tune_specified && i == pta_size)
2451 {
2452 error (main_args_p
2453 ? G_("bad value (%qs) for %<-mtune=%> switch")
2454 : G_("bad value (%qs) for %<target(\"tune=\")%> attribute"),
2455 opts->x_ix86_tune_string);
2456
2457 auto_vec <const char *> candidates;
2458 for (i = 0; i < pta_size; i++)
324bec55
FW
2459 if ((!TARGET_64BIT_P (opts->x_ix86_isa_flags)
2460 || ((processor_alias_table[i].flags & PTA_64BIT) != 0))
2461 && (processor_alias_table[i].flags & PTA_NO_TUNE) == 0)
2bf6d935
ML
2462 candidates.safe_push (processor_alias_table[i].name);
2463
2464#ifdef HAVE_LOCAL_CPU_DETECT
2465 /* Add also "native" as possible value. */
2466 candidates.safe_push ("native");
2467#endif
2468
2469 char *s;
2470 const char *hint
2471 = candidates_list_and_hint (opts->x_ix86_tune_string, s, candidates);
2472 if (hint)
2473 inform (input_location,
2474 main_args_p
2475 ? G_("valid arguments to %<-mtune=%> switch are: "
2476 "%s; did you mean %qs?")
2477 : G_("valid arguments to %<target(\"tune=\")%> attribute are: "
2478 "%s; did you mean %qs?"), s, hint);
2479 else
2480 inform (input_location,
2481 main_args_p
2482 ? G_("valid arguments to %<-mtune=%> switch are: %s")
2483 : G_("valid arguments to %<target(\"tune=\")%> attribute "
2484 "are: %s"), s);
2485 XDELETEVEC (s);
2486 }
2487
1e964774 2488 set_ix86_tune_features (opts, ix86_tune, opts->x_ix86_dump_tunes);
2bf6d935 2489
6bc89193 2490 ix86_recompute_optlev_based_flags (opts, opts_set);
2bf6d935
ML
2491
2492 ix86_tune_cost = processor_cost_table[ix86_tune];
2493 /* TODO: ix86_cost should be chosen at instruction or function granuality
2494 so for cold code we use size_cost even in !optimize_size compilation. */
2495 if (opts->x_optimize_size)
2496 ix86_cost = &ix86_size_cost;
2497 else
2498 ix86_cost = ix86_tune_cost;
2499
2500 /* Arrange to set up i386_stack_locals for all functions. */
2501 init_machine_status = ix86_init_machine_status;
2502
2503 /* Validate -mregparm= value. */
2504 if (opts_set->x_ix86_regparm)
2505 {
2506 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2507 warning (0, "%<-mregparm%> is ignored in 64-bit mode");
2508 else if (TARGET_IAMCU_P (opts->x_target_flags))
2509 warning (0, "%<-mregparm%> is ignored for Intel MCU psABI");
2510 if (opts->x_ix86_regparm > REGPARM_MAX)
2511 {
2512 error ("%<-mregparm=%d%> is not between 0 and %d",
2513 opts->x_ix86_regparm, REGPARM_MAX);
2514 opts->x_ix86_regparm = 0;
2515 }
2516 }
2517 if (TARGET_IAMCU_P (opts->x_target_flags)
2518 || TARGET_64BIT_P (opts->x_ix86_isa_flags))
2519 opts->x_ix86_regparm = REGPARM_MAX;
2520
2521 /* Default align_* from the processor table. */
2522 ix86_default_align (opts);
2523
2524 /* Provide default for -mbranch-cost= value. */
6ed76044
ML
2525 SET_OPTION_IF_UNSET (opts, opts_set, ix86_branch_cost,
2526 ix86_tune_cost->branch_cost);
2bf6d935
ML
2527
2528 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2529 {
2530 opts->x_target_flags
2531 |= TARGET_SUBTARGET64_DEFAULT & ~opts_set->x_target_flags;
2532
2533 if (!ix86_arch_specified)
2534 opts->x_ix86_isa_flags
2535 |= TARGET_SUBTARGET64_ISA_DEFAULT & ~opts->x_ix86_isa_flags_explicit;
2536
2537 if (TARGET_RTD_P (opts->x_target_flags))
2538 warning (0,
2539 main_args_p
2540 ? G_("%<-mrtd%> is ignored in 64bit mode")
2541 : G_("%<target(\"rtd\")%> is ignored in 64bit mode"));
2542 }
2543 else
2544 {
2545 opts->x_target_flags
2546 |= TARGET_SUBTARGET32_DEFAULT & ~opts_set->x_target_flags;
2547
2548 if (!ix86_arch_specified)
2549 opts->x_ix86_isa_flags
2550 |= TARGET_SUBTARGET32_ISA_DEFAULT & ~opts->x_ix86_isa_flags_explicit;
2551
2552 /* i386 ABI does not specify red zone. It still makes sense to use it
2553 when programmer takes care to stack from being destroyed. */
2554 if (!(opts_set->x_target_flags & MASK_NO_RED_ZONE))
2555 opts->x_target_flags |= MASK_NO_RED_ZONE;
2556 }
2557
2558 /* Keep nonleaf frame pointers. */
2559 if (opts->x_flag_omit_frame_pointer)
2560 opts->x_target_flags &= ~MASK_OMIT_LEAF_FRAME_POINTER;
2561 else if (TARGET_OMIT_LEAF_FRAME_POINTER_P (opts->x_target_flags))
2562 opts->x_flag_omit_frame_pointer = 1;
2563
2564 /* If we're doing fast math, we don't care about comparison order
2565 wrt NaNs. This lets us use a shorter comparison sequence. */
2566 if (opts->x_flag_finite_math_only)
2567 opts->x_target_flags &= ~MASK_IEEE_FP;
2568
2569 /* If the architecture always has an FPU, turn off NO_FANCY_MATH_387,
2570 since the insns won't need emulation. */
2571 if (ix86_tune_features [X86_TUNE_ALWAYS_FANCY_MATH_387])
2572 opts->x_target_flags &= ~MASK_NO_FANCY_MATH_387;
2573
2574 /* Likewise, if the target doesn't have a 387, or we've specified
2575 software floating point, don't use 387 inline intrinsics. */
2576 if (!TARGET_80387_P (opts->x_target_flags))
2577 opts->x_target_flags |= MASK_NO_FANCY_MATH_387;
2578
2579 /* Turn on MMX builtins for -msse. */
2580 if (TARGET_SSE_P (opts->x_ix86_isa_flags))
2581 opts->x_ix86_isa_flags
2582 |= OPTION_MASK_ISA_MMX & ~opts->x_ix86_isa_flags_explicit;
2583
2584 /* Enable SSE prefetch. */
2585 if (TARGET_SSE_P (opts->x_ix86_isa_flags)
2586 || (TARGET_PRFCHW_P (opts->x_ix86_isa_flags)
2587 && !TARGET_3DNOW_P (opts->x_ix86_isa_flags))
2588 || TARGET_PREFETCHWT1_P (opts->x_ix86_isa_flags))
08a4adcf 2589 ix86_prefetch_sse = true;
2bf6d935
ML
2590
2591 /* Enable popcnt instruction for -msse4.2 or -mabm. */
2592 if (TARGET_SSE4_2_P (opts->x_ix86_isa_flags)
2593 || TARGET_ABM_P (opts->x_ix86_isa_flags))
2594 opts->x_ix86_isa_flags
2595 |= OPTION_MASK_ISA_POPCNT & ~opts->x_ix86_isa_flags_explicit;
2596
2597 /* Enable lzcnt instruction for -mabm. */
2598 if (TARGET_ABM_P(opts->x_ix86_isa_flags))
2599 opts->x_ix86_isa_flags
2600 |= OPTION_MASK_ISA_LZCNT & ~opts->x_ix86_isa_flags_explicit;
2601
2602 /* Disable BMI, BMI2 and TBM instructions for -m16. */
2603 if (TARGET_16BIT_P(opts->x_ix86_isa_flags))
2604 opts->x_ix86_isa_flags
2605 &= ~((OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_TBM)
2606 & ~opts->x_ix86_isa_flags_explicit);
2607
2608 /* Validate -mpreferred-stack-boundary= value or default it to
2609 PREFERRED_STACK_BOUNDARY_DEFAULT. */
2610 ix86_preferred_stack_boundary = PREFERRED_STACK_BOUNDARY_DEFAULT;
2611 if (opts_set->x_ix86_preferred_stack_boundary_arg)
2612 {
2613 int min = TARGET_64BIT_P (opts->x_ix86_isa_flags)? 3 : 2;
2614 int max = TARGET_SEH ? 4 : 12;
2615
2616 if (opts->x_ix86_preferred_stack_boundary_arg < min
2617 || opts->x_ix86_preferred_stack_boundary_arg > max)
2618 {
2619 if (min == max)
2620 error ("%<-mpreferred-stack-boundary%> is not supported "
2621 "for this target");
2622 else
2623 error ("%<-mpreferred-stack-boundary=%d%> is not between %d and %d",
2624 opts->x_ix86_preferred_stack_boundary_arg, min, max);
2625 }
2626 else
2627 ix86_preferred_stack_boundary
2628 = (1 << opts->x_ix86_preferred_stack_boundary_arg) * BITS_PER_UNIT;
2629 }
2630
2631 /* Set the default value for -mstackrealign. */
6ed76044
ML
2632 SET_OPTION_IF_UNSET (opts, opts_set, ix86_force_align_arg_pointer,
2633 STACK_REALIGN_DEFAULT);
2bf6d935
ML
2634
2635 ix86_default_incoming_stack_boundary = PREFERRED_STACK_BOUNDARY;
2636
2637 /* Validate -mincoming-stack-boundary= value or default it to
2638 MIN_STACK_BOUNDARY/PREFERRED_STACK_BOUNDARY. */
2639 ix86_incoming_stack_boundary = ix86_default_incoming_stack_boundary;
2640 if (opts_set->x_ix86_incoming_stack_boundary_arg)
2641 {
2642 int min = TARGET_64BIT_P (opts->x_ix86_isa_flags) ? 3 : 2;
2643
2644 if (opts->x_ix86_incoming_stack_boundary_arg < min
2645 || opts->x_ix86_incoming_stack_boundary_arg > 12)
2646 error ("%<-mincoming-stack-boundary=%d%> is not between %d and 12",
2647 opts->x_ix86_incoming_stack_boundary_arg, min);
2648 else
2649 {
2650 ix86_user_incoming_stack_boundary
2651 = (1 << opts->x_ix86_incoming_stack_boundary_arg) * BITS_PER_UNIT;
2652 ix86_incoming_stack_boundary
2653 = ix86_user_incoming_stack_boundary;
2654 }
2655 }
2656
2657#ifndef NO_PROFILE_COUNTERS
2658 if (flag_nop_mcount)
2659 error ("%<-mnop-mcount%> is not compatible with this target");
2660#endif
2661 if (flag_nop_mcount && flag_pic)
2662 error ("%<-mnop-mcount%> is not implemented for %<-fPIC%>");
2663
2664 /* Accept -msseregparm only if at least SSE support is enabled. */
2665 if (TARGET_SSEREGPARM_P (opts->x_target_flags)
2666 && ! TARGET_SSE_P (opts->x_ix86_isa_flags))
2667 error (main_args_p
2668 ? G_("%<-msseregparm%> used without SSE enabled")
2669 : G_("%<target(\"sseregparm\")%> used without SSE enabled"));
2670
2671 if (opts_set->x_ix86_fpmath)
2672 {
2673 if (opts->x_ix86_fpmath & FPMATH_SSE)
2674 {
2675 if (!TARGET_SSE_P (opts->x_ix86_isa_flags))
2676 {
2677 if (TARGET_80387_P (opts->x_target_flags))
2678 {
2679 warning (0, "SSE instruction set disabled, using 387 arithmetics");
2680 opts->x_ix86_fpmath = FPMATH_387;
2681 }
2682 }
2683 else if ((opts->x_ix86_fpmath & FPMATH_387)
2684 && !TARGET_80387_P (opts->x_target_flags))
2685 {
2686 warning (0, "387 instruction set disabled, using SSE arithmetics");
2687 opts->x_ix86_fpmath = FPMATH_SSE;
2688 }
2689 }
2690 }
2691 /* For all chips supporting SSE2, -mfpmath=sse performs better than
2692 fpmath=387. The second is however default at many targets since the
2693 extra 80bit precision of temporaries is considered to be part of ABI.
2694 Overwrite the default at least for -ffast-math.
2695 TODO: -mfpmath=both seems to produce same performing code with bit
2696 smaller binaries. It is however not clear if register allocation is
2697 ready for this setting.
2698 Also -mfpmath=387 is overall a lot more compact (bout 4-5%) than SSE
2699 codegen. We may switch to 387 with -ffast-math for size optimized
2700 functions. */
2701 else if (fast_math_flags_set_p (&global_options)
2702 && TARGET_SSE2_P (opts->x_ix86_isa_flags))
2703 opts->x_ix86_fpmath = FPMATH_SSE;
2704 else
2705 opts->x_ix86_fpmath = TARGET_FPMATH_DEFAULT_P (opts->x_ix86_isa_flags);
2706
2707 /* Use external vectorized library in vectorizing intrinsics. */
2708 if (opts_set->x_ix86_veclibabi_type)
2709 switch (opts->x_ix86_veclibabi_type)
2710 {
2711 case ix86_veclibabi_type_svml:
2712 ix86_veclib_handler = &ix86_veclibabi_svml;
2713 break;
2714
2715 case ix86_veclibabi_type_acml:
2716 ix86_veclib_handler = &ix86_veclibabi_acml;
2717 break;
2718
2719 default:
2720 gcc_unreachable ();
2721 }
2722
2723 if (ix86_tune_features [X86_TUNE_ACCUMULATE_OUTGOING_ARGS]
2724 && !(opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
2725 opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
2726
2727 /* If stack probes are required, the space used for large function
2728 arguments on the stack must also be probed, so enable
2729 -maccumulate-outgoing-args so this happens in the prologue. */
2730 if (TARGET_STACK_PROBE_P (opts->x_target_flags)
2731 && !(opts->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
2732 {
2733 if (opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)
2734 warning (0,
2735 main_args_p
2736 ? G_("stack probing requires %<-maccumulate-outgoing-args%> "
2737 "for correctness")
2738 : G_("stack probing requires "
2739 "%<target(\"accumulate-outgoing-args\")%> for "
2740 "correctness"));
2741 opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
2742 }
2743
2744 /* Stack realignment without -maccumulate-outgoing-args requires %ebp,
2745 so enable -maccumulate-outgoing-args when %ebp is fixed. */
2746 if (fixed_regs[BP_REG]
2747 && !(opts->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
2748 {
2749 if (opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)
2750 warning (0,
2751 main_args_p
2752 ? G_("fixed ebp register requires "
2753 "%<-maccumulate-outgoing-args%>")
2754 : G_("fixed ebp register requires "
2755 "%<target(\"accumulate-outgoing-args\")%>"));
2756 opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
2757 }
2758
2759 /* Figure out what ASM_GENERATE_INTERNAL_LABEL builds as a prefix. */
2760 {
2761 char *p;
2762 ASM_GENERATE_INTERNAL_LABEL (internal_label_prefix, "LX", 0);
2763 p = strchr (internal_label_prefix, 'X');
2764 internal_label_prefix_len = p - internal_label_prefix;
2765 *p = '\0';
2766 }
2767
2768 /* When scheduling description is not available, disable scheduler pass
2769 so it won't slow down the compilation and make x87 code slower. */
2770 if (!TARGET_SCHEDULE)
2771 opts->x_flag_schedule_insns_after_reload = opts->x_flag_schedule_insns = 0;
2772
028d4092
ML
2773 SET_OPTION_IF_UNSET (opts, opts_set, param_simultaneous_prefetches,
2774 ix86_tune_cost->simultaneous_prefetches);
2775 SET_OPTION_IF_UNSET (opts, opts_set, param_l1_cache_line_size,
2776 ix86_tune_cost->prefetch_block);
2777 SET_OPTION_IF_UNSET (opts, opts_set, param_l1_cache_size,
2778 ix86_tune_cost->l1_cache_size);
2779 SET_OPTION_IF_UNSET (opts, opts_set, param_l2_cache_size,
2780 ix86_tune_cost->l2_cache_size);
2bf6d935
ML
2781
2782 /* Enable sw prefetching at -O3 for CPUS that prefetching is helpful. */
2783 if (opts->x_flag_prefetch_loop_arrays < 0
2784 && HAVE_prefetch
2785 && (opts->x_optimize >= 3 || opts->x_flag_profile_use)
2786 && !opts->x_optimize_size
2787 && TARGET_SOFTWARE_PREFETCHING_BENEFICIAL)
2788 opts->x_flag_prefetch_loop_arrays = 1;
2789
2790 /* If using typedef char *va_list, signal that __builtin_va_start (&ap, 0)
2791 can be opts->x_optimized to ap = __builtin_next_arg (0). */
2792 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags) && !opts->x_flag_split_stack)
2793 targetm.expand_builtin_va_start = NULL;
2794
2bf6d935
ML
2795#ifdef USE_IX86_CLD
2796 /* Use -mcld by default for 32-bit code if configured with --enable-cld. */
2797 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
2798 opts->x_target_flags |= MASK_CLD & ~opts_set->x_target_flags;
2799#endif
2800
2801 /* Set the default value for -mfentry. */
2802 if (!opts_set->x_flag_fentry)
2803 opts->x_flag_fentry = TARGET_SEH;
2804 else
2805 {
2806 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags) && opts->x_flag_pic
2807 && opts->x_flag_fentry)
2808 sorry ("%<-mfentry%> isn%'t supported for 32-bit in combination "
2809 "with %<-fpic%>");
2810 else if (TARGET_SEH && !opts->x_flag_fentry)
2811 sorry ("%<-mno-fentry%> isn%'t compatible with SEH");
2812 }
2813
2814 if (TARGET_SEH && TARGET_CALL_MS2SYSV_XLOGUES)
2815 sorry ("%<-mcall-ms2sysv-xlogues%> isn%'t currently supported with SEH");
2816
2817 if (!(opts_set->x_target_flags & MASK_VZEROUPPER)
2818 && TARGET_EMIT_VZEROUPPER)
2819 opts->x_target_flags |= MASK_VZEROUPPER;
2820 if (!(opts_set->x_target_flags & MASK_STV))
2821 opts->x_target_flags |= MASK_STV;
2822 /* Disable STV if -mpreferred-stack-boundary={2,3} or
2823 -mincoming-stack-boundary={2,3} or -mstackrealign - the needed
2824 stack realignment will be extra cost the pass doesn't take into
2825 account and the pass can't realign the stack. */
2826 if (ix86_preferred_stack_boundary < 128
2827 || ix86_incoming_stack_boundary < 128
2828 || opts->x_ix86_force_align_arg_pointer)
2829 opts->x_target_flags &= ~MASK_STV;
2830 if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL]
2831 && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_LOAD))
2832 opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_LOAD;
2833 if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL]
2834 && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_STORE))
2835 opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_STORE;
2836
2837 /* Enable 128-bit AVX instruction generation
2838 for the auto-vectorizer. */
586bbef1 2839 if (ix86_tune_features[X86_TUNE_AVX128_OPTIMAL]
2bf6d935
ML
2840 && (opts_set->x_prefer_vector_width_type == PVW_NONE))
2841 opts->x_prefer_vector_width_type = PVW_AVX128;
2842
2843 /* Use 256-bit AVX instruction generation
2844 in the auto-vectorizer. */
2845 if (ix86_tune_features[X86_TUNE_AVX256_OPTIMAL]
2846 && (opts_set->x_prefer_vector_width_type == PVW_NONE))
2847 opts->x_prefer_vector_width_type = PVW_AVX256;
2848
2849 if (opts->x_ix86_recip_name)
2850 {
2851 char *p = ASTRDUP (opts->x_ix86_recip_name);
2852 char *q;
5ebdd535 2853 unsigned int mask;
2bf6d935
ML
2854 bool invert;
2855
2856 while ((q = strtok (p, ",")) != NULL)
2857 {
2858 p = NULL;
2859 if (*q == '!')
2860 {
2861 invert = true;
2862 q++;
2863 }
2864 else
2865 invert = false;
2866
2867 if (!strcmp (q, "default"))
2868 mask = RECIP_MASK_ALL;
2869 else
2870 {
2871 for (i = 0; i < ARRAY_SIZE (recip_options); i++)
2872 if (!strcmp (q, recip_options[i].string))
2873 {
2874 mask = recip_options[i].mask;
2875 break;
2876 }
2877
2878 if (i == ARRAY_SIZE (recip_options))
2879 {
2880 error ("unknown option for %<-mrecip=%s%>", q);
2881 invert = false;
2882 mask = RECIP_MASK_NONE;
2883 }
2884 }
2885
2886 opts->x_recip_mask_explicit |= mask;
2887 if (invert)
2888 opts->x_recip_mask &= ~mask;
2889 else
2890 opts->x_recip_mask |= mask;
2891 }
2892 }
2893
2894 if (TARGET_RECIP_P (opts->x_target_flags))
2895 opts->x_recip_mask |= RECIP_MASK_ALL & ~opts->x_recip_mask_explicit;
2896 else if (opts_set->x_target_flags & MASK_RECIP)
2897 opts->x_recip_mask &= ~(RECIP_MASK_ALL & ~opts->x_recip_mask_explicit);
2898
2899 /* Default long double to 64-bit for 32-bit Bionic and to __float128
2900 for 64-bit Bionic. Also default long double to 64-bit for Intel
2901 MCU psABI. */
2902 if ((TARGET_HAS_BIONIC || TARGET_IAMCU)
2903 && !(opts_set->x_target_flags
2904 & (MASK_LONG_DOUBLE_64 | MASK_LONG_DOUBLE_128)))
2905 opts->x_target_flags |= (TARGET_64BIT
2906 ? MASK_LONG_DOUBLE_128
2907 : MASK_LONG_DOUBLE_64);
2908
2909 /* Only one of them can be active. */
2910 gcc_assert ((opts->x_target_flags & MASK_LONG_DOUBLE_64) == 0
2911 || (opts->x_target_flags & MASK_LONG_DOUBLE_128) == 0);
2912
2913 /* Handle stack protector */
2914 if (!opts_set->x_ix86_stack_protector_guard)
2915 {
2916#ifdef TARGET_THREAD_SSP_OFFSET
2917 if (!TARGET_HAS_BIONIC)
2918 opts->x_ix86_stack_protector_guard = SSP_TLS;
2919 else
2920#endif
2921 opts->x_ix86_stack_protector_guard = SSP_GLOBAL;
2922 }
2923
2924 if (opts_set->x_ix86_stack_protector_guard_offset_str)
2925 {
2926 char *endp;
2927 const char *str = opts->x_ix86_stack_protector_guard_offset_str;
2928
2929 errno = 0;
2930 int64_t offset;
2931
2932#if defined(INT64_T_IS_LONG)
2933 offset = strtol (str, &endp, 0);
2934#else
2935 offset = strtoll (str, &endp, 0);
2936#endif
2937
2938 if (!*str || *endp || errno)
2939 error ("%qs is not a valid number "
2940 "in %<-mstack-protector-guard-offset=%>", str);
2941
2942 if (!IN_RANGE (offset, HOST_WIDE_INT_C (-0x80000000),
2943 HOST_WIDE_INT_C (0x7fffffff)))
2944 error ("%qs is not a valid offset "
2945 "in %<-mstack-protector-guard-offset=%>", str);
2946
2947 opts->x_ix86_stack_protector_guard_offset = offset;
2948 }
2949#ifdef TARGET_THREAD_SSP_OFFSET
2950 else
2951 opts->x_ix86_stack_protector_guard_offset = TARGET_THREAD_SSP_OFFSET;
2952#endif
2953
2954 if (opts_set->x_ix86_stack_protector_guard_reg_str)
2955 {
2956 const char *str = opts->x_ix86_stack_protector_guard_reg_str;
2957 addr_space_t seg = ADDR_SPACE_GENERIC;
2958
2959 /* Discard optional register prefix. */
2960 if (str[0] == '%')
2961 str++;
2962
2963 if (strlen (str) == 2 && str[1] == 's')
2964 {
2965 if (str[0] == 'f')
2966 seg = ADDR_SPACE_SEG_FS;
2967 else if (str[0] == 'g')
2968 seg = ADDR_SPACE_SEG_GS;
2969 }
2970
2971 if (seg == ADDR_SPACE_GENERIC)
2972 error ("%qs is not a valid base register "
2973 "in %<-mstack-protector-guard-reg=%>",
2974 opts->x_ix86_stack_protector_guard_reg_str);
2975
2976 opts->x_ix86_stack_protector_guard_reg = seg;
2977 }
2978 else
2979 {
2980 opts->x_ix86_stack_protector_guard_reg = DEFAULT_TLS_SEG_REG;
2981
2982 /* The kernel uses a different segment register for performance
2983 reasons; a system call would not have to trash the userspace
2984 segment register, which would be expensive. */
2985 if (opts->x_ix86_cmodel == CM_KERNEL)
2986 opts->x_ix86_stack_protector_guard_reg = ADDR_SPACE_SEG_GS;
2987 }
2988
2989 /* Handle -mmemcpy-strategy= and -mmemset-strategy= */
2990 if (opts->x_ix86_tune_memcpy_strategy)
2991 {
2992 char *str = xstrdup (opts->x_ix86_tune_memcpy_strategy);
2993 ix86_parse_stringop_strategy_string (str, false);
2994 free (str);
2995 }
2996
2997 if (opts->x_ix86_tune_memset_strategy)
2998 {
2999 char *str = xstrdup (opts->x_ix86_tune_memset_strategy);
3000 ix86_parse_stringop_strategy_string (str, true);
3001 free (str);
3002 }
3003
3004 /* Save the initial options in case the user does function specific
3005 options. */
3006 if (main_args_p)
e401db7b
JJ
3007 {
3008 opts->x_ix86_excess_precision
3009 = opts->x_flag_excess_precision;
3010 opts->x_ix86_unsafe_math_optimizations
3011 = opts->x_flag_unsafe_math_optimizations;
3012 target_option_default_node = target_option_current_node
3013 = build_target_option_node (opts, opts_set);
3014 }
2bf6d935
ML
3015
3016 if (opts->x_flag_cf_protection != CF_NONE)
3017 opts->x_flag_cf_protection
3018 = (cf_protection_level) (opts->x_flag_cf_protection | CF_SET);
3019
105c2795 3020 if (ix86_tune_features [X86_TUNE_AVOID_256FMA_CHAINS])
028d4092 3021 SET_OPTION_IF_UNSET (opts, opts_set, param_avoid_fma_max_bits, 256);
105c2795 3022 else if (ix86_tune_features [X86_TUNE_AVOID_128FMA_CHAINS])
028d4092 3023 SET_OPTION_IF_UNSET (opts, opts_set, param_avoid_fma_max_bits, 128);
2bf6d935
ML
3024
3025 /* PR86952: jump table usage with retpolines is slow.
3026 The PR provides some numbers about the slowness. */
6ed76044
ML
3027 if (ix86_indirect_branch != indirect_branch_keep)
3028 SET_OPTION_IF_UNSET (opts, opts_set, flag_jump_tables, 0);
2bf6d935
ML
3029
3030 return true;
3031}
3032
3033/* Implement the TARGET_OPTION_OVERRIDE hook. */
3034
3035void
3036ix86_option_override (void)
3037{
3038 ix86_option_override_internal (true, &global_options, &global_options_set);
3039}
3040
3041/* Remember the last target of ix86_set_current_function. */
3042static GTY(()) tree ix86_previous_fndecl;
3043
3044/* Set targets globals to the default (or current #pragma GCC target
3045 if active). Invalidate ix86_previous_fndecl cache. */
3046
3047void
3048ix86_reset_previous_fndecl (void)
3049{
3050 tree new_tree = target_option_current_node;
ba948b37
JJ
3051 cl_target_option_restore (&global_options, &global_options_set,
3052 TREE_TARGET_OPTION (new_tree));
2bf6d935
ML
3053 if (TREE_TARGET_GLOBALS (new_tree))
3054 restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
3055 else if (new_tree == target_option_default_node)
3056 restore_target_globals (&default_target_globals);
3057 else
3058 TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
3059 ix86_previous_fndecl = NULL_TREE;
3060}
3061
3062/* Add target attribute to SIMD clone NODE if needed. */
3063
3064void
3065ix86_simd_clone_adjust (struct cgraph_node *node)
3066{
3067 const char *str = NULL;
3068
3069 /* Attributes need to be adjusted for definitions, not declarations. */
3070 if (!node->definition)
3071 return;
3072
3073 gcc_assert (node->decl == cfun->decl);
3074 switch (node->simdclone->vecsize_mangle)
3075 {
3076 case 'b':
3077 if (!TARGET_SSE2)
3078 str = "sse2";
3079 break;
3080 case 'c':
1609bedd
JJ
3081 if (TARGET_PREFER_AVX128)
3082 {
3083 if (!TARGET_AVX)
3084 str = "avx,prefer-vector-width=256";
3085 else
3086 str = "prefer-vector-width=256";
3087 }
3088 else if (!TARGET_AVX)
2bf6d935
ML
3089 str = "avx";
3090 break;
3091 case 'd':
1609bedd
JJ
3092 if (TARGET_PREFER_AVX128)
3093 {
3094 if (!TARGET_AVX2)
3095 str = "avx2,prefer-vector-width=256";
3096 else
3097 str = "prefer-vector-width=256";
3098 }
3099 else if (!TARGET_AVX2)
2bf6d935
ML
3100 str = "avx2";
3101 break;
3102 case 'e':
1609bedd
JJ
3103 if (TARGET_PREFER_AVX256)
3104 {
3105 if (!TARGET_AVX512F)
3106 str = "avx512f,prefer-vector-width=512";
3107 else
3108 str = "prefer-vector-width=512";
3109 }
3110 else if (!TARGET_AVX512F)
2bf6d935
ML
3111 str = "avx512f";
3112 break;
3113 default:
3114 gcc_unreachable ();
3115 }
3116 if (str == NULL)
3117 return;
3118 push_cfun (NULL);
3119 tree args = build_tree_list (NULL_TREE, build_string (strlen (str), str));
3120 bool ok = ix86_valid_target_attribute_p (node->decl, NULL, args, 0);
3121 gcc_assert (ok);
3122 pop_cfun ();
3123 ix86_reset_previous_fndecl ();
3124 ix86_set_current_function (node->decl);
3125}
3126
3127
3128
3129/* Set the func_type field from the function FNDECL. */
3130
3131static void
3132ix86_set_func_type (tree fndecl)
3133{
3134 if (cfun->machine->func_type == TYPE_UNKNOWN)
3135 {
3136 if (lookup_attribute ("interrupt",
3137 TYPE_ATTRIBUTES (TREE_TYPE (fndecl))))
3138 {
3139 if (ix86_function_naked (fndecl))
3140 error_at (DECL_SOURCE_LOCATION (fndecl),
3141 "interrupt and naked attributes are not compatible");
3142
3143 int nargs = 0;
3144 for (tree arg = DECL_ARGUMENTS (fndecl);
3145 arg;
3146 arg = TREE_CHAIN (arg))
3147 nargs++;
3148 cfun->machine->no_caller_saved_registers = true;
3149 cfun->machine->func_type
3150 = nargs == 2 ? TYPE_EXCEPTION : TYPE_INTERRUPT;
3151
3152 ix86_optimize_mode_switching[X86_DIRFLAG] = 1;
3153
3154 /* Only dwarf2out.c can handle -WORD(AP) as a pointer argument. */
3155 if (write_symbols != NO_DEBUG && write_symbols != DWARF2_DEBUG)
3156 sorry ("only DWARF debug format is supported for interrupt "
3157 "service routine");
3158 }
3159 else
3160 {
3161 cfun->machine->func_type = TYPE_NORMAL;
3162 if (lookup_attribute ("no_caller_saved_registers",
3163 TYPE_ATTRIBUTES (TREE_TYPE (fndecl))))
3164 cfun->machine->no_caller_saved_registers = true;
3165 }
3166 }
3167}
3168
3169/* Set the indirect_branch_type field from the function FNDECL. */
3170
3171static void
3172ix86_set_indirect_branch_type (tree fndecl)
3173{
3174 if (cfun->machine->indirect_branch_type == indirect_branch_unset)
3175 {
3176 tree attr = lookup_attribute ("indirect_branch",
3177 DECL_ATTRIBUTES (fndecl));
3178 if (attr != NULL)
3179 {
3180 tree args = TREE_VALUE (attr);
3181 if (args == NULL)
3182 gcc_unreachable ();
3183 tree cst = TREE_VALUE (args);
3184 if (strcmp (TREE_STRING_POINTER (cst), "keep") == 0)
3185 cfun->machine->indirect_branch_type = indirect_branch_keep;
3186 else if (strcmp (TREE_STRING_POINTER (cst), "thunk") == 0)
3187 cfun->machine->indirect_branch_type = indirect_branch_thunk;
3188 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-inline") == 0)
3189 cfun->machine->indirect_branch_type = indirect_branch_thunk_inline;
3190 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-extern") == 0)
3191 cfun->machine->indirect_branch_type = indirect_branch_thunk_extern;
3192 else
3193 gcc_unreachable ();
3194 }
3195 else
3196 cfun->machine->indirect_branch_type = ix86_indirect_branch;
3197
3198 /* -mcmodel=large is not compatible with -mindirect-branch=thunk
3199 nor -mindirect-branch=thunk-extern. */
3200 if ((ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3201 && ((cfun->machine->indirect_branch_type
3202 == indirect_branch_thunk_extern)
3203 || (cfun->machine->indirect_branch_type
3204 == indirect_branch_thunk)))
3205 error ("%<-mindirect-branch=%s%> and %<-mcmodel=large%> are not "
3206 "compatible",
3207 ((cfun->machine->indirect_branch_type
3208 == indirect_branch_thunk_extern)
3209 ? "thunk-extern" : "thunk"));
3210
3211 if (cfun->machine->indirect_branch_type != indirect_branch_keep
9be3bb2c
L
3212 && (cfun->machine->indirect_branch_type
3213 != indirect_branch_thunk_extern)
2bf6d935
ML
3214 && (flag_cf_protection & CF_RETURN))
3215 error ("%<-mindirect-branch%> and %<-fcf-protection%> are not "
3216 "compatible");
3217 }
3218
3219 if (cfun->machine->function_return_type == indirect_branch_unset)
3220 {
3221 tree attr = lookup_attribute ("function_return",
3222 DECL_ATTRIBUTES (fndecl));
3223 if (attr != NULL)
3224 {
3225 tree args = TREE_VALUE (attr);
3226 if (args == NULL)
3227 gcc_unreachable ();
3228 tree cst = TREE_VALUE (args);
3229 if (strcmp (TREE_STRING_POINTER (cst), "keep") == 0)
3230 cfun->machine->function_return_type = indirect_branch_keep;
3231 else if (strcmp (TREE_STRING_POINTER (cst), "thunk") == 0)
3232 cfun->machine->function_return_type = indirect_branch_thunk;
3233 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-inline") == 0)
3234 cfun->machine->function_return_type = indirect_branch_thunk_inline;
3235 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-extern") == 0)
3236 cfun->machine->function_return_type = indirect_branch_thunk_extern;
3237 else
3238 gcc_unreachable ();
3239 }
3240 else
3241 cfun->machine->function_return_type = ix86_function_return;
3242
3243 /* -mcmodel=large is not compatible with -mfunction-return=thunk
3244 nor -mfunction-return=thunk-extern. */
3245 if ((ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3246 && ((cfun->machine->function_return_type
3247 == indirect_branch_thunk_extern)
3248 || (cfun->machine->function_return_type
3249 == indirect_branch_thunk)))
3250 error ("%<-mfunction-return=%s%> and %<-mcmodel=large%> are not "
3251 "compatible",
3252 ((cfun->machine->function_return_type
3253 == indirect_branch_thunk_extern)
3254 ? "thunk-extern" : "thunk"));
3255
3256 if (cfun->machine->function_return_type != indirect_branch_keep
9be3bb2c
L
3257 && (cfun->machine->function_return_type
3258 != indirect_branch_thunk_extern)
2bf6d935
ML
3259 && (flag_cf_protection & CF_RETURN))
3260 error ("%<-mfunction-return%> and %<-fcf-protection%> are not "
3261 "compatible");
3262 }
3263}
3264
3265/* Establish appropriate back-end context for processing the function
3266 FNDECL. The argument might be NULL to indicate processing at top
3267 level, outside of any function scope. */
3268void
3269ix86_set_current_function (tree fndecl)
3270{
3271 /* Only change the context if the function changes. This hook is called
3272 several times in the course of compiling a function, and we don't want to
3273 slow things down too much or call target_reinit when it isn't safe. */
3274 if (fndecl == ix86_previous_fndecl)
3275 {
3276 /* There may be 2 function bodies for the same function FNDECL,
3277 one is extern inline and one isn't. Call ix86_set_func_type
3278 to set the func_type field. */
3279 if (fndecl != NULL_TREE)
3280 {
3281 ix86_set_func_type (fndecl);
3282 ix86_set_indirect_branch_type (fndecl);
3283 }
3284 return;
3285 }
3286
3287 tree old_tree;
3288 if (ix86_previous_fndecl == NULL_TREE)
3289 old_tree = target_option_current_node;
3290 else if (DECL_FUNCTION_SPECIFIC_TARGET (ix86_previous_fndecl))
3291 old_tree = DECL_FUNCTION_SPECIFIC_TARGET (ix86_previous_fndecl);
3292 else
3293 old_tree = target_option_default_node;
3294
3295 if (fndecl == NULL_TREE)
3296 {
3297 if (old_tree != target_option_current_node)
3298 ix86_reset_previous_fndecl ();
3299 return;
3300 }
3301
3302 ix86_set_func_type (fndecl);
3303 ix86_set_indirect_branch_type (fndecl);
3304
3305 tree new_tree = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
3306 if (new_tree == NULL_TREE)
3307 new_tree = target_option_default_node;
3308
3309 if (old_tree != new_tree)
3310 {
ba948b37
JJ
3311 cl_target_option_restore (&global_options, &global_options_set,
3312 TREE_TARGET_OPTION (new_tree));
2bf6d935
ML
3313 if (TREE_TARGET_GLOBALS (new_tree))
3314 restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
3315 else if (new_tree == target_option_default_node)
3316 restore_target_globals (&default_target_globals);
3317 else
3318 TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
3319 }
e401db7b
JJ
3320 else if (flag_unsafe_math_optimizations
3321 != TREE_TARGET_OPTION (new_tree)->x_ix86_unsafe_math_optimizations
3322 || (flag_excess_precision
3323 != TREE_TARGET_OPTION (new_tree)->x_ix86_excess_precision))
3324 {
3325 cl_target_option_restore (&global_options, &global_options_set,
3326 TREE_TARGET_OPTION (new_tree));
3327 ix86_excess_precision = flag_excess_precision;
3328 ix86_unsafe_math_optimizations = flag_unsafe_math_optimizations;
3329 DECL_FUNCTION_SPECIFIC_TARGET (fndecl) = new_tree
3330 = build_target_option_node (&global_options, &global_options_set);
3331 if (TREE_TARGET_GLOBALS (new_tree))
3332 restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
3333 else if (new_tree == target_option_default_node)
3334 restore_target_globals (&default_target_globals);
3335 else
3336 TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
3337 }
2bf6d935
ML
3338 ix86_previous_fndecl = fndecl;
3339
3340 static bool prev_no_caller_saved_registers;
3341
3342 /* 64-bit MS and SYSV ABI have different set of call used registers.
3343 Avoid expensive re-initialization of init_regs each time we switch
3344 function context. */
3345 if (TARGET_64BIT
a365fa06 3346 && (call_used_or_fixed_reg_p (SI_REG)
2bf6d935
ML
3347 == (cfun->machine->call_abi == MS_ABI)))
3348 reinit_regs ();
3349 /* Need to re-initialize init_regs if caller-saved registers are
3350 changed. */
3351 else if (prev_no_caller_saved_registers
3352 != cfun->machine->no_caller_saved_registers)
3353 reinit_regs ();
3354
3355 if (cfun->machine->func_type != TYPE_NORMAL
3356 || cfun->machine->no_caller_saved_registers)
3357 {
3358 /* Don't allow SSE, MMX nor x87 instructions since they
3359 may change processor state. */
3360 const char *isa;
3361 if (TARGET_SSE)
3362 isa = "SSE";
3363 else if (TARGET_MMX)
3364 isa = "MMX/3Dnow";
3365 else if (TARGET_80387)
3366 isa = "80387";
3367 else
3368 isa = NULL;
3369 if (isa != NULL)
3370 {
3371 if (cfun->machine->func_type != TYPE_NORMAL)
3372 sorry (cfun->machine->func_type == TYPE_EXCEPTION
3373 ? G_("%s instructions aren%'t allowed in an"
3374 " exception service routine")
3375 : G_("%s instructions aren%'t allowed in an"
3376 " interrupt service routine"),
3377 isa);
3378 else
3379 sorry ("%s instructions aren%'t allowed in a function with "
3380 "the %<no_caller_saved_registers%> attribute", isa);
3381 /* Don't issue the same error twice. */
3382 cfun->machine->func_type = TYPE_NORMAL;
3383 cfun->machine->no_caller_saved_registers = false;
3384 }
3385 }
3386
3387 prev_no_caller_saved_registers
3388 = cfun->machine->no_caller_saved_registers;
3389}
3390
3391/* Implement the TARGET_OFFLOAD_OPTIONS hook. */
3392char *
3393ix86_offload_options (void)
3394{
3395 if (TARGET_LP64)
3396 return xstrdup ("-foffload-abi=lp64");
3397 return xstrdup ("-foffload-abi=ilp32");
3398}
3399
3400/* Handle "cdecl", "stdcall", "fastcall", "regparm", "thiscall",
3401 and "sseregparm" calling convention attributes;
3402 arguments as in struct attribute_spec.handler. */
3403
3404static tree
3405ix86_handle_cconv_attribute (tree *node, tree name, tree args, int,
3406 bool *no_add_attrs)
3407{
3408 if (TREE_CODE (*node) != FUNCTION_TYPE
3409 && TREE_CODE (*node) != METHOD_TYPE
3410 && TREE_CODE (*node) != FIELD_DECL
3411 && TREE_CODE (*node) != TYPE_DECL)
3412 {
3413 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3414 name);
3415 *no_add_attrs = true;
3416 return NULL_TREE;
3417 }
3418
3419 /* Can combine regparm with all attributes but fastcall, and thiscall. */
3420 if (is_attribute_p ("regparm", name))
3421 {
3422 tree cst;
3423
3424 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3425 {
3426 error ("fastcall and regparm attributes are not compatible");
3427 }
3428
3429 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3430 {
3431 error ("regparam and thiscall attributes are not compatible");
3432 }
3433
3434 cst = TREE_VALUE (args);
3435 if (TREE_CODE (cst) != INTEGER_CST)
3436 {
3437 warning (OPT_Wattributes,
3438 "%qE attribute requires an integer constant argument",
3439 name);
3440 *no_add_attrs = true;
3441 }
3442 else if (compare_tree_int (cst, REGPARM_MAX) > 0)
3443 {
3444 warning (OPT_Wattributes, "argument to %qE attribute larger than %d",
3445 name, REGPARM_MAX);
3446 *no_add_attrs = true;
3447 }
3448
3449 return NULL_TREE;
3450 }
3451
3452 if (TARGET_64BIT)
3453 {
3454 /* Do not warn when emulating the MS ABI. */
3455 if ((TREE_CODE (*node) != FUNCTION_TYPE
3456 && TREE_CODE (*node) != METHOD_TYPE)
3457 || ix86_function_type_abi (*node) != MS_ABI)
3458 warning (OPT_Wattributes, "%qE attribute ignored",
3459 name);
3460 *no_add_attrs = true;
3461 return NULL_TREE;
3462 }
3463
3464 /* Can combine fastcall with stdcall (redundant) and sseregparm. */
3465 if (is_attribute_p ("fastcall", name))
3466 {
3467 if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
3468 {
3469 error ("fastcall and cdecl attributes are not compatible");
3470 }
3471 if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
3472 {
3473 error ("fastcall and stdcall attributes are not compatible");
3474 }
3475 if (lookup_attribute ("regparm", TYPE_ATTRIBUTES (*node)))
3476 {
3477 error ("fastcall and regparm attributes are not compatible");
3478 }
3479 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3480 {
3481 error ("fastcall and thiscall attributes are not compatible");
3482 }
3483 }
3484
3485 /* Can combine stdcall with fastcall (redundant), regparm and
3486 sseregparm. */
3487 else if (is_attribute_p ("stdcall", name))
3488 {
3489 if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
3490 {
3491 error ("stdcall and cdecl attributes are not compatible");
3492 }
3493 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3494 {
3495 error ("stdcall and fastcall attributes are not compatible");
3496 }
3497 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3498 {
3499 error ("stdcall and thiscall attributes are not compatible");
3500 }
3501 }
3502
3503 /* Can combine cdecl with regparm and sseregparm. */
3504 else if (is_attribute_p ("cdecl", name))
3505 {
3506 if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
3507 {
3508 error ("stdcall and cdecl attributes are not compatible");
3509 }
3510 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3511 {
3512 error ("fastcall and cdecl attributes are not compatible");
3513 }
3514 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3515 {
3516 error ("cdecl and thiscall attributes are not compatible");
3517 }
3518 }
3519 else if (is_attribute_p ("thiscall", name))
3520 {
3521 if (TREE_CODE (*node) != METHOD_TYPE && pedantic)
3522 warning (OPT_Wattributes, "%qE attribute is used for non-class method",
3523 name);
3524 if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
3525 {
3526 error ("stdcall and thiscall attributes are not compatible");
3527 }
3528 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3529 {
3530 error ("fastcall and thiscall attributes are not compatible");
3531 }
3532 if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
3533 {
3534 error ("cdecl and thiscall attributes are not compatible");
3535 }
3536 }
3537
3538 /* Can combine sseregparm with all attributes. */
3539
3540 return NULL_TREE;
3541}
3542
3543#ifndef CHECK_STACK_LIMIT
3544#define CHECK_STACK_LIMIT (-1)
3545#endif
3546
3547/* The transactional memory builtins are implicitly regparm or fastcall
3548 depending on the ABI. Override the generic do-nothing attribute that
3549 these builtins were declared with, and replace it with one of the two
3550 attributes that we expect elsewhere. */
3551
3552static tree
3553ix86_handle_tm_regparm_attribute (tree *node, tree, tree,
3554 int flags, bool *no_add_attrs)
3555{
3556 tree alt;
3557
3558 /* In no case do we want to add the placeholder attribute. */
3559 *no_add_attrs = true;
3560
3561 /* The 64-bit ABI is unchanged for transactional memory. */
3562 if (TARGET_64BIT)
3563 return NULL_TREE;
3564
3565 /* ??? Is there a better way to validate 32-bit windows? We have
3566 cfun->machine->call_abi, but that seems to be set only for 64-bit. */
3567 if (CHECK_STACK_LIMIT > 0)
3568 alt = tree_cons (get_identifier ("fastcall"), NULL, NULL);
3569 else
3570 {
3571 alt = tree_cons (NULL, build_int_cst (NULL, 2), NULL);
3572 alt = tree_cons (get_identifier ("regparm"), alt, NULL);
3573 }
3574 decl_attributes (node, alt, flags);
3575
3576 return NULL_TREE;
3577}
3578
3579/* Handle a "force_align_arg_pointer" attribute. */
3580
3581static tree
3582ix86_handle_force_align_arg_pointer_attribute (tree *node, tree name,
3583 tree, int, bool *no_add_attrs)
3584{
3585 if (TREE_CODE (*node) != FUNCTION_TYPE
3586 && TREE_CODE (*node) != METHOD_TYPE
3587 && TREE_CODE (*node) != FIELD_DECL
3588 && TREE_CODE (*node) != TYPE_DECL)
3589 {
3590 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3591 name);
3592 *no_add_attrs = true;
3593 }
3594
3595 return NULL_TREE;
3596}
3597
3598/* Handle a "ms_struct" or "gcc_struct" attribute; arguments as in
3599 struct attribute_spec.handler. */
3600
3601static tree
3602ix86_handle_struct_attribute (tree *node, tree name, tree, int,
3603 bool *no_add_attrs)
3604{
3605 tree *type = NULL;
3606 if (DECL_P (*node))
3607 {
3608 if (TREE_CODE (*node) == TYPE_DECL)
3609 type = &TREE_TYPE (*node);
3610 }
3611 else
3612 type = node;
3613
3614 if (!(type && RECORD_OR_UNION_TYPE_P (*type)))
3615 {
3616 warning (OPT_Wattributes, "%qE attribute ignored",
3617 name);
3618 *no_add_attrs = true;
3619 }
3620
3621 else if ((is_attribute_p ("ms_struct", name)
3622 && lookup_attribute ("gcc_struct", TYPE_ATTRIBUTES (*type)))
3623 || ((is_attribute_p ("gcc_struct", name)
3624 && lookup_attribute ("ms_struct", TYPE_ATTRIBUTES (*type)))))
3625 {
3626 warning (OPT_Wattributes, "%qE incompatible attribute ignored",
3627 name);
3628 *no_add_attrs = true;
3629 }
3630
3631 return NULL_TREE;
3632}
3633
3634/* Handle a "callee_pop_aggregate_return" attribute; arguments as
3635 in struct attribute_spec handler. */
3636
3637static tree
3638ix86_handle_callee_pop_aggregate_return (tree *node, tree name, tree args, int,
3639 bool *no_add_attrs)
3640{
3641 if (TREE_CODE (*node) != FUNCTION_TYPE
3642 && TREE_CODE (*node) != METHOD_TYPE
3643 && TREE_CODE (*node) != FIELD_DECL
3644 && TREE_CODE (*node) != TYPE_DECL)
3645 {
3646 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3647 name);
3648 *no_add_attrs = true;
3649 return NULL_TREE;
3650 }
3651 if (TARGET_64BIT)
3652 {
3653 warning (OPT_Wattributes, "%qE attribute only available for 32-bit",
3654 name);
3655 *no_add_attrs = true;
3656 return NULL_TREE;
3657 }
3658 if (is_attribute_p ("callee_pop_aggregate_return", name))
3659 {
3660 tree cst;
3661
3662 cst = TREE_VALUE (args);
3663 if (TREE_CODE (cst) != INTEGER_CST)
3664 {
3665 warning (OPT_Wattributes,
3666 "%qE attribute requires an integer constant argument",
3667 name);
3668 *no_add_attrs = true;
3669 }
3670 else if (compare_tree_int (cst, 0) != 0
3671 && compare_tree_int (cst, 1) != 0)
3672 {
3673 warning (OPT_Wattributes,
3674 "argument to %qE attribute is neither zero, nor one",
3675 name);
3676 *no_add_attrs = true;
3677 }
3678
3679 return NULL_TREE;
3680 }
3681
3682 return NULL_TREE;
3683}
3684
3685/* Handle a "ms_abi" or "sysv" attribute; arguments as in
3686 struct attribute_spec.handler. */
3687
3688static tree
3689ix86_handle_abi_attribute (tree *node, tree name, tree, int,
3690 bool *no_add_attrs)
3691{
3692 if (TREE_CODE (*node) != FUNCTION_TYPE
3693 && TREE_CODE (*node) != METHOD_TYPE
3694 && TREE_CODE (*node) != FIELD_DECL
3695 && TREE_CODE (*node) != TYPE_DECL)
3696 {
3697 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3698 name);
3699 *no_add_attrs = true;
3700 return NULL_TREE;
3701 }
3702
3703 /* Can combine regparm with all attributes but fastcall. */
3704 if (is_attribute_p ("ms_abi", name))
3705 {
3706 if (lookup_attribute ("sysv_abi", TYPE_ATTRIBUTES (*node)))
3707 {
a9c697b8
MS
3708 error ("%qs and %qs attributes are not compatible",
3709 "ms_abi", "sysv_abi");
2bf6d935
ML
3710 }
3711
3712 return NULL_TREE;
3713 }
3714 else if (is_attribute_p ("sysv_abi", name))
3715 {
3716 if (lookup_attribute ("ms_abi", TYPE_ATTRIBUTES (*node)))
3717 {
a9c697b8
MS
3718 error ("%qs and %qs attributes are not compatible",
3719 "ms_abi", "sysv_abi");
2bf6d935
ML
3720 }
3721
3722 return NULL_TREE;
3723 }
3724
3725 return NULL_TREE;
3726}
3727
3728static tree
3729ix86_handle_fndecl_attribute (tree *node, tree name, tree args, int,
3730 bool *no_add_attrs)
3731{
3732 if (TREE_CODE (*node) != FUNCTION_DECL)
3733 {
3734 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3735 name);
3736 *no_add_attrs = true;
3737 }
3738
3739 if (is_attribute_p ("indirect_branch", name))
3740 {
3741 tree cst = TREE_VALUE (args);
3742 if (TREE_CODE (cst) != STRING_CST)
3743 {
3744 warning (OPT_Wattributes,
3745 "%qE attribute requires a string constant argument",
3746 name);
3747 *no_add_attrs = true;
3748 }
3749 else if (strcmp (TREE_STRING_POINTER (cst), "keep") != 0
3750 && strcmp (TREE_STRING_POINTER (cst), "thunk") != 0
3751 && strcmp (TREE_STRING_POINTER (cst), "thunk-inline") != 0
3752 && strcmp (TREE_STRING_POINTER (cst), "thunk-extern") != 0)
3753 {
3754 warning (OPT_Wattributes,
3755 "argument to %qE attribute is not "
3756 "(keep|thunk|thunk-inline|thunk-extern)", name);
3757 *no_add_attrs = true;
3758 }
3759 }
3760
3761 if (is_attribute_p ("function_return", name))
3762 {
3763 tree cst = TREE_VALUE (args);
3764 if (TREE_CODE (cst) != STRING_CST)
3765 {
3766 warning (OPT_Wattributes,
3767 "%qE attribute requires a string constant argument",
3768 name);
3769 *no_add_attrs = true;
3770 }
3771 else if (strcmp (TREE_STRING_POINTER (cst), "keep") != 0
3772 && strcmp (TREE_STRING_POINTER (cst), "thunk") != 0
3773 && strcmp (TREE_STRING_POINTER (cst), "thunk-inline") != 0
3774 && strcmp (TREE_STRING_POINTER (cst), "thunk-extern") != 0)
3775 {
3776 warning (OPT_Wattributes,
3777 "argument to %qE attribute is not "
3778 "(keep|thunk|thunk-inline|thunk-extern)", name);
3779 *no_add_attrs = true;
3780 }
3781 }
3782
3783 return NULL_TREE;
3784}
3785
3786static tree
3787ix86_handle_no_caller_saved_registers_attribute (tree *, tree, tree,
3788 int, bool *)
3789{
3790 return NULL_TREE;
3791}
3792
3793static tree
3794ix86_handle_interrupt_attribute (tree *node, tree, tree, int, bool *)
3795{
3796 /* DECL_RESULT and DECL_ARGUMENTS do not exist there yet,
3797 but the function type contains args and return type data. */
3798 tree func_type = *node;
3799 tree return_type = TREE_TYPE (func_type);
3800
3801 int nargs = 0;
3802 tree current_arg_type = TYPE_ARG_TYPES (func_type);
3803 while (current_arg_type
3804 && ! VOID_TYPE_P (TREE_VALUE (current_arg_type)))
3805 {
3806 if (nargs == 0)
3807 {
3808 if (! POINTER_TYPE_P (TREE_VALUE (current_arg_type)))
3809 error ("interrupt service routine should have a pointer "
3810 "as the first argument");
3811 }
3812 else if (nargs == 1)
3813 {
3814 if (TREE_CODE (TREE_VALUE (current_arg_type)) != INTEGER_TYPE
3815 || TYPE_MODE (TREE_VALUE (current_arg_type)) != word_mode)
3816 error ("interrupt service routine should have %qs "
3817 "as the second argument",
3818 TARGET_64BIT
3819 ? (TARGET_X32 ? "unsigned long long int"
3820 : "unsigned long int")
3821 : "unsigned int");
3822 }
3823 nargs++;
3824 current_arg_type = TREE_CHAIN (current_arg_type);
3825 }
3826 if (!nargs || nargs > 2)
3827 error ("interrupt service routine can only have a pointer argument "
3828 "and an optional integer argument");
3829 if (! VOID_TYPE_P (return_type))
a9c697b8 3830 error ("interrupt service routine must return %<void%>");
2bf6d935
ML
3831
3832 return NULL_TREE;
3833}
3834
3835/* Handle fentry_name / fentry_section attribute. */
3836
3837static tree
3838ix86_handle_fentry_name (tree *node, tree name, tree args,
3839 int, bool *no_add_attrs)
3840{
3841 if (TREE_CODE (*node) == FUNCTION_DECL
3842 && TREE_CODE (TREE_VALUE (args)) == STRING_CST)
3843 /* Do nothing else, just set the attribute. We'll get at
3844 it later with lookup_attribute. */
3845 ;
3846 else
3847 {
3848 warning (OPT_Wattributes, "%qE attribute ignored", name);
3849 *no_add_attrs = true;
3850 }
3851
3852 return NULL_TREE;
3853}
3854
3855/* Table of valid machine attributes. */
3856const struct attribute_spec ix86_attribute_table[] =
3857{
3858 /* { name, min_len, max_len, decl_req, type_req, fn_type_req,
3859 affects_type_identity, handler, exclude } */
3860 /* Stdcall attribute says callee is responsible for popping arguments
3861 if they are not variable. */
3862 { "stdcall", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3863 NULL },
3864 /* Fastcall attribute says callee is responsible for popping arguments
3865 if they are not variable. */
3866 { "fastcall", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3867 NULL },
3868 /* Thiscall attribute says callee is responsible for popping arguments
3869 if they are not variable. */
3870 { "thiscall", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3871 NULL },
3872 /* Cdecl attribute says the callee is a normal C declaration */
3873 { "cdecl", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3874 NULL },
3875 /* Regparm attribute specifies how many integer arguments are to be
3876 passed in registers. */
3877 { "regparm", 1, 1, false, true, true, true, ix86_handle_cconv_attribute,
3878 NULL },
3879 /* Sseregparm attribute says we are using x86_64 calling conventions
3880 for FP arguments. */
3881 { "sseregparm", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3882 NULL },
3883 /* The transactional memory builtins are implicitly regparm or fastcall
3884 depending on the ABI. Override the generic do-nothing attribute that
3885 these builtins were declared with. */
3886 { "*tm regparm", 0, 0, false, true, true, true,
3887 ix86_handle_tm_regparm_attribute, NULL },
3888 /* force_align_arg_pointer says this function realigns the stack at entry. */
3889 { "force_align_arg_pointer", 0, 0,
3890 false, true, true, false, ix86_handle_force_align_arg_pointer_attribute,
3891 NULL },
3892#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
3893 { "dllimport", 0, 0, false, false, false, false, handle_dll_attribute,
3894 NULL },
3895 { "dllexport", 0, 0, false, false, false, false, handle_dll_attribute,
3896 NULL },
3897 { "shared", 0, 0, true, false, false, false,
3898 ix86_handle_shared_attribute, NULL },
3899#endif
3900 { "ms_struct", 0, 0, false, false, false, false,
3901 ix86_handle_struct_attribute, NULL },
3902 { "gcc_struct", 0, 0, false, false, false, false,
3903 ix86_handle_struct_attribute, NULL },
3904#ifdef SUBTARGET_ATTRIBUTE_TABLE
3905 SUBTARGET_ATTRIBUTE_TABLE,
3906#endif
3907 /* ms_abi and sysv_abi calling convention function attributes. */
3908 { "ms_abi", 0, 0, false, true, true, true, ix86_handle_abi_attribute, NULL },
3909 { "sysv_abi", 0, 0, false, true, true, true, ix86_handle_abi_attribute,
3910 NULL },
3911 { "ms_abi va_list", 0, 0, false, false, false, false, NULL, NULL },
3912 { "sysv_abi va_list", 0, 0, false, false, false, false, NULL, NULL },
3913 { "ms_hook_prologue", 0, 0, true, false, false, false,
3914 ix86_handle_fndecl_attribute, NULL },
3915 { "callee_pop_aggregate_return", 1, 1, false, true, true, true,
3916 ix86_handle_callee_pop_aggregate_return, NULL },
3917 { "interrupt", 0, 0, false, true, true, false,
3918 ix86_handle_interrupt_attribute, NULL },
3919 { "no_caller_saved_registers", 0, 0, false, true, true, false,
3920 ix86_handle_no_caller_saved_registers_attribute, NULL },
3921 { "naked", 0, 0, true, false, false, false,
3922 ix86_handle_fndecl_attribute, NULL },
3923 { "indirect_branch", 1, 1, true, false, false, false,
3924 ix86_handle_fndecl_attribute, NULL },
3925 { "function_return", 1, 1, true, false, false, false,
3926 ix86_handle_fndecl_attribute, NULL },
3927 { "indirect_return", 0, 0, false, true, true, false,
3928 NULL, NULL },
3929 { "fentry_name", 1, 1, true, false, false, false,
3930 ix86_handle_fentry_name, NULL },
3931 { "fentry_section", 1, 1, true, false, false, false,
3932 ix86_handle_fentry_name, NULL },
3933 { "cf_check", 0, 0, true, false, false, false,
3934 ix86_handle_fndecl_attribute, NULL },
3935
3936 /* End element. */
3937 { NULL, 0, 0, false, false, false, false, NULL, NULL }
3938};
3939
3940#include "gt-i386-options.h"