]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/config/i386/i386-options.c
projects / thirdparty / gcc.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
regcprop: Avoid DCE of asm goto [PR100590]
[thirdparty/gcc.git] / gcc / config / i386 / i386-options.c
CommitLineData
99dee823 1/* Copyright (C) 1988-2021 Free Software Foundation, Inc.
2bf6d935
ML		 2
3This file is part of GCC.
4
5GCC is free software; you can redistribute it and/or modify
6it under the terms of the GNU General Public License as published by
7the Free Software Foundation; either version 3, or (at your option)
8any later version.
9
10GCC is distributed in the hope that it will be useful,
11but WITHOUT ANY WARRANTY; without even the implied warranty of
12MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13GNU General Public License for more details.
14
15You should have received a copy of the GNU General Public License
16along with GCC; see the file COPYING3. If not see
17<http://www.gnu.org/licenses/>. */
18
19#define IN_TARGET_CODE 1
20
21#include "config.h"
22#include "system.h"
23#include "coretypes.h"
24#include "backend.h"
25#include "rtl.h"
26#include "tree.h"
27#include "memmodel.h"
28#include "gimple.h"
29#include "cfghooks.h"
30#include "cfgloop.h"
31#include "df.h"
32#include "tm_p.h"
33#include "stringpool.h"
34#include "expmed.h"
35#include "optabs.h"
36#include "regs.h"
37#include "emit-rtl.h"
38#include "recog.h"
39#include "cgraph.h"
40#include "diagnostic.h"
41#include "cfgbuild.h"
42#include "alias.h"
43#include "fold-const.h"
44#include "attribs.h"
45#include "calls.h"
46#include "stor-layout.h"
47#include "varasm.h"
48#include "output.h"
49#include "insn-attr.h"
50#include "flags.h"
51#include "except.h"
52#include "explow.h"
53#include "expr.h"
54#include "cfgrtl.h"
55#include "common/common-target.h"
56#include "langhooks.h"
57#include "reload.h"
58#include "gimplify.h"
59#include "dwarf2.h"
60#include "tm-constrs.h"
2bf6d935
ML		 61#include "cselib.h"
62#include "sched-int.h"
63#include "opts.h"
64#include "tree-pass.h"
65#include "context.h"
66#include "pass_manager.h"
67#include "target-globals.h"
68#include "gimple-iterator.h"
69#include "tree-vectorizer.h"
70#include "shrink-wrap.h"
71#include "builtins.h"
72#include "rtl-iter.h"
73#include "tree-iterator.h"
74#include "dbgcnt.h"
75#include "case-cfn-macros.h"
76#include "dojump.h"
77#include "fold-const-call.h"
78#include "tree-vrp.h"
79#include "tree-ssanames.h"
80#include "selftest.h"
81#include "selftest-rtl.h"
82#include "print-rtl.h"
83#include "intl.h"
84#include "ifcvt.h"
85#include "symbol-summary.h"
86#include "ipa-prop.h"
87#include "ipa-fnsummary.h"
88#include "wide-int-bitmask.h"
89#include "tree-vector-builder.h"
90#include "debug.h"
91#include "dwarf2out.h"
92#include "i386-options.h"
93
94#include "x86-tune-costs.h"
95
96#ifndef SUBTARGET32_DEFAULT_CPU
97#define SUBTARGET32_DEFAULT_CPU "i386"
98#endif
99
100/* Processor feature/optimization bitmasks. */
37876976
JJ		 101#define m_NONE HOST_WIDE_INT_0U
102#define m_ALL (~HOST_WIDE_INT_0U)
2bf6d935
ML		 103#define m_386 (HOST_WIDE_INT_1U<<PROCESSOR_I386)
104#define m_486 (HOST_WIDE_INT_1U<<PROCESSOR_I486)
105#define m_PENT (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUM)
106#define m_LAKEMONT (HOST_WIDE_INT_1U<<PROCESSOR_LAKEMONT)
107#define m_PPRO (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUMPRO)
108#define m_PENT4 (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUM4)
109#define m_NOCONA (HOST_WIDE_INT_1U<<PROCESSOR_NOCONA)
110#define m_P4_NOCONA (m_PENT4 | m_NOCONA)
111#define m_CORE2 (HOST_WIDE_INT_1U<<PROCESSOR_CORE2)
112#define m_NEHALEM (HOST_WIDE_INT_1U<<PROCESSOR_NEHALEM)
113#define m_SANDYBRIDGE (HOST_WIDE_INT_1U<<PROCESSOR_SANDYBRIDGE)
114#define m_HASWELL (HOST_WIDE_INT_1U<<PROCESSOR_HASWELL)
115#define m_BONNELL (HOST_WIDE_INT_1U<<PROCESSOR_BONNELL)
116#define m_SILVERMONT (HOST_WIDE_INT_1U<<PROCESSOR_SILVERMONT)
117#define m_KNL (HOST_WIDE_INT_1U<<PROCESSOR_KNL)
118#define m_KNM (HOST_WIDE_INT_1U<<PROCESSOR_KNM)
119#define m_SKYLAKE (HOST_WIDE_INT_1U<<PROCESSOR_SKYLAKE)
120#define m_SKYLAKE_AVX512 (HOST_WIDE_INT_1U<<PROCESSOR_SKYLAKE_AVX512)
121#define m_CANNONLAKE (HOST_WIDE_INT_1U<<PROCESSOR_CANNONLAKE)
122#define m_ICELAKE_CLIENT (HOST_WIDE_INT_1U<<PROCESSOR_ICELAKE_CLIENT)
123#define m_ICELAKE_SERVER (HOST_WIDE_INT_1U<<PROCESSOR_ICELAKE_SERVER)
124#define m_CASCADELAKE (HOST_WIDE_INT_1U<<PROCESSOR_CASCADELAKE)
a9fcfec3
HL		 125#define m_TIGERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_TIGERLAKE)
126#define m_COOPERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_COOPERLAKE)
ba9c87d3
CL		 127#define m_SAPPHIRERAPIDS (HOST_WIDE_INT_1U<<PROCESSOR_SAPPHIRERAPIDS)
128#define m_ALDERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_ALDERLAKE)
c02c39fa 129#define m_ROCKETLAKE (HOST_WIDE_INT_1U<<PROCESSOR_ROCKETLAKE)
2bf6d935 130#define m_CORE_AVX512 (m_SKYLAKE_AVX512 | m_CANNONLAKE \
a9fcfec3 131 | m_ICELAKE_CLIENT | m_ICELAKE_SERVER | m_CASCADELAKE \
c02c39fa
CL		 132 | m_TIGERLAKE | m_COOPERLAKE | m_SAPPHIRERAPIDS \
133 | m_ROCKETLAKE)
f2be0833 134#define m_CORE_AVX2 (m_HASWELL | m_SKYLAKE | m_ALDERLAKE | m_CORE_AVX512)
2bf6d935
ML		 135#define m_CORE_ALL (m_CORE2 | m_NEHALEM | m_SANDYBRIDGE | m_CORE_AVX2)
136#define m_GOLDMONT (HOST_WIDE_INT_1U<<PROCESSOR_GOLDMONT)
137#define m_GOLDMONT_PLUS (HOST_WIDE_INT_1U<<PROCESSOR_GOLDMONT_PLUS)
138#define m_TREMONT (HOST_WIDE_INT_1U<<PROCESSOR_TREMONT)
139#define m_INTEL (HOST_WIDE_INT_1U<<PROCESSOR_INTEL)
140
141#define m_GEODE (HOST_WIDE_INT_1U<<PROCESSOR_GEODE)
142#define m_K6 (HOST_WIDE_INT_1U<<PROCESSOR_K6)
143#define m_K6_GEODE (m_K6 | m_GEODE)
144#define m_K8 (HOST_WIDE_INT_1U<<PROCESSOR_K8)
145#define m_ATHLON (HOST_WIDE_INT_1U<<PROCESSOR_ATHLON)
146#define m_ATHLON_K8 (m_K8 | m_ATHLON)
147#define m_AMDFAM10 (HOST_WIDE_INT_1U<<PROCESSOR_AMDFAM10)
148#define m_BDVER1 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER1)
149#define m_BDVER2 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER2)
150#define m_BDVER3 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER3)
151#define m_BDVER4 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER4)
152#define m_ZNVER1 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER1)
153#define m_ZNVER2 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER2)
3e2ae3ee 154#define m_ZNVER3 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER3)
2bf6d935
ML		 155#define m_BTVER1 (HOST_WIDE_INT_1U<<PROCESSOR_BTVER1)
156#define m_BTVER2 (HOST_WIDE_INT_1U<<PROCESSOR_BTVER2)
157#define m_BDVER (m_BDVER1 | m_BDVER2 | m_BDVER3 | m_BDVER4)
158#define m_BTVER (m_BTVER1 | m_BTVER2)
3e2ae3ee 159#define m_ZNVER (m_ZNVER1 | m_ZNVER2 | m_ZNVER3)
2bf6d935
ML		 160#define m_AMD_MULTIPLE (m_ATHLON_K8 | m_AMDFAM10 | m_BDVER | m_BTVER \
161 | m_ZNVER)
162
163#define m_GENERIC (HOST_WIDE_INT_1U<<PROCESSOR_GENERIC)
164
165const char* ix86_tune_feature_names[X86_TUNE_LAST] = {
166#undef DEF_TUNE
167#define DEF_TUNE(tune, name, selector) name,
168#include "x86-tune.def"
169#undef DEF_TUNE
170};
171
172/* Feature tests against the various tunings. */
173unsigned char ix86_tune_features[X86_TUNE_LAST];
174
175/* Feature tests against the various tunings used to create ix86_tune_features
176 based on the processor mask. */
177static unsigned HOST_WIDE_INT initial_ix86_tune_features[X86_TUNE_LAST] = {
178#undef DEF_TUNE
179#define DEF_TUNE(tune, name, selector) selector,
180#include "x86-tune.def"
181#undef DEF_TUNE
182};
183
184/* Feature tests against the various architecture variations. */
185unsigned char ix86_arch_features[X86_ARCH_LAST];
186
9ba66bf5
JJ		 187struct ix86_target_opts
188{
189 const char *option; /* option string */
190 HOST_WIDE_INT mask; /* isa mask options */
191};
192
193/* This table is ordered so that options like -msse4.2 that imply other
194 ISAs come first. Target string will be displayed in the same order. */
195static struct ix86_target_opts isa2_opts[] =
196{
8cf86e14
HL		 197 { "-mcx16", OPTION_MASK_ISA2_CX16 },
198 { "-mvaes", OPTION_MASK_ISA2_VAES },
199 { "-mrdpid", OPTION_MASK_ISA2_RDPID },
200 { "-mpconfig", OPTION_MASK_ISA2_PCONFIG },
201 { "-mwbnoinvd", OPTION_MASK_ISA2_WBNOINVD },
202 { "-mavx512vp2intersect", OPTION_MASK_ISA2_AVX512VP2INTERSECT },
203 { "-msgx", OPTION_MASK_ISA2_SGX },
204 { "-mavx5124vnniw", OPTION_MASK_ISA2_AVX5124VNNIW },
205 { "-mavx5124fmaps", OPTION_MASK_ISA2_AVX5124FMAPS },
206 { "-mhle", OPTION_MASK_ISA2_HLE },
207 { "-mmovbe", OPTION_MASK_ISA2_MOVBE },
208 { "-mclzero", OPTION_MASK_ISA2_CLZERO },
209 { "-mmwaitx", OPTION_MASK_ISA2_MWAITX },
d8c6cc2c 210 { "-mmwait", OPTION_MASK_ISA2_MWAIT },
8cf86e14
HL		 211 { "-mmovdir64b", OPTION_MASK_ISA2_MOVDIR64B },
212 { "-mwaitpkg", OPTION_MASK_ISA2_WAITPKG },
213 { "-mcldemote", OPTION_MASK_ISA2_CLDEMOTE },
214 { "-mptwrite", OPTION_MASK_ISA2_PTWRITE },
215 { "-mavx512bf16", OPTION_MASK_ISA2_AVX512BF16 },
366386c7 216 { "-menqcmd", OPTION_MASK_ISA2_ENQCMD },
1e47cb35 217 { "-mserialize", OPTION_MASK_ISA2_SERIALIZE },
5c609842 218 { "-mtsxldtrk", OPTION_MASK_ISA2_TSXLDTRK },
219 { "-mamx-tile", OPTION_MASK_ISA2_AMX_TILE },
220 { "-mamx-int8", OPTION_MASK_ISA2_AMX_INT8 },
299a53d7 221 { "-mamx-bf16", OPTION_MASK_ISA2_AMX_BF16 },
83927c63 222 { "-muintr", OPTION_MASK_ISA2_UINTR },
632a2f50 223 { "-mhreset", OPTION_MASK_ISA2_HRESET },
224 { "-mkl", OPTION_MASK_ISA2_KL },
ca813880 225 { "-mwidekl", OPTION_MASK_ISA2_WIDEKL },
226 { "-mavxvnni", OPTION_MASK_ISA2_AVXVNNI }
9ba66bf5
JJ		 227};
228static struct ix86_target_opts isa_opts[] =
229{
230 { "-mavx512vpopcntdq", OPTION_MASK_ISA_AVX512VPOPCNTDQ },
231 { "-mavx512bitalg", OPTION_MASK_ISA_AVX512BITALG },
232 { "-mvpclmulqdq", OPTION_MASK_ISA_VPCLMULQDQ },
233 { "-mgfni", OPTION_MASK_ISA_GFNI },
234 { "-mavx512vnni", OPTION_MASK_ISA_AVX512VNNI },
235 { "-mavx512vbmi2", OPTION_MASK_ISA_AVX512VBMI2 },
236 { "-mavx512vbmi", OPTION_MASK_ISA_AVX512VBMI },
237 { "-mavx512ifma", OPTION_MASK_ISA_AVX512IFMA },
238 { "-mavx512vl", OPTION_MASK_ISA_AVX512VL },
239 { "-mavx512bw", OPTION_MASK_ISA_AVX512BW },
240 { "-mavx512dq", OPTION_MASK_ISA_AVX512DQ },
241 { "-mavx512er", OPTION_MASK_ISA_AVX512ER },
242 { "-mavx512pf", OPTION_MASK_ISA_AVX512PF },
243 { "-mavx512cd", OPTION_MASK_ISA_AVX512CD },
244 { "-mavx512f", OPTION_MASK_ISA_AVX512F },
245 { "-mavx2", OPTION_MASK_ISA_AVX2 },
246 { "-mfma", OPTION_MASK_ISA_FMA },
247 { "-mxop", OPTION_MASK_ISA_XOP },
248 { "-mfma4", OPTION_MASK_ISA_FMA4 },
249 { "-mf16c", OPTION_MASK_ISA_F16C },
250 { "-mavx", OPTION_MASK_ISA_AVX },
251/*{ "-msse4" OPTION_MASK_ISA_SSE4 }, */
252 { "-msse4.2", OPTION_MASK_ISA_SSE4_2 },
253 { "-msse4.1", OPTION_MASK_ISA_SSE4_1 },
254 { "-msse4a", OPTION_MASK_ISA_SSE4A },
255 { "-mssse3", OPTION_MASK_ISA_SSSE3 },
256 { "-msse3", OPTION_MASK_ISA_SSE3 },
257 { "-maes", OPTION_MASK_ISA_AES },
258 { "-msha", OPTION_MASK_ISA_SHA },
259 { "-mpclmul", OPTION_MASK_ISA_PCLMUL },
260 { "-msse2", OPTION_MASK_ISA_SSE2 },
261 { "-msse", OPTION_MASK_ISA_SSE },
262 { "-m3dnowa", OPTION_MASK_ISA_3DNOW_A },
263 { "-m3dnow", OPTION_MASK_ISA_3DNOW },
264 { "-mmmx", OPTION_MASK_ISA_MMX },
265 { "-mrtm", OPTION_MASK_ISA_RTM },
266 { "-mprfchw", OPTION_MASK_ISA_PRFCHW },
267 { "-mrdseed", OPTION_MASK_ISA_RDSEED },
268 { "-madx", OPTION_MASK_ISA_ADX },
269 { "-mprefetchwt1", OPTION_MASK_ISA_PREFETCHWT1 },
270 { "-mclflushopt", OPTION_MASK_ISA_CLFLUSHOPT },
271 { "-mxsaves", OPTION_MASK_ISA_XSAVES },
272 { "-mxsavec", OPTION_MASK_ISA_XSAVEC },
273 { "-mxsaveopt", OPTION_MASK_ISA_XSAVEOPT },
274 { "-mxsave", OPTION_MASK_ISA_XSAVE },
275 { "-mabm", OPTION_MASK_ISA_ABM },
276 { "-mbmi", OPTION_MASK_ISA_BMI },
277 { "-mbmi2", OPTION_MASK_ISA_BMI2 },
278 { "-mlzcnt", OPTION_MASK_ISA_LZCNT },
279 { "-mtbm", OPTION_MASK_ISA_TBM },
280 { "-mpopcnt", OPTION_MASK_ISA_POPCNT },
281 { "-msahf", OPTION_MASK_ISA_SAHF },
282 { "-mcrc32", OPTION_MASK_ISA_CRC32 },
283 { "-mfsgsbase", OPTION_MASK_ISA_FSGSBASE },
284 { "-mrdrnd", OPTION_MASK_ISA_RDRND },
285 { "-mpku", OPTION_MASK_ISA_PKU },
286 { "-mlwp", OPTION_MASK_ISA_LWP },
287 { "-mfxsr", OPTION_MASK_ISA_FXSR },
288 { "-mclwb", OPTION_MASK_ISA_CLWB },
289 { "-mshstk", OPTION_MASK_ISA_SHSTK },
290 { "-mmovdiri", OPTION_MASK_ISA_MOVDIRI }
291};
292
293/* Return 1 if TRAIT NAME is present in the OpenMP context's
294 device trait set, return 0 if not present in any OpenMP context in the
295 whole translation unit, or -1 if not present in the current OpenMP context
296 but might be present in another OpenMP context in the same TU. */
297
298int
299ix86_omp_device_kind_arch_isa (enum omp_device_kind_arch_isa trait,
300 const char *name)
301{
302 switch (trait)
303 {
304 case omp_device_kind:
305 return strcmp (name, "cpu") == 0;
306 case omp_device_arch:
307 if (strcmp (name, "x86") == 0)
308 return 1;
309 if (TARGET_64BIT)
310 {
311 if (TARGET_X32)
312 return strcmp (name, "x32") == 0;
313 else
314 return strcmp (name, "x86_64") == 0;
315 }
316 if (strcmp (name, "ia32") == 0 || strcmp (name, "i386") == 0)
317 return 1;
318 if (strcmp (name, "i486") == 0)
319 return ix86_arch != PROCESSOR_I386 ? 1 : -1;
320 if (strcmp (name, "i586") == 0)
321 return (ix86_arch != PROCESSOR_I386
322 && ix86_arch != PROCESSOR_I486) ? 1 : -1;
323 if (strcmp (name, "i686") == 0)
324 return (ix86_arch != PROCESSOR_I386
325 && ix86_arch != PROCESSOR_I486
326 && ix86_arch != PROCESSOR_LAKEMONT
327 && ix86_arch != PROCESSOR_PENTIUM) ? 1 : -1;
328 return 0;
329 case omp_device_isa:
330 for (int i = 0; i < 2; i++)
331 {
332 struct ix86_target_opts *opts = i ? isa2_opts : isa_opts;
333 size_t nopts = i ? ARRAY_SIZE (isa2_opts) : ARRAY_SIZE (isa_opts);
334 HOST_WIDE_INT mask = i ? ix86_isa_flags2 : ix86_isa_flags;
335 for (size_t n = 0; n < nopts; n++)
336 {
aa16689e 337 /* Handle sse4 as an alias to sse4.2. */
9ba66bf5
JJ		 338 if (opts[n].mask == OPTION_MASK_ISA_SSE4_2)
339 {
9ba66bf5
JJ		 340 if (strcmp (name, "sse4") == 0)
341 return (mask & opts[n].mask) != 0 ? 1 : -1;
342 }
aa16689e 343 if (strcmp (name, opts[n].option + 2) == 0)
9ba66bf5
JJ		 344 return (mask & opts[n].mask) != 0 ? 1 : -1;
345 }
346 }
347 return 0;
348 default:
349 gcc_unreachable ();
350 }
351}
352
2bf6d935
ML		 353/* Return a string that documents the current -m options. The caller is
354 responsible for freeing the string. */
355
356char *
357ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2,
358 int flags, int flags2,
359 const char *arch, const char *tune,
46e6341f
JJ		 360 enum fpmath_unit fpmath,
361 enum prefer_vector_width pvw,
362 bool add_nl_p, bool add_abi_p)
2bf6d935 363{
2bf6d935
ML		 364 /* Flag options. */
365 static struct ix86_target_opts flag_opts[] =
366 {
367 { "-m128bit-long-double", MASK_128BIT_LONG_DOUBLE },
368 { "-mlong-double-128", MASK_LONG_DOUBLE_128 },
369 { "-mlong-double-64", MASK_LONG_DOUBLE_64 },
370 { "-m80387", MASK_80387 },
371 { "-maccumulate-outgoing-args", MASK_ACCUMULATE_OUTGOING_ARGS },
372 { "-malign-double", MASK_ALIGN_DOUBLE },
373 { "-mcld", MASK_CLD },
374 { "-mfp-ret-in-387", MASK_FLOAT_RETURNS },
375 { "-mieee-fp", MASK_IEEE_FP },
376 { "-minline-all-stringops", MASK_INLINE_ALL_STRINGOPS },
377 { "-minline-stringops-dynamically", MASK_INLINE_STRINGOPS_DYNAMICALLY },
378 { "-mms-bitfields", MASK_MS_BITFIELD_LAYOUT },
379 { "-mno-align-stringops", MASK_NO_ALIGN_STRINGOPS },
380 { "-mno-fancy-math-387", MASK_NO_FANCY_MATH_387 },
381 { "-mno-push-args", MASK_NO_PUSH_ARGS },
382 { "-mno-red-zone", MASK_NO_RED_ZONE },
383 { "-momit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER },
384 { "-mrecip", MASK_RECIP },
385 { "-mrtd", MASK_RTD },
386 { "-msseregparm", MASK_SSEREGPARM },
387 { "-mstack-arg-probe", MASK_STACK_PROBE },
388 { "-mtls-direct-seg-refs", MASK_TLS_DIRECT_SEG_REFS },
389 { "-mvect8-ret-in-mem", MASK_VECT8_RETURNS },
390 { "-m8bit-idiv", MASK_USE_8BIT_IDIV },
391 { "-mvzeroupper", MASK_VZEROUPPER },
392 { "-mstv", MASK_STV },
393 { "-mavx256-split-unaligned-load", MASK_AVX256_SPLIT_UNALIGNED_LOAD },
394 { "-mavx256-split-unaligned-store", MASK_AVX256_SPLIT_UNALIGNED_STORE },
395 { "-mcall-ms2sysv-xlogues", MASK_CALL_MS2SYSV_XLOGUES }
396 };
397
398 /* Additional flag options. */
399 static struct ix86_target_opts flag2_opts[] =
400 {
401 { "-mgeneral-regs-only", OPTION_MASK_GENERAL_REGS_ONLY }
402 };
403
404 const char *opts[ARRAY_SIZE (isa_opts) + ARRAY_SIZE (isa2_opts)
405 + ARRAY_SIZE (flag_opts) + ARRAY_SIZE (flag2_opts) + 6][2];
406
407 char isa_other[40];
408 char isa2_other[40];
409 char flags_other[40];
410 char flags2_other[40];
411 unsigned num = 0;
412 unsigned i, j;
413 char *ret;
414 char *ptr;
415 size_t len;
416 size_t line_len;
417 size_t sep_len;
418 const char *abi;
419
420 memset (opts, '\0', sizeof (opts));
421
422 /* Add -march= option. */
423 if (arch)
424 {
425 opts[num][0] = "-march=";
426 opts[num++][1] = arch;
427 }
428
429 /* Add -mtune= option. */
430 if (tune)
431 {
432 opts[num][0] = "-mtune=";
433 opts[num++][1] = tune;
434 }
435
436 /* Add -m32/-m64/-mx32. */
437 if (add_abi_p)
438 {
439 if ((isa & OPTION_MASK_ISA_64BIT) != 0)
440 {
441 if ((isa & OPTION_MASK_ABI_64) != 0)
442 abi = "-m64";
443 else
444 abi = "-mx32";
445 }
446 else
447 abi = "-m32";
448 opts[num++][0] = abi;
449 }
450 isa &= ~(OPTION_MASK_ISA_64BIT | OPTION_MASK_ABI_64 | OPTION_MASK_ABI_X32);
451
452 /* Pick out the options in isa2 options. */
453 for (i = 0; i < ARRAY_SIZE (isa2_opts); i++)
454 {
455 if ((isa2 & isa2_opts[i].mask) != 0)
456 {
457 opts[num++][0] = isa2_opts[i].option;
458 isa2 &= ~ isa2_opts[i].mask;
459 }
460 }
461
462 if (isa2 && add_nl_p)
463 {
464 opts[num++][0] = isa2_other;
465 sprintf (isa2_other, "(other isa2: %#" HOST_WIDE_INT_PRINT "x)", isa2);
466 }
467
468 /* Pick out the options in isa options. */
469 for (i = 0; i < ARRAY_SIZE (isa_opts); i++)
470 {
471 if ((isa & isa_opts[i].mask) != 0)
472 {
473 opts[num++][0] = isa_opts[i].option;
474 isa &= ~ isa_opts[i].mask;
475 }
476 }
477
478 if (isa && add_nl_p)
479 {
480 opts[num++][0] = isa_other;
481 sprintf (isa_other, "(other isa: %#" HOST_WIDE_INT_PRINT "x)", isa);
482 }
483
484 /* Add flag options. */
485 for (i = 0; i < ARRAY_SIZE (flag_opts); i++)
486 {
487 if ((flags & flag_opts[i].mask) != 0)
488 {
489 opts[num++][0] = flag_opts[i].option;
490 flags &= ~ flag_opts[i].mask;
491 }
492 }
493
494 if (flags && add_nl_p)
495 {
496 opts[num++][0] = flags_other;
497 sprintf (flags_other, "(other flags: %#x)", flags);
498 }
499
500 /* Add additional flag options. */
501 for (i = 0; i < ARRAY_SIZE (flag2_opts); i++)
502 {
503 if ((flags2 & flag2_opts[i].mask) != 0)
504 {
505 opts[num++][0] = flag2_opts[i].option;
506 flags2 &= ~ flag2_opts[i].mask;
507 }
508 }
509
510 if (flags2 && add_nl_p)
511 {
512 opts[num++][0] = flags2_other;
513 sprintf (flags2_other, "(other flags2: %#x)", flags2);
514 }
515
46e6341f 516 /* Add -mfpmath= option. */
2bf6d935
ML		 517 if (fpmath)
518 {
519 opts[num][0] = "-mfpmath=";
520 switch ((int) fpmath)
521 {
522 case FPMATH_387:
523 opts[num++][1] = "387";
524 break;
525
526 case FPMATH_SSE:
527 opts[num++][1] = "sse";
528 break;
529
530 case FPMATH_387 | FPMATH_SSE:
531 opts[num++][1] = "sse+387";
532 break;
533
534 default:
535 gcc_unreachable ();
536 }
537 }
538
46e6341f
JJ		 539 /* Add -mprefer-vector-width= option. */
540 if (pvw)
541 {
542 opts[num][0] = "-mprefer-vector-width=";
543 switch ((int) pvw)
544 {
545 case PVW_AVX128:
546 opts[num++][1] = "128";
547 break;
548
549 case PVW_AVX256:
550 opts[num++][1] = "256";
551 break;
552
553 case PVW_AVX512:
554 opts[num++][1] = "512";
555 break;
556
557 default:
558 gcc_unreachable ();
559 }
560 }
561
2bf6d935
ML		 562 /* Any options? */
563 if (num == 0)
564 return NULL;
565
566 gcc_assert (num < ARRAY_SIZE (opts));
567
568 /* Size the string. */
569 len = 0;
570 sep_len = (add_nl_p) ? 3 : 1;
571 for (i = 0; i < num; i++)
572 {
573 len += sep_len;
574 for (j = 0; j < 2; j++)
575 if (opts[i][j])
576 len += strlen (opts[i][j]);
577 }
578
579 /* Build the string. */
580 ret = ptr = (char *) xmalloc (len);
581 line_len = 0;
582
583 for (i = 0; i < num; i++)
584 {
585 size_t len2[2];
586
587 for (j = 0; j < 2; j++)
588 len2[j] = (opts[i][j]) ? strlen (opts[i][j]) : 0;
589
590 if (i != 0)
591 {
592 *ptr++ = ' ';
593 line_len++;
594
595 if (add_nl_p && line_len + len2[0] + len2[1] > 70)
596 {
597 *ptr++ = '\\';
598 *ptr++ = '\n';
599 line_len = 0;
600 }
601 }
602
603 for (j = 0; j < 2; j++)
604 if (opts[i][j])
605 {
606 memcpy (ptr, opts[i][j], len2[j]);
607 ptr += len2[j];
608 line_len += len2[j];
609 }
610 }
611
612 *ptr = '\0';
613 gcc_assert (ret + len >= ptr);
614
615 return ret;
616}
617
618/* Function that is callable from the debugger to print the current
619 options. */
620void ATTRIBUTE_UNUSED
621ix86_debug_options (void)
622{
623 char *opts = ix86_target_string (ix86_isa_flags, ix86_isa_flags2,
624 target_flags, ix86_target_flags,
46e6341f
JJ		 625 ix86_arch_string, ix86_tune_string,
626 ix86_fpmath, prefer_vector_width_type,
627 true, true);
2bf6d935
ML		 628
629 if (opts)
630 {
631 fprintf (stderr, "%s\n\n", opts);
632 free (opts);
633 }
634 else
635 fputs ("<no options>\n\n", stderr);
636
637 return;
638}
639
640/* Save the current options */
641
642void
643ix86_function_specific_save (struct cl_target_option *ptr,
ba948b37
JJ		 644 struct gcc_options *opts,
645 struct gcc_options */* opts_set */)
2bf6d935
ML		 646{
647 ptr->arch = ix86_arch;
648 ptr->schedule = ix86_schedule;
08a4adcf 649 ptr->prefetch_sse = ix86_prefetch_sse;
2bf6d935
ML		 650 ptr->tune = ix86_tune;
651 ptr->branch_cost = ix86_branch_cost;
652 ptr->tune_defaulted = ix86_tune_defaulted;
653 ptr->arch_specified = ix86_arch_specified;
654 ptr->x_ix86_isa_flags_explicit = opts->x_ix86_isa_flags_explicit;
655 ptr->x_ix86_isa_flags2_explicit = opts->x_ix86_isa_flags2_explicit;
656 ptr->x_recip_mask_explicit = opts->x_recip_mask_explicit;
657 ptr->x_ix86_arch_string = opts->x_ix86_arch_string;
658 ptr->x_ix86_tune_string = opts->x_ix86_tune_string;
2bf6d935
ML		 659 ptr->x_ix86_abi = opts->x_ix86_abi;
660 ptr->x_ix86_asm_dialect = opts->x_ix86_asm_dialect;
661 ptr->x_ix86_branch_cost = opts->x_ix86_branch_cost;
662 ptr->x_ix86_dump_tunes = opts->x_ix86_dump_tunes;
663 ptr->x_ix86_force_align_arg_pointer = opts->x_ix86_force_align_arg_pointer;
664 ptr->x_ix86_force_drap = opts->x_ix86_force_drap;
2bf6d935 665 ptr->x_ix86_recip_name = opts->x_ix86_recip_name;
2bf6d935
ML		 666 ptr->x_ix86_section_threshold = opts->x_ix86_section_threshold;
667 ptr->x_ix86_sse2avx = opts->x_ix86_sse2avx;
668 ptr->x_ix86_stack_protector_guard = opts->x_ix86_stack_protector_guard;
669 ptr->x_ix86_stringop_alg = opts->x_ix86_stringop_alg;
670 ptr->x_ix86_tls_dialect = opts->x_ix86_tls_dialect;
671 ptr->x_ix86_tune_ctrl_string = opts->x_ix86_tune_ctrl_string;
672 ptr->x_ix86_tune_memcpy_strategy = opts->x_ix86_tune_memcpy_strategy;
673 ptr->x_ix86_tune_memset_strategy = opts->x_ix86_tune_memset_strategy;
674 ptr->x_ix86_tune_no_default = opts->x_ix86_tune_no_default;
2bf6d935
ML		 675
676 /* The fields are char but the variables are not; make sure the
677 values fit in the fields. */
678 gcc_assert (ptr->arch == ix86_arch);
679 gcc_assert (ptr->schedule == ix86_schedule);
680 gcc_assert (ptr->tune == ix86_tune);
681 gcc_assert (ptr->branch_cost == ix86_branch_cost);
682}
683
684/* Feature tests against the various architecture variations, used to create
685 ix86_arch_features based on the processor mask. */
686static unsigned HOST_WIDE_INT initial_ix86_arch_features[X86_ARCH_LAST] = {
687 /* X86_ARCH_CMOV: Conditional move was added for pentiumpro. */
688 ~(m_386 | m_486 | m_PENT | m_LAKEMONT | m_K6),
689
690 /* X86_ARCH_CMPXCHG: Compare and exchange was added for 80486. */
691 ~m_386,
692
693 /* X86_ARCH_CMPXCHG8B: Compare and exchange 8 bytes was added for pentium. */
694 ~(m_386 | m_486),
695
696 /* X86_ARCH_XADD: Exchange and add was added for 80486. */
697 ~m_386,
698
699 /* X86_ARCH_BSWAP: Byteswap was added for 80486. */
700 ~m_386,
701};
702
703/* This table must be in sync with enum processor_type in i386.h. */
704static const struct processor_costs *processor_cost_table[] =
705{
706 &generic_cost,
707 &i386_cost,
708 &i486_cost,
709 &pentium_cost,
710 &lakemont_cost,
711 &pentiumpro_cost,
712 &pentium4_cost,
713 &nocona_cost,
714 &core_cost,
715 &core_cost,
716 &core_cost,
717 &core_cost,
718 &atom_cost,
719 &slm_cost,
720 &slm_cost,
721 &slm_cost,
722 &slm_cost,
723 &slm_cost,
724 &slm_cost,
725 &skylake_cost,
726 &skylake_cost,
bf24f4ec
L		 727 &icelake_cost,
728 &icelake_cost,
729 &icelake_cost,
2bf6d935 730 &skylake_cost,
bf24f4ec 731 &icelake_cost,
2bf6d935 732 &skylake_cost,
bf24f4ec
L		 733 &icelake_cost,
734 &icelake_cost,
2cde2d62 735 &icelake_cost,
2bf6d935
ML		 736 &intel_cost,
737 &geode_cost,
738 &k6_cost,
739 &athlon_cost,
740 &k8_cost,
741 &amdfam10_cost,
742 &bdver_cost,
743 &bdver_cost,
744 &bdver_cost,
745 &bdver_cost,
746 &btver1_cost,
747 &btver2_cost,
748 &znver1_cost,
3e2ae3ee 749 &znver2_cost,
5b32a181 750 &znver3_cost
2bf6d935
ML		 751};
752
753/* Guarantee that the array is aligned with enum processor_type. */
754STATIC_ASSERT (ARRAY_SIZE (processor_cost_table) == PROCESSOR_max);
755
756static bool
757ix86_option_override_internal (bool main_args_p,
758 struct gcc_options *opts,
759 struct gcc_options *opts_set);
760static void
1e964774
L		 761set_ix86_tune_features (struct gcc_options *opts,
762 enum processor_type ix86_tune, bool dump);
2bf6d935
ML		 763
764/* Restore the current options */
765
766void
767ix86_function_specific_restore (struct gcc_options *opts,
ba948b37 768 struct gcc_options */* opts_set */,
2bf6d935
ML		 769 struct cl_target_option *ptr)
770{
771 enum processor_type old_tune = ix86_tune;
772 enum processor_type old_arch = ix86_arch;
773 unsigned HOST_WIDE_INT ix86_arch_mask;
774 int i;
775
776 /* We don't change -fPIC. */
777 opts->x_flag_pic = flag_pic;
778
779 ix86_arch = (enum processor_type) ptr->arch;
780 ix86_schedule = (enum attr_cpu) ptr->schedule;
781 ix86_tune = (enum processor_type) ptr->tune;
08a4adcf 782 ix86_prefetch_sse = ptr->prefetch_sse;
2bf6d935
ML		 783 ix86_tune_defaulted = ptr->tune_defaulted;
784 ix86_arch_specified = ptr->arch_specified;
785 opts->x_ix86_isa_flags_explicit = ptr->x_ix86_isa_flags_explicit;
786 opts->x_ix86_isa_flags2_explicit = ptr->x_ix86_isa_flags2_explicit;
787 opts->x_recip_mask_explicit = ptr->x_recip_mask_explicit;
788 opts->x_ix86_arch_string = ptr->x_ix86_arch_string;
789 opts->x_ix86_tune_string = ptr->x_ix86_tune_string;
2bf6d935
ML		 790 opts->x_ix86_abi = ptr->x_ix86_abi;
791 opts->x_ix86_asm_dialect = ptr->x_ix86_asm_dialect;
792 opts->x_ix86_branch_cost = ptr->x_ix86_branch_cost;
793 opts->x_ix86_dump_tunes = ptr->x_ix86_dump_tunes;
794 opts->x_ix86_force_align_arg_pointer = ptr->x_ix86_force_align_arg_pointer;
795 opts->x_ix86_force_drap = ptr->x_ix86_force_drap;
2bf6d935 796 opts->x_ix86_recip_name = ptr->x_ix86_recip_name;
2bf6d935
ML		 797 opts->x_ix86_section_threshold = ptr->x_ix86_section_threshold;
798 opts->x_ix86_sse2avx = ptr->x_ix86_sse2avx;
799 opts->x_ix86_stack_protector_guard = ptr->x_ix86_stack_protector_guard;
800 opts->x_ix86_stringop_alg = ptr->x_ix86_stringop_alg;
801 opts->x_ix86_tls_dialect = ptr->x_ix86_tls_dialect;
802 opts->x_ix86_tune_ctrl_string = ptr->x_ix86_tune_ctrl_string;
803 opts->x_ix86_tune_memcpy_strategy = ptr->x_ix86_tune_memcpy_strategy;
804 opts->x_ix86_tune_memset_strategy = ptr->x_ix86_tune_memset_strategy;
805 opts->x_ix86_tune_no_default = ptr->x_ix86_tune_no_default;
2bf6d935
ML		 806 ix86_tune_cost = processor_cost_table[ix86_tune];
807 /* TODO: ix86_cost should be chosen at instruction or function granuality
808 so for cold code we use size_cost even in !optimize_size compilation. */
809 if (opts->x_optimize_size)
810 ix86_cost = &ix86_size_cost;
811 else
812 ix86_cost = ix86_tune_cost;
813
814 /* Recreate the arch feature tests if the arch changed */
815 if (old_arch != ix86_arch)
816 {
817 ix86_arch_mask = HOST_WIDE_INT_1U << ix86_arch;
818 for (i = 0; i < X86_ARCH_LAST; ++i)
819 ix86_arch_features[i]
820 = !!(initial_ix86_arch_features[i] & ix86_arch_mask);
821 }
822
823 /* Recreate the tune optimization tests */
824 if (old_tune != ix86_tune)
1e964774 825 set_ix86_tune_features (opts, ix86_tune, false);
2bf6d935
ML		 826}
827
828/* Adjust target options after streaming them in. This is mainly about
829 reconciling them with global options. */
830
831void
832ix86_function_specific_post_stream_in (struct cl_target_option *ptr)
833{
834 /* flag_pic is a global option, but ix86_cmodel is target saved option
835 partly computed from flag_pic. If flag_pic is on, adjust x_ix86_cmodel
836 for PIC, or error out. */
837 if (flag_pic)
838 switch (ptr->x_ix86_cmodel)
839 {
840 case CM_SMALL:
841 ptr->x_ix86_cmodel = CM_SMALL_PIC;
842 break;
843
844 case CM_MEDIUM:
845 ptr->x_ix86_cmodel = CM_MEDIUM_PIC;
846 break;
847
848 case CM_LARGE:
849 ptr->x_ix86_cmodel = CM_LARGE_PIC;
850 break;
851
852 case CM_KERNEL:
853 error ("code model %s does not support PIC mode", "kernel");
854 break;
855
856 default:
857 break;
858 }
859 else
860 switch (ptr->x_ix86_cmodel)
861 {
862 case CM_SMALL_PIC:
863 ptr->x_ix86_cmodel = CM_SMALL;
864 break;
865
866 case CM_MEDIUM_PIC:
867 ptr->x_ix86_cmodel = CM_MEDIUM;
868 break;
869
870 case CM_LARGE_PIC:
871 ptr->x_ix86_cmodel = CM_LARGE;
872 break;
873
874 default:
875 break;
876 }
877}
878
879/* Print the current options */
880
881void
882ix86_function_specific_print (FILE *file, int indent,
883 struct cl_target_option *ptr)
884{
885 char *target_string
886 = ix86_target_string (ptr->x_ix86_isa_flags, ptr->x_ix86_isa_flags2,
887 ptr->x_target_flags, ptr->x_ix86_target_flags,
46e6341f
JJ		 888 NULL, NULL, ptr->x_ix86_fpmath,
889 ptr->x_prefer_vector_width_type, false, true);
2bf6d935
ML		 890
891 gcc_assert (ptr->arch < PROCESSOR_max);
892 fprintf (file, "%*sarch = %d (%s)\n",
893 indent, "",
894 ptr->arch, processor_names[ptr->arch]);
895
896 gcc_assert (ptr->tune < PROCESSOR_max);
897 fprintf (file, "%*stune = %d (%s)\n",
898 indent, "",
899 ptr->tune, processor_names[ptr->tune]);
900
901 fprintf (file, "%*sbranch_cost = %d\n", indent, "", ptr->branch_cost);
902
903 if (target_string)
904 {
905 fprintf (file, "%*s%s\n", indent, "", target_string);
906 free (target_string);
907 }
908}
909
910\f
911/* Inner function to process the attribute((target(...))), take an argument and
912 set the current options from the argument. If we have a list, recursively go
913 over the list. */
914
915static bool
916ix86_valid_target_attribute_inner_p (tree fndecl, tree args, char *p_strings[],
917 struct gcc_options *opts,
918 struct gcc_options *opts_set,
919 struct gcc_options *enum_opts_set,
920 bool target_clone_attr)
921{
922 char *next_optstr;
923 bool ret = true;
924
925#define IX86_ATTR_ISA(S,O) { S, sizeof (S)-1, ix86_opt_isa, O, 0 }
926#define IX86_ATTR_STR(S,O) { S, sizeof (S)-1, ix86_opt_str, O, 0 }
927#define IX86_ATTR_ENUM(S,O) { S, sizeof (S)-1, ix86_opt_enum, O, 0 }
928#define IX86_ATTR_YES(S,O,M) { S, sizeof (S)-1, ix86_opt_yes, O, M }
929#define IX86_ATTR_NO(S,O,M) { S, sizeof (S)-1, ix86_opt_no, O, M }
87c753ac
L		 930#define IX86_ATTR_IX86_YES(S,O,M) \
931 { S, sizeof (S)-1, ix86_opt_ix86_yes, O, M }
932#define IX86_ATTR_IX86_NO(S,O,M) \
933 { S, sizeof (S)-1, ix86_opt_ix86_no, O, M }
2bf6d935
ML		 934
935 enum ix86_opt_type
936 {
937 ix86_opt_unknown,
938 ix86_opt_yes,
939 ix86_opt_no,
87c753ac
L		 940 ix86_opt_ix86_yes,
941 ix86_opt_ix86_no,
2bf6d935
ML		 942 ix86_opt_str,
943 ix86_opt_enum,
944 ix86_opt_isa
945 };
946
947 static const struct
948 {
949 const char *string;
950 size_t len;
951 enum ix86_opt_type type;
952 int opt;
953 int mask;
954 } attrs[] = {
955 /* isa options */
956 IX86_ATTR_ISA ("pconfig", OPT_mpconfig),
957 IX86_ATTR_ISA ("wbnoinvd", OPT_mwbnoinvd),
958 IX86_ATTR_ISA ("sgx", OPT_msgx),
959 IX86_ATTR_ISA ("avx5124fmaps", OPT_mavx5124fmaps),
960 IX86_ATTR_ISA ("avx5124vnniw", OPT_mavx5124vnniw),
961 IX86_ATTR_ISA ("avx512vpopcntdq", OPT_mavx512vpopcntdq),
962 IX86_ATTR_ISA ("avx512vbmi2", OPT_mavx512vbmi2),
963 IX86_ATTR_ISA ("avx512vnni", OPT_mavx512vnni),
964 IX86_ATTR_ISA ("avx512bitalg", OPT_mavx512bitalg),
e21b52af 965 IX86_ATTR_ISA ("avx512vp2intersect", OPT_mavx512vp2intersect),
2bf6d935
ML		 966
967 IX86_ATTR_ISA ("avx512vbmi", OPT_mavx512vbmi),
968 IX86_ATTR_ISA ("avx512ifma", OPT_mavx512ifma),
969 IX86_ATTR_ISA ("avx512vl", OPT_mavx512vl),
970 IX86_ATTR_ISA ("avx512bw", OPT_mavx512bw),
971 IX86_ATTR_ISA ("avx512dq", OPT_mavx512dq),
972 IX86_ATTR_ISA ("avx512er", OPT_mavx512er),
973 IX86_ATTR_ISA ("avx512pf", OPT_mavx512pf),
974 IX86_ATTR_ISA ("avx512cd", OPT_mavx512cd),
975 IX86_ATTR_ISA ("avx512f", OPT_mavx512f),
976 IX86_ATTR_ISA ("avx2", OPT_mavx2),
977 IX86_ATTR_ISA ("fma", OPT_mfma),
978 IX86_ATTR_ISA ("xop", OPT_mxop),
979 IX86_ATTR_ISA ("fma4", OPT_mfma4),
980 IX86_ATTR_ISA ("f16c", OPT_mf16c),
981 IX86_ATTR_ISA ("avx", OPT_mavx),
982 IX86_ATTR_ISA ("sse4", OPT_msse4),
983 IX86_ATTR_ISA ("sse4.2", OPT_msse4_2),
984 IX86_ATTR_ISA ("sse4.1", OPT_msse4_1),
985 IX86_ATTR_ISA ("sse4a", OPT_msse4a),
986 IX86_ATTR_ISA ("ssse3", OPT_mssse3),
987 IX86_ATTR_ISA ("sse3", OPT_msse3),
988 IX86_ATTR_ISA ("aes", OPT_maes),
989 IX86_ATTR_ISA ("sha", OPT_msha),
990 IX86_ATTR_ISA ("pclmul", OPT_mpclmul),
991 IX86_ATTR_ISA ("sse2", OPT_msse2),
992 IX86_ATTR_ISA ("sse", OPT_msse),
993 IX86_ATTR_ISA ("3dnowa", OPT_m3dnowa),
994 IX86_ATTR_ISA ("3dnow", OPT_m3dnow),
995 IX86_ATTR_ISA ("mmx", OPT_mmmx),
996 IX86_ATTR_ISA ("rtm", OPT_mrtm),
997 IX86_ATTR_ISA ("prfchw", OPT_mprfchw),
998 IX86_ATTR_ISA ("rdseed", OPT_mrdseed),
999 IX86_ATTR_ISA ("adx", OPT_madx),
1000 IX86_ATTR_ISA ("prefetchwt1", OPT_mprefetchwt1),
1001 IX86_ATTR_ISA ("clflushopt", OPT_mclflushopt),
1002 IX86_ATTR_ISA ("xsaves", OPT_mxsaves),
1003 IX86_ATTR_ISA ("xsavec", OPT_mxsavec),
1004 IX86_ATTR_ISA ("xsaveopt", OPT_mxsaveopt),
1005 IX86_ATTR_ISA ("xsave", OPT_mxsave),
1006 IX86_ATTR_ISA ("abm", OPT_mabm),
1007 IX86_ATTR_ISA ("bmi", OPT_mbmi),
1008 IX86_ATTR_ISA ("bmi2", OPT_mbmi2),
1009 IX86_ATTR_ISA ("lzcnt", OPT_mlzcnt),
1010 IX86_ATTR_ISA ("tbm", OPT_mtbm),
1011 IX86_ATTR_ISA ("popcnt", OPT_mpopcnt),
1012 IX86_ATTR_ISA ("cx16", OPT_mcx16),
1013 IX86_ATTR_ISA ("sahf", OPT_msahf),
1014 IX86_ATTR_ISA ("movbe", OPT_mmovbe),
1015 IX86_ATTR_ISA ("crc32", OPT_mcrc32),
1016 IX86_ATTR_ISA ("fsgsbase", OPT_mfsgsbase),
1017 IX86_ATTR_ISA ("rdrnd", OPT_mrdrnd),
1018 IX86_ATTR_ISA ("mwaitx", OPT_mmwaitx),
d8c6cc2c 1019 IX86_ATTR_ISA ("mwait", OPT_mmwait),
2bf6d935
ML		 1020 IX86_ATTR_ISA ("clzero", OPT_mclzero),
1021 IX86_ATTR_ISA ("pku", OPT_mpku),
1022 IX86_ATTR_ISA ("lwp", OPT_mlwp),
1023 IX86_ATTR_ISA ("hle", OPT_mhle),
1024 IX86_ATTR_ISA ("fxsr", OPT_mfxsr),
1025 IX86_ATTR_ISA ("clwb", OPT_mclwb),
1026 IX86_ATTR_ISA ("rdpid", OPT_mrdpid),
1027 IX86_ATTR_ISA ("gfni", OPT_mgfni),
1028 IX86_ATTR_ISA ("shstk", OPT_mshstk),
1029 IX86_ATTR_ISA ("vaes", OPT_mvaes),
1030 IX86_ATTR_ISA ("vpclmulqdq", OPT_mvpclmulqdq),
1031 IX86_ATTR_ISA ("movdiri", OPT_mmovdiri),
1032 IX86_ATTR_ISA ("movdir64b", OPT_mmovdir64b),
1033 IX86_ATTR_ISA ("waitpkg", OPT_mwaitpkg),
1034 IX86_ATTR_ISA ("cldemote", OPT_mcldemote),
299a53d7 1035 IX86_ATTR_ISA ("uintr", OPT_muintr),
2bf6d935 1036 IX86_ATTR_ISA ("ptwrite", OPT_mptwrite),
632a2f50 1037 IX86_ATTR_ISA ("kl", OPT_mkl),
1038 IX86_ATTR_ISA ("widekl", OPT_mwidekl),
4f0e90fa 1039 IX86_ATTR_ISA ("avx512bf16", OPT_mavx512bf16),
6a10feda 1040 IX86_ATTR_ISA ("enqcmd", OPT_menqcmd),
366386c7 1041 IX86_ATTR_ISA ("serialize", OPT_mserialize),
1e47cb35 1042 IX86_ATTR_ISA ("tsxldtrk", OPT_mtsxldtrk),
5c609842 1043 IX86_ATTR_ISA ("amx-tile", OPT_mamx_tile),
1044 IX86_ATTR_ISA ("amx-int8", OPT_mamx_int8),
1045 IX86_ATTR_ISA ("amx-bf16", OPT_mamx_bf16),
83927c63 1046 IX86_ATTR_ISA ("hreset", OPT_mhreset),
ca813880 1047 IX86_ATTR_ISA ("avxvnni", OPT_mavxvnni),
2bf6d935
ML		 1048
1049 /* enum options */
1050 IX86_ATTR_ENUM ("fpmath=", OPT_mfpmath_),
46e6341f 1051 IX86_ATTR_ENUM ("prefer-vector-width=", OPT_mprefer_vector_width_),
2bf6d935
ML		 1052
1053 /* string options */
1054 IX86_ATTR_STR ("arch=", IX86_FUNCTION_SPECIFIC_ARCH),
1055 IX86_ATTR_STR ("tune=", IX86_FUNCTION_SPECIFIC_TUNE),
1056
1057 /* flag options */
1058 IX86_ATTR_YES ("cld",
1059 OPT_mcld,
1060 MASK_CLD),
1061
1062 IX86_ATTR_NO ("fancy-math-387",
1063 OPT_mfancy_math_387,
1064 MASK_NO_FANCY_MATH_387),
1065
1066 IX86_ATTR_YES ("ieee-fp",
1067 OPT_mieee_fp,
1068 MASK_IEEE_FP),
1069
1070 IX86_ATTR_YES ("inline-all-stringops",
1071 OPT_minline_all_stringops,
1072 MASK_INLINE_ALL_STRINGOPS),
1073
1074 IX86_ATTR_YES ("inline-stringops-dynamically",
1075 OPT_minline_stringops_dynamically,
1076 MASK_INLINE_STRINGOPS_DYNAMICALLY),
1077
1078 IX86_ATTR_NO ("align-stringops",
1079 OPT_mno_align_stringops,
1080 MASK_NO_ALIGN_STRINGOPS),
1081
1082 IX86_ATTR_YES ("recip",
1083 OPT_mrecip,
1084 MASK_RECIP),
87c753ac
L		 1085
1086 IX86_ATTR_IX86_YES ("general-regs-only",
1087 OPT_mgeneral_regs_only,
1088 OPTION_MASK_GENERAL_REGS_ONLY),
2bf6d935
ML		 1089 };
1090
1091 location_t loc
1092 = fndecl == NULL ? UNKNOWN_LOCATION : DECL_SOURCE_LOCATION (fndecl);
1093 const char *attr_name = target_clone_attr ? "target_clone" : "target";
1094
1095 /* If this is a list, recurse to get the options. */
1096 if (TREE_CODE (args) == TREE_LIST)
1097 {
2bf6d935
ML		 1098 for (; args; args = TREE_CHAIN (args))
1099 if (TREE_VALUE (args)
1100 && !ix86_valid_target_attribute_inner_p (fndecl, TREE_VALUE (args),
1101 p_strings, opts, opts_set,
1102 enum_opts_set,
1103 target_clone_attr))
1104 ret = false;
1105
1106 return ret;
1107 }
1108
1109 else if (TREE_CODE (args) != STRING_CST)
1110 {
1111 error_at (loc, "attribute %qs argument is not a string", attr_name);
1112 return false;
1113 }
1114
1115 /* Handle multiple arguments separated by commas. */
1116 next_optstr = ASTRDUP (TREE_STRING_POINTER (args));
1117
1118 while (next_optstr && *next_optstr != '\0')
1119 {
1120 char *p = next_optstr;
1121 char *orig_p = p;
1122 char *comma = strchr (next_optstr, ',');
1123 size_t len, opt_len;
1124 int opt;
1125 bool opt_set_p;
1126 char ch;
1127 unsigned i;
1128 enum ix86_opt_type type = ix86_opt_unknown;
1129 int mask = 0;
1130
1131 if (comma)
1132 {
1133 *comma = '\0';
1134 len = comma - next_optstr;
1135 next_optstr = comma + 1;
1136 }
1137 else
1138 {
1139 len = strlen (p);
1140 next_optstr = NULL;
1141 }
1142
1143 /* Recognize no-xxx. */
1144 if (len > 3 && p[0] == 'n' && p[1] == 'o' && p[2] == '-')
1145 {
1146 opt_set_p = false;
1147 p += 3;
1148 len -= 3;
1149 }
1150 else
1151 opt_set_p = true;
1152
1153 /* Find the option. */
1154 ch = *p;
1155 opt = N_OPTS;
1156 for (i = 0; i < ARRAY_SIZE (attrs); i++)
1157 {
1158 type = attrs[i].type;
1159 opt_len = attrs[i].len;
1160 if (ch == attrs[i].string[0]
1161 && ((type != ix86_opt_str && type != ix86_opt_enum)
1162 ? len == opt_len
1163 : len > opt_len)
1164 && memcmp (p, attrs[i].string, opt_len) == 0)
1165 {
1166 opt = attrs[i].opt;
1167 mask = attrs[i].mask;
1168 break;
1169 }
1170 }
1171
1172 /* Process the option. */
1173 if (opt == N_OPTS)
1174 {
1175 error_at (loc, "attribute %qs argument %qs is unknown",
1176 orig_p, attr_name);
1177 ret = false;
1178 }
1179
1180 else if (type == ix86_opt_isa)
1181 {
1182 struct cl_decoded_option decoded;
1183
1184 generate_option (opt, NULL, opt_set_p, CL_TARGET, &decoded);
1185 ix86_handle_option (opts, opts_set,
1186 &decoded, input_location);
1187 }
1188
1189 else if (type == ix86_opt_yes || type == ix86_opt_no)
1190 {
1191 if (type == ix86_opt_no)
1192 opt_set_p = !opt_set_p;
1193
1194 if (opt_set_p)
1195 opts->x_target_flags |= mask;
1196 else
1197 opts->x_target_flags &= ~mask;
1198 }
1199
87c753ac
L		 1200 else if (type == ix86_opt_ix86_yes || type == ix86_opt_ix86_no)
1201 {
1202 if (mask == OPTION_MASK_GENERAL_REGS_ONLY)
1203 {
8f1ea8dd
L		 1204 if (!opt_set_p)
1205 {
ca23341b 1206 error_at (loc, "pragma or attribute %<target(\"%s\")%> "
8f1ea8dd
L		 1207 "does not allow a negated form", p);
1208 return false;
1209 }
1210
87c753ac
L		 1211 if (type != ix86_opt_ix86_yes)
1212 gcc_unreachable ();
1213
1214 opts->x_ix86_target_flags |= mask;
1215
1216 struct cl_decoded_option decoded;
1217 generate_option (opt, NULL, opt_set_p, CL_TARGET,
1218 &decoded);
1219 ix86_handle_option (opts, opts_set, &decoded,
1220 input_location);
1221 }
1222 else
1223 {
1224 if (type == ix86_opt_ix86_no)
1225 opt_set_p = !opt_set_p;
1226
1227 if (opt_set_p)
1228 opts->x_ix86_target_flags |= mask;
1229 else
1230 opts->x_ix86_target_flags &= ~mask;
1231 }
1232 }
1233
2bf6d935
ML		 1234 else if (type == ix86_opt_str)
1235 {
1236 if (p_strings[opt])
1237 {
1238 error_at (loc, "attribute value %qs was already specified "
1239 "in %qs attribute", orig_p, attr_name);
1240 ret = false;
1241 }
1242 else
94cdd3b7
JJ		 1243 {
1244 p_strings[opt] = xstrdup (p + opt_len);
1245 if (opt == IX86_FUNCTION_SPECIFIC_ARCH)
1246 {
1247 /* If arch= is set, clear all bits in x_ix86_isa_flags,
1248 except for ISA_64BIT, ABI_64, ABI_X32, and CODE16
1249 and all bits in x_ix86_isa_flags2. */
1250 opts->x_ix86_isa_flags &= (OPTION_MASK_ISA_64BIT
1251 | OPTION_MASK_ABI_64
1252 | OPTION_MASK_ABI_X32
1253 | OPTION_MASK_CODE16);
1254 opts->x_ix86_isa_flags_explicit &= (OPTION_MASK_ISA_64BIT
1255 | OPTION_MASK_ABI_64
1256 | OPTION_MASK_ABI_X32
1257 | OPTION_MASK_CODE16);
1258 opts->x_ix86_isa_flags2 = 0;
1259 opts->x_ix86_isa_flags2_explicit = 0;
1260 }
1261 }
2bf6d935
ML		 1262 }
1263
1264 else if (type == ix86_opt_enum)
1265 {
1266 bool arg_ok;
1267 int value;
1268
1269 arg_ok = opt_enum_arg_to_value (opt, p + opt_len, &value, CL_TARGET);
1270 if (arg_ok)
1271 set_option (opts, enum_opts_set, opt, value,
1272 p + opt_len, DK_UNSPECIFIED, input_location,
1273 global_dc);
1274 else
1275 {
1276 error_at (loc, "attribute value %qs is unknown in %qs attribute",
1277 orig_p, attr_name);
1278 ret = false;
1279 }
1280 }
1281
1282 else
1283 gcc_unreachable ();
1284 }
1285
1286 return ret;
1287}
1288
1289/* Release allocated strings. */
1290static void
1291release_options_strings (char **option_strings)
1292{
1293 /* Free up memory allocated to hold the strings */
1294 for (unsigned i = 0; i < IX86_FUNCTION_SPECIFIC_MAX; i++)
1295 free (option_strings[i]);
1296}
1297
1298/* Return a TARGET_OPTION_NODE tree of the target options listed or NULL. */
1299
1300tree
1301ix86_valid_target_attribute_tree (tree fndecl, tree args,
1302 struct gcc_options *opts,
1303 struct gcc_options *opts_set,
1304 bool target_clone_attr)
1305{
1306 const char *orig_arch_string = opts->x_ix86_arch_string;
1307 const char *orig_tune_string = opts->x_ix86_tune_string;
1308 enum fpmath_unit orig_fpmath_set = opts_set->x_ix86_fpmath;
46e6341f 1309 enum prefer_vector_width orig_pvw_set = opts_set->x_prefer_vector_width_type;
2bf6d935
ML		 1310 int orig_tune_defaulted = ix86_tune_defaulted;
1311 int orig_arch_specified = ix86_arch_specified;
1312 char *option_strings[IX86_FUNCTION_SPECIFIC_MAX] = { NULL, NULL };
1313 tree t = NULL_TREE;
1314 struct cl_target_option *def
1315 = TREE_TARGET_OPTION (target_option_default_node);
1316 struct gcc_options enum_opts_set;
1317
1318 memset (&enum_opts_set, 0, sizeof (enum_opts_set));
1319
1320 /* Process each of the options on the chain. */
1321 if (!ix86_valid_target_attribute_inner_p (fndecl, args, option_strings, opts,
1322 opts_set, &enum_opts_set,
1323 target_clone_attr))
1324 return error_mark_node;
1325
1326 /* If the changed options are different from the default, rerun
1327 ix86_option_override_internal, and then save the options away.
1328 The string options are attribute options, and will be undone
1329 when we copy the save structure. */
1330 if (opts->x_ix86_isa_flags != def->x_ix86_isa_flags
1331 || opts->x_ix86_isa_flags2 != def->x_ix86_isa_flags2
1332 || opts->x_target_flags != def->x_target_flags
1333 || option_strings[IX86_FUNCTION_SPECIFIC_ARCH]
1334 || option_strings[IX86_FUNCTION_SPECIFIC_TUNE]
46e6341f
JJ		 1335 || enum_opts_set.x_ix86_fpmath
1336 || enum_opts_set.x_prefer_vector_width_type)
2bf6d935
ML		 1337 {
1338 /* If we are using the default tune= or arch=, undo the string assigned,
1339 and use the default. */
1340 if (option_strings[IX86_FUNCTION_SPECIFIC_ARCH])
94cdd3b7
JJ		 1341 opts->x_ix86_arch_string
1342 = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_ARCH]);
2bf6d935
ML		 1343 else if (!orig_arch_specified)
1344 opts->x_ix86_arch_string = NULL;
1345
1346 if (option_strings[IX86_FUNCTION_SPECIFIC_TUNE])
1347 opts->x_ix86_tune_string
1348 = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_TUNE]);
1349 else if (orig_tune_defaulted)
1350 opts->x_ix86_tune_string = NULL;
1351
1352 /* If fpmath= is not set, and we now have sse2 on 32-bit, use it. */
1353 if (enum_opts_set.x_ix86_fpmath)
1354 opts_set->x_ix86_fpmath = (enum fpmath_unit) 1;
46e6341f
JJ		 1355 if (enum_opts_set.x_prefer_vector_width_type)
1356 opts_set->x_prefer_vector_width_type = (enum prefer_vector_width) 1;
2bf6d935
ML		 1357
1358 /* Do any overrides, such as arch=xxx, or tune=xxx support. */
1359 bool r = ix86_option_override_internal (false, opts, opts_set);
1360 if (!r)
1361 {
1362 release_options_strings (option_strings);
1363 return error_mark_node;
1364 }
1365
1366 /* Add any builtin functions with the new isa if any. */
1367 ix86_add_new_builtins (opts->x_ix86_isa_flags, opts->x_ix86_isa_flags2);
1368
e401db7b
JJ		 1369 enum excess_precision orig_ix86_excess_precision
1370 = opts->x_ix86_excess_precision;
1371 bool orig_ix86_unsafe_math_optimizations
1372 = opts->x_ix86_unsafe_math_optimizations;
1373 opts->x_ix86_excess_precision = opts->x_flag_excess_precision;
1374 opts->x_ix86_unsafe_math_optimizations
1375 = opts->x_flag_unsafe_math_optimizations;
1376
2bf6d935
ML		 1377 /* Save the current options unless we are validating options for
1378 #pragma. */
ba948b37 1379 t = build_target_option_node (opts, opts_set);
2bf6d935
ML		 1380
1381 opts->x_ix86_arch_string = orig_arch_string;
1382 opts->x_ix86_tune_string = orig_tune_string;
1383 opts_set->x_ix86_fpmath = orig_fpmath_set;
46e6341f 1384 opts_set->x_prefer_vector_width_type = orig_pvw_set;
e401db7b
JJ		 1385 opts->x_ix86_excess_precision = orig_ix86_excess_precision;
1386 opts->x_ix86_unsafe_math_optimizations
1387 = orig_ix86_unsafe_math_optimizations;
2bf6d935
ML		 1388
1389 release_options_strings (option_strings);
1390 }
1391
1392 return t;
1393}
1394
1395/* Hook to validate attribute((target("string"))). */
1396
1397bool
1398ix86_valid_target_attribute_p (tree fndecl,
1399 tree ARG_UNUSED (name),
1400 tree args,
1401 int flags)
1402{
ba948b37 1403 struct gcc_options func_options, func_options_set;
2bf6d935
ML		 1404 tree new_target, new_optimize;
1405 bool ret = true;
1406
1407 /* attribute((target("default"))) does nothing, beyond
1408 affecting multi-versioning. */
1409 if (TREE_VALUE (args)
1410 && TREE_CODE (TREE_VALUE (args)) == STRING_CST
1411 && TREE_CHAIN (args) == NULL_TREE
1412 && strcmp (TREE_STRING_POINTER (TREE_VALUE (args)), "default") == 0)
1413 return true;
1414
ba948b37
JJ		 1415 tree old_optimize = build_optimization_node (&global_options,
1416 &global_options_set);
2bf6d935
ML		 1417
1418 /* Get the optimization options of the current function. */
1419 tree func_optimize = DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl);
1420
1421 if (!func_optimize)
1422 func_optimize = old_optimize;
1423
1424 /* Init func_options. */
1425 memset (&func_options, 0, sizeof (func_options));
1426 init_options_struct (&func_options, NULL);
1427 lang_hooks.init_options_struct (&func_options);
ba948b37
JJ		 1428 memset (&func_options_set, 0, sizeof (func_options_set));
1429
1430 cl_optimization_restore (&func_options, &func_options_set,
2bf6d935
ML		 1431 TREE_OPTIMIZATION (func_optimize));
1432
1433 /* Initialize func_options to the default before its target options can
1434 be set. */
ba948b37 1435 cl_target_option_restore (&func_options, &func_options_set,
2bf6d935
ML		 1436 TREE_TARGET_OPTION (target_option_default_node));
1437
1438 /* FLAGS == 1 is used for target_clones attribute. */
1439 new_target
1440 = ix86_valid_target_attribute_tree (fndecl, args, &func_options,
ba948b37 1441 &func_options_set, flags == 1);
2bf6d935 1442
ba948b37 1443 new_optimize = build_optimization_node (&func_options, &func_options_set);
2bf6d935
ML		 1444
1445 if (new_target == error_mark_node)
1446 ret = false;
1447
1448 else if (fndecl && new_target)
1449 {
1450 DECL_FUNCTION_SPECIFIC_TARGET (fndecl) = new_target;
1451
1452 if (old_optimize != new_optimize)
1453 DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl) = new_optimize;
1454 }
1455
2bf6d935
ML		 1456 return ret;
1457}
1458
1459const char *stringop_alg_names[] = {
2bf6d935
ML		 1460#define DEF_ALG(alg, name) #name,
1461#include "stringop.def"
2bf6d935
ML		 1462#undef DEF_ALG
1463};
1464
1465/* Parse parameter string passed to -mmemcpy-strategy= or -mmemset-strategy=.
1466 The string is of the following form (or comma separated list of it):
1467
1468 strategy_alg:max_size:[align|noalign]
1469
1470 where the full size range for the strategy is either [0, max_size] or
1471 [min_size, max_size], in which min_size is the max_size + 1 of the
1472 preceding range. The last size range must have max_size == -1.
1473
1474 Examples:
1475
1476 1.
1477 -mmemcpy-strategy=libcall:-1:noalign
1478
1479 this is equivalent to (for known size memcpy) -mstringop-strategy=libcall
1480
1481
1482 2.
1483 -mmemset-strategy=rep_8byte:16:noalign,vector_loop:2048:align,libcall:-1:noalign
1484
1485 This is to tell the compiler to use the following strategy for memset
1486 1) when the expected size is between [1, 16], use rep_8byte strategy;
1487 2) when the size is between [17, 2048], use vector_loop;
1488 3) when the size is > 2048, use libcall. */
1489
1490struct stringop_size_range
1491{
1492 int max;
1493 stringop_alg alg;
1494 bool noalign;
1495};
1496
1497static void
1498ix86_parse_stringop_strategy_string (char *strategy_str, bool is_memset)
1499{
1500 const struct stringop_algs *default_algs;
1501 stringop_size_range input_ranges[MAX_STRINGOP_ALGS];
1502 char *curr_range_str, *next_range_str;
1503 const char *opt = is_memset ? "-mmemset_strategy=" : "-mmemcpy_strategy=";
1504 int i = 0, n = 0;
1505
1506 if (is_memset)
1507 default_algs = &ix86_cost->memset[TARGET_64BIT != 0];
1508 else
1509 default_algs = &ix86_cost->memcpy[TARGET_64BIT != 0];
1510
1511 curr_range_str = strategy_str;
1512
1513 do
1514 {
1515 int maxs;
1516 char alg_name[128];
1517 char align[16];
1518 next_range_str = strchr (curr_range_str, ',');
1519 if (next_range_str)
1520 *next_range_str++ = '\0';
1521
1522 if (sscanf (curr_range_str, "%20[^:]:%d:%10s", alg_name, &maxs,
1523 align) != 3)
1524 {
1525 error ("wrong argument %qs to option %qs", curr_range_str, opt);
1526 return;
1527 }
1528
1529 if (n > 0 && (maxs < (input_ranges[n - 1].max + 1) && maxs != -1))
1530 {
1531 error ("size ranges of option %qs should be increasing", opt);
1532 return;
1533 }
1534
1535 for (i = 0; i < last_alg; i++)
1536 if (!strcmp (alg_name, stringop_alg_names[i]))
1537 break;
1538
1539 if (i == last_alg)
1540 {
1541 error ("wrong strategy name %qs specified for option %qs",
1542 alg_name, opt);
1543
1544 auto_vec <const char *> candidates;
1545 for (i = 0; i < last_alg; i++)
1546 if ((stringop_alg) i != rep_prefix_8_byte || TARGET_64BIT)
1547 candidates.safe_push (stringop_alg_names[i]);
1548
1549 char *s;
1550 const char *hint
1551 = candidates_list_and_hint (alg_name, s, candidates);
1552 if (hint)
1553 inform (input_location,
1554 "valid arguments to %qs are: %s; did you mean %qs?",
1555 opt, s, hint);
1556 else
1557 inform (input_location, "valid arguments to %qs are: %s",
1558 opt, s);
1559 XDELETEVEC (s);
1560 return;
1561 }
1562
1563 if ((stringop_alg) i == rep_prefix_8_byte
1564 && !TARGET_64BIT)
1565 {
1566 /* rep; movq isn't available in 32-bit code. */
1567 error ("strategy name %qs specified for option %qs "
1568 "not supported for 32-bit code", alg_name, opt);
1569 return;
1570 }
1571
1572 input_ranges[n].max = maxs;
1573 input_ranges[n].alg = (stringop_alg) i;
1574 if (!strcmp (align, "align"))
1575 input_ranges[n].noalign = false;
1576 else if (!strcmp (align, "noalign"))
1577 input_ranges[n].noalign = true;
1578 else
1579 {
1580 error ("unknown alignment %qs specified for option %qs", align, opt);
1581 return;
1582 }
1583 n++;
1584 curr_range_str = next_range_str;
1585 }
1586 while (curr_range_str);
1587
1588 if (input_ranges[n - 1].max != -1)
1589 {
1590 error ("the max value for the last size range should be -1"
1591 " for option %qs", opt);
1592 return;
1593 }
1594
1595 if (n > MAX_STRINGOP_ALGS)
1596 {
1597 error ("too many size ranges specified in option %qs", opt);
1598 return;
1599 }
1600
1601 /* Now override the default algs array. */
1602 for (i = 0; i < n; i++)
1603 {
1604 *const_cast<int *>(&default_algs->size[i].max) = input_ranges[i].max;
1605 *const_cast<stringop_alg *>(&default_algs->size[i].alg)
1606 = input_ranges[i].alg;
1607 *const_cast<int *>(&default_algs->size[i].noalign)
1608 = input_ranges[i].noalign;
1609 }
1610}
1611
1612\f
1613/* parse -mtune-ctrl= option. When DUMP is true,
1614 print the features that are explicitly set. */
1615
1616static void
1e964774 1617parse_mtune_ctrl_str (struct gcc_options *opts, bool dump)
2bf6d935 1618{
1e964774 1619 if (!opts->x_ix86_tune_ctrl_string)
2bf6d935
ML		 1620 return;
1621
1622 char *next_feature_string = NULL;
1e964774 1623 char *curr_feature_string = xstrdup (opts->x_ix86_tune_ctrl_string);
2bf6d935
ML		 1624 char *orig = curr_feature_string;
1625 int i;
1626 do
1627 {
1628 bool clear = false;
1629
1630 next_feature_string = strchr (curr_feature_string, ',');
1631 if (next_feature_string)
1632 *next_feature_string++ = '\0';
1633 if (*curr_feature_string == '^')
1634 {
1635 curr_feature_string++;
1636 clear = true;
1637 }
1638 for (i = 0; i < X86_TUNE_LAST; i++)
1639 {
1640 if (!strcmp (curr_feature_string, ix86_tune_feature_names[i]))
1641 {
1642 ix86_tune_features[i] = !clear;
1643 if (dump)
1644 fprintf (stderr, "Explicitly %s feature %s\n",
1645 clear ? "clear" : "set", ix86_tune_feature_names[i]);
1646 break;
1647 }
1648 }
1649 if (i == X86_TUNE_LAST)
1650 error ("unknown parameter to option %<-mtune-ctrl%>: %s",
1651 clear ? curr_feature_string - 1 : curr_feature_string);
1652 curr_feature_string = next_feature_string;
1653 }
1654 while (curr_feature_string);
1655 free (orig);
1656}
1657
1658/* Helper function to set ix86_tune_features. IX86_TUNE is the
1659 processor type. */
1660
1661static void
1e964774
L		 1662set_ix86_tune_features (struct gcc_options *opts,
1663 enum processor_type ix86_tune, bool dump)
2bf6d935
ML		 1664{
1665 unsigned HOST_WIDE_INT ix86_tune_mask = HOST_WIDE_INT_1U << ix86_tune;
1666 int i;
1667
1668 for (i = 0; i < X86_TUNE_LAST; ++i)
1669 {
1670 if (ix86_tune_no_default)
1671 ix86_tune_features[i] = 0;
1672 else
1673 ix86_tune_features[i]
1674 = !!(initial_ix86_tune_features[i] & ix86_tune_mask);
1675 }
1676
1677 if (dump)
1678 {
1679 fprintf (stderr, "List of x86 specific tuning parameter names:\n");
1680 for (i = 0; i < X86_TUNE_LAST; i++)
1681 fprintf (stderr, "%s : %s\n", ix86_tune_feature_names[i],
1682 ix86_tune_features[i] ? "on" : "off");
1683 }
1684
1e964774 1685 parse_mtune_ctrl_str (opts, dump);
2bf6d935
ML		 1686}
1687
1688
1689/* Default align_* from the processor table. */
1690
1691static void
1692ix86_default_align (struct gcc_options *opts)
1693{
1694 /* -falign-foo without argument: supply one. */
1695 if (opts->x_flag_align_loops && !opts->x_str_align_loops)
1696 opts->x_str_align_loops = processor_cost_table[ix86_tune]->align_loop;
1697 if (opts->x_flag_align_jumps && !opts->x_str_align_jumps)
1698 opts->x_str_align_jumps = processor_cost_table[ix86_tune]->align_jump;
1699 if (opts->x_flag_align_labels && !opts->x_str_align_labels)
1700 opts->x_str_align_labels = processor_cost_table[ix86_tune]->align_label;
1701 if (opts->x_flag_align_functions && !opts->x_str_align_functions)
1702 opts->x_str_align_functions = processor_cost_table[ix86_tune]->align_func;
1703}
1704
6bc89193
AO		 1705#ifndef USE_IX86_FRAME_POINTER
1706#define USE_IX86_FRAME_POINTER 0
1707#endif
1708
1709/* (Re)compute option overrides affected by optimization levels in
1710 target-specific ways. */
1711
1712static void
1713ix86_recompute_optlev_based_flags (struct gcc_options *opts,
1714 struct gcc_options *opts_set)
1715{
1716 /* Set the default values for switches whose default depends on TARGET_64BIT
1717 in case they weren't overwritten by command line options. */
1718 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
1719 {
6ed76044
ML		 1720 if (opts->x_optimize >= 1)
1721 SET_OPTION_IF_UNSET (opts, opts_set, flag_omit_frame_pointer,
1722 !USE_IX86_FRAME_POINTER);
6bc89193 1723 if (opts->x_flag_asynchronous_unwind_tables
6bc89193 1724 && TARGET_64BIT_MS_ABI)
6ed76044 1725 SET_OPTION_IF_UNSET (opts, opts_set, flag_unwind_tables, 1);
6bc89193
AO		 1726 if (opts->x_flag_asynchronous_unwind_tables == 2)
1727 opts->x_flag_unwind_tables
1728 = opts->x_flag_asynchronous_unwind_tables = 1;
1729 if (opts->x_flag_pcc_struct_return == 2)
1730 opts->x_flag_pcc_struct_return = 0;
1731 }
1732 else
1733 {
6ed76044
ML		 1734 if (opts->x_optimize >= 1)
1735 SET_OPTION_IF_UNSET (opts, opts_set, flag_omit_frame_pointer,
1736 !(USE_IX86_FRAME_POINTER || opts->x_optimize_size));
6bc89193
AO		 1737 if (opts->x_flag_asynchronous_unwind_tables == 2)
1738 opts->x_flag_asynchronous_unwind_tables = !USE_IX86_FRAME_POINTER;
1739 if (opts->x_flag_pcc_struct_return == 2)
1740 {
1741 /* Intel MCU psABI specifies that -freg-struct-return should
c4f63307 1742 be on. Instead of setting DEFAULT_PCC_STRUCT_RETURN to 0,
6bc89193
AO		 1743 we check -miamcu so that -freg-struct-return is always
1744 turned on if -miamcu is used. */
1745 if (TARGET_IAMCU_P (opts->x_target_flags))
1746 opts->x_flag_pcc_struct_return = 0;
1747 else
1748 opts->x_flag_pcc_struct_return = DEFAULT_PCC_STRUCT_RETURN;
1749 }
1750 }
1751}
1752
2bf6d935
ML		 1753/* Implement TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE hook. */
1754
1755void
1756ix86_override_options_after_change (void)
1757{
1758 ix86_default_align (&global_options);
6bc89193 1759 ix86_recompute_optlev_based_flags (&global_options, &global_options_set);
2bf6d935
ML		 1760}
1761
1762/* Clear stack slot assignments remembered from previous functions.
1763 This is called from INIT_EXPANDERS once before RTL is emitted for each
1764 function. */
1765
1766static struct machine_function *
1767ix86_init_machine_status (void)
1768{
1769 struct machine_function *f;
1770
1771 f = ggc_cleared_alloc<machine_function> ();
1772 f->call_abi = ix86_abi;
c2080a1f 1773 f->stack_frame_required = true;
5e2eabe1 1774 f->silent_p = true;
2bf6d935
ML		 1775
1776 return f;
1777}
1778
1779/* Override various settings based on options. If MAIN_ARGS_P, the
1780 options are from the command line, otherwise they are from
1781 attributes. Return true if there's an error related to march
1782 option. */
1783
1784static bool
1785ix86_option_override_internal (bool main_args_p,
1786 struct gcc_options *opts,
1787 struct gcc_options *opts_set)
1788{
5ebdd535 1789 unsigned int i;
2bf6d935
ML		 1790 unsigned HOST_WIDE_INT ix86_arch_mask;
1791 const bool ix86_tune_specified = (opts->x_ix86_tune_string != NULL);
1792
1793 /* -mrecip options. */
1794 static struct
1795 {
1796 const char *string; /* option name */
1797 unsigned int mask; /* mask bits to set */
1798 }
1799 const recip_options[] =
1800 {
1801 { "all", RECIP_MASK_ALL },
1802 { "none", RECIP_MASK_NONE },
1803 { "div", RECIP_MASK_DIV },
1804 { "sqrt", RECIP_MASK_SQRT },
1805 { "vec-div", RECIP_MASK_VEC_DIV },
1806 { "vec-sqrt", RECIP_MASK_VEC_SQRT },
1807 };
1808
1809
1810 /* Turn off both OPTION_MASK_ABI_64 and OPTION_MASK_ABI_X32 if
1811 TARGET_64BIT_DEFAULT is true and TARGET_64BIT is false. */
1812 if (TARGET_64BIT_DEFAULT && !TARGET_64BIT_P (opts->x_ix86_isa_flags))
1813 opts->x_ix86_isa_flags &= ~(OPTION_MASK_ABI_64 | OPTION_MASK_ABI_X32);
1814#ifdef TARGET_BI_ARCH
1815 else
1816 {
1817#if TARGET_BI_ARCH == 1
1818 /* When TARGET_BI_ARCH == 1, by default, OPTION_MASK_ABI_64
1819 is on and OPTION_MASK_ABI_X32 is off. We turn off
1820 OPTION_MASK_ABI_64 if OPTION_MASK_ABI_X32 is turned on by
1821 -mx32. */
1822 if (TARGET_X32_P (opts->x_ix86_isa_flags))
1823 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_64;
1824#else
1825 /* When TARGET_BI_ARCH == 2, by default, OPTION_MASK_ABI_X32 is
1826 on and OPTION_MASK_ABI_64 is off. We turn off
1827 OPTION_MASK_ABI_X32 if OPTION_MASK_ABI_64 is turned on by
1828 -m64 or OPTION_MASK_CODE16 is turned on by -m16. */
1829 if (TARGET_LP64_P (opts->x_ix86_isa_flags)
1830 || TARGET_16BIT_P (opts->x_ix86_isa_flags))
1831 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_X32;
1832#endif
1833 if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
1834 && TARGET_IAMCU_P (opts->x_target_flags))
1835 sorry ("Intel MCU psABI isn%'t supported in %s mode",
1836 TARGET_X32_P (opts->x_ix86_isa_flags) ? "x32" : "64-bit");
1837 }
1838#endif
1839
1840 if (TARGET_X32_P (opts->x_ix86_isa_flags))
1841 {
1842 /* Always turn on OPTION_MASK_ISA_64BIT and turn off
1843 OPTION_MASK_ABI_64 for TARGET_X32. */
1844 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
1845 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_64;
1846 }
1847 else if (TARGET_16BIT_P (opts->x_ix86_isa_flags))
1848 opts->x_ix86_isa_flags &= ~(OPTION_MASK_ISA_64BIT
1849 | OPTION_MASK_ABI_X32
1850 | OPTION_MASK_ABI_64);
1851 else if (TARGET_LP64_P (opts->x_ix86_isa_flags))
1852 {
1853 /* Always turn on OPTION_MASK_ISA_64BIT and turn off
1854 OPTION_MASK_ABI_X32 for TARGET_LP64. */
1855 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
1856 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_X32;
1857 }
1858
1859#ifdef SUBTARGET_OVERRIDE_OPTIONS
1860 SUBTARGET_OVERRIDE_OPTIONS;
1861#endif
1862
1863#ifdef SUBSUBTARGET_OVERRIDE_OPTIONS
1864 SUBSUBTARGET_OVERRIDE_OPTIONS;
1865#endif
1866
a49a96f6
JJ		 1867#ifdef HAVE_LD_BROKEN_PE_DWARF5
1868 /* If the PE linker has broken DWARF 5 support, make
1869 DWARF 4 the default. */
1870 if (TARGET_PECOFF)
1871 SET_OPTION_IF_UNSET (opts, opts_set, dwarf_version, 4);
1872#endif
1873
2bf6d935
ML		 1874 /* -fPIC is the default for x86_64. */
1875 if (TARGET_MACHO && TARGET_64BIT_P (opts->x_ix86_isa_flags))
1876 opts->x_flag_pic = 2;
1877
1878 /* Need to check -mtune=generic first. */
1879 if (opts->x_ix86_tune_string)
1880 {
1881 /* As special support for cross compilers we read -mtune=native
1882 as -mtune=generic. With native compilers we won't see the
1883 -mtune=native, as it was changed by the driver. */
1884 if (!strcmp (opts->x_ix86_tune_string, "native"))
69bd5d47 1885 opts->x_ix86_tune_string = "generic";
2bf6d935
ML		 1886 else if (!strcmp (opts->x_ix86_tune_string, "x86-64"))
1887 warning (OPT_Wdeprecated,
1888 main_args_p
1889 ? G_("%<-mtune=x86-64%> is deprecated; use %<-mtune=k8%> "
1890 "or %<-mtune=generic%> instead as appropriate")
1891 : G_("%<target(\"tune=x86-64\")%> is deprecated; use "
1892 "%<target(\"tune=k8\")%> or %<target(\"tune=generic\")%>"
1893 " instead as appropriate"));
1894 }
1895 else
1896 {
1897 if (opts->x_ix86_arch_string)
1898 opts->x_ix86_tune_string = opts->x_ix86_arch_string;
1899 if (!opts->x_ix86_tune_string)
1900 {
1901 opts->x_ix86_tune_string = processor_names[TARGET_CPU_DEFAULT];
1902 ix86_tune_defaulted = 1;
1903 }
1904
1905 /* opts->x_ix86_tune_string is set to opts->x_ix86_arch_string
1906 or defaulted. We need to use a sensible tune option. */
69bd5d47
JJ		 1907 if (!strncmp (opts->x_ix86_tune_string, "x86-64", 6)
1908 && (opts->x_ix86_tune_string[6] == '\0'
1909 || (!strcmp (opts->x_ix86_tune_string + 6, "-v2")
1910 || !strcmp (opts->x_ix86_tune_string + 6, "-v3")
1911 || !strcmp (opts->x_ix86_tune_string + 6, "-v4"))))
1912 opts->x_ix86_tune_string = "generic";
2bf6d935
ML		 1913 }
1914
1915 if (opts->x_ix86_stringop_alg == rep_prefix_8_byte
1916 && !TARGET_64BIT_P (opts->x_ix86_isa_flags))
1917 {
1918 /* rep; movq isn't available in 32-bit code. */
1919 error ("%<-mstringop-strategy=rep_8byte%> not supported for 32-bit code");
1920 opts->x_ix86_stringop_alg = no_stringop;
1921 }
1922
299a53d7 1923 if (TARGET_UINTR && !TARGET_64BIT)
1924 error ("%<-muintr%> not supported for 32-bit code");
1925
2bf6d935
ML		 1926 if (!opts->x_ix86_arch_string)
1927 opts->x_ix86_arch_string
1928 = TARGET_64BIT_P (opts->x_ix86_isa_flags)
1929 ? "x86-64" : SUBTARGET32_DEFAULT_CPU;
1930 else
1931 ix86_arch_specified = 1;
1932
1933 if (opts_set->x_ix86_pmode)
1934 {
1935 if ((TARGET_LP64_P (opts->x_ix86_isa_flags)
1936 && opts->x_ix86_pmode == PMODE_SI)
1937 || (!TARGET_64BIT_P (opts->x_ix86_isa_flags)
1938 && opts->x_ix86_pmode == PMODE_DI))
1939 error ("address mode %qs not supported in the %s bit mode",
1940 TARGET_64BIT_P (opts->x_ix86_isa_flags) ? "short" : "long",
1941 TARGET_64BIT_P (opts->x_ix86_isa_flags) ? "64" : "32");
1942 }
1943 else
1944 opts->x_ix86_pmode = TARGET_LP64_P (opts->x_ix86_isa_flags)
1945 ? PMODE_DI : PMODE_SI;
1946
6ed76044 1947 SET_OPTION_IF_UNSET (opts, opts_set, ix86_abi, DEFAULT_ABI);
2bf6d935
ML		 1948
1949 if (opts->x_ix86_abi == MS_ABI && TARGET_X32_P (opts->x_ix86_isa_flags))
1950 error ("%<-mabi=ms%> not supported with X32 ABI");
1951 gcc_assert (opts->x_ix86_abi == SYSV_ABI || opts->x_ix86_abi == MS_ABI);
1952
080629d3
ML		 1953 const char *abi_name = opts->x_ix86_abi == MS_ABI ? "ms" : "sysv";
1954 if ((opts->x_flag_sanitize & SANITIZE_USER_ADDRESS)
1955 && opts->x_ix86_abi != DEFAULT_ABI)
1956 error ("%<-mabi=%s%> not supported with %<-fsanitize=address%>", abi_name);
1957 if ((opts->x_flag_sanitize & SANITIZE_KERNEL_ADDRESS)
1958 && opts->x_ix86_abi != DEFAULT_ABI)
1959 error ("%<-mabi=%s%> not supported with %<-fsanitize=kernel-address%>",
1960 abi_name);
1961 if ((opts->x_flag_sanitize & SANITIZE_THREAD)
1962 && opts->x_ix86_abi != DEFAULT_ABI)
1963 error ("%<-mabi=%s%> not supported with %<-fsanitize=thread%>", abi_name);
2bf6d935
ML		 1964
1965 /* For targets using ms ABI enable ms-extensions, if not
1966 explicit turned off. For non-ms ABI we turn off this
1967 option. */
6ed76044
ML		 1968 SET_OPTION_IF_UNSET (opts, opts_set, flag_ms_extensions,
1969 (MS_ABI == DEFAULT_ABI));
2bf6d935
ML		 1970
1971 if (opts_set->x_ix86_cmodel)
1972 {
1973 switch (opts->x_ix86_cmodel)
1974 {
1975 case CM_SMALL:
1976 case CM_SMALL_PIC:
1977 if (opts->x_flag_pic)
1978 opts->x_ix86_cmodel = CM_SMALL_PIC;
1979 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
1980 error ("code model %qs not supported in the %s bit mode",
1981 "small", "32");
1982 break;
1983
1984 case CM_MEDIUM:
1985 case CM_MEDIUM_PIC:
1986 if (opts->x_flag_pic)
1987 opts->x_ix86_cmodel = CM_MEDIUM_PIC;
1988 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
1989 error ("code model %qs not supported in the %s bit mode",
1990 "medium", "32");
1991 else if (TARGET_X32_P (opts->x_ix86_isa_flags))
1992 error ("code model %qs not supported in x32 mode",
1993 "medium");
1994 break;
1995
1996 case CM_LARGE:
1997 case CM_LARGE_PIC:
1998 if (opts->x_flag_pic)
1999 opts->x_ix86_cmodel = CM_LARGE_PIC;
2000 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
2001 error ("code model %qs not supported in the %s bit mode",
2002 "large", "32");
2003 else if (TARGET_X32_P (opts->x_ix86_isa_flags))
2004 error ("code model %qs not supported in x32 mode",
2005 "large");
2006 break;
2007
2008 case CM_32:
2009 if (opts->x_flag_pic)
2010 error ("code model %s does not support PIC mode", "32");
2011 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2012 error ("code model %qs not supported in the %s bit mode",
2013 "32", "64");
2014 break;
2015
2016 case CM_KERNEL:
2017 if (opts->x_flag_pic)
2018 {
2019 error ("code model %s does not support PIC mode", "kernel");
2020 opts->x_ix86_cmodel = CM_32;
2021 }
2022 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
2023 error ("code model %qs not supported in the %s bit mode",
2024 "kernel", "32");
2025 break;
2026
2027 default:
2028 gcc_unreachable ();
2029 }
2030 }
2031 else
2032 {
2033 /* For TARGET_64BIT and MS_ABI, force pic on, in order to enable the
2034 use of rip-relative addressing. This eliminates fixups that
2035 would otherwise be needed if this object is to be placed in a
2036 DLL, and is essentially just as efficient as direct addressing. */
2037 if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
2038 && (TARGET_RDOS || TARGET_PECOFF))
2039 opts->x_ix86_cmodel = CM_MEDIUM_PIC, opts->x_flag_pic = 1;
2040 else if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2041 opts->x_ix86_cmodel = opts->x_flag_pic ? CM_SMALL_PIC : CM_SMALL;
2042 else
2043 opts->x_ix86_cmodel = CM_32;
2044 }
2045 if (TARGET_MACHO && opts->x_ix86_asm_dialect == ASM_INTEL)
2046 {
2047 error ("%<-masm=intel%> not supported in this configuration");
2048 opts->x_ix86_asm_dialect = ASM_ATT;
2049 }
2050 if ((TARGET_64BIT_P (opts->x_ix86_isa_flags) != 0)
2051 != ((opts->x_ix86_isa_flags & OPTION_MASK_ISA_64BIT) != 0))
2052 sorry ("%i-bit mode not compiled in",
2053 (opts->x_ix86_isa_flags & OPTION_MASK_ISA_64BIT) ? 64 : 32);
2054
4f00c4d4
ML		 2055 /* Last processor_alias_table must point to "generic" entry. */
2056 gcc_checking_assert (strcmp (processor_alias_table[pta_size - 1].name,
2057 "generic") == 0);
2bf6d935
ML		 2058 for (i = 0; i < pta_size; i++)
2059 if (! strcmp (opts->x_ix86_arch_string, processor_alias_table[i].name))
2060 {
2061 if (!strcmp (opts->x_ix86_arch_string, "generic"))
2062 {
2063 error (main_args_p
2064 ? G_("%<generic%> CPU can be used only for %<-mtune=%> "
2065 "switch")
2066 : G_("%<generic%> CPU can be used only for "
2067 "%<target(\"tune=\")%> attribute"));
2068 return false;
2069 }
2070 else if (!strcmp (opts->x_ix86_arch_string, "intel"))
2071 {
2072 error (main_args_p
2073 ? G_("%<intel%> CPU can be used only for %<-mtune=%> "
2074 "switch")
2075 : G_("%<intel%> CPU can be used only for "
2076 "%<target(\"tune=\")%> attribute"));
2077 return false;
2078 }
2079
2080 if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
2081 && !((processor_alias_table[i].flags & PTA_64BIT) != 0))
2082 {
2083 error ("CPU you selected does not support x86-64 "
2084 "instruction set");
2085 return false;
2086 }
2087
2088 ix86_schedule = processor_alias_table[i].schedule;
2089 ix86_arch = processor_alias_table[i].processor;
324bec55
FW		 2090
2091 /* Default cpu tuning to the architecture, unless the table
2092 entry requests not to do this. Used by the x86-64 psABI
2093 micro-architecture levels. */
2094 if ((processor_alias_table[i].flags & PTA_NO_TUNE) == 0)
2095 ix86_tune = ix86_arch;
2096 else
2097 ix86_tune = PROCESSOR_GENERIC;
2bf6d935 2098
1751bec0
ML		 2099 /* Enable PTA flags that are enabled by default by a -march option. */
2100#define TARGET_EXPLICIT_NO_SAHF_P(opts) (false)
2101#define SET_TARGET_NO_SAHF(opts) {}
2102#define TARGET_EXPLICIT_PREFETCH_SSE_P(opts) (false)
2103#define SET_TARGET_PREFETCH_SSE(opts) {}
2104#define TARGET_EXPLICIT_NO_TUNE_P(opts) (false)
2105#define SET_TARGET_NO_TUNE(opts) {}
2106#define TARGET_EXPLICIT_NO_80387_P(opts) (false)
2107#define SET_TARGET_NO_80387(opts) {}
2108
2109#define DEF_PTA(NAME) \
2110 if (((processor_alias_table[i].flags & PTA_ ## NAME) != 0) \
2111 && PTA_ ## NAME != PTA_64BIT \
2112 && !TARGET_EXPLICIT_ ## NAME ## _P (opts)) \
2113 SET_TARGET_ ## NAME (opts);
2114#include "i386-isa.def"
2115#undef DEF_PTA
2116
2117
2118 if (!(TARGET_64BIT_P (opts->x_ix86_isa_flags)
2119 && ((processor_alias_table[i].flags & PTA_NO_SAHF) != 0))
2120 && !TARGET_EXPLICIT_SAHF_P (opts))
2121 SET_TARGET_SAHF (opts);
2122
2bf6d935 2123 if (((processor_alias_table[i].flags & PTA_ABM) != 0)
1751bec0
ML		 2124 && !TARGET_EXPLICIT_ABM_P (opts))
2125 {
2126 SET_TARGET_LZCNT (opts);
2127 SET_TARGET_POPCNT (opts);
2128 }
2bf6d935
ML		 2129
2130 if ((processor_alias_table[i].flags
2131 & (PTA_PREFETCH_SSE | PTA_SSE)) != 0)
08a4adcf 2132 ix86_prefetch_sse = true;
2bf6d935 2133
87c753ac
L		 2134 /* Don't enable x87 instructions if only general registers are
2135 allowed by target("general-regs-only") function attribute or
2136 -mgeneral-regs-only. */
2137 if (!(opts->x_ix86_target_flags & OPTION_MASK_GENERAL_REGS_ONLY)
2bf6d935
ML		 2138 && !(opts_set->x_target_flags & MASK_80387))
2139 {
2140 if (((processor_alias_table[i].flags & PTA_NO_80387) != 0))
2141 opts->x_target_flags &= ~MASK_80387;
2142 else
2143 opts->x_target_flags |= MASK_80387;
2144 }
2145 break;
2146 }
2147
2148 if (i == pta_size)
2149 {
2150 error (main_args_p
2151 ? G_("bad value (%qs) for %<-march=%> switch")
2152 : G_("bad value (%qs) for %<target(\"arch=\")%> attribute"),
2153 opts->x_ix86_arch_string);
2154
2155 auto_vec <const char *> candidates;
2156 for (i = 0; i < pta_size; i++)
2157 if (strcmp (processor_alias_table[i].name, "generic")
2158 && strcmp (processor_alias_table[i].name, "intel")
2159 && (!TARGET_64BIT_P (opts->x_ix86_isa_flags)
2160 || ((processor_alias_table[i].flags & PTA_64BIT) != 0)))
2161 candidates.safe_push (processor_alias_table[i].name);
2162
2163#ifdef HAVE_LOCAL_CPU_DETECT
2164 /* Add also "native" as possible value. */
2165 candidates.safe_push ("native");
2166#endif
2167
2168 char *s;
2169 const char *hint
2170 = candidates_list_and_hint (opts->x_ix86_arch_string, s, candidates);
2171 if (hint)
2172 inform (input_location,
2173 main_args_p
2174 ? G_("valid arguments to %<-march=%> switch are: "
2175 "%s; did you mean %qs?")
2176 : G_("valid arguments to %<target(\"arch=\")%> attribute are: "
2177 "%s; did you mean %qs?"), s, hint);
2178 else
2179 inform (input_location,
2180 main_args_p
2181 ? G_("valid arguments to %<-march=%> switch are: %s")
2182 : G_("valid arguments to %<target(\"arch=\")%> attribute "
2183 "are: %s"), s);
2184 XDELETEVEC (s);
2185 }
2186
2187 ix86_arch_mask = HOST_WIDE_INT_1U << ix86_arch;
2188 for (i = 0; i < X86_ARCH_LAST; ++i)
2189 ix86_arch_features[i] = !!(initial_ix86_arch_features[i] & ix86_arch_mask);
2190
2191 for (i = 0; i < pta_size; i++)
324bec55
FW		 2192 if (! strcmp (opts->x_ix86_tune_string, processor_alias_table[i].name)
2193 && (processor_alias_table[i].flags & PTA_NO_TUNE) == 0)
2bf6d935
ML		 2194 {
2195 ix86_schedule = processor_alias_table[i].schedule;
2196 ix86_tune = processor_alias_table[i].processor;
2197 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2198 {
2199 if (!((processor_alias_table[i].flags & PTA_64BIT) != 0))
2200 {
2201 if (ix86_tune_defaulted)
2202 {
2203 opts->x_ix86_tune_string = "x86-64";
2204 for (i = 0; i < pta_size; i++)
2205 if (! strcmp (opts->x_ix86_tune_string,
2206 processor_alias_table[i].name))
2207 break;
2208 ix86_schedule = processor_alias_table[i].schedule;
2209 ix86_tune = processor_alias_table[i].processor;
2210 }
2211 else
2212 error ("CPU you selected does not support x86-64 "
2213 "instruction set");
2214 }
2215 }
2216 /* Intel CPUs have always interpreted SSE prefetch instructions as
2217 NOPs; so, we can enable SSE prefetch instructions even when
2218 -mtune (rather than -march) points us to a processor that has them.
2219 However, the VIA C3 gives a SIGILL, so we only do that for i686 and
2220 higher processors. */
2221 if (TARGET_CMOV
2222 && ((processor_alias_table[i].flags
2223 & (PTA_PREFETCH_SSE | PTA_SSE)) != 0))
08a4adcf 2224 ix86_prefetch_sse = true;
2bf6d935
ML		 2225 break;
2226 }
2227
2228 if (ix86_tune_specified && i == pta_size)
2229 {
2230 error (main_args_p
2231 ? G_("bad value (%qs) for %<-mtune=%> switch")
2232 : G_("bad value (%qs) for %<target(\"tune=\")%> attribute"),
2233 opts->x_ix86_tune_string);
2234
2235 auto_vec <const char *> candidates;
2236 for (i = 0; i < pta_size; i++)
324bec55
FW		 2237 if ((!TARGET_64BIT_P (opts->x_ix86_isa_flags)
2238 || ((processor_alias_table[i].flags & PTA_64BIT) != 0))
2239 && (processor_alias_table[i].flags & PTA_NO_TUNE) == 0)
2bf6d935
ML		 2240 candidates.safe_push (processor_alias_table[i].name);
2241
2242#ifdef HAVE_LOCAL_CPU_DETECT
2243 /* Add also "native" as possible value. */
2244 candidates.safe_push ("native");
2245#endif
2246
2247 char *s;
2248 const char *hint
2249 = candidates_list_and_hint (opts->x_ix86_tune_string, s, candidates);
2250 if (hint)
2251 inform (input_location,
2252 main_args_p
2253 ? G_("valid arguments to %<-mtune=%> switch are: "
2254 "%s; did you mean %qs?")
2255 : G_("valid arguments to %<target(\"tune=\")%> attribute are: "
2256 "%s; did you mean %qs?"), s, hint);
2257 else
2258 inform (input_location,
2259 main_args_p
2260 ? G_("valid arguments to %<-mtune=%> switch are: %s")
2261 : G_("valid arguments to %<target(\"tune=\")%> attribute "
2262 "are: %s"), s);
2263 XDELETEVEC (s);
2264 }
2265
1e964774 2266 set_ix86_tune_features (opts, ix86_tune, opts->x_ix86_dump_tunes);
2bf6d935 2267
6bc89193 2268 ix86_recompute_optlev_based_flags (opts, opts_set);
2bf6d935
ML		 2269
2270 ix86_tune_cost = processor_cost_table[ix86_tune];
2271 /* TODO: ix86_cost should be chosen at instruction or function granuality
2272 so for cold code we use size_cost even in !optimize_size compilation. */
2273 if (opts->x_optimize_size)
2274 ix86_cost = &ix86_size_cost;
2275 else
2276 ix86_cost = ix86_tune_cost;
2277
2278 /* Arrange to set up i386_stack_locals for all functions. */
2279 init_machine_status = ix86_init_machine_status;
2280
2281 /* Validate -mregparm= value. */
2282 if (opts_set->x_ix86_regparm)
2283 {
2284 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2285 warning (0, "%<-mregparm%> is ignored in 64-bit mode");
2286 else if (TARGET_IAMCU_P (opts->x_target_flags))
2287 warning (0, "%<-mregparm%> is ignored for Intel MCU psABI");
2288 if (opts->x_ix86_regparm > REGPARM_MAX)
2289 {
2290 error ("%<-mregparm=%d%> is not between 0 and %d",
2291 opts->x_ix86_regparm, REGPARM_MAX);
2292 opts->x_ix86_regparm = 0;
2293 }
2294 }
2295 if (TARGET_IAMCU_P (opts->x_target_flags)
2296 || TARGET_64BIT_P (opts->x_ix86_isa_flags))
2297 opts->x_ix86_regparm = REGPARM_MAX;
2298
2299 /* Default align_* from the processor table. */
2300 ix86_default_align (opts);
2301
2302 /* Provide default for -mbranch-cost= value. */
6ed76044
ML		 2303 SET_OPTION_IF_UNSET (opts, opts_set, ix86_branch_cost,
2304 ix86_tune_cost->branch_cost);
2bf6d935
ML		 2305
2306 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2307 {
2308 opts->x_target_flags
2309 |= TARGET_SUBTARGET64_DEFAULT & ~opts_set->x_target_flags;
2310
2311 if (!ix86_arch_specified)
2312 opts->x_ix86_isa_flags
2313 |= TARGET_SUBTARGET64_ISA_DEFAULT & ~opts->x_ix86_isa_flags_explicit;
2314
716bb02b
UB		 2315 if (!TARGET_128BIT_LONG_DOUBLE_P (opts->x_target_flags))
2316 error ("%<-m96bit-long-double%> is not compatible with this target");
2317
2bf6d935
ML		 2318 if (TARGET_RTD_P (opts->x_target_flags))
2319 warning (0,
2320 main_args_p
2321 ? G_("%<-mrtd%> is ignored in 64bit mode")
2322 : G_("%<target(\"rtd\")%> is ignored in 64bit mode"));
2323 }
2324 else
2325 {
2326 opts->x_target_flags
2327 |= TARGET_SUBTARGET32_DEFAULT & ~opts_set->x_target_flags;
2328
2329 if (!ix86_arch_specified)
2330 opts->x_ix86_isa_flags
2331 |= TARGET_SUBTARGET32_ISA_DEFAULT & ~opts->x_ix86_isa_flags_explicit;
2332
2333 /* i386 ABI does not specify red zone. It still makes sense to use it
2334 when programmer takes care to stack from being destroyed. */
2335 if (!(opts_set->x_target_flags & MASK_NO_RED_ZONE))
2336 opts->x_target_flags |= MASK_NO_RED_ZONE;
2337 }
2338
2339 /* Keep nonleaf frame pointers. */
2340 if (opts->x_flag_omit_frame_pointer)
2341 opts->x_target_flags &= ~MASK_OMIT_LEAF_FRAME_POINTER;
2342 else if (TARGET_OMIT_LEAF_FRAME_POINTER_P (opts->x_target_flags))
2343 opts->x_flag_omit_frame_pointer = 1;
2344
2345 /* If we're doing fast math, we don't care about comparison order
2346 wrt NaNs. This lets us use a shorter comparison sequence. */
2347 if (opts->x_flag_finite_math_only)
2348 opts->x_target_flags &= ~MASK_IEEE_FP;
2349
2350 /* If the architecture always has an FPU, turn off NO_FANCY_MATH_387,
2351 since the insns won't need emulation. */
2352 if (ix86_tune_features [X86_TUNE_ALWAYS_FANCY_MATH_387])
2353 opts->x_target_flags &= ~MASK_NO_FANCY_MATH_387;
2354
2355 /* Likewise, if the target doesn't have a 387, or we've specified
2356 software floating point, don't use 387 inline intrinsics. */
2357 if (!TARGET_80387_P (opts->x_target_flags))
2358 opts->x_target_flags |= MASK_NO_FANCY_MATH_387;
2359
2360 /* Turn on MMX builtins for -msse. */
2361 if (TARGET_SSE_P (opts->x_ix86_isa_flags))
2362 opts->x_ix86_isa_flags
2363 |= OPTION_MASK_ISA_MMX & ~opts->x_ix86_isa_flags_explicit;
2364
2365 /* Enable SSE prefetch. */
2366 if (TARGET_SSE_P (opts->x_ix86_isa_flags)
2367 || (TARGET_PRFCHW_P (opts->x_ix86_isa_flags)
2368 && !TARGET_3DNOW_P (opts->x_ix86_isa_flags))
2369 || TARGET_PREFETCHWT1_P (opts->x_ix86_isa_flags))
08a4adcf 2370 ix86_prefetch_sse = true;
2bf6d935 2371
d8c6cc2c
L		 2372 /* Enable mwait/monitor instructions for -msse3. */
2373 if (TARGET_SSE3_P (opts->x_ix86_isa_flags))
2374 opts->x_ix86_isa_flags2
2375 |= OPTION_MASK_ISA2_MWAIT & ~opts->x_ix86_isa_flags2_explicit;
2376
2bf6d935
ML		 2377 /* Enable popcnt instruction for -msse4.2 or -mabm. */
2378 if (TARGET_SSE4_2_P (opts->x_ix86_isa_flags)
2379 || TARGET_ABM_P (opts->x_ix86_isa_flags))
2380 opts->x_ix86_isa_flags
2381 |= OPTION_MASK_ISA_POPCNT & ~opts->x_ix86_isa_flags_explicit;
2382
39671f87
L		 2383 /* Enable crc32 instruction for -msse4.2. */
2384 if (TARGET_SSE4_2_P (opts->x_ix86_isa_flags))
2385 opts->x_ix86_isa_flags
2386 |= OPTION_MASK_ISA_CRC32 & ~opts->x_ix86_isa_flags_explicit;
2387
2bf6d935
ML		 2388 /* Enable lzcnt instruction for -mabm. */
2389 if (TARGET_ABM_P(opts->x_ix86_isa_flags))
2390 opts->x_ix86_isa_flags
2391 |= OPTION_MASK_ISA_LZCNT & ~opts->x_ix86_isa_flags_explicit;
2392
2393 /* Disable BMI, BMI2 and TBM instructions for -m16. */
2394 if (TARGET_16BIT_P(opts->x_ix86_isa_flags))
2395 opts->x_ix86_isa_flags
2396 &= ~((OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_TBM)
2397 & ~opts->x_ix86_isa_flags_explicit);
2398
2399 /* Validate -mpreferred-stack-boundary= value or default it to
2400 PREFERRED_STACK_BOUNDARY_DEFAULT. */
2401 ix86_preferred_stack_boundary = PREFERRED_STACK_BOUNDARY_DEFAULT;
2402 if (opts_set->x_ix86_preferred_stack_boundary_arg)
2403 {
2404 int min = TARGET_64BIT_P (opts->x_ix86_isa_flags)? 3 : 2;
2405 int max = TARGET_SEH ? 4 : 12;
2406
2407 if (opts->x_ix86_preferred_stack_boundary_arg < min
2408 || opts->x_ix86_preferred_stack_boundary_arg > max)
2409 {
2410 if (min == max)
2411 error ("%<-mpreferred-stack-boundary%> is not supported "
2412 "for this target");
2413 else
2414 error ("%<-mpreferred-stack-boundary=%d%> is not between %d and %d",
2415 opts->x_ix86_preferred_stack_boundary_arg, min, max);
2416 }
2417 else
2418 ix86_preferred_stack_boundary
2419 = (1 << opts->x_ix86_preferred_stack_boundary_arg) * BITS_PER_UNIT;
2420 }
2421
2422 /* Set the default value for -mstackrealign. */
6ed76044
ML		 2423 SET_OPTION_IF_UNSET (opts, opts_set, ix86_force_align_arg_pointer,
2424 STACK_REALIGN_DEFAULT);
2bf6d935
ML		 2425
2426 ix86_default_incoming_stack_boundary = PREFERRED_STACK_BOUNDARY;
2427
2428 /* Validate -mincoming-stack-boundary= value or default it to
2429 MIN_STACK_BOUNDARY/PREFERRED_STACK_BOUNDARY. */
2430 ix86_incoming_stack_boundary = ix86_default_incoming_stack_boundary;
2431 if (opts_set->x_ix86_incoming_stack_boundary_arg)
2432 {
2433 int min = TARGET_64BIT_P (opts->x_ix86_isa_flags) ? 3 : 2;
2434
2435 if (opts->x_ix86_incoming_stack_boundary_arg < min
2436 || opts->x_ix86_incoming_stack_boundary_arg > 12)
2437 error ("%<-mincoming-stack-boundary=%d%> is not between %d and 12",
2438 opts->x_ix86_incoming_stack_boundary_arg, min);
2439 else
2440 {
2441 ix86_user_incoming_stack_boundary
2442 = (1 << opts->x_ix86_incoming_stack_boundary_arg) * BITS_PER_UNIT;
2443 ix86_incoming_stack_boundary
2444 = ix86_user_incoming_stack_boundary;
2445 }
2446 }
2447
2448#ifndef NO_PROFILE_COUNTERS
2449 if (flag_nop_mcount)
2450 error ("%<-mnop-mcount%> is not compatible with this target");
2451#endif
2452 if (flag_nop_mcount && flag_pic)
2453 error ("%<-mnop-mcount%> is not implemented for %<-fPIC%>");
2454
2455 /* Accept -msseregparm only if at least SSE support is enabled. */
2456 if (TARGET_SSEREGPARM_P (opts->x_target_flags)
2457 && ! TARGET_SSE_P (opts->x_ix86_isa_flags))
2458 error (main_args_p
2459 ? G_("%<-msseregparm%> used without SSE enabled")
2460 : G_("%<target(\"sseregparm\")%> used without SSE enabled"));
2461
2462 if (opts_set->x_ix86_fpmath)
2463 {
2464 if (opts->x_ix86_fpmath & FPMATH_SSE)
2465 {
2466 if (!TARGET_SSE_P (opts->x_ix86_isa_flags))
2467 {
2468 if (TARGET_80387_P (opts->x_target_flags))
2469 {
2470 warning (0, "SSE instruction set disabled, using 387 arithmetics");
2471 opts->x_ix86_fpmath = FPMATH_387;
2472 }
2473 }
2474 else if ((opts->x_ix86_fpmath & FPMATH_387)
2475 && !TARGET_80387_P (opts->x_target_flags))
2476 {
2477 warning (0, "387 instruction set disabled, using SSE arithmetics");
2478 opts->x_ix86_fpmath = FPMATH_SSE;
2479 }
2480 }
2481 }
2482 /* For all chips supporting SSE2, -mfpmath=sse performs better than
2483 fpmath=387. The second is however default at many targets since the
2484 extra 80bit precision of temporaries is considered to be part of ABI.
2485 Overwrite the default at least for -ffast-math.
2486 TODO: -mfpmath=both seems to produce same performing code with bit
2487 smaller binaries. It is however not clear if register allocation is
2488 ready for this setting.
2489 Also -mfpmath=387 is overall a lot more compact (bout 4-5%) than SSE
2490 codegen. We may switch to 387 with -ffast-math for size optimized
2491 functions. */
2492 else if (fast_math_flags_set_p (&global_options)
2493 && TARGET_SSE2_P (opts->x_ix86_isa_flags))
2494 opts->x_ix86_fpmath = FPMATH_SSE;
2495 else
2496 opts->x_ix86_fpmath = TARGET_FPMATH_DEFAULT_P (opts->x_ix86_isa_flags);
2497
2498 /* Use external vectorized library in vectorizing intrinsics. */
2499 if (opts_set->x_ix86_veclibabi_type)
2500 switch (opts->x_ix86_veclibabi_type)
2501 {
2502 case ix86_veclibabi_type_svml:
2503 ix86_veclib_handler = &ix86_veclibabi_svml;
2504 break;
2505
2506 case ix86_veclibabi_type_acml:
2507 ix86_veclib_handler = &ix86_veclibabi_acml;
2508 break;
2509
2510 default:
2511 gcc_unreachable ();
2512 }
2513
2514 if (ix86_tune_features [X86_TUNE_ACCUMULATE_OUTGOING_ARGS]
2515 && !(opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
2516 opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
2517
2518 /* If stack probes are required, the space used for large function
2519 arguments on the stack must also be probed, so enable
2520 -maccumulate-outgoing-args so this happens in the prologue. */
2521 if (TARGET_STACK_PROBE_P (opts->x_target_flags)
2522 && !(opts->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
2523 {
2524 if (opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)
2525 warning (0,
2526 main_args_p
2527 ? G_("stack probing requires %<-maccumulate-outgoing-args%> "
2528 "for correctness")
2529 : G_("stack probing requires "
2530 "%<target(\"accumulate-outgoing-args\")%> for "
2531 "correctness"));
2532 opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
2533 }
2534
2535 /* Stack realignment without -maccumulate-outgoing-args requires %ebp,
2536 so enable -maccumulate-outgoing-args when %ebp is fixed. */
2537 if (fixed_regs[BP_REG]
2538 && !(opts->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
2539 {
2540 if (opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)
2541 warning (0,
2542 main_args_p
2543 ? G_("fixed ebp register requires "
2544 "%<-maccumulate-outgoing-args%>")
2545 : G_("fixed ebp register requires "
2546 "%<target(\"accumulate-outgoing-args\")%>"));
2547 opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
2548 }
2549
2550 /* Figure out what ASM_GENERATE_INTERNAL_LABEL builds as a prefix. */
2551 {
2552 char *p;
2553 ASM_GENERATE_INTERNAL_LABEL (internal_label_prefix, "LX", 0);
2554 p = strchr (internal_label_prefix, 'X');
2555 internal_label_prefix_len = p - internal_label_prefix;
2556 *p = '\0';
2557 }
2558
2559 /* When scheduling description is not available, disable scheduler pass
2560 so it won't slow down the compilation and make x87 code slower. */
2561 if (!TARGET_SCHEDULE)
2562 opts->x_flag_schedule_insns_after_reload = opts->x_flag_schedule_insns = 0;
2563
028d4092
ML		 2564 SET_OPTION_IF_UNSET (opts, opts_set, param_simultaneous_prefetches,
2565 ix86_tune_cost->simultaneous_prefetches);
2566 SET_OPTION_IF_UNSET (opts, opts_set, param_l1_cache_line_size,
2567 ix86_tune_cost->prefetch_block);
2568 SET_OPTION_IF_UNSET (opts, opts_set, param_l1_cache_size,
2569 ix86_tune_cost->l1_cache_size);
2570 SET_OPTION_IF_UNSET (opts, opts_set, param_l2_cache_size,
2571 ix86_tune_cost->l2_cache_size);
2bf6d935
ML		 2572
2573 /* Enable sw prefetching at -O3 for CPUS that prefetching is helpful. */
2574 if (opts->x_flag_prefetch_loop_arrays < 0
2575 && HAVE_prefetch
2576 && (opts->x_optimize >= 3 || opts->x_flag_profile_use)
2577 && !opts->x_optimize_size
2578 && TARGET_SOFTWARE_PREFETCHING_BENEFICIAL)
2579 opts->x_flag_prefetch_loop_arrays = 1;
2580
2581 /* If using typedef char *va_list, signal that __builtin_va_start (&ap, 0)
2582 can be opts->x_optimized to ap = __builtin_next_arg (0). */
2583 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags) && !opts->x_flag_split_stack)
2584 targetm.expand_builtin_va_start = NULL;
2585
2bf6d935
ML		 2586#ifdef USE_IX86_CLD
2587 /* Use -mcld by default for 32-bit code if configured with --enable-cld. */
2588 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
2589 opts->x_target_flags |= MASK_CLD & ~opts_set->x_target_flags;
2590#endif
2591
2592 /* Set the default value for -mfentry. */
2593 if (!opts_set->x_flag_fentry)
2594 opts->x_flag_fentry = TARGET_SEH;
2595 else
2596 {
2597 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags) && opts->x_flag_pic
2598 && opts->x_flag_fentry)
2599 sorry ("%<-mfentry%> isn%'t supported for 32-bit in combination "
2600 "with %<-fpic%>");
2601 else if (TARGET_SEH && !opts->x_flag_fentry)
2602 sorry ("%<-mno-fentry%> isn%'t compatible with SEH");
2603 }
2604
2605 if (TARGET_SEH && TARGET_CALL_MS2SYSV_XLOGUES)
2606 sorry ("%<-mcall-ms2sysv-xlogues%> isn%'t currently supported with SEH");
2607
2608 if (!(opts_set->x_target_flags & MASK_VZEROUPPER)
2609 && TARGET_EMIT_VZEROUPPER)
2610 opts->x_target_flags |= MASK_VZEROUPPER;
2611 if (!(opts_set->x_target_flags & MASK_STV))
2612 opts->x_target_flags |= MASK_STV;
2613 /* Disable STV if -mpreferred-stack-boundary={2,3} or
2614 -mincoming-stack-boundary={2,3} or -mstackrealign - the needed
2615 stack realignment will be extra cost the pass doesn't take into
2616 account and the pass can't realign the stack. */
2617 if (ix86_preferred_stack_boundary < 128
2618 || ix86_incoming_stack_boundary < 128
2619 || opts->x_ix86_force_align_arg_pointer)
2620 opts->x_target_flags &= ~MASK_STV;
2621 if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL]
2622 && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_LOAD))
2623 opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_LOAD;
342de04d 2624 else if (!main_args_p
2625 && ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL])
2626 opts->x_target_flags &= ~MASK_AVX256_SPLIT_UNALIGNED_LOAD;
2627
2bf6d935
ML		 2628 if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL]
2629 && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_STORE))
2630 opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_STORE;
342de04d 2631 else if (!main_args_p
2632 && ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL])
2633 opts->x_target_flags &= ~MASK_AVX256_SPLIT_UNALIGNED_STORE;
2bf6d935
ML		 2634
2635 /* Enable 128-bit AVX instruction generation
2636 for the auto-vectorizer. */
586bbef1 2637 if (ix86_tune_features[X86_TUNE_AVX128_OPTIMAL]
2bf6d935
ML		 2638 && (opts_set->x_prefer_vector_width_type == PVW_NONE))
2639 opts->x_prefer_vector_width_type = PVW_AVX128;
2640
2641 /* Use 256-bit AVX instruction generation
2642 in the auto-vectorizer. */
2643 if (ix86_tune_features[X86_TUNE_AVX256_OPTIMAL]
2644 && (opts_set->x_prefer_vector_width_type == PVW_NONE))
2645 opts->x_prefer_vector_width_type = PVW_AVX256;
2646
2647 if (opts->x_ix86_recip_name)
2648 {
2649 char *p = ASTRDUP (opts->x_ix86_recip_name);
2650 char *q;
5ebdd535 2651 unsigned int mask;
2bf6d935
ML		 2652 bool invert;
2653
2654 while ((q = strtok (p, ",")) != NULL)
2655 {
2656 p = NULL;
2657 if (*q == '!')
2658 {
2659 invert = true;
2660 q++;
2661 }
2662 else
2663 invert = false;
2664
2665 if (!strcmp (q, "default"))
2666 mask = RECIP_MASK_ALL;
2667 else
2668 {
2669 for (i = 0; i < ARRAY_SIZE (recip_options); i++)
2670 if (!strcmp (q, recip_options[i].string))
2671 {
2672 mask = recip_options[i].mask;
2673 break;
2674 }
2675
2676 if (i == ARRAY_SIZE (recip_options))
2677 {
2678 error ("unknown option for %<-mrecip=%s%>", q);
2679 invert = false;
2680 mask = RECIP_MASK_NONE;
2681 }
2682 }
2683
2684 opts->x_recip_mask_explicit |= mask;
2685 if (invert)
2686 opts->x_recip_mask &= ~mask;
2687 else
2688 opts->x_recip_mask |= mask;
2689 }
2690 }
2691
2692 if (TARGET_RECIP_P (opts->x_target_flags))
2693 opts->x_recip_mask |= RECIP_MASK_ALL & ~opts->x_recip_mask_explicit;
2694 else if (opts_set->x_target_flags & MASK_RECIP)
2695 opts->x_recip_mask &= ~(RECIP_MASK_ALL & ~opts->x_recip_mask_explicit);
2696
2697 /* Default long double to 64-bit for 32-bit Bionic and to __float128
2698 for 64-bit Bionic. Also default long double to 64-bit for Intel
2699 MCU psABI. */
2700 if ((TARGET_HAS_BIONIC || TARGET_IAMCU)
2701 && !(opts_set->x_target_flags
2702 & (MASK_LONG_DOUBLE_64 | MASK_LONG_DOUBLE_128)))
2703 opts->x_target_flags |= (TARGET_64BIT
2704 ? MASK_LONG_DOUBLE_128
2705 : MASK_LONG_DOUBLE_64);
2706
2707 /* Only one of them can be active. */
2708 gcc_assert ((opts->x_target_flags & MASK_LONG_DOUBLE_64) == 0
2709 || (opts->x_target_flags & MASK_LONG_DOUBLE_128) == 0);
2710
2711 /* Handle stack protector */
2712 if (!opts_set->x_ix86_stack_protector_guard)
2713 {
2714#ifdef TARGET_THREAD_SSP_OFFSET
2715 if (!TARGET_HAS_BIONIC)
2716 opts->x_ix86_stack_protector_guard = SSP_TLS;
2717 else
2718#endif
2719 opts->x_ix86_stack_protector_guard = SSP_GLOBAL;
2720 }
2721
2722 if (opts_set->x_ix86_stack_protector_guard_offset_str)
2723 {
2724 char *endp;
2725 const char *str = opts->x_ix86_stack_protector_guard_offset_str;
2726
2727 errno = 0;
2728 int64_t offset;
2729
2730#if defined(INT64_T_IS_LONG)
2731 offset = strtol (str, &endp, 0);
2732#else
2733 offset = strtoll (str, &endp, 0);
2734#endif
2735
2736 if (!*str || *endp || errno)
2737 error ("%qs is not a valid number "
2738 "in %<-mstack-protector-guard-offset=%>", str);
2739
2740 if (!IN_RANGE (offset, HOST_WIDE_INT_C (-0x80000000),
2741 HOST_WIDE_INT_C (0x7fffffff)))
2742 error ("%qs is not a valid offset "
2743 "in %<-mstack-protector-guard-offset=%>", str);
2744
2745 opts->x_ix86_stack_protector_guard_offset = offset;
2746 }
2747#ifdef TARGET_THREAD_SSP_OFFSET
2748 else
2749 opts->x_ix86_stack_protector_guard_offset = TARGET_THREAD_SSP_OFFSET;
2750#endif
2751
2752 if (opts_set->x_ix86_stack_protector_guard_reg_str)
2753 {
2754 const char *str = opts->x_ix86_stack_protector_guard_reg_str;
2755 addr_space_t seg = ADDR_SPACE_GENERIC;
2756
2757 /* Discard optional register prefix. */
2758 if (str[0] == '%')
2759 str++;
2760
2761 if (strlen (str) == 2 && str[1] == 's')
2762 {
2763 if (str[0] == 'f')
2764 seg = ADDR_SPACE_SEG_FS;
2765 else if (str[0] == 'g')
2766 seg = ADDR_SPACE_SEG_GS;
2767 }
2768
2769 if (seg == ADDR_SPACE_GENERIC)
2770 error ("%qs is not a valid base register "
2771 "in %<-mstack-protector-guard-reg=%>",
2772 opts->x_ix86_stack_protector_guard_reg_str);
2773
2774 opts->x_ix86_stack_protector_guard_reg = seg;
2775 }
2776 else
2777 {
2778 opts->x_ix86_stack_protector_guard_reg = DEFAULT_TLS_SEG_REG;
2779
2780 /* The kernel uses a different segment register for performance
2781 reasons; a system call would not have to trash the userspace
2782 segment register, which would be expensive. */
2783 if (opts->x_ix86_cmodel == CM_KERNEL)
2784 opts->x_ix86_stack_protector_guard_reg = ADDR_SPACE_SEG_GS;
2785 }
2786
2787 /* Handle -mmemcpy-strategy= and -mmemset-strategy= */
2788 if (opts->x_ix86_tune_memcpy_strategy)
2789 {
2790 char *str = xstrdup (opts->x_ix86_tune_memcpy_strategy);
2791 ix86_parse_stringop_strategy_string (str, false);
2792 free (str);
2793 }
2794
2795 if (opts->x_ix86_tune_memset_strategy)
2796 {
2797 char *str = xstrdup (opts->x_ix86_tune_memset_strategy);
2798 ix86_parse_stringop_strategy_string (str, true);
2799 free (str);
2800 }
2801
2802 /* Save the initial options in case the user does function specific
2803 options. */
2804 if (main_args_p)
e401db7b
JJ		 2805 {
2806 opts->x_ix86_excess_precision
2807 = opts->x_flag_excess_precision;
2808 opts->x_ix86_unsafe_math_optimizations
2809 = opts->x_flag_unsafe_math_optimizations;
2810 target_option_default_node = target_option_current_node
2811 = build_target_option_node (opts, opts_set);
2812 }
2bf6d935
ML		 2813
2814 if (opts->x_flag_cf_protection != CF_NONE)
77d372ab
L		 2815 {
2816 if ((opts->x_flag_cf_protection & CF_BRANCH) == CF_BRANCH
2817 && !TARGET_64BIT && !TARGET_CMOV)
2818 error ("%<-fcf-protection%> is not compatible with this target");
2819
2820 opts->x_flag_cf_protection
2bf6d935 2821 = (cf_protection_level) (opts->x_flag_cf_protection | CF_SET);
77d372ab 2822 }
2bf6d935 2823
105c2795 2824 if (ix86_tune_features [X86_TUNE_AVOID_256FMA_CHAINS])
028d4092 2825 SET_OPTION_IF_UNSET (opts, opts_set, param_avoid_fma_max_bits, 256);
105c2795 2826 else if (ix86_tune_features [X86_TUNE_AVOID_128FMA_CHAINS])
028d4092 2827 SET_OPTION_IF_UNSET (opts, opts_set, param_avoid_fma_max_bits, 128);
2bf6d935
ML		 2828
2829 /* PR86952: jump table usage with retpolines is slow.
2830 The PR provides some numbers about the slowness. */
6ed76044
ML		 2831 if (ix86_indirect_branch != indirect_branch_keep)
2832 SET_OPTION_IF_UNSET (opts, opts_set, flag_jump_tables, 0);
2bf6d935
ML		 2833
2834 return true;
2835}
2836
2837/* Implement the TARGET_OPTION_OVERRIDE hook. */
2838
2839void
2840ix86_option_override (void)
2841{
2842 ix86_option_override_internal (true, &global_options, &global_options_set);
2843}
2844
2845/* Remember the last target of ix86_set_current_function. */
2846static GTY(()) tree ix86_previous_fndecl;
2847
2848/* Set targets globals to the default (or current #pragma GCC target
2849 if active). Invalidate ix86_previous_fndecl cache. */
2850
2851void
2852ix86_reset_previous_fndecl (void)
2853{
2854 tree new_tree = target_option_current_node;
ba948b37
JJ		 2855 cl_target_option_restore (&global_options, &global_options_set,
2856 TREE_TARGET_OPTION (new_tree));
2bf6d935
ML		 2857 if (TREE_TARGET_GLOBALS (new_tree))
2858 restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
2859 else if (new_tree == target_option_default_node)
2860 restore_target_globals (&default_target_globals);
2861 else
2862 TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
2863 ix86_previous_fndecl = NULL_TREE;
2864}
2865
2866/* Add target attribute to SIMD clone NODE if needed. */
2867
2868void
2869ix86_simd_clone_adjust (struct cgraph_node *node)
2870{
2871 const char *str = NULL;
2872
2873 /* Attributes need to be adjusted for definitions, not declarations. */
2874 if (!node->definition)
2875 return;
2876
2877 gcc_assert (node->decl == cfun->decl);
2878 switch (node->simdclone->vecsize_mangle)
2879 {
2880 case 'b':
2881 if (!TARGET_SSE2)
2882 str = "sse2";
2883 break;
2884 case 'c':
1609bedd
JJ		 2885 if (TARGET_PREFER_AVX128)
2886 {
2887 if (!TARGET_AVX)
2888 str = "avx,prefer-vector-width=256";
2889 else
2890 str = "prefer-vector-width=256";
2891 }
2892 else if (!TARGET_AVX)
2bf6d935
ML		 2893 str = "avx";
2894 break;
2895 case 'd':
1609bedd
JJ		 2896 if (TARGET_PREFER_AVX128)
2897 {
2898 if (!TARGET_AVX2)
2899 str = "avx2,prefer-vector-width=256";
2900 else
2901 str = "prefer-vector-width=256";
2902 }
2903 else if (!TARGET_AVX2)
2bf6d935
ML		 2904 str = "avx2";
2905 break;
2906 case 'e':
1609bedd
JJ		 2907 if (TARGET_PREFER_AVX256)
2908 {
2909 if (!TARGET_AVX512F)
2910 str = "avx512f,prefer-vector-width=512";
2911 else
2912 str = "prefer-vector-width=512";
2913 }
2914 else if (!TARGET_AVX512F)
2bf6d935
ML		 2915 str = "avx512f";
2916 break;
2917 default:
2918 gcc_unreachable ();
2919 }
2920 if (str == NULL)
2921 return;
2922 push_cfun (NULL);
2923 tree args = build_tree_list (NULL_TREE, build_string (strlen (str), str));
2924 bool ok = ix86_valid_target_attribute_p (node->decl, NULL, args, 0);
2925 gcc_assert (ok);
2926 pop_cfun ();
2927 ix86_reset_previous_fndecl ();
2928 ix86_set_current_function (node->decl);
2929}
2930
2931
2932
2933/* Set the func_type field from the function FNDECL. */
2934
2935static void
2936ix86_set_func_type (tree fndecl)
2937{
2938 if (cfun->machine->func_type == TYPE_UNKNOWN)
2939 {
2940 if (lookup_attribute ("interrupt",
2941 TYPE_ATTRIBUTES (TREE_TYPE (fndecl))))
2942 {
2943 if (ix86_function_naked (fndecl))
2944 error_at (DECL_SOURCE_LOCATION (fndecl),
2945 "interrupt and naked attributes are not compatible");
2946
2947 int nargs = 0;
2948 for (tree arg = DECL_ARGUMENTS (fndecl);
2949 arg;
2950 arg = TREE_CHAIN (arg))
2951 nargs++;
2952 cfun->machine->no_caller_saved_registers = true;
2953 cfun->machine->func_type
2954 = nargs == 2 ? TYPE_EXCEPTION : TYPE_INTERRUPT;
2955
2956 ix86_optimize_mode_switching[X86_DIRFLAG] = 1;
2957
2958 /* Only dwarf2out.c can handle -WORD(AP) as a pointer argument. */
2959 if (write_symbols != NO_DEBUG && write_symbols != DWARF2_DEBUG)
2960 sorry ("only DWARF debug format is supported for interrupt "
2961 "service routine");
2962 }
2963 else
2964 {
2965 cfun->machine->func_type = TYPE_NORMAL;
2966 if (lookup_attribute ("no_caller_saved_registers",
2967 TYPE_ATTRIBUTES (TREE_TYPE (fndecl))))
2968 cfun->machine->no_caller_saved_registers = true;
2969 }
2970 }
2971}
2972
2973/* Set the indirect_branch_type field from the function FNDECL. */
2974
2975static void
2976ix86_set_indirect_branch_type (tree fndecl)
2977{
2978 if (cfun->machine->indirect_branch_type == indirect_branch_unset)
2979 {
2980 tree attr = lookup_attribute ("indirect_branch",
2981 DECL_ATTRIBUTES (fndecl));
2982 if (attr != NULL)
2983 {
2984 tree args = TREE_VALUE (attr);
2985 if (args == NULL)
2986 gcc_unreachable ();
2987 tree cst = TREE_VALUE (args);
2988 if (strcmp (TREE_STRING_POINTER (cst), "keep") == 0)
2989 cfun->machine->indirect_branch_type = indirect_branch_keep;
2990 else if (strcmp (TREE_STRING_POINTER (cst), "thunk") == 0)
2991 cfun->machine->indirect_branch_type = indirect_branch_thunk;
2992 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-inline") == 0)
2993 cfun->machine->indirect_branch_type = indirect_branch_thunk_inline;
2994 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-extern") == 0)
2995 cfun->machine->indirect_branch_type = indirect_branch_thunk_extern;
2996 else
2997 gcc_unreachable ();
2998 }
2999 else
3000 cfun->machine->indirect_branch_type = ix86_indirect_branch;
3001
3002 /* -mcmodel=large is not compatible with -mindirect-branch=thunk
3003 nor -mindirect-branch=thunk-extern. */
3004 if ((ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3005 && ((cfun->machine->indirect_branch_type
3006 == indirect_branch_thunk_extern)
3007 || (cfun->machine->indirect_branch_type
3008 == indirect_branch_thunk)))
3009 error ("%<-mindirect-branch=%s%> and %<-mcmodel=large%> are not "
3010 "compatible",
3011 ((cfun->machine->indirect_branch_type
3012 == indirect_branch_thunk_extern)
3013 ? "thunk-extern" : "thunk"));
3014
3015 if (cfun->machine->indirect_branch_type != indirect_branch_keep
9be3bb2c
L		 3016 && (cfun->machine->indirect_branch_type
3017 != indirect_branch_thunk_extern)
2bf6d935
ML		 3018 && (flag_cf_protection & CF_RETURN))
3019 error ("%<-mindirect-branch%> and %<-fcf-protection%> are not "
3020 "compatible");
3021 }
3022
3023 if (cfun->machine->function_return_type == indirect_branch_unset)
3024 {
3025 tree attr = lookup_attribute ("function_return",
3026 DECL_ATTRIBUTES (fndecl));
3027 if (attr != NULL)
3028 {
3029 tree args = TREE_VALUE (attr);
3030 if (args == NULL)
3031 gcc_unreachable ();
3032 tree cst = TREE_VALUE (args);
3033 if (strcmp (TREE_STRING_POINTER (cst), "keep") == 0)
3034 cfun->machine->function_return_type = indirect_branch_keep;
3035 else if (strcmp (TREE_STRING_POINTER (cst), "thunk") == 0)
3036 cfun->machine->function_return_type = indirect_branch_thunk;
3037 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-inline") == 0)
3038 cfun->machine->function_return_type = indirect_branch_thunk_inline;
3039 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-extern") == 0)
3040 cfun->machine->function_return_type = indirect_branch_thunk_extern;
3041 else
3042 gcc_unreachable ();
3043 }
3044 else
3045 cfun->machine->function_return_type = ix86_function_return;
3046
3047 /* -mcmodel=large is not compatible with -mfunction-return=thunk
3048 nor -mfunction-return=thunk-extern. */
3049 if ((ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3050 && ((cfun->machine->function_return_type
3051 == indirect_branch_thunk_extern)
3052 || (cfun->machine->function_return_type
3053 == indirect_branch_thunk)))
3054 error ("%<-mfunction-return=%s%> and %<-mcmodel=large%> are not "
3055 "compatible",
3056 ((cfun->machine->function_return_type
3057 == indirect_branch_thunk_extern)
3058 ? "thunk-extern" : "thunk"));
3059
3060 if (cfun->machine->function_return_type != indirect_branch_keep
9be3bb2c
L		 3061 && (cfun->machine->function_return_type
3062 != indirect_branch_thunk_extern)
2bf6d935
ML		 3063 && (flag_cf_protection & CF_RETURN))
3064 error ("%<-mfunction-return%> and %<-fcf-protection%> are not "
3065 "compatible");
3066 }
3067}
3068
3069/* Establish appropriate back-end context for processing the function
3070 FNDECL. The argument might be NULL to indicate processing at top
3071 level, outside of any function scope. */
3072void
3073ix86_set_current_function (tree fndecl)
3074{
3075 /* Only change the context if the function changes. This hook is called
3076 several times in the course of compiling a function, and we don't want to
3077 slow things down too much or call target_reinit when it isn't safe. */
3078 if (fndecl == ix86_previous_fndecl)
3079 {
3080 /* There may be 2 function bodies for the same function FNDECL,
3081 one is extern inline and one isn't. Call ix86_set_func_type
3082 to set the func_type field. */
3083 if (fndecl != NULL_TREE)
3084 {
3085 ix86_set_func_type (fndecl);
3086 ix86_set_indirect_branch_type (fndecl);
3087 }
3088 return;
3089 }
3090
3091 tree old_tree;
3092 if (ix86_previous_fndecl == NULL_TREE)
3093 old_tree = target_option_current_node;
3094 else if (DECL_FUNCTION_SPECIFIC_TARGET (ix86_previous_fndecl))
3095 old_tree = DECL_FUNCTION_SPECIFIC_TARGET (ix86_previous_fndecl);
3096 else
3097 old_tree = target_option_default_node;
3098
3099 if (fndecl == NULL_TREE)
3100 {
3101 if (old_tree != target_option_current_node)
3102 ix86_reset_previous_fndecl ();
3103 return;
3104 }
3105
3106 ix86_set_func_type (fndecl);
3107 ix86_set_indirect_branch_type (fndecl);
3108
3109 tree new_tree = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
3110 if (new_tree == NULL_TREE)
3111 new_tree = target_option_default_node;
3112
3113 if (old_tree != new_tree)
3114 {
ba948b37
JJ		 3115 cl_target_option_restore (&global_options, &global_options_set,
3116 TREE_TARGET_OPTION (new_tree));
2bf6d935
ML		 3117 if (TREE_TARGET_GLOBALS (new_tree))
3118 restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
3119 else if (new_tree == target_option_default_node)
3120 restore_target_globals (&default_target_globals);
3121 else
3122 TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
3123 }
e401db7b
JJ		 3124 else if (flag_unsafe_math_optimizations
3125 != TREE_TARGET_OPTION (new_tree)->x_ix86_unsafe_math_optimizations
3126 || (flag_excess_precision
3127 != TREE_TARGET_OPTION (new_tree)->x_ix86_excess_precision))
3128 {
3129 cl_target_option_restore (&global_options, &global_options_set,
3130 TREE_TARGET_OPTION (new_tree));
3131 ix86_excess_precision = flag_excess_precision;
3132 ix86_unsafe_math_optimizations = flag_unsafe_math_optimizations;
3133 DECL_FUNCTION_SPECIFIC_TARGET (fndecl) = new_tree
3134 = build_target_option_node (&global_options, &global_options_set);
3135 if (TREE_TARGET_GLOBALS (new_tree))
3136 restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
3137 else if (new_tree == target_option_default_node)
3138 restore_target_globals (&default_target_globals);
3139 else
3140 TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
3141 }
2bf6d935
ML		 3142 ix86_previous_fndecl = fndecl;
3143
3144 static bool prev_no_caller_saved_registers;
3145
3146 /* 64-bit MS and SYSV ABI have different set of call used registers.
3147 Avoid expensive re-initialization of init_regs each time we switch
3148 function context. */
3149 if (TARGET_64BIT
a365fa06 3150 && (call_used_or_fixed_reg_p (SI_REG)
2bf6d935
ML		 3151 == (cfun->machine->call_abi == MS_ABI)))
3152 reinit_regs ();
3153 /* Need to re-initialize init_regs if caller-saved registers are
3154 changed. */
3155 else if (prev_no_caller_saved_registers
3156 != cfun->machine->no_caller_saved_registers)
3157 reinit_regs ();
3158
3159 if (cfun->machine->func_type != TYPE_NORMAL
3160 || cfun->machine->no_caller_saved_registers)
3161 {
3162 /* Don't allow SSE, MMX nor x87 instructions since they
3163 may change processor state. */
3164 const char *isa;
3165 if (TARGET_SSE)
3166 isa = "SSE";
3167 else if (TARGET_MMX)
3168 isa = "MMX/3Dnow";
3169 else if (TARGET_80387)
3170 isa = "80387";
3171 else
3172 isa = NULL;
3173 if (isa != NULL)
3174 {
3175 if (cfun->machine->func_type != TYPE_NORMAL)
3176 sorry (cfun->machine->func_type == TYPE_EXCEPTION
3177 ? G_("%s instructions aren%'t allowed in an"
3178 " exception service routine")
3179 : G_("%s instructions aren%'t allowed in an"
3180 " interrupt service routine"),
3181 isa);
3182 else
3183 sorry ("%s instructions aren%'t allowed in a function with "
3184 "the %<no_caller_saved_registers%> attribute", isa);
3185 /* Don't issue the same error twice. */
3186 cfun->machine->func_type = TYPE_NORMAL;
3187 cfun->machine->no_caller_saved_registers = false;
3188 }
3189 }
3190
3191 prev_no_caller_saved_registers
3192 = cfun->machine->no_caller_saved_registers;
3193}
3194
3195/* Implement the TARGET_OFFLOAD_OPTIONS hook. */
3196char *
3197ix86_offload_options (void)
3198{
3199 if (TARGET_LP64)
3200 return xstrdup ("-foffload-abi=lp64");
3201 return xstrdup ("-foffload-abi=ilp32");
3202}
3203
3204/* Handle "cdecl", "stdcall", "fastcall", "regparm", "thiscall",
3205 and "sseregparm" calling convention attributes;
3206 arguments as in struct attribute_spec.handler. */
3207
3208static tree
3209ix86_handle_cconv_attribute (tree *node, tree name, tree args, int,
3210 bool *no_add_attrs)
3211{
3212 if (TREE_CODE (*node) != FUNCTION_TYPE
3213 && TREE_CODE (*node) != METHOD_TYPE
3214 && TREE_CODE (*node) != FIELD_DECL
3215 && TREE_CODE (*node) != TYPE_DECL)
3216 {
3217 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3218 name);
3219 *no_add_attrs = true;
3220 return NULL_TREE;
3221 }
3222
3223 /* Can combine regparm with all attributes but fastcall, and thiscall. */
3224 if (is_attribute_p ("regparm", name))
3225 {
3226 tree cst;
3227
3228 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3229 {
3230 error ("fastcall and regparm attributes are not compatible");
3231 }
3232
3233 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3234 {
3235 error ("regparam and thiscall attributes are not compatible");
3236 }
3237
3238 cst = TREE_VALUE (args);
3239 if (TREE_CODE (cst) != INTEGER_CST)
3240 {
3241 warning (OPT_Wattributes,
3242 "%qE attribute requires an integer constant argument",
3243 name);
3244 *no_add_attrs = true;
3245 }
3246 else if (compare_tree_int (cst, REGPARM_MAX) > 0)
3247 {
3248 warning (OPT_Wattributes, "argument to %qE attribute larger than %d",
3249 name, REGPARM_MAX);
3250 *no_add_attrs = true;
3251 }
3252
3253 return NULL_TREE;
3254 }
3255
3256 if (TARGET_64BIT)
3257 {
3258 /* Do not warn when emulating the MS ABI. */
3259 if ((TREE_CODE (*node) != FUNCTION_TYPE
3260 && TREE_CODE (*node) != METHOD_TYPE)
3261 || ix86_function_type_abi (*node) != MS_ABI)
3262 warning (OPT_Wattributes, "%qE attribute ignored",
3263 name);
3264 *no_add_attrs = true;
3265 return NULL_TREE;
3266 }
3267
3268 /* Can combine fastcall with stdcall (redundant) and sseregparm. */
3269 if (is_attribute_p ("fastcall", name))
3270 {
3271 if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
3272 {
3273 error ("fastcall and cdecl attributes are not compatible");
3274 }
3275 if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
3276 {
3277 error ("fastcall and stdcall attributes are not compatible");
3278 }
3279 if (lookup_attribute ("regparm", TYPE_ATTRIBUTES (*node)))
3280 {
3281 error ("fastcall and regparm attributes are not compatible");
3282 }
3283 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3284 {
3285 error ("fastcall and thiscall attributes are not compatible");
3286 }
3287 }
3288
3289 /* Can combine stdcall with fastcall (redundant), regparm and
3290 sseregparm. */
3291 else if (is_attribute_p ("stdcall", name))
3292 {
3293 if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
3294 {
3295 error ("stdcall and cdecl attributes are not compatible");
3296 }
3297 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3298 {
3299 error ("stdcall and fastcall attributes are not compatible");
3300 }
3301 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3302 {
3303 error ("stdcall and thiscall attributes are not compatible");
3304 }
3305 }
3306
3307 /* Can combine cdecl with regparm and sseregparm. */
3308 else if (is_attribute_p ("cdecl", name))
3309 {
3310 if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
3311 {
3312 error ("stdcall and cdecl attributes are not compatible");
3313 }
3314 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3315 {
3316 error ("fastcall and cdecl attributes are not compatible");
3317 }
3318 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3319 {
3320 error ("cdecl and thiscall attributes are not compatible");
3321 }
3322 }
3323 else if (is_attribute_p ("thiscall", name))
3324 {
3325 if (TREE_CODE (*node) != METHOD_TYPE && pedantic)
3326 warning (OPT_Wattributes, "%qE attribute is used for non-class method",
3327 name);
3328 if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
3329 {
3330 error ("stdcall and thiscall attributes are not compatible");
3331 }
3332 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3333 {
3334 error ("fastcall and thiscall attributes are not compatible");
3335 }
3336 if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
3337 {
3338 error ("cdecl and thiscall attributes are not compatible");
3339 }
3340 }
3341
3342 /* Can combine sseregparm with all attributes. */
3343
3344 return NULL_TREE;
3345}
3346
3347#ifndef CHECK_STACK_LIMIT
3348#define CHECK_STACK_LIMIT (-1)
3349#endif
3350
3351/* The transactional memory builtins are implicitly regparm or fastcall
3352 depending on the ABI. Override the generic do-nothing attribute that
3353 these builtins were declared with, and replace it with one of the two
3354 attributes that we expect elsewhere. */
3355
3356static tree
3357ix86_handle_tm_regparm_attribute (tree *node, tree, tree,
3358 int flags, bool *no_add_attrs)
3359{
3360 tree alt;
3361
3362 /* In no case do we want to add the placeholder attribute. */
3363 *no_add_attrs = true;
3364
3365 /* The 64-bit ABI is unchanged for transactional memory. */
3366 if (TARGET_64BIT)
3367 return NULL_TREE;
3368
3369 /* ??? Is there a better way to validate 32-bit windows? We have
3370 cfun->machine->call_abi, but that seems to be set only for 64-bit. */
3371 if (CHECK_STACK_LIMIT > 0)
3372 alt = tree_cons (get_identifier ("fastcall"), NULL, NULL);
3373 else
3374 {
3375 alt = tree_cons (NULL, build_int_cst (NULL, 2), NULL);
3376 alt = tree_cons (get_identifier ("regparm"), alt, NULL);
3377 }
3378 decl_attributes (node, alt, flags);
3379
3380 return NULL_TREE;
3381}
3382
3383/* Handle a "force_align_arg_pointer" attribute. */
3384
3385static tree
3386ix86_handle_force_align_arg_pointer_attribute (tree *node, tree name,
3387 tree, int, bool *no_add_attrs)
3388{
3389 if (TREE_CODE (*node) != FUNCTION_TYPE
3390 && TREE_CODE (*node) != METHOD_TYPE
3391 && TREE_CODE (*node) != FIELD_DECL
3392 && TREE_CODE (*node) != TYPE_DECL)
3393 {
3394 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3395 name);
3396 *no_add_attrs = true;
3397 }
3398
3399 return NULL_TREE;
3400}
3401
3402/* Handle a "ms_struct" or "gcc_struct" attribute; arguments as in
3403 struct attribute_spec.handler. */
3404
3405static tree
3406ix86_handle_struct_attribute (tree *node, tree name, tree, int,
3407 bool *no_add_attrs)
3408{
3409 tree *type = NULL;
3410 if (DECL_P (*node))
3411 {
3412 if (TREE_CODE (*node) == TYPE_DECL)
3413 type = &TREE_TYPE (*node);
3414 }
3415 else
3416 type = node;
3417
3418 if (!(type && RECORD_OR_UNION_TYPE_P (*type)))
3419 {
3420 warning (OPT_Wattributes, "%qE attribute ignored",
3421 name);
3422 *no_add_attrs = true;
3423 }
3424
3425 else if ((is_attribute_p ("ms_struct", name)
3426 && lookup_attribute ("gcc_struct", TYPE_ATTRIBUTES (*type)))
3427 || ((is_attribute_p ("gcc_struct", name)
3428 && lookup_attribute ("ms_struct", TYPE_ATTRIBUTES (*type)))))
3429 {
3430 warning (OPT_Wattributes, "%qE incompatible attribute ignored",
3431 name);
3432 *no_add_attrs = true;
3433 }
3434
3435 return NULL_TREE;
3436}
3437
3438/* Handle a "callee_pop_aggregate_return" attribute; arguments as
3439 in struct attribute_spec handler. */
3440
3441static tree
3442ix86_handle_callee_pop_aggregate_return (tree *node, tree name, tree args, int,
3443 bool *no_add_attrs)
3444{
3445 if (TREE_CODE (*node) != FUNCTION_TYPE
3446 && TREE_CODE (*node) != METHOD_TYPE
3447 && TREE_CODE (*node) != FIELD_DECL
3448 && TREE_CODE (*node) != TYPE_DECL)
3449 {
3450 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3451 name);
3452 *no_add_attrs = true;
3453 return NULL_TREE;
3454 }
3455 if (TARGET_64BIT)
3456 {
3457 warning (OPT_Wattributes, "%qE attribute only available for 32-bit",
3458 name);
3459 *no_add_attrs = true;
3460 return NULL_TREE;
3461 }
3462 if (is_attribute_p ("callee_pop_aggregate_return", name))
3463 {
3464 tree cst;
3465
3466 cst = TREE_VALUE (args);
3467 if (TREE_CODE (cst) != INTEGER_CST)
3468 {
3469 warning (OPT_Wattributes,
3470 "%qE attribute requires an integer constant argument",
3471 name);
3472 *no_add_attrs = true;
3473 }
3474 else if (compare_tree_int (cst, 0) != 0
3475 && compare_tree_int (cst, 1) != 0)
3476 {
3477 warning (OPT_Wattributes,
3478 "argument to %qE attribute is neither zero, nor one",
3479 name);
3480 *no_add_attrs = true;
3481 }
3482
3483 return NULL_TREE;
3484 }
3485
3486 return NULL_TREE;
3487}
3488
3489/* Handle a "ms_abi" or "sysv" attribute; arguments as in
3490 struct attribute_spec.handler. */
3491
3492static tree
3493ix86_handle_abi_attribute (tree *node, tree name, tree, int,
3494 bool *no_add_attrs)
3495{
3496 if (TREE_CODE (*node) != FUNCTION_TYPE
3497 && TREE_CODE (*node) != METHOD_TYPE
3498 && TREE_CODE (*node) != FIELD_DECL
3499 && TREE_CODE (*node) != TYPE_DECL)
3500 {
3501 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3502 name);
3503 *no_add_attrs = true;
3504 return NULL_TREE;
3505 }
3506
3507 /* Can combine regparm with all attributes but fastcall. */
3508 if (is_attribute_p ("ms_abi", name))
3509 {
3510 if (lookup_attribute ("sysv_abi", TYPE_ATTRIBUTES (*node)))
3511 {
a9c697b8
MS		 3512 error ("%qs and %qs attributes are not compatible",
3513 "ms_abi", "sysv_abi");
2bf6d935
ML		 3514 }
3515
3516 return NULL_TREE;
3517 }
3518 else if (is_attribute_p ("sysv_abi", name))
3519 {
3520 if (lookup_attribute ("ms_abi", TYPE_ATTRIBUTES (*node)))
3521 {
a9c697b8
MS		 3522 error ("%qs and %qs attributes are not compatible",
3523 "ms_abi", "sysv_abi");
2bf6d935
ML		 3524 }
3525
3526 return NULL_TREE;
3527 }
3528
3529 return NULL_TREE;
3530}
3531
3532static tree
3533ix86_handle_fndecl_attribute (tree *node, tree name, tree args, int,
3534 bool *no_add_attrs)
3535{
3536 if (TREE_CODE (*node) != FUNCTION_DECL)
3537 {
3538 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3539 name);
3540 *no_add_attrs = true;
3541 }
3542
3543 if (is_attribute_p ("indirect_branch", name))
3544 {
3545 tree cst = TREE_VALUE (args);
3546 if (TREE_CODE (cst) != STRING_CST)
3547 {
3548 warning (OPT_Wattributes,
3549 "%qE attribute requires a string constant argument",
3550 name);
3551 *no_add_attrs = true;
3552 }
3553 else if (strcmp (TREE_STRING_POINTER (cst), "keep") != 0
3554 && strcmp (TREE_STRING_POINTER (cst), "thunk") != 0
3555 && strcmp (TREE_STRING_POINTER (cst), "thunk-inline") != 0
3556 && strcmp (TREE_STRING_POINTER (cst), "thunk-extern") != 0)
3557 {
3558 warning (OPT_Wattributes,
3559 "argument to %qE attribute is not "
3560 "(keep|thunk|thunk-inline|thunk-extern)", name);
3561 *no_add_attrs = true;
3562 }
3563 }
3564
3565 if (is_attribute_p ("function_return", name))
3566 {
3567 tree cst = TREE_VALUE (args);
3568 if (TREE_CODE (cst) != STRING_CST)
3569 {
3570 warning (OPT_Wattributes,
3571 "%qE attribute requires a string constant argument",
3572 name);
3573 *no_add_attrs = true;
3574 }
3575 else if (strcmp (TREE_STRING_POINTER (cst), "keep") != 0
3576 && strcmp (TREE_STRING_POINTER (cst), "thunk") != 0
3577 && strcmp (TREE_STRING_POINTER (cst), "thunk-inline") != 0
3578 && strcmp (TREE_STRING_POINTER (cst), "thunk-extern") != 0)
3579 {
3580 warning (OPT_Wattributes,
3581 "argument to %qE attribute is not "
3582 "(keep|thunk|thunk-inline|thunk-extern)", name);
3583 *no_add_attrs = true;
3584 }
3585 }
3586
3587 return NULL_TREE;
3588}
3589
3590static tree
3591ix86_handle_no_caller_saved_registers_attribute (tree *, tree, tree,
3592 int, bool *)
3593{
3594 return NULL_TREE;
3595}
3596
3597static tree
3598ix86_handle_interrupt_attribute (tree *node, tree, tree, int, bool *)
3599{
3600 /* DECL_RESULT and DECL_ARGUMENTS do not exist there yet,
3601 but the function type contains args and return type data. */
3602 tree func_type = *node;
3603 tree return_type = TREE_TYPE (func_type);
3604
3605 int nargs = 0;
3606 tree current_arg_type = TYPE_ARG_TYPES (func_type);
3607 while (current_arg_type
3608 && ! VOID_TYPE_P (TREE_VALUE (current_arg_type)))
3609 {
3610 if (nargs == 0)
3611 {
3612 if (! POINTER_TYPE_P (TREE_VALUE (current_arg_type)))
3613 error ("interrupt service routine should have a pointer "
3614 "as the first argument");
3615 }
3616 else if (nargs == 1)
3617 {
3618 if (TREE_CODE (TREE_VALUE (current_arg_type)) != INTEGER_TYPE
3619 || TYPE_MODE (TREE_VALUE (current_arg_type)) != word_mode)
3620 error ("interrupt service routine should have %qs "
3621 "as the second argument",
3622 TARGET_64BIT
3623 ? (TARGET_X32 ? "unsigned long long int"
3624 : "unsigned long int")
3625 : "unsigned int");
3626 }
3627 nargs++;
3628 current_arg_type = TREE_CHAIN (current_arg_type);
3629 }
3630 if (!nargs || nargs > 2)
3631 error ("interrupt service routine can only have a pointer argument "
3632 "and an optional integer argument");
3633 if (! VOID_TYPE_P (return_type))
a9c697b8 3634 error ("interrupt service routine must return %<void%>");
2bf6d935
ML		 3635
3636 return NULL_TREE;
3637}
3638
3639/* Handle fentry_name / fentry_section attribute. */
3640
3641static tree
3642ix86_handle_fentry_name (tree *node, tree name, tree args,
3643 int, bool *no_add_attrs)
3644{
3645 if (TREE_CODE (*node) == FUNCTION_DECL
3646 && TREE_CODE (TREE_VALUE (args)) == STRING_CST)
3647 /* Do nothing else, just set the attribute. We'll get at
3648 it later with lookup_attribute. */
3649 ;
3650 else
3651 {
3652 warning (OPT_Wattributes, "%qE attribute ignored", name);
3653 *no_add_attrs = true;
3654 }
3655
3656 return NULL_TREE;
3657}
3658
3659/* Table of valid machine attributes. */
3660const struct attribute_spec ix86_attribute_table[] =
3661{
3662 /* { name, min_len, max_len, decl_req, type_req, fn_type_req,
3663 affects_type_identity, handler, exclude } */
3664 /* Stdcall attribute says callee is responsible for popping arguments
3665 if they are not variable. */
3666 { "stdcall", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3667 NULL },
3668 /* Fastcall attribute says callee is responsible for popping arguments
3669 if they are not variable. */
3670 { "fastcall", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3671 NULL },
3672 /* Thiscall attribute says callee is responsible for popping arguments
3673 if they are not variable. */
3674 { "thiscall", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3675 NULL },
3676 /* Cdecl attribute says the callee is a normal C declaration */
3677 { "cdecl", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3678 NULL },
3679 /* Regparm attribute specifies how many integer arguments are to be
3680 passed in registers. */
3681 { "regparm", 1, 1, false, true, true, true, ix86_handle_cconv_attribute,
3682 NULL },
3683 /* Sseregparm attribute says we are using x86_64 calling conventions
3684 for FP arguments. */
3685 { "sseregparm", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3686 NULL },
3687 /* The transactional memory builtins are implicitly regparm or fastcall
3688 depending on the ABI. Override the generic do-nothing attribute that
3689 these builtins were declared with. */
3690 { "*tm regparm", 0, 0, false, true, true, true,
3691 ix86_handle_tm_regparm_attribute, NULL },
3692 /* force_align_arg_pointer says this function realigns the stack at entry. */
3693 { "force_align_arg_pointer", 0, 0,
3694 false, true, true, false, ix86_handle_force_align_arg_pointer_attribute,
3695 NULL },
3696#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
3697 { "dllimport", 0, 0, false, false, false, false, handle_dll_attribute,
3698 NULL },
3699 { "dllexport", 0, 0, false, false, false, false, handle_dll_attribute,
3700 NULL },
3701 { "shared", 0, 0, true, false, false, false,
3702 ix86_handle_shared_attribute, NULL },
3703#endif
3704 { "ms_struct", 0, 0, false, false, false, false,
3705 ix86_handle_struct_attribute, NULL },
3706 { "gcc_struct", 0, 0, false, false, false, false,
3707 ix86_handle_struct_attribute, NULL },
3708#ifdef SUBTARGET_ATTRIBUTE_TABLE
3709 SUBTARGET_ATTRIBUTE_TABLE,
3710#endif
3711 /* ms_abi and sysv_abi calling convention function attributes. */
3712 { "ms_abi", 0, 0, false, true, true, true, ix86_handle_abi_attribute, NULL },
3713 { "sysv_abi", 0, 0, false, true, true, true, ix86_handle_abi_attribute,
3714 NULL },
3715 { "ms_abi va_list", 0, 0, false, false, false, false, NULL, NULL },
3716 { "sysv_abi va_list", 0, 0, false, false, false, false, NULL, NULL },
3717 { "ms_hook_prologue", 0, 0, true, false, false, false,
3718 ix86_handle_fndecl_attribute, NULL },
3719 { "callee_pop_aggregate_return", 1, 1, false, true, true, true,
3720 ix86_handle_callee_pop_aggregate_return, NULL },
3721 { "interrupt", 0, 0, false, true, true, false,
3722 ix86_handle_interrupt_attribute, NULL },
3723 { "no_caller_saved_registers", 0, 0, false, true, true, false,
3724 ix86_handle_no_caller_saved_registers_attribute, NULL },
3725 { "naked", 0, 0, true, false, false, false,
3726 ix86_handle_fndecl_attribute, NULL },
3727 { "indirect_branch", 1, 1, true, false, false, false,
3728 ix86_handle_fndecl_attribute, NULL },
3729 { "function_return", 1, 1, true, false, false, false,
3730 ix86_handle_fndecl_attribute, NULL },
3731 { "indirect_return", 0, 0, false, true, true, false,
3732 NULL, NULL },
3733 { "fentry_name", 1, 1, true, false, false, false,
3734 ix86_handle_fentry_name, NULL },
3735 { "fentry_section", 1, 1, true, false, false, false,
3736 ix86_handle_fentry_name, NULL },
3737 { "cf_check", 0, 0, true, false, false, false,
3738 ix86_handle_fndecl_attribute, NULL },
3739
3740 /* End element. */
3741 { NULL, 0, 0, false, false, false, false, NULL, NULL }
3742};
3743
3744#include "gt-i386-options.h"
Mirror of https://gcc.gnu.org/git/gcc.git