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c98f8742 JVA |
1 | /* Definitions of target machine for GNU compiler for Intel 80386. |
2 | Copyright (C) 1988, 1992 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | /* The purpose of this file is to define the characteristics of the i386, | |
b4ac57ab | 22 | independent of assembler syntax or operating system. |
c98f8742 JVA |
23 | |
24 | Three other files build on this one to describe a specific assembler syntax: | |
25 | bsd386.h, att386.h, and sun386.h. | |
26 | ||
27 | The actual tm.h file for a particular system should include | |
28 | this file, and then the file for the appropriate assembler syntax. | |
29 | ||
30 | Many macros that specify assembler syntax are omitted entirely from | |
31 | this file because they really belong in the files for particular | |
32 | assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE, | |
33 | PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE, | |
34 | PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */ | |
35 | ||
36 | /* Names to predefine in the preprocessor for this target machine. */ | |
37 | ||
38 | #define I386 1 | |
39 | ||
40 | /* Run-time compilation parameters selecting different hardware subsets. */ | |
41 | ||
42 | extern int target_flags; | |
43 | ||
44 | /* Macros used in the machine description to test the flags. */ | |
45 | ||
46 | /* Compile 80387 insns for floating point (not library calls). */ | |
47 | #define TARGET_80387 (target_flags & 1) | |
48 | /* Compile code for an i486. */ | |
49 | #define TARGET_486 (target_flags & 2) | |
50 | /* Compile using ret insn that pops args. | |
51 | This will not work unless you use prototypes at least | |
52 | for all functions that can take varying numbers of args. */ | |
53 | #define TARGET_RTD (target_flags & 8) | |
54 | /* Compile passing first two args in regs 0 and 1. | |
55 | This exists only to test compiler features that will | |
56 | be needed for RISC chips. It is not usable | |
57 | and is not intended to be usable on this cpu. */ | |
58 | #define TARGET_REGPARM (target_flags & 020) | |
59 | ||
d7cd15e9 RS |
60 | /* Put uninitialized locals into bss, not data. |
61 | Meaningful only on svr3. */ | |
62 | #define TARGET_SVR3_SHLIB (target_flags & 040) | |
63 | ||
c98f8742 JVA |
64 | /* Macro to define tables used to set the flags. |
65 | This is a list in braces of pairs in braces, | |
66 | each pair being { "NAME", VALUE } | |
67 | where VALUE is the bits to set or minus the bits to clear. | |
68 | An empty string NAME is used to identify the default VALUE. */ | |
69 | ||
70 | #define TARGET_SWITCHES \ | |
71 | { { "80387", 1}, \ | |
72 | { "soft-float", -1}, \ | |
73 | { "486", 2}, \ | |
74 | { "no486", -2}, \ | |
75 | { "386", -2}, \ | |
76 | { "rtd", 8}, \ | |
77 | { "nortd", -8}, \ | |
78 | { "regparm", 020}, \ | |
79 | { "noregparm", -020}, \ | |
d7cd15e9 RS |
80 | { "svr3-shlib", 040}, \ |
81 | { "nosvr3-shlib", -040}, \ | |
c98f8742 JVA |
82 | { "", TARGET_DEFAULT}} |
83 | \f | |
84 | /* target machine storage layout */ | |
85 | ||
86 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
87 | /* That is true on the 80386. */ | |
88 | ||
89 | #define BITS_BIG_ENDIAN 0 | |
90 | ||
91 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
92 | /* That is not true on the 80386. */ | |
93 | #define BYTES_BIG_ENDIAN 0 | |
94 | ||
95 | /* Define this if most significant word of a multiword number is the lowest | |
96 | numbered. */ | |
97 | /* Not true for 80386 */ | |
98 | #define WORDS_BIG_ENDIAN 0 | |
99 | ||
b4ac57ab | 100 | /* number of bits in an addressable storage unit */ |
c98f8742 JVA |
101 | #define BITS_PER_UNIT 8 |
102 | ||
103 | /* Width in bits of a "word", which is the contents of a machine register. | |
104 | Note that this is not necessarily the width of data type `int'; | |
105 | if using 16-bit ints on a 80386, this would still be 32. | |
106 | But on a machine with 16-bit registers, this would be 16. */ | |
107 | #define BITS_PER_WORD 32 | |
108 | ||
109 | /* Width of a word, in units (bytes). */ | |
110 | #define UNITS_PER_WORD 4 | |
111 | ||
112 | /* Width in bits of a pointer. | |
113 | See also the macro `Pmode' defined below. */ | |
114 | #define POINTER_SIZE 32 | |
115 | ||
116 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
117 | #define PARM_BOUNDARY 32 | |
118 | ||
119 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
120 | #define STACK_BOUNDARY 32 | |
121 | ||
122 | /* Allocation boundary (in *bits*) for the code of a function. | |
123 | For i486, we get better performance by aligning to a cache | |
124 | line (i.e. 16 byte) boundary. */ | |
125 | #define FUNCTION_BOUNDARY (TARGET_486 ? 128 : 32) | |
126 | ||
127 | /* Alignment of field after `int : 0' in a structure. */ | |
128 | ||
129 | #define EMPTY_FIELD_BOUNDARY 32 | |
130 | ||
131 | /* Minimum size in bits of the largest boundary to which any | |
132 | and all fundamental data types supported by the hardware | |
133 | might need to be aligned. No data type wants to be aligned | |
134 | rounder than this. The i386 supports 64-bit floating point | |
135 | quantities, but these can be aligned on any 32-bit boundary. */ | |
136 | #define BIGGEST_ALIGNMENT 32 | |
137 | ||
b4ac57ab | 138 | /* Set this non-zero if move instructions will actually fail to work |
c98f8742 | 139 | when given unaligned data. */ |
b4ac57ab | 140 | #define STRICT_ALIGNMENT 0 |
c98f8742 JVA |
141 | |
142 | /* If bit field type is int, don't let it cross an int, | |
143 | and give entire struct the alignment of an int. */ | |
144 | /* Required on the 386 since it doesn't have bitfield insns. */ | |
145 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
146 | ||
147 | /* Align loop starts for optimal branching. */ | |
148 | #define ASM_OUTPUT_LOOP_ALIGN(FILE) \ | |
149 | ASM_OUTPUT_ALIGN (FILE, 2) | |
150 | ||
151 | /* This is how to align an instruction for optimal branching. | |
152 | On i486 we'll get better performance by aligning on a | |
153 | cache line (i.e. 16 byte) boundary. */ | |
154 | #define ASM_OUTPUT_ALIGN_CODE(FILE) \ | |
155 | ASM_OUTPUT_ALIGN ((FILE), (TARGET_486 ? 4 : 2)) | |
156 | \f | |
157 | /* Standard register usage. */ | |
158 | ||
159 | /* This processor has special stack-like registers. See reg-stack.c | |
160 | for details. */ | |
161 | ||
162 | #define STACK_REGS | |
163 | ||
164 | /* Number of actual hardware registers. | |
165 | The hardware registers are assigned numbers for the compiler | |
166 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
167 | All registers that the compiler knows about must be given numbers, | |
168 | even those that are not normally considered general registers. | |
169 | ||
170 | In the 80386 we give the 8 general purpose registers the numbers 0-7. | |
171 | We number the floating point registers 8-15. | |
172 | Note that registers 0-7 can be accessed as a short or int, | |
173 | while only 0-3 may be used with byte `mov' instructions. | |
174 | ||
175 | Reg 16 does not correspond to any hardware register, but instead | |
176 | appears in the RTL as an argument pointer prior to reload, and is | |
177 | eliminated during reloading in favor of either the stack or frame | |
178 | pointer. */ | |
179 | ||
180 | #define FIRST_PSEUDO_REGISTER 17 | |
181 | ||
182 | /* 1 for registers that have pervasive standard uses | |
183 | and are not available for the register allocator. | |
184 | On the 80386, the stack pointer is such, as is the arg pointer. */ | |
185 | #define FIXED_REGISTERS \ | |
186 | /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \ | |
187 | { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 } | |
188 | ||
189 | /* 1 for registers not available across function calls. | |
190 | These must include the FIXED_REGISTERS and also any | |
191 | registers that can be used without being saved. | |
192 | The latter must include the registers where values are returned | |
193 | and the register where structure-value addresses are passed. | |
194 | Aside from that, you can include as many other registers as you like. */ | |
195 | ||
196 | #define CALL_USED_REGISTERS \ | |
197 | /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \ | |
198 | { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } | |
199 | ||
200 | /* Macro to conditionally modify fixed_regs/call_used_regs. */ | |
201 | #define CONDITIONAL_REGISTER_USAGE \ | |
202 | { \ | |
203 | if (flag_pic) \ | |
204 | { \ | |
205 | fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ | |
206 | call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ | |
207 | } \ | |
208 | } | |
209 | ||
210 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
211 | to hold something of mode MODE. | |
212 | This is ordinarily the length in words of a value of mode MODE | |
213 | but can be less for certain modes in special long registers. | |
214 | ||
215 | Actually there are no two word move instructions for consecutive | |
216 | registers. And only registers 0-3 may have mov byte instructions | |
217 | applied to them. | |
218 | */ | |
219 | ||
220 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
221 | (FP_REGNO_P (REGNO) ? 1 \ | |
222 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
223 | ||
224 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
225 | On the 80386, the first 4 cpu registers can hold any mode | |
226 | while the floating point registers may hold only floating point. | |
227 | Make it clear that the fp regs could not hold a 16-byte float. */ | |
228 | ||
229 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
230 | ((REGNO) < 2 ? 1 \ | |
231 | : (REGNO) < 4 ? 1 \ | |
232 | : (REGNO) >= 8 ? ((GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
233 | || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \ | |
234 | && GET_MODE_UNIT_SIZE (MODE) <= 8) \ | |
235 | : (MODE) != QImode) | |
236 | ||
237 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
238 | when one has mode MODE1 and one has mode MODE2. | |
239 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
240 | for any hard reg, then this must be 0 for correct output. */ | |
241 | ||
242 | #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2)) | |
243 | ||
244 | /* A C expression returning the cost of moving data from a register of class | |
245 | CLASS1 to one of CLASS2. | |
246 | ||
247 | On the i386, copying between floating-point and fixed-point | |
248 | registers is expensive. */ | |
249 | ||
250 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ | |
251 | ((((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \ | |
252 | || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)) \ | |
253 | ? 10 : 2) | |
254 | ||
255 | /* Specify the registers used for certain standard purposes. | |
256 | The values of these macros are register numbers. */ | |
257 | ||
258 | /* on the 386 the pc register is %eip, and is not usable as a general | |
259 | register. The ordinary mov instructions won't work */ | |
260 | /* #define PC_REGNUM */ | |
261 | ||
262 | /* Register to use for pushing function arguments. */ | |
263 | #define STACK_POINTER_REGNUM 7 | |
264 | ||
265 | /* Base register for access to local variables of the function. */ | |
266 | #define FRAME_POINTER_REGNUM 6 | |
267 | ||
268 | /* First floating point reg */ | |
269 | #define FIRST_FLOAT_REG 8 | |
270 | ||
271 | /* First & last stack-like regs */ | |
272 | #define FIRST_STACK_REG FIRST_FLOAT_REG | |
273 | #define LAST_STACK_REG (FIRST_FLOAT_REG + 7) | |
274 | ||
275 | /* Value should be nonzero if functions must have frame pointers. | |
276 | Zero means the frame pointer need not be set up (and parms | |
277 | may be accessed via the stack pointer) in functions that seem suitable. | |
278 | This is computed in `reload', in reload1.c. */ | |
279 | #define FRAME_POINTER_REQUIRED 0 | |
280 | ||
281 | /* Base register for access to arguments of the function. */ | |
282 | #define ARG_POINTER_REGNUM 16 | |
283 | ||
284 | /* Register in which static-chain is passed to a function. */ | |
285 | #define STATIC_CHAIN_REGNUM 2 | |
286 | ||
287 | /* Register to hold the addressing base for position independent | |
288 | code access to data items. */ | |
289 | #define PIC_OFFSET_TABLE_REGNUM 3 | |
290 | ||
291 | /* Register in which address to store a structure value | |
292 | arrives in the function. On the 386, the prologue | |
293 | copies this from the stack to register %eax. */ | |
294 | #define STRUCT_VALUE_INCOMING 0 | |
295 | ||
296 | /* Place in which caller passes the structure value address. | |
297 | 0 means push the value on the stack like an argument. */ | |
298 | #define STRUCT_VALUE 0 | |
299 | \f | |
300 | /* Define the classes of registers for register constraints in the | |
301 | machine description. Also define ranges of constants. | |
302 | ||
303 | One of the classes must always be named ALL_REGS and include all hard regs. | |
304 | If there is more than one class, another class must be named NO_REGS | |
305 | and contain no registers. | |
306 | ||
307 | The name GENERAL_REGS must be the name of a class (or an alias for | |
308 | another name such as ALL_REGS). This is the class of registers | |
309 | that is allowed by "g" or "r" in a register constraint. | |
310 | Also, registers outside this class are allocated only when | |
311 | instructions express preferences for them. | |
312 | ||
313 | The classes must be numbered in nondecreasing order; that is, | |
314 | a larger-numbered class must never be contained completely | |
315 | in a smaller-numbered class. | |
316 | ||
317 | For any two classes, it is very desirable that there be another | |
ab408a86 JVA |
318 | class that represents their union. |
319 | ||
320 | It might seem that class BREG is unnecessary, since no useful 386 | |
321 | opcode needs reg %ebx. But some systems pass args to the OS in ebx, | |
322 | and the "b" register constraint is useful in asms for syscalls. */ | |
c98f8742 JVA |
323 | |
324 | enum reg_class | |
325 | { | |
326 | NO_REGS, | |
ab408a86 | 327 | AREG, DREG, CREG, BREG, |
c98f8742 JVA |
328 | Q_REGS, /* %eax %ebx %ecx %edx */ |
329 | SIREG, DIREG, | |
330 | INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */ | |
331 | GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */ | |
332 | FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */ | |
333 | FLOAT_REGS, | |
334 | ALL_REGS, LIM_REG_CLASSES | |
335 | }; | |
336 | ||
337 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
338 | ||
339 | /* Give names of register classes as strings for dump file. */ | |
340 | ||
341 | #define REG_CLASS_NAMES \ | |
342 | { "NO_REGS", \ | |
ab408a86 | 343 | "AREG", "DREG", "CREG", "BREG", \ |
c98f8742 JVA |
344 | "Q_REGS", \ |
345 | "SIREG", "DIREG", \ | |
346 | "INDEX_REGS", \ | |
347 | "GENERAL_REGS", \ | |
348 | "FP_TOP_REG", "FP_SECOND_REG", \ | |
349 | "FLOAT_REGS", \ | |
350 | "ALL_REGS" } | |
351 | ||
352 | /* Define which registers fit in which classes. | |
353 | This is an initializer for a vector of HARD_REG_SET | |
354 | of length N_REG_CLASSES. */ | |
355 | ||
356 | #define REG_CLASS_CONTENTS \ | |
357 | { 0, \ | |
ab408a86 | 358 | 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \ |
c98f8742 JVA |
359 | 0xf, /* Q_REGS */ \ |
360 | 0x10, 0x20, /* SIREG, DIREG */ \ | |
361 | 0x1007f, /* INDEX_REGS */ \ | |
362 | 0x100ff, /* GENERAL_REGS */ \ | |
363 | 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \ | |
364 | 0xff00, /* FLOAT_REGS */ \ | |
365 | 0x1ffff } | |
366 | ||
367 | /* The same information, inverted: | |
368 | Return the class number of the smallest class containing | |
369 | reg number REGNO. This could be a conditional expression | |
370 | or could index an array. */ | |
371 | ||
372 | extern enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; | |
373 | #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO]) | |
374 | ||
375 | /* When defined, the compiler allows registers explicitly used in the | |
376 | rtl to be used as spill registers but prevents the compiler from | |
377 | extending the lifetime of these registers. */ | |
378 | ||
379 | #define SMALL_REGISTER_CLASSES | |
380 | ||
381 | #define QI_REG_P(X) \ | |
382 | (REG_P (X) && REGNO (X) < 4) | |
383 | #define NON_QI_REG_P(X) \ | |
384 | (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER) | |
385 | ||
386 | #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X))) | |
387 | #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG) | |
388 | ||
389 | #define STACK_REG_P(xop) (REG_P (xop) && \ | |
390 | REGNO (xop) >= FIRST_STACK_REG && \ | |
391 | REGNO (xop) <= LAST_STACK_REG) | |
392 | ||
393 | #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop)) | |
394 | ||
395 | #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG) | |
396 | ||
397 | /* Try to maintain the accuracy of the death notes for regs satisfying the | |
398 | following. Important for stack like regs, to know when to pop. */ | |
399 | ||
400 | /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */ | |
401 | ||
402 | /* 1 if register REGNO can magically overlap other regs. | |
403 | Note that nonzero values work only in very special circumstances. */ | |
404 | ||
405 | /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */ | |
406 | ||
407 | /* The class value for index registers, and the one for base regs. */ | |
408 | ||
409 | #define INDEX_REG_CLASS INDEX_REGS | |
410 | #define BASE_REG_CLASS GENERAL_REGS | |
411 | ||
412 | /* Get reg_class from a letter such as appears in the machine description. */ | |
413 | ||
414 | #define REG_CLASS_FROM_LETTER(C) \ | |
415 | ((C) == 'r' ? GENERAL_REGS : \ | |
416 | (C) == 'q' ? Q_REGS : \ | |
417 | (C) == 'f' ? FLOAT_REGS : \ | |
418 | (C) == 't' ? FP_TOP_REG : \ | |
419 | (C) == 'u' ? FP_SECOND_REG : \ | |
420 | (C) == 'a' ? AREG : \ | |
ab408a86 | 421 | (C) == 'b' ? BREG : \ |
c98f8742 JVA |
422 | (C) == 'c' ? CREG : \ |
423 | (C) == 'd' ? DREG : \ | |
424 | (C) == 'D' ? DIREG : \ | |
425 | (C) == 'S' ? SIREG : NO_REGS) | |
426 | ||
427 | /* The letters I, J, K, L and M in a register constraint string | |
428 | can be used to stand for particular ranges of immediate operands. | |
429 | This macro defines what the ranges are. | |
430 | C is the letter, and VALUE is a constant value. | |
431 | Return 1 if VALUE is in the range specified by C. | |
432 | ||
433 | I is for non-DImode shifts. | |
434 | J is for DImode shifts. | |
435 | K and L are for an `andsi' optimization. | |
436 | M is for shifts that can be executed by the "lea" opcode. | |
437 | */ | |
438 | ||
439 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
440 | ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \ | |
441 | (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \ | |
442 | (C) == 'K' ? (VALUE) == 0xff : \ | |
443 | (C) == 'L' ? (VALUE) == 0xffff : \ | |
444 | (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \ | |
445 | 0) | |
446 | ||
447 | /* Similar, but for floating constants, and defining letters G and H. | |
b4ac57ab RS |
448 | Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if |
449 | TARGET_387 isn't set, because the stack register converter may need to | |
450 | load 0.0 into the function value register. */ | |
c98f8742 JVA |
451 | |
452 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
b4ac57ab | 453 | ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0) |
c98f8742 JVA |
454 | |
455 | /* Place additional restrictions on the register class to use when it | |
456 | is necessary to be able to hold a value of mode @var{mode} in a reload | |
457 | register for which class @var{class} would ordinarily be used. */ | |
458 | ||
459 | #define LIMIT_RELOAD_CLASS(MODE, CLASS) \ | |
460 | ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \ | |
461 | ? Q_REGS : (CLASS)) | |
462 | ||
463 | /* Given an rtx X being reloaded into a reg required to be | |
464 | in class CLASS, return the class of reg to actually use. | |
465 | In general this is just CLASS; but on some machines | |
466 | in some cases it is preferable to use a more restrictive class. | |
467 | On the 80386 series, we prevent floating constants from being | |
468 | reloaded into floating registers (since no move-insn can do that) | |
469 | and we ensure that QImodes aren't reloaded into the esi or edi reg. */ | |
470 | ||
471 | /* Don't put CONST_DOUBLE into FLOAT_REGS. | |
472 | QImode must go into class Q_REGS. | |
473 | MODE_INT must not go into FLOAT_REGS. */ | |
474 | ||
475 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
476 | (GET_CODE (X) == CONST_DOUBLE \ | |
477 | ? (reg_class_subset_p ((CLASS), GENERAL_REGS) || (CLASS) == ALL_REGS \ | |
478 | ? (CLASS) : NO_REGS) \ | |
479 | : GET_MODE (X) == QImode \ | |
480 | ? (! reg_class_subset_p ((CLASS), Q_REGS) ? Q_REGS : (CLASS)) \ | |
481 | : (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT && (CLASS) == FLOAT_REGS ? \ | |
482 | GENERAL_REGS : (CLASS))) | |
483 | ||
484 | /* Return the maximum number of consecutive registers | |
485 | needed to represent mode MODE in a register of class CLASS. */ | |
486 | /* On the 80386, this is the size of MODE in words, | |
487 | except in the FP regs, where a single reg is always enough. */ | |
488 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
489 | ((CLASS) == FLOAT_REGS ? 1 : \ | |
490 | (CLASS) == FP_TOP_REG ? 1 : \ | |
491 | (CLASS) == FP_SECOND_REG ? 1 : \ | |
492 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
493 | \f | |
494 | /* Stack layout; function entry, exit and calling. */ | |
495 | ||
496 | /* Define this if pushing a word on the stack | |
497 | makes the stack pointer a smaller address. */ | |
498 | #define STACK_GROWS_DOWNWARD | |
499 | ||
500 | /* Define this if the nominal address of the stack frame | |
501 | is at the high-address end of the local variables; | |
502 | that is, each additional local variable allocated | |
503 | goes at a more negative offset in the frame. */ | |
504 | #define FRAME_GROWS_DOWNWARD | |
505 | ||
506 | /* Offset within stack frame to start allocating local variables at. | |
507 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
508 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
509 | of the first local allocated. */ | |
510 | #define STARTING_FRAME_OFFSET 0 | |
511 | ||
512 | /* If we generate an insn to push BYTES bytes, | |
513 | this says how many the stack pointer really advances by. | |
514 | On 386 pushw decrements by exactly 2 no matter what the position was. | |
515 | On the 386 there is no pushb; we use pushw instead, and this | |
516 | has the effect of rounding up to 2. */ | |
517 | ||
518 | #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2)) | |
519 | ||
520 | /* Offset of first parameter from the argument pointer register value. */ | |
521 | #define FIRST_PARM_OFFSET(FNDECL) 0 | |
522 | ||
523 | /* Value is the number of bytes of arguments automatically | |
524 | popped when returning from a subroutine call. | |
525 | FUNTYPE is the data type of the function (as a tree), | |
526 | or for a library call it is an identifier node for the subroutine name. | |
527 | SIZE is the number of bytes of arguments passed on the stack. | |
528 | ||
529 | On the 80386, the RTD insn may be used to pop them if the number | |
530 | of args is fixed, but if the number is variable then the caller | |
531 | must pop them all. RTD can't be used for library calls now | |
532 | because the library is compiled with the Unix compiler. | |
533 | Use of RTD is a selectable option, since it is incompatible with | |
534 | standard Unix calling sequences. If the option is not selected, | |
535 | the caller must always pop the args. */ | |
536 | ||
537 | #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \ | |
538 | (TREE_CODE (FUNTYPE) == IDENTIFIER_NODE ? 0 \ | |
539 | : (TARGET_RTD \ | |
540 | && (TYPE_ARG_TYPES (FUNTYPE) == 0 \ | |
541 | || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \ | |
542 | == void_type_node))) ? (SIZE) \ | |
543 | : (aggregate_value_p (FUNTYPE)) ? GET_MODE_SIZE (Pmode) : 0) | |
544 | ||
545 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
546 | gen_rtx (REG, TYPE_MODE (VALTYPE), \ | |
547 | VALUE_REGNO (TYPE_MODE (VALTYPE))) | |
548 | ||
549 | /* Define how to find the value returned by a library function | |
550 | assuming the value has mode MODE. */ | |
551 | ||
552 | #define LIBCALL_VALUE(MODE) \ | |
553 | gen_rtx (REG, MODE, VALUE_REGNO (MODE)) | |
554 | ||
555 | /* 1 if N is a possible register number for function argument passing. | |
556 | On the 80386, no registers are used in this way. | |
557 | *NOTE* -mregparm does not work. | |
558 | It exists only to test register calling conventions. */ | |
559 | ||
560 | #define FUNCTION_ARG_REGNO_P(N) 0 | |
561 | ||
562 | /* Define a data type for recording info about an argument list | |
563 | during the scan of that argument list. This data type should | |
564 | hold all necessary information about the function itself | |
565 | and about the args processed so far, enough to enable macros | |
566 | such as FUNCTION_ARG to determine where the next arg should go. | |
567 | ||
568 | On the 80386, this is a single integer, which is a number of bytes | |
569 | of arguments scanned so far. */ | |
570 | ||
571 | #define CUMULATIVE_ARGS int | |
572 | ||
573 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
574 | for a call to a function whose data type is FNTYPE. | |
575 | For a library call, FNTYPE is 0. | |
576 | ||
577 | On the 80386, the offset starts at 0. */ | |
578 | ||
579 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ | |
580 | ((CUM) = 0) | |
581 | ||
582 | /* Update the data in CUM to advance over an argument | |
583 | of mode MODE and data type TYPE. | |
584 | (TYPE is null for libcalls where that information may not be available.) */ | |
585 | ||
586 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
587 | ((CUM) += ((MODE) != BLKmode \ | |
588 | ? (GET_MODE_SIZE (MODE) + 3) & ~3 \ | |
589 | : (int_size_in_bytes (TYPE) + 3) & ~3)) | |
590 | ||
591 | /* Define where to put the arguments to a function. | |
592 | Value is zero to push the argument on the stack, | |
593 | or a hard register in which to store the argument. | |
594 | ||
595 | MODE is the argument's machine mode. | |
596 | TYPE is the data type of the argument (as a tree). | |
597 | This is null for libcalls where that information may | |
598 | not be available. | |
599 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
600 | the preceding args and about the function being called. | |
601 | NAMED is nonzero if this argument is a named parameter | |
602 | (otherwise it is an extra parameter matching an ellipsis). */ | |
603 | ||
604 | ||
605 | /* On the 80386 all args are pushed, except if -mregparm is specified | |
606 | then the first two words of arguments are passed in EAX, EDX. | |
607 | *NOTE* -mregparm does not work. | |
608 | It exists only to test register calling conventions. */ | |
609 | ||
610 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
611 | ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0) | |
612 | ||
613 | /* For an arg passed partly in registers and partly in memory, | |
614 | this is the number of registers used. | |
615 | For args passed entirely in registers or entirely in memory, zero. */ | |
616 | ||
617 | ||
618 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ | |
619 | ((TARGET_REGPARM && (CUM) < 8 \ | |
620 | && 8 < ((CUM) + ((MODE) == BLKmode \ | |
621 | ? int_size_in_bytes (TYPE) \ | |
622 | : GET_MODE_SIZE (MODE)))) \ | |
623 | ? 2 - (CUM) / 4 : 0) | |
624 | ||
625 | /* This macro generates the assembly code for function entry. | |
626 | FILE is a stdio stream to output the code to. | |
627 | SIZE is an int: how many units of temporary storage to allocate. | |
628 | Refer to the array `regs_ever_live' to determine which registers | |
629 | to save; `regs_ever_live[I]' is nonzero if register number I | |
630 | is ever used in the function. This macro is responsible for | |
631 | knowing which registers should not be saved even if used. */ | |
632 | ||
633 | #define FUNCTION_PROLOGUE(FILE, SIZE) \ | |
634 | function_prologue (FILE, SIZE) | |
635 | ||
636 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
637 | for profiling a function entry. */ | |
638 | ||
639 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
640 | { \ | |
641 | if (flag_pic) \ | |
642 | { \ | |
643 | fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \ | |
644 | LPREFIX, (LABELNO)); \ | |
645 | fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \ | |
646 | } \ | |
647 | else \ | |
648 | { \ | |
649 | fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \ | |
650 | fprintf (FILE, "\tcall _mcount\n"); \ | |
651 | } \ | |
652 | } | |
653 | ||
654 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
655 | the stack pointer does not matter. The value is tested only in | |
656 | functions that have frame pointers. | |
657 | No definition is equivalent to always zero. */ | |
658 | /* Note on the 386 it might be more efficient not to define this since | |
659 | we have to restore it ourselves from the frame pointer, in order to | |
660 | use pop */ | |
661 | ||
662 | #define EXIT_IGNORE_STACK 1 | |
663 | ||
664 | /* This macro generates the assembly code for function exit, | |
665 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
666 | then individual return instructions are generated for each | |
667 | return statement. Args are same as for FUNCTION_PROLOGUE. | |
668 | ||
669 | The function epilogue should not depend on the current stack pointer! | |
670 | It should use the frame pointer only. This is mandatory because | |
671 | of alloca; we also take advantage of it to omit stack adjustments | |
672 | before returning. | |
673 | ||
674 | If the last non-note insn in the function is a BARRIER, then there | |
675 | is no need to emit a function prologue, because control does not fall | |
676 | off the end. This happens if the function ends in an "exit" call, or | |
677 | if a `return' insn is emitted directly into the function. */ | |
678 | ||
679 | #define FUNCTION_EPILOGUE(FILE, SIZE) \ | |
680 | do { \ | |
681 | rtx last = get_last_insn (); \ | |
682 | if (last && GET_CODE (last) == NOTE) \ | |
683 | last = prev_nonnote_insn (last); \ | |
684 | if (! last || GET_CODE (last) != BARRIER) \ | |
685 | function_epilogue (FILE, SIZE); \ | |
686 | } while (0) | |
687 | ||
688 | /* Output assembler code for a block containing the constant parts | |
689 | of a trampoline, leaving space for the variable parts. */ | |
690 | ||
691 | /* On the 386, the trampoline contains three instructions: | |
692 | mov #STATIC,ecx | |
693 | mov #FUNCTION,eax | |
694 | jmp @eax */ | |
695 | #define TRAMPOLINE_TEMPLATE(FILE) \ | |
696 | { \ | |
697 | ASM_OUTPUT_CHAR (FILE, gen_rtx (CONST_INT, VOIDmode, 0xb9)); \ | |
698 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
699 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
700 | ASM_OUTPUT_CHAR (FILE, gen_rtx (CONST_INT, VOIDmode, 0xb8)); \ | |
701 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
702 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
703 | ASM_OUTPUT_CHAR (FILE, gen_rtx (CONST_INT, VOIDmode, 0xff)); \ | |
704 | ASM_OUTPUT_CHAR (FILE, gen_rtx (CONST_INT, VOIDmode, 0xe0)); \ | |
705 | } | |
706 | ||
707 | /* Length in units of the trampoline for entering a nested function. */ | |
708 | ||
709 | #define TRAMPOLINE_SIZE 12 | |
710 | ||
711 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
712 | FNADDR is an RTX for the address of the function's pure code. | |
713 | CXT is an RTX for the static chain value for the function. */ | |
714 | ||
715 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ | |
716 | { \ | |
717 | emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \ | |
718 | emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \ | |
719 | } | |
720 | \f | |
721 | /* Definitions for register eliminations. | |
722 | ||
723 | This is an array of structures. Each structure initializes one pair | |
724 | of eliminable registers. The "from" register number is given first, | |
725 | followed by "to". Eliminations of the same "from" register are listed | |
726 | in order of preference. | |
727 | ||
728 | We have two registers that can be eliminated on the i386. First, the | |
729 | frame pointer register can often be eliminated in favor of the stack | |
730 | pointer register. Secondly, the argument pointer register can always be | |
731 | eliminated; it is replaced with either the stack or frame pointer. */ | |
732 | ||
733 | #define ELIMINABLE_REGS \ | |
734 | {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
735 | { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ | |
736 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} | |
737 | ||
738 | /* Given FROM and TO register numbers, say whether this elimination is allowed. | |
739 | Frame pointer elimination is automatically handled. | |
740 | ||
741 | For the i386, if frame pointer elimination is being done, we would like to | |
742 | convert ap into sp, not fp. | |
743 | ||
744 | All other eliminations are valid. */ | |
745 | ||
746 | #define CAN_ELIMINATE(FROM, TO) \ | |
747 | ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ | |
748 | ? ! frame_pointer_needed \ | |
749 | : 1) | |
750 | ||
751 | /* Define the offset between two registers, one to be eliminated, and the other | |
752 | its replacement, at the start of a routine. */ | |
753 | ||
754 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
755 | { \ | |
756 | if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ | |
757 | (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \ | |
758 | else \ | |
759 | { \ | |
760 | int regno; \ | |
761 | int offset = 0; \ | |
762 | \ | |
763 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \ | |
764 | if ((regs_ever_live[regno] && ! call_used_regs[regno]) \ | |
765 | || (current_function_uses_pic_offset_table \ | |
766 | && regno == PIC_OFFSET_TABLE_REGNUM)) \ | |
767 | offset += 4; \ | |
768 | \ | |
769 | (OFFSET) = offset + get_frame_size (); \ | |
770 | \ | |
771 | if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
772 | (OFFSET) += 4; /* Skip saved PC */ \ | |
773 | } \ | |
774 | } | |
775 | \f | |
776 | /* Addressing modes, and classification of registers for them. */ | |
777 | ||
778 | /* #define HAVE_POST_INCREMENT */ | |
779 | /* #define HAVE_POST_DECREMENT */ | |
780 | ||
781 | /* #define HAVE_PRE_DECREMENT */ | |
782 | /* #define HAVE_PRE_INCREMENT */ | |
783 | ||
784 | /* Macros to check register numbers against specific register classes. */ | |
785 | ||
786 | /* These assume that REGNO is a hard or pseudo reg number. | |
787 | They give nonzero only if REGNO is a hard reg of the suitable class | |
788 | or a pseudo reg currently allocated to a suitable hard reg. | |
789 | Since they use reg_renumber, they are safe only once reg_renumber | |
790 | has been allocated, which happens in local-alloc.c. */ | |
791 | ||
792 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
793 | ((REGNO) < STACK_POINTER_REGNUM \ | |
794 | || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM) | |
795 | ||
796 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
797 | ((REGNO) <= STACK_POINTER_REGNUM \ | |
798 | || (REGNO) == ARG_POINTER_REGNUM \ | |
799 | || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM) | |
800 | ||
801 | #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4) | |
802 | #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5) | |
803 | ||
804 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
805 | and check its validity for a certain class. | |
806 | We have two alternate definitions for each of them. | |
807 | The usual definition accepts all pseudo regs; the other rejects | |
808 | them unless they have been allocated suitable hard regs. | |
809 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
810 | ||
811 | Most source files want to accept pseudo regs in the hope that | |
812 | they will get allocated to the class that the insn wants them to be in. | |
813 | Source files for reload pass need to be strict. | |
814 | After reload, it makes no difference, since pseudo regs have | |
815 | been eliminated by then. */ | |
816 | ||
817 | #ifndef REG_OK_STRICT | |
818 | ||
819 | /* Nonzero if X is a hard reg that can be used as an index or if | |
820 | it is a pseudo reg. */ | |
821 | ||
822 | #define REG_OK_FOR_INDEX_P(X) \ | |
823 | (REGNO (X) < STACK_POINTER_REGNUM \ | |
824 | || REGNO (X) >= FIRST_PSEUDO_REGISTER) | |
825 | ||
826 | /* Nonzero if X is a hard reg that can be used as a base reg | |
827 | of if it is a pseudo reg. */ | |
828 | /* ?wfs */ | |
829 | ||
830 | #define REG_OK_FOR_BASE_P(X) \ | |
831 | (REGNO (X) <= STACK_POINTER_REGNUM \ | |
832 | || REGNO (X) == ARG_POINTER_REGNUM \ | |
833 | || REGNO(X) >= FIRST_PSEUDO_REGISTER) | |
834 | ||
835 | #define REG_OK_FOR_STRREG_P(X) \ | |
836 | (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER) | |
837 | ||
838 | #else | |
839 | ||
840 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
841 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
842 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
843 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
844 | #define REG_OK_FOR_STRREG_P(X) \ | |
845 | (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X))) | |
846 | ||
847 | #endif | |
848 | ||
849 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
850 | that is a valid memory address for an instruction. | |
851 | The MODE argument is the machine mode for the MEM expression | |
852 | that wants to use this address. | |
853 | ||
854 | The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, | |
855 | except for CONSTANT_ADDRESS_P which is usually machine-independent. | |
856 | ||
857 | See legitimize_pic_address in i386.c for details as to what | |
858 | constitutes a legitimate address when -fpic is used. */ | |
859 | ||
860 | #define MAX_REGS_PER_ADDRESS 2 | |
861 | ||
862 | #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) | |
863 | ||
864 | /* Nonzero if the constant value X is a legitimate general operand. | |
865 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ | |
866 | ||
867 | #define LEGITIMATE_CONSTANT_P(X) 1 | |
868 | ||
869 | #define GO_IF_INDEXABLE_BASE(X, ADDR) \ | |
870 | if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR | |
871 | ||
872 | #define LEGITIMATE_INDEX_REG_P(X) \ | |
873 | (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) | |
874 | ||
875 | /* Return 1 if X is an index or an index times a scale. */ | |
876 | ||
877 | #define LEGITIMATE_INDEX_P(X) \ | |
878 | (LEGITIMATE_INDEX_REG_P (X) \ | |
879 | || (GET_CODE (X) == MULT \ | |
880 | && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \ | |
881 | && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
882 | && (INTVAL (XEXP (X, 1)) == 2 \ | |
883 | || INTVAL (XEXP (X, 1)) == 4 \ | |
884 | || INTVAL (XEXP (X, 1)) == 8))) | |
885 | ||
886 | /* Go to ADDR if X is an index term, a base reg, or a sum of those. */ | |
887 | ||
888 | #define GO_IF_INDEXING(X, ADDR) \ | |
889 | { if (LEGITIMATE_INDEX_P (X)) goto ADDR; \ | |
890 | GO_IF_INDEXABLE_BASE (X, ADDR); \ | |
891 | if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \ | |
892 | { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \ | |
893 | if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \ | |
894 | { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } } | |
895 | ||
896 | /* We used to allow this, but it isn't ever used. | |
897 | || ((GET_CODE (X) == POST_DEC || GET_CODE (X) == POST_INC) \ | |
898 | && REG_P (XEXP (X, 0)) \ | |
899 | && REG_OK_FOR_STRREG_P (XEXP (X, 0))) \ | |
900 | */ | |
901 | ||
902 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
903 | { \ | |
904 | if (CONSTANT_ADDRESS_P (X) \ | |
905 | && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \ | |
906 | goto ADDR; \ | |
907 | GO_IF_INDEXING (X, ADDR); \ | |
908 | if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ | |
909 | { \ | |
910 | rtx x0 = XEXP (X, 0); \ | |
911 | if (! flag_pic || ! SYMBOLIC_CONST (XEXP (X, 1))) \ | |
912 | { GO_IF_INDEXING (x0, ADDR); } \ | |
913 | else if (x0 == pic_offset_table_rtx) \ | |
914 | goto ADDR; \ | |
915 | else if (GET_CODE (x0) == PLUS) \ | |
916 | { \ | |
917 | if (XEXP (x0, 0) == pic_offset_table_rtx) \ | |
918 | { GO_IF_INDEXABLE_BASE (XEXP (x0, 1), ADDR); } \ | |
919 | if (XEXP (x0, 1) == pic_offset_table_rtx) \ | |
920 | { GO_IF_INDEXABLE_BASE (XEXP (x0, 0), ADDR); } \ | |
921 | } \ | |
922 | } \ | |
923 | } | |
924 | ||
925 | /* Try machine-dependent ways of modifying an illegitimate address | |
926 | to be legitimate. If we find one, return the new, valid address. | |
927 | This macro is used in only one place: `memory_address' in explow.c. | |
928 | ||
929 | OLDX is the address as it was before break_out_memory_refs was called. | |
930 | In some cases it is useful to look at this to decide what needs to be done. | |
931 | ||
932 | MODE and WIN are passed so that this macro can use | |
933 | GO_IF_LEGITIMATE_ADDRESS. | |
934 | ||
935 | It is always safe for this macro to do nothing. It exists to recognize | |
936 | opportunities to optimize the output. | |
937 | ||
938 | For the 80386, we handle X+REG by loading X into a register R and | |
939 | using R+REG. R will go in a general reg and indexing will be used. | |
940 | However, if REG is a broken-out memory address or multiplication, | |
941 | nothing needs to be done because REG can certainly go in a general reg. | |
942 | ||
943 | When -fpic is used, special handling is needed for symbolic references. | |
944 | See comments by legitimize_pic_address in i386.c for details. */ | |
945 | ||
946 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ | |
947 | { extern rtx legitimize_pic_address (); \ | |
948 | int ch = (X) != (OLDX); \ | |
949 | if (flag_pic && SYMBOLIC_CONST (X)) \ | |
950 | { \ | |
951 | (X) = legitimize_pic_address (X, 0); \ | |
952 | if (memory_address_p (MODE, X)) \ | |
953 | goto WIN; \ | |
954 | } \ | |
955 | if (GET_CODE (X) == PLUS) \ | |
956 | { if (GET_CODE (XEXP (X, 0)) == MULT) \ | |
957 | ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \ | |
958 | if (GET_CODE (XEXP (X, 1)) == MULT) \ | |
959 | ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \ | |
960 | if (ch && GET_CODE (XEXP (X, 1)) == REG \ | |
961 | && GET_CODE (XEXP (X, 0)) == REG) \ | |
962 | goto WIN; \ | |
963 | if (flag_pic && SYMBOLIC_CONST (XEXP (X, 1))) \ | |
964 | ch = 1, (X) = legitimize_pic_address (X, 0); \ | |
965 | if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \ | |
966 | if (GET_CODE (XEXP (X, 0)) == REG) \ | |
967 | { register rtx temp = gen_reg_rtx (Pmode); \ | |
968 | register rtx val = force_operand (XEXP (X, 1), temp); \ | |
969 | if (val != temp) emit_move_insn (temp, val, 0); \ | |
970 | XEXP (X, 1) = temp; \ | |
971 | goto WIN; } \ | |
972 | else if (GET_CODE (XEXP (X, 1)) == REG) \ | |
973 | { register rtx temp = gen_reg_rtx (Pmode); \ | |
974 | register rtx val = force_operand (XEXP (X, 0), temp); \ | |
975 | if (val != temp) emit_move_insn (temp, val, 0); \ | |
976 | XEXP (X, 0) = temp; \ | |
977 | goto WIN; }}} | |
978 | ||
979 | /* Nonzero if the constant value X is a legitimate general operand | |
980 | when generating PIC code. It is given that flag_pic is on and | |
981 | that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ | |
982 | ||
983 | #define LEGITIMATE_PIC_OPERAND_P(X) \ | |
984 | (! SYMBOLIC_CONST (X) \ | |
985 | || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X))) | |
986 | ||
987 | #define SYMBOLIC_CONST(X) \ | |
988 | (GET_CODE (X) == SYMBOL_REF \ | |
989 | || GET_CODE (X) == LABEL_REF \ | |
990 | || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X))) | |
991 | ||
992 | /* Go to LABEL if ADDR (a legitimate address expression) | |
993 | has an effect that depends on the machine mode it is used for. | |
994 | On the 80386, only postdecrement and postincrement address depend thus | |
995 | (the amount of decrement or increment being the length of the operand). */ | |
996 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
997 | if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL | |
998 | \f | |
999 | /* Define this macro if references to a symbol must be treated | |
1000 | differently depending on something about the variable or | |
1001 | function named by the symbol (such as what section it is in). | |
1002 | ||
b4ac57ab | 1003 | On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol |
c98f8742 JVA |
1004 | so that we may access it directly in the GOT. */ |
1005 | ||
1006 | #define ENCODE_SECTION_INFO(DECL) \ | |
1007 | do \ | |
1008 | { \ | |
1009 | if (flag_pic) \ | |
1010 | { \ | |
b4ac57ab RS |
1011 | rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ |
1012 | ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \ | |
1013 | SYMBOL_REF_FLAG (XEXP (rtl, 0)) \ | |
1014 | = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ | |
1015 | || ! TREE_PUBLIC (DECL)); \ | |
c98f8742 JVA |
1016 | } \ |
1017 | } \ | |
1018 | while (0) | |
1019 | \f | |
1020 | /* Specify the machine mode that this machine uses | |
1021 | for the index in the tablejump instruction. */ | |
1022 | #define CASE_VECTOR_MODE Pmode | |
1023 | ||
1024 | /* Define this if the tablejump instruction expects the table | |
1025 | to contain offsets from the address of the table. | |
1026 | Do not define this if the table should contain absolute addresses. */ | |
1027 | /* #define CASE_VECTOR_PC_RELATIVE */ | |
1028 | ||
1029 | /* Specify the tree operation to be used to convert reals to integers. | |
1030 | This should be changed to take advantage of fist --wfs ?? | |
1031 | */ | |
1032 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
1033 | ||
1034 | /* This is the kind of divide that is easiest to do in the general case. */ | |
1035 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
1036 | ||
1037 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
1038 | #define DEFAULT_SIGNED_CHAR 1 | |
1039 | ||
1040 | /* Max number of bytes we can move from memory to memory | |
1041 | in one reasonably fast instruction. */ | |
1042 | #define MOVE_MAX 4 | |
1043 | ||
1044 | /* MOVE_RATIO is the number of move instructions that is better than a | |
1045 | block move. Make this large on i386, since the block move is very | |
1046 | inefficient with small blocks, and the hard register needs of the | |
1047 | block move require much reload work. */ | |
1048 | #define MOVE_RATIO 5 | |
1049 | ||
1050 | /* Define this if zero-extension is slow (more than one real instruction). */ | |
1051 | /* #define SLOW_ZERO_EXTEND */ | |
1052 | ||
1053 | /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
1054 | #define SLOW_BYTE_ACCESS 0 | |
1055 | ||
1056 | /* Define if shifts truncate the shift count | |
1057 | which implies one can omit a sign-extension or zero-extension | |
1058 | of a shift count. */ | |
1059 | /* One i386, shifts do truncate the count. But bit opcodes don't. */ | |
1060 | ||
1061 | /* #define SHIFT_COUNT_TRUNCATED */ | |
1062 | ||
1063 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
1064 | is done just by pretending it is already truncated. */ | |
1065 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1066 | ||
1067 | /* We assume that the store-condition-codes instructions store 0 for false | |
1068 | and some other value for true. This is the value stored for true. */ | |
1069 | ||
1070 | #define STORE_FLAG_VALUE 1 | |
1071 | ||
1072 | /* When a prototype says `char' or `short', really pass an `int'. | |
1073 | (The 386 can't easily push less than an int.) */ | |
1074 | ||
1075 | #define PROMOTE_PROTOTYPES | |
1076 | ||
1077 | /* Specify the machine mode that pointers have. | |
1078 | After generation of rtl, the compiler makes no further distinction | |
1079 | between pointers and any other objects of this machine mode. */ | |
1080 | #define Pmode SImode | |
1081 | ||
1082 | /* A function address in a call instruction | |
1083 | is a byte address (for indexing purposes) | |
1084 | so give the MEM rtx a byte's mode. */ | |
1085 | #define FUNCTION_MODE QImode | |
1086 | ||
1087 | /* Define this if addresses of constant functions | |
1088 | shouldn't be put through pseudo regs where they can be cse'd. | |
1089 | Desirable on the 386 because a CALL with a constant address is | |
1090 | not much slower than one with a register address. */ | |
1091 | #define NO_FUNCTION_CSE | |
1092 | ||
1093 | /* Provide the costs of a rtl expression. This is in the body of a | |
1094 | switch on CODE. */ | |
1095 | ||
3bb22aee | 1096 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ |
c98f8742 JVA |
1097 | case MULT: \ |
1098 | return COSTS_N_INSNS (10); \ | |
1099 | case DIV: \ | |
1100 | case UDIV: \ | |
1101 | case MOD: \ | |
1102 | case UMOD: \ | |
3bb22aee RS |
1103 | return COSTS_N_INSNS (40); \ |
1104 | case PLUS: \ | |
1105 | if (GET_CODE (XEXP (RTX, 0)) == REG \ | |
1106 | && GET_CODE (XEXP (RTX, 1)) == CONST_INT) \ | |
1107 | return 1; | |
c98f8742 JVA |
1108 | |
1109 | ||
1110 | /* Compute the cost of computing a constant rtl expression RTX | |
1111 | whose rtx-code is CODE. The body of this macro is a portion | |
1112 | of a switch statement. If the code is computed here, | |
1113 | return it with a return statement. Otherwise, break from the switch. */ | |
1114 | ||
3bb22aee | 1115 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ |
c98f8742 JVA |
1116 | case CONST_INT: \ |
1117 | case CONST: \ | |
1118 | case LABEL_REF: \ | |
1119 | case SYMBOL_REF: \ | |
1120 | return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \ | |
1121 | case CONST_DOUBLE: \ | |
1122 | { \ | |
1123 | int code = standard_80387_constant_p (RTX); \ | |
1124 | return code == 1 ? 0 : \ | |
1125 | code == 2 ? 1 : \ | |
1126 | 2; \ | |
3bb22aee | 1127 | } |
c98f8742 JVA |
1128 | |
1129 | /* Compute the cost of an address. This is meant to approximate the size | |
1130 | and/or execution delay of an insn using that address. If the cost is | |
1131 | approximated by the RTL complexity, including CONST_COSTS above, as | |
1132 | is usually the case for CISC machines, this macro should not be defined. | |
1133 | For aggressively RISCy machines, only one insn format is allowed, so | |
1134 | this macro should be a constant. The value of this macro only matters | |
1135 | for valid addresses. | |
1136 | ||
1137 | For i386, it is better to use a complex address than let gcc copy | |
1138 | the address into a reg and make a new pseudo. But not if the address | |
1139 | requires to two regs - that would mean more pseudos with longer | |
1140 | lifetimes. */ | |
1141 | ||
1142 | #define ADDRESS_COST(RTX) \ | |
1143 | ((CONSTANT_P (RTX) \ | |
1144 | || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \ | |
1145 | && REG_P (XEXP (RTX, 0)))) ? 0 \ | |
1146 | : REG_P (RTX) ? 1 \ | |
1147 | : 2) | |
1148 | \f | |
1149 | /* Tell final.c how to eliminate redundant test instructions. */ | |
1150 | ||
1151 | /* Here we define machine-dependent flags and fields in cc_status | |
1152 | (see `conditions.h'). */ | |
1153 | ||
1154 | /* Set if the cc value is actually in the 80387, so a floating point | |
1155 | conditional branch must be output. */ | |
1156 | #define CC_IN_80387 04000 | |
1157 | ||
1158 | /* Set if the CC value was stored in a nonstandard way, so that | |
1159 | the state of equality is indicated by zero in the carry bit. */ | |
1160 | #define CC_Z_IN_NOT_C 010000 | |
1161 | ||
1162 | /* Store in cc_status the expressions | |
1163 | that the condition codes will describe | |
1164 | after execution of an instruction whose pattern is EXP. | |
1165 | Do not alter them if the instruction would not alter the cc's. */ | |
1166 | ||
1167 | #define NOTICE_UPDATE_CC(EXP, INSN) \ | |
1168 | notice_update_cc((EXP)) | |
1169 | ||
1170 | /* Output a signed jump insn. Use template NORMAL ordinarily, or | |
1171 | FLOAT following a floating point comparison. | |
1172 | Use NO_OV following an arithmetic insn that set the cc's | |
1173 | before a test insn that was deleted. | |
1174 | NO_OV may be zero, meaning final should reinsert the test insn | |
1175 | because the jump cannot be handled properly without it. */ | |
1176 | ||
1177 | #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \ | |
1178 | { \ | |
1179 | if (cc_prev_status.flags & CC_IN_80387) \ | |
1180 | return FLOAT; \ | |
1181 | if (cc_prev_status.flags & CC_NO_OVERFLOW) \ | |
1182 | return NO_OV; \ | |
1183 | return NORMAL; \ | |
1184 | } | |
1185 | \f | |
1186 | /* Control the assembler format that we output, to the extent | |
1187 | this does not vary between assemblers. */ | |
1188 | ||
1189 | /* How to refer to registers in assembler output. | |
1190 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
1191 | ||
1192 | /* In order to refer to the first 8 regs as 32 bit regs prefix an "e" | |
1193 | For non floating point regs, the following are the HImode names. | |
1194 | ||
1195 | For float regs, the stack top is sometimes referred to as "%st(0)" | |
1196 | instead of just "%st". PRINT_REG in i386.c handles with with the | |
1197 | "y" code. */ | |
1198 | ||
1199 | #define HI_REGISTER_NAMES \ | |
1200 | {"ax","dx","cx","bx","si","di","bp","sp", \ | |
1201 | "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" } | |
1202 | ||
1203 | #define REGISTER_NAMES HI_REGISTER_NAMES | |
1204 | ||
1205 | /* Table of additional register names to use in user input. */ | |
1206 | ||
1207 | #define ADDITIONAL_REGISTER_NAMES \ | |
1208 | { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \ | |
1209 | "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \ | |
1210 | "al", 0, "dl", 1, "cl", 2, "bl", 3, \ | |
1211 | "ah", 0, "dh", 1, "ch", 2, "bh", 3 } | |
1212 | ||
1213 | /* Note we are omitting these since currently I don't know how | |
1214 | to get gcc to use these, since they want the same but different | |
1215 | number as al, and ax. | |
1216 | */ | |
1217 | ||
b4ac57ab | 1218 | /* note the last four are not really qi_registers, but |
c98f8742 JVA |
1219 | the md will have to never output movb into one of them |
1220 | only a movw . There is no movb into the last four regs */ | |
1221 | ||
1222 | #define QI_REGISTER_NAMES \ | |
1223 | {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",} | |
1224 | ||
1225 | /* These parallel the array above, and can be used to access bits 8:15 | |
1226 | of regs 0 through 3. */ | |
1227 | ||
1228 | #define QI_HIGH_REGISTER_NAMES \ | |
1229 | {"ah", "dh", "ch", "bh", } | |
1230 | ||
1231 | /* How to renumber registers for dbx and gdb. */ | |
1232 | ||
1233 | /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */ | |
1234 | #define DBX_REGISTER_NUMBER(n) \ | |
1235 | ((n) == 0 ? 0 : \ | |
1236 | (n) == 1 ? 2 : \ | |
1237 | (n) == 2 ? 1 : \ | |
1238 | (n) == 3 ? 3 : \ | |
1239 | (n) == 4 ? 6 : \ | |
1240 | (n) == 5 ? 7 : \ | |
1241 | (n) == 6 ? 4 : \ | |
1242 | (n) == 7 ? 5 : \ | |
1243 | (n) + 4) | |
1244 | ||
1245 | /* This is how to output the definition of a user-level label named NAME, | |
1246 | such as the label on a static function or variable NAME. */ | |
1247 | ||
1248 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
1249 | (assemble_name (FILE, NAME), fputs (":\n", FILE)) | |
1250 | ||
1251 | /* This is how to output an assembler line defining a `double' constant. */ | |
1252 | ||
1253 | #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ | |
1254 | fprintf (FILE, "%s %.22e\n", ASM_DOUBLE, (VALUE)) | |
1255 | ||
1256 | ||
1257 | /* This is how to output an assembler line defining a `float' constant. */ | |
1258 | ||
1259 | #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ | |
1260 | do { union { float f; long l;} tem; \ | |
1261 | tem.f = (VALUE); \ | |
1262 | fprintf((FILE), "%s 0x%x\n", ASM_LONG, tem.l); \ | |
1263 | } while (0) | |
1264 | ||
1265 | ||
1266 | /* Store in OUTPUT a string (made with alloca) containing | |
1267 | an assembler-name for a local static variable named NAME. | |
1268 | LABELNO is an integer which is different for each call. */ | |
1269 | ||
1270 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
1271 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
1272 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
1273 | ||
1274 | ||
1275 | ||
1276 | /* This is how to output an assembler line defining an `int' constant. */ | |
1277 | ||
1278 | #define ASM_OUTPUT_INT(FILE,VALUE) \ | |
1279 | ( fprintf (FILE, "%s ", ASM_LONG), \ | |
1280 | output_addr_const (FILE,(VALUE)), \ | |
1281 | putc('\n',FILE)) | |
1282 | ||
1283 | /* Likewise for `char' and `short' constants. */ | |
1284 | /* is this supposed to do align too?? */ | |
1285 | ||
1286 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
1287 | ( fprintf (FILE, "%s ", ASM_SHORT), \ | |
1288 | output_addr_const (FILE,(VALUE)), \ | |
1289 | putc('\n',FILE)) | |
1290 | ||
1291 | /* | |
1292 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
1293 | ( fprintf (FILE, "%s ", ASM_BYTE_OP), \ | |
1294 | output_addr_const (FILE,(VALUE)), \ | |
1295 | fputs (",", FILE), \ | |
1296 | output_addr_const (FILE,(VALUE)), \ | |
1297 | fputs (" >> 8\n",FILE)) | |
1298 | */ | |
1299 | ||
1300 | ||
1301 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
1302 | ( fprintf (FILE, "%s ", ASM_BYTE_OP), \ | |
1303 | output_addr_const (FILE, (VALUE)), \ | |
1304 | putc ('\n', FILE)) | |
1305 | ||
1306 | /* This is how to output an assembler line for a numeric constant byte. */ | |
1307 | ||
1308 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
1309 | fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE)) | |
1310 | ||
1311 | /* This is how to output an insn to push a register on the stack. | |
1312 | It need not be very fast code. */ | |
1313 | ||
1314 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
1315 | fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO]) | |
1316 | ||
1317 | /* This is how to output an insn to pop a register from the stack. | |
1318 | It need not be very fast code. */ | |
1319 | ||
1320 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
1321 | fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO]) | |
1322 | ||
1323 | /* This is how to output an element of a case-vector that is absolute. | |
1324 | */ | |
1325 | ||
1326 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
1327 | fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE) | |
1328 | ||
1329 | /* This is how to output an element of a case-vector that is relative. | |
1330 | We don't use these on the 386 yet, because the ATT assembler can't do | |
1331 | forward reference the differences. | |
1332 | */ | |
1333 | ||
1334 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ | |
1335 | fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL) | |
1336 | ||
1337 | /* Define the parentheses used to group arithmetic operations | |
1338 | in assembler code. */ | |
1339 | ||
1340 | #define ASM_OPEN_PAREN "" | |
1341 | #define ASM_CLOSE_PAREN "" | |
1342 | ||
1343 | /* Define results of standard character escape sequences. */ | |
1344 | #define TARGET_BELL 007 | |
1345 | #define TARGET_BS 010 | |
1346 | #define TARGET_TAB 011 | |
1347 | #define TARGET_NEWLINE 012 | |
1348 | #define TARGET_VT 013 | |
1349 | #define TARGET_FF 014 | |
1350 | #define TARGET_CR 015 | |
1351 | ||
1352 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
1353 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
1354 | The CODE z takes the size of operand from the following digit, and | |
1355 | outputs b,w,or l respectively. | |
1356 | ||
1357 | On the 80386, we use several such letters: | |
1358 | f -- float insn (print a CONST_DOUBLE as a float rather than in hex). | |
1359 | L,W,B,Q,S -- print the opcode suffix for specified size of operand. | |
1360 | R -- print the prefix for register names. | |
1361 | z -- print the opcode suffix for the size of the current operand. | |
1362 | * -- print a star (in certain assembler syntax) | |
1363 | w -- print the operand as if it's a "word" (HImode) even if it isn't. | |
1364 | b -- print the operand as if it's a byte (QImode) even if it isn't. | |
1365 | c -- don't print special prefixes before constant operands. */ | |
1366 | ||
1367 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ | |
1368 | ((CODE) == '*') | |
1369 | ||
1370 | #define PRINT_OPERAND(FILE, X, CODE) \ | |
1371 | print_operand (FILE, X, CODE) | |
1372 | \f | |
1373 | ||
1374 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
1375 | print_operand_address (FILE, ADDR) | |
1376 | ||
1377 | /* Output the prefix for an immediate operand, or for an offset operand. */ | |
1378 | #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE)) | |
1379 | #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE)) | |
1380 | ||
1381 | /* Routines in libgcc that return floats must return them in an fp reg, | |
1382 | just as other functions do which return such values. | |
1383 | These macros make that happen. */ | |
1384 | ||
1385 | #define FLOAT_VALUE_TYPE float | |
1386 | #define INTIFY(FLOATVAL) FLOATVAL | |
1387 | ||
1388 | /* Nonzero if INSN magically clobbers register REGNO. */ | |
1389 | ||
1390 | /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \ | |
1391 | (FP_REGNO_P (REGNO) \ | |
1392 | && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER)) | |
1393 | */ | |
1394 | ||
1395 | /* a letter which is not needed by the normal asm syntax, which | |
1396 | we can use for operand syntax in the extended asm */ | |
1397 | ||
1398 | #define ASM_OPERAND_LETTER '#' | |
1399 | \f | |
1400 | #define RET return "" | |
1401 | #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx)) | |
1402 | \f | |
1403 | /* | |
1404 | Local variables: | |
1405 | version-control: t | |
1406 | End: | |
1407 | */ |