[thirdparty/gcc.git] / gcc / config / lm32 / lm32.h

/* Definitions of target machine for GNU compiler, Lattice Mico32 architecture.
   Contributed by Jon Beniston <jon@beniston.com>

   Copyright (C) 2009-2025 Free Software Foundation, Inc.

   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published
   by the Free Software Foundation; either version 3, or (at your
   option) any later version.

   GCC is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License
   along with GCC; see the file COPYING3.  If not see
   <http://www.gnu.org/licenses/>.  */

/*-------------------------------*/
/* Run-time Target Specification */
/*-------------------------------*/

/* Target CPU builtins.  */
#define TARGET_CPU_CPP_BUILTINS()                       \
  do                                                    \
    {                                                   \
      builtin_define ("__lm32__");                      \
      builtin_assert ("cpu=lm32");                      \
      builtin_assert ("machine=lm32");                  \
      if (TARGET_MULTIPLY_ENABLED)                      \
        builtin_define ("__multiply_enabled__");        \
      if (TARGET_DIVIDE_ENABLED)                        \
        builtin_define ("__divide_enabled__");          \
      if (TARGET_BARREL_SHIFT_ENABLED)                  \
        builtin_define ("__barrel_shift_enabled__");    \
      if (TARGET_SIGN_EXTEND_ENABLED)                   \
        builtin_define ("__sign_extend_enabled__");     \
      if (TARGET_USER_ENABLED)                          \
        builtin_define ("__user_enabled__");            \
    }                                                   \
  while (0)

#undef  ASM_SPEC
#define ASM_SPEC "\
%{mmultiply-enabled} \
%{mdivide-enabled} \
%{mbarrel-shift-enabled} \
%{msign-extend-enabled} \
%{muser-enabled} \
"

/* Let link script define all link options.
   Default to using simulator link script.  */

#undef  STARTFILE_SPEC
#define STARTFILE_SPEC ""
#undef  ENDFILE_SPEC
#define ENDFILE_SPEC ""
#undef  LIB_SPEC
#define LIB_SPEC "%{!T*:-T sim.ld}"

#undef  CC1_SPEC
#define CC1_SPEC "%{G*}"

/*---------------------------------*/
/* Target machine storage layout.  */
/*---------------------------------*/

#define BITS_BIG_ENDIAN 0
#define BYTES_BIG_ENDIAN 1
#define WORDS_BIG_ENDIAN 1

#define BITS_PER_WORD 32
#define UNITS_PER_WORD 4

#define POINTER_SIZE 32

#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE)               \
do {                                                    \
  if (GET_MODE_CLASS (MODE) == MODE_INT                 \
      && GET_MODE_SIZE (MODE) < UNITS_PER_WORD)         \
    (MODE) = word_mode;                                 \
} while (0)

#define PARM_BOUNDARY 32

#define STACK_BOUNDARY 32

#define BIGGEST_ALIGNMENT 64

#define FUNCTION_BOUNDARY  32

#define EMPTY_FIELD_BOUNDARY 32

#define STRICT_ALIGNMENT 1

#define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT

/* Make arrays and structures word-aligned to allow faster copying etc.  */
#define DATA_ALIGNMENT(TYPE, ALIGN)					\
  ((((ALIGN) < BITS_PER_WORD)						\
    && (TREE_CODE (TYPE) == ARRAY_TYPE					\
	|| TREE_CODE (TYPE) == UNION_TYPE				\
	|| TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))

/* We need this for the same reason as DATA_ALIGNMENT, namely to cause
   character arrays to be word-aligned so that `strcpy' calls that copy
   constants to character arrays can be done inline, and 'strcmp' can be
   optimised to use word loads.  */
#define LOCAL_ALIGNMENT(TYPE, ALIGN) \
  DATA_ALIGNMENT (TYPE, ALIGN)

/*----------------------------------------*/
/* Layout of source language data types.  */
/*----------------------------------------*/

#define INT_TYPE_SIZE		    32
#define SHORT_TYPE_SIZE		    16
#define LONG_TYPE_SIZE		    32
#define LONG_LONG_TYPE_SIZE	    64

#define DEFAULT_SIGNED_CHAR         0

#define SIZE_TYPE "unsigned int"

#define PTRDIFF_TYPE "int"

/*---------------------------*/
/* Standard register usage.  */
/*---------------------------*/

#define FIRST_PSEUDO_REGISTER  32

#define RV_REGNUM   1
#define GP_REGNUM   26
#define FP_REGNUM   27
#define SP_REGNUM   28
#define RA_REGNUM   29

#define G_REG_P(X)      ((X)<32)

#define FIXED_REGISTERS   \
{ 1, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 1, 0, 1, 0, 1, 1}

#define CALL_USED_REGISTERS \
{ 1, 1, 1, 1, 1, 1, 1, 1,   \
  1, 1, 1, 0, 0, 0, 0, 0,   \
  0, 0, 0, 0, 0, 0, 0, 0,   \
  0, 0, 1, 0, 1, 0, 1, 1}

#define AVOID_CCMODE_COPIES

/*----------------------------------*/
/* Register classes and constants.  */
/*----------------------------------*/

enum reg_class
{
  NO_REGS,
  GENERAL_REGS,
  ALL_REGS,
  LIM_REG_CLASSES
};

#define N_REG_CLASSES (int) LIM_REG_CLASSES

#define REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "ALL_REGS" }

#define REG_CLASS_CONTENTS      \
{ {0x00000000},                 \
  {0xffffffff},                 \
  {0xffffffff}                  \
}

#define REGNO_REG_CLASS(REGNO) \
    (G_REG_P(REGNO) ? GENERAL_REGS : NO_REGS)

#define INDEX_REG_CLASS NO_REGS

#define BASE_REG_CLASS GENERAL_REGS

#define REGNO_OK_FOR_BASE_P(REGNO) \
    (G_REG_P (REGNO) || G_REG_P ((unsigned) reg_renumber[REGNO]))

#define REGNO_OK_FOR_INDEX_P(REGNO) 0

/*----------------------------------------*/
/* Stack Layout and Calling Conventions.  */
/*----------------------------------------*/

#define STACK_GROWS_DOWNWARD 1

#define FRAME_GROWS_DOWNWARD 1

#define STACK_POINTER_OFFSET (UNITS_PER_WORD)

#define FIRST_PARM_OFFSET(FNDECL) (UNITS_PER_WORD)

#define STACK_POINTER_REGNUM SP_REGNUM

#define FRAME_POINTER_REGNUM FP_REGNUM

#define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM

#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, RA_REGNUM)

#define RETURN_ADDR_RTX(count, frame)                                   \
  lm32_return_addr_rtx (count, frame)

/* FIXME - This is not yet supported.  */
#define STATIC_CHAIN_REGNUM 9

#define ELIMINABLE_REGS \
{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM },                        \
 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM },                          \
}

#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                    \
  (OFFSET) = lm32_compute_initial_elimination_offset (FROM, TO)

/*-----------------------------*/
/* Function argument passing.  */
/*-----------------------------*/

#define ACCUMULATE_OUTGOING_ARGS 1

/*--------------------------------*/
/* Passing Arguments in Registers */
/*--------------------------------*/

/* The first argument register.  */
#define LM32_FIRST_ARG_REG 1

/* The number of (integer) argument register available.  */
#define LM32_NUM_ARG_REGS 8

#define CUMULATIVE_ARGS int

#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT,N_NAMED_ARGS)  \
  (CUM) = 0

#define FUNCTION_ARG_REGNO_P(r)                                         \
  (((r) >= LM32_FIRST_ARG_REG) && ((r) <= LM32_NUM_ARG_REGS))

/*--------------------*/
/* Function results.  */
/*--------------------*/

#define FUNCTION_VALUE(VALTYPE, FUNC)                                   \
   gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE)                              \
                 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD)           \
	            ? word_mode                                         \
	            : TYPE_MODE (VALTYPE),				\
	            RV_REGNUM)

#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RV_REGNUM)

#define FUNCTION_VALUE_REGNO_P(N) ((N) == RV_REGNUM)

#define RETURN_IN_MEMORY(TYPE) lm32_return_in_memory (TYPE)

#define DEFAULT_PCC_STRUCT_RETURN 0

/* Convert from bytes to ints.  */
#define LM32_NUM_INTS(X) (((X) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

/* The number of (integer) registers required to hold a quantity of
   type MODE.  */
#define LM32_NUM_REGS(MODE) LM32_NUM_INTS (GET_MODE_SIZE (MODE))

/* The number of (integer) registers required to hold a quantity of
   TYPE MODE.  */
#define LM32_NUM_REGS2(MODE, TYPE)                       \
  LM32_NUM_INTS ((MODE) == BLKmode ?                     \
  int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE))

/*---------------------------*/
/* Function entry and exit.  */
/*---------------------------*/

/*-------------*/
/* Profiling.  */
/*-------------*/

#define FUNCTION_PROFILER(FILE, LABELNO)

/*---------------*/
/* Trampolines.  */
/*---------------*/

#define TRAMPOLINE_SIZE		0

/*---------------------*/
/*  Addressing Modes.  */
/*---------------------*/

#define CONSTANT_ADDRESS_P(X)						\
  ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF		\
    || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH		\
    || (GET_CODE (X) == CONST)))

#define MAX_REGS_PER_ADDRESS 1

#define STRICT_REG_OK_FOR_BASE_P(X)                                     \
  (REGNO_OK_FOR_BASE_P (REGNO (X)))
#define NONSTRICT_REG_OK_FOR_BASE_P(X)                                  \
  (G_REG_P (REGNO (X)) || !HARD_REGISTER_NUM_P (REGNO (X)))

#ifdef REG_OK_STRICT
#define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P(X)
#else
#define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P(X)
#endif

/*-------------------------*/
/* Condition Code Status.  */
/*-------------------------*/

#define REVERSIBLE_CC_MODE(MODE) 1

/*---------*/
/* Costs.  */
/*---------*/

#define SLOW_BYTE_ACCESS 1

#define NO_FUNCTION_CSE 1

#define BRANCH_COST(speed_p, predictable_p) 4

#define MOVE_RATIO(speed) (speed ? 24 : 3)

/*------------*/
/* Sections.  */
/*------------*/

#define TEXT_SECTION_ASM_OP             "\t.section\t.text"
#define DATA_SECTION_ASM_OP             "\t.section\t.data"
#define SDATA_SECTION_ASM_OP            "\t.section\t.sdata,\"aw\""
#define BSS_SECTION_ASM_OP              "\t.section\t.bss"
#define SBSS_SECTION_ASM_OP             "\t.section\t.sbss,\"aw\""

/*-------*/
/* PIC.  */
/*-------*/

#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? GP_REGNUM : INVALID_REGNUM)

#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)

#define LEGITIMATE_PIC_OPERAND_P(X)                                    \
	(!(nonpic_symbol_mentioned_p (X)))

/*-------------*/
/* Assembler.  */
/*-------------*/

#define ASM_COMMENT_START "#"

#define ASM_APP_ON "#APP\n"

#define ASM_APP_OFF "#NO_APP\n"

#define ASM_OUTPUT_DEF(FILE,LABEL1,LABEL2)				\
 do {									\
	fputc ( '\t', FILE);						\
	assemble_name (FILE, LABEL1);					\
	fputs ( " = ", FILE);						\
	assemble_name (FILE, LABEL2);					\
	fputc ( '\n', FILE);						\
 } while (0)

/* Override default implementation in elfos.h to support -G.  */
#undef  ASM_OUTPUT_ALIGNED_LOCAL
#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN)		\
do {									\
  if ((SIZE) <= (unsigned HOST_WIDE_INT) g_switch_value)		\
    switch_to_section (sbss_section);					\
  else									\
    switch_to_section (bss_section);					\
  ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");			\
  if (!flag_inhibit_size_directive)					\
    ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE);			\
  ASM_OUTPUT_ALIGN ((FILE), exact_log2((ALIGN) / BITS_PER_UNIT));	\
  ASM_OUTPUT_LABEL(FILE, NAME);						\
  ASM_OUTPUT_SKIP((FILE), (SIZE) ? (SIZE) : 1);				\
} while (0)

/* Override default implementation in elfos.h to support -G.  */
#undef  ASM_OUTPUT_ALIGNED_COMMON
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)		\
do 									\
{									\
  if ((SIZE) <= (unsigned HOST_WIDE_INT) g_switch_value)		\
    {									\
      switch_to_section (sbss_section);					\
      (*targetm.asm_out.globalize_label) (FILE, NAME);			\
      ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");			\
      if (!flag_inhibit_size_directive)					\
	ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE);			\
      ASM_OUTPUT_ALIGN ((FILE), exact_log2((ALIGN) / BITS_PER_UNIT));	\
      ASM_OUTPUT_LABEL(FILE, NAME);					\
      ASM_OUTPUT_SKIP((FILE), (SIZE) ? (SIZE) : 1);			\
    }									\
  else									\
    {									\
      switch_to_section (bss_section);					\
      fprintf ((FILE), "%s", COMMON_ASM_OP);				\
      assemble_name ((FILE), (NAME));					\
      fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED",%u\n",          \
               (SIZE), (ALIGN) / BITS_PER_UNIT);	                \
    }									\
}									\
while (0)

#define ASM_OUTPUT_LABEL(FILE, NAME) \
  do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)

#define ASM_OUTPUT_LABELREF(FILE,NAME)	\
  do {					\
    const char *xname = (NAME);		\
    if (xname[0] == '@')		\
      xname += 1;			\
    if (xname[0] == '*')		\
      xname += 1;			\
    fputs (xname, FILE);		\
  } while (0)

#define ASM_OUTPUT_SYMBOL_REF(STREAM, SYMBOL)				\
  do {									\
    assemble_name (STREAM, XSTR (SYMBOL, 0));				\
  } while (0)

#define GLOBAL_ASM_OP "\t.global\t"

#define REGISTER_NAMES                                          \
{                                                               \
 "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",	        \
 "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",        \
 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",        \
 "r24", "r25",  "gp",  "fp",  "sp",  "ra",  "ea",  "ba"}

#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
  (((CHAR) == '&') || ((CHAR) == '@') || ((CHAR) == '*'))

#define PRINT_OPERAND(FILE, X, CODE)                            \
  lm32_print_operand (FILE, X, CODE)

#define PRINT_OPERAND_ADDRESS(FILE, ADDR)                       \
  lm32_print_operand_address (FILE, ADDR)

#ifndef LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX	"."
#endif

#define ASM_OUTPUT_ALIGN(FILE,LOG)                              \
  do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", (1 << (LOG))); } while (0)

#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)                    \
do {                                                            \
  char label[64];                                               \
  ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE);              \
  fprintf (FILE, "\n\t.word\t");                                \
  assemble_name (FILE, label);                                  \
  fprintf (FILE, "\n");                                         \
} while (0)

#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)        \
do {                                                            \
  char label[64];                                               \
  fprintf (FILE, "\t.word\t(");                                 \
  ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE);		\
  assemble_name (FILE, label);                                  \
  fprintf (FILE, "-");                                          \
  ASM_GENERATE_INTERNAL_LABEL (label, "L", REL);                \
  assemble_name (FILE, label);                                  \
  fprintf (FILE, ")\n");                                        \
} while (0)

/*-------------*/
/* Debugging.  */
/*-------------*/

#define DEBUGGER_REGNO(REGNO) (REGNO)

#define DEFAULT_GDB_EXTENSIONS 1

/*--------*/
/* Misc.  */
/*--------*/

#define CASE_VECTOR_MODE Pmode

#define WORD_REGISTER_OPERATIONS 1

#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND

#define SHORT_IMMEDIATES_SIGN_EXTEND 1

#define MOVE_MAX        UNITS_PER_WORD
#define MAX_MOVE_MAX    4

#define SHIFT_COUNT_TRUNCATED 1

#define Pmode SImode

#define FUNCTION_MODE SImode

#define STORE_FLAG_VALUE 1
Commit	Line	Data
aa4945c1 JB	1	/* Definitions of target machine for GNU compiler, Lattice Mico32 architecture.
	2	Contributed by Jon Beniston <jon@beniston.com>
	3
6441eb6d	4	Copyright (C) 2009-2025 Free Software Foundation, Inc.
aa4945c1 JB	5
	6	This file is part of GCC.
	7
	8	GCC is free software; you can redistribute it and/or modify it
	9	under the terms of the GNU General Public License as published
	10	by the Free Software Foundation; either version 3, or (at your
	11	option) any later version.
	12
	13	GCC is distributed in the hope that it will be useful, but WITHOUT
	14	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	15	or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	16	License for more details.
	17
	18	You should have received a copy of the GNU General Public License
	19	along with GCC; see the file COPYING3. If not see
	20	<http://www.gnu.org/licenses/>. */
	21
	22	/-------------------------------/
	23	/* Run-time Target Specification */
	24	/-------------------------------/
	25
aa4945c1 JB	26	/* Target CPU builtins. */
	27	#define TARGET_CPU_CPP_BUILTINS() \
	28	do \
	29	{ \
	30	builtin_define ("__lm32__"); \
	31	builtin_assert ("cpu=lm32"); \
	32	builtin_assert ("machine=lm32"); \
	33	if (TARGET_MULTIPLY_ENABLED) \
	34	builtin_define ("__multiply_enabled__"); \
	35	if (TARGET_DIVIDE_ENABLED) \
	36	builtin_define ("__divide_enabled__"); \
	37	if (TARGET_BARREL_SHIFT_ENABLED) \
	38	builtin_define ("__barrel_shift_enabled__"); \
	39	if (TARGET_SIGN_EXTEND_ENABLED) \
	40	builtin_define ("__sign_extend_enabled__"); \
	41	if (TARGET_USER_ENABLED) \
	42	builtin_define ("__user_enabled__"); \
	43	} \
	44	while (0)
	45
	46	#undef ASM_SPEC
	47	#define ASM_SPEC "\
	48	%{mmultiply-enabled} \
	49	%{mdivide-enabled} \
	50	%{mbarrel-shift-enabled} \
	51	%{msign-extend-enabled} \
45cab1d7	52	%{muser-enabled} \
aa4945c1 JB	53	"
aa4945c1 JB	54
50332a4f	55	/* Let link script define all link options.
aa4945c1 JB	56	Default to using simulator link script. */
	57
	58	#undef STARTFILE_SPEC
	59	#define STARTFILE_SPEC ""
	60	#undef ENDFILE_SPEC
	61	#define ENDFILE_SPEC ""
	62	#undef LIB_SPEC
	63	#define LIB_SPEC "%{!T*:-T sim.ld}"
	64
aa4945c1 JB	65	#undef CC1_SPEC
	66	#define CC1_SPEC "%{G*}"
	67
	68	/---------------------------------/
	69	/* Target machine storage layout. */
	70	/---------------------------------/
	71
	72	#define BITS_BIG_ENDIAN 0
	73	#define BYTES_BIG_ENDIAN 1
	74	#define WORDS_BIG_ENDIAN 1
aa4945c1	75
aa4945c1 JB	76	#define BITS_PER_WORD 32
	77	#define UNITS_PER_WORD 4
	78
	79	#define POINTER_SIZE 32
	80
	81	#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
	82	do { \
	83	if (GET_MODE_CLASS (MODE) == MODE_INT \
	84	&& GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
	85	(MODE) = word_mode; \
	86	} while (0)
	87
	88	#define PARM_BOUNDARY 32
	89
	90	#define STACK_BOUNDARY 32
	91
	92	#define BIGGEST_ALIGNMENT 64
	93
	94	#define FUNCTION_BOUNDARY 32
	95
	96	#define EMPTY_FIELD_BOUNDARY 32
	97
	98	#define STRICT_ALIGNMENT 1
	99
	100	#define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
	101
aa4945c1 JB	102	/* Make arrays and structures word-aligned to allow faster copying etc. */
	103	#define DATA_ALIGNMENT(TYPE, ALIGN) \
	104	((((ALIGN) < BITS_PER_WORD) \
	105	&& (TREE_CODE (TYPE) == ARRAY_TYPE \
	106	\|\| TREE_CODE (TYPE) == UNION_TYPE \
	107	\|\| TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
	108
	109	/* We need this for the same reason as DATA_ALIGNMENT, namely to cause
	110	character arrays to be word-aligned so that `strcpy' calls that copy
	111	constants to character arrays can be done inline, and 'strcmp' can be
	112	optimised to use word loads. */
	113	#define LOCAL_ALIGNMENT(TYPE, ALIGN) \
	114	DATA_ALIGNMENT (TYPE, ALIGN)
	115
	116	/----------------------------------------/
	117	/* Layout of source language data types. */
	118	/----------------------------------------/
	119
	120	#define INT_TYPE_SIZE 32
	121	#define SHORT_TYPE_SIZE 16
	122	#define LONG_TYPE_SIZE 32
	123	#define LONG_LONG_TYPE_SIZE 64
	124
aa4945c1 JB	125	#define DEFAULT_SIGNED_CHAR 0
	126
	127	#define SIZE_TYPE "unsigned int"
	128
	129	#define PTRDIFF_TYPE "int"
	130
	131	/---------------------------/
	132	/* Standard register usage. */
	133	/---------------------------/
	134
	135	#define FIRST_PSEUDO_REGISTER 32
	136
	137	#define RV_REGNUM 1
	138	#define GP_REGNUM 26
	139	#define FP_REGNUM 27
	140	#define SP_REGNUM 28
	141	#define RA_REGNUM 29
	142
	143	#define G_REG_P(X) ((X)<32)
	144
	145	#define FIXED_REGISTERS \
	146	{ 1, 0, 0, 0, 0, 0, 0, 0, \
	147	0, 0, 0, 0, 0, 0, 0, 0, \
	148	0, 0, 0, 0, 0, 0, 0, 0, \
	149	0, 0, 1, 0, 1, 0, 1, 1}
	150
	151	#define CALL_USED_REGISTERS \
	152	{ 1, 1, 1, 1, 1, 1, 1, 1, \
	153	1, 1, 1, 0, 0, 0, 0, 0, \
	154	0, 0, 0, 0, 0, 0, 0, 0, \
	155	0, 0, 1, 0, 1, 0, 1, 1}
	156
aa4945c1 JB	157	#define AVOID_CCMODE_COPIES
	158
	159	/----------------------------------/
	160	/* Register classes and constants. */
	161	/----------------------------------/
	162
	163	enum reg_class
	164	{
50332a4f	165	NO_REGS,
aa4945c1 JB	166	GENERAL_REGS,
	167	ALL_REGS,
	168	LIM_REG_CLASSES
	169	};
	170
	171	#define N_REG_CLASSES (int) LIM_REG_CLASSES
	172
	173	#define REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "ALL_REGS" }
	174
	175	#define REG_CLASS_CONTENTS \
	176	{ {0x00000000}, \
	177	{0xffffffff}, \
	178	{0xffffffff} \
	179	}
	180
	181	#define REGNO_REG_CLASS(REGNO) \
	182	(G_REG_P(REGNO) ? GENERAL_REGS : NO_REGS)
	183
aa4945c1 JB	184	#define INDEX_REG_CLASS NO_REGS
	185
	186	#define BASE_REG_CLASS GENERAL_REGS
	187
	188	#define REGNO_OK_FOR_BASE_P(REGNO) \
	189	(G_REG_P (REGNO) \|\| G_REG_P ((unsigned) reg_renumber[REGNO]))
	190
	191	#define REGNO_OK_FOR_INDEX_P(REGNO) 0
	192
aa4945c1 JB	193	/----------------------------------------/
	194	/* Stack Layout and Calling Conventions. */
	195	/----------------------------------------/
	196
	197	#define STACK_GROWS_DOWNWARD 1
	198
	199	#define FRAME_GROWS_DOWNWARD 1
	200
	201	#define STACK_POINTER_OFFSET (UNITS_PER_WORD)
	202
aa4945c1 JB	203	#define FIRST_PARM_OFFSET(FNDECL) (UNITS_PER_WORD)
	204
	205	#define STACK_POINTER_REGNUM SP_REGNUM
	206
	207	#define FRAME_POINTER_REGNUM FP_REGNUM
	208
	209	#define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
	210
308d39cd SB	211	#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, RA_REGNUM)
308d39cd SB	212
aa4945c1 JB	213	#define RETURN_ADDR_RTX(count, frame) \
	214	lm32_return_addr_rtx (count, frame)
	215
	216	/* FIXME - This is not yet supported. */
	217	#define STATIC_CHAIN_REGNUM 9
	218
	219	#define ELIMINABLE_REGS \
	220	{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
	221	{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
	222	}
	223
	224	#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
	225	(OFFSET) = lm32_compute_initial_elimination_offset (FROM, TO)
	226
	227	/-----------------------------/
	228	/* Function argument passing. */
	229	/-----------------------------/
	230
	231	#define ACCUMULATE_OUTGOING_ARGS 1
	232
aa4945c1 JB	233	/--------------------------------/
	234	/* Passing Arguments in Registers */
	235	/--------------------------------/
	236
	237	/* The first argument register. */
	238	#define LM32_FIRST_ARG_REG 1
	239
	240	/* The number of (integer) argument register available. */
	241	#define LM32_NUM_ARG_REGS 8
	242
aa4945c1 JB	243	#define CUMULATIVE_ARGS int
	244
	245	#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT,N_NAMED_ARGS) \
	246	(CUM) = 0
	247
aa4945c1 JB	248	#define FUNCTION_ARG_REGNO_P(r) \
	249	(((r) >= LM32_FIRST_ARG_REG) && ((r) <= LM32_NUM_ARG_REGS))
	250
	251	/--------------------/
	252	/* Function results. */
	253	/--------------------/
	254
	255	#define FUNCTION_VALUE(VALTYPE, FUNC) \
	256	gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \
	257	&& TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
	258	? word_mode \
	259	: TYPE_MODE (VALTYPE), \
	260	RV_REGNUM)
	261
	262	#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RV_REGNUM)
	263
	264	#define FUNCTION_VALUE_REGNO_P(N) ((N) == RV_REGNUM)
	265
	266	#define RETURN_IN_MEMORY(TYPE) lm32_return_in_memory (TYPE)
	267
	268	#define DEFAULT_PCC_STRUCT_RETURN 0
	269
	270	/* Convert from bytes to ints. */
	271	#define LM32_NUM_INTS(X) (((X) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
	272
	273	/* The number of (integer) registers required to hold a quantity of
	274	type MODE. */
	275	#define LM32_NUM_REGS(MODE) LM32_NUM_INTS (GET_MODE_SIZE (MODE))
	276
	277	/* The number of (integer) registers required to hold a quantity of
	278	TYPE MODE. */
	279	#define LM32_NUM_REGS2(MODE, TYPE) \
	280	LM32_NUM_INTS ((MODE) == BLKmode ? \
	281	int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE))
	282
aa4945c1 JB	283	/---------------------------/
	284	/* Function entry and exit. */
	285	/---------------------------/
	286
	287	/-------------/
	288	/* Profiling. */
	289	/-------------/
	290
	291	#define FUNCTION_PROFILER(FILE, LABELNO)
	292
	293	/---------------/
	294	/* Trampolines. */
	295	/---------------/
	296
	297	#define TRAMPOLINE_SIZE 0
	298
	299	/---------------------/
	300	/* Addressing Modes. */
	301	/---------------------/
	302
	303	#define CONSTANT_ADDRESS_P(X) \
	304	((GET_CODE (X) == LABEL_REF \|\| GET_CODE (X) == SYMBOL_REF \
	305	\|\| GET_CODE (X) == CONST_INT \|\| GET_CODE (X) == HIGH \
	306	\|\| (GET_CODE (X) == CONST)))
	307
	308	#define MAX_REGS_PER_ADDRESS 1
	309
	310	#define STRICT_REG_OK_FOR_BASE_P(X) \
	311	(REGNO_OK_FOR_BASE_P (REGNO (X)))
	312	#define NONSTRICT_REG_OK_FOR_BASE_P(X) \
	313	(G_REG_P (REGNO (X)) \|\| !HARD_REGISTER_NUM_P (REGNO (X)))
	314
	315	#ifdef REG_OK_STRICT
	316	#define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P(X)
	317	#else
	318	#define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P(X)
	319	#endif
	320
aa4945c1 JB	321	/-------------------------/
	322	/* Condition Code Status. */
	323	/-------------------------/
	324
	325	#define REVERSIBLE_CC_MODE(MODE) 1
	326
	327	/---------/
	328	/* Costs. */
	329	/---------/
	330
	331	#define SLOW_BYTE_ACCESS 1
	332
1e8552c2	333	#define NO_FUNCTION_CSE 1
aa4945c1 JB	334
	335	#define BRANCH_COST(speed_p, predictable_p) 4
	336
	337	#define MOVE_RATIO(speed) (speed ? 24 : 3)
	338
	339	/------------/
	340	/* Sections. */
	341	/------------/
	342
	343	#define TEXT_SECTION_ASM_OP "\t.section\t.text"
	344	#define DATA_SECTION_ASM_OP "\t.section\t.data"
	345	#define SDATA_SECTION_ASM_OP "\t.section\t.sdata,\"aw\""
	346	#define BSS_SECTION_ASM_OP "\t.section\t.bss"
	347	#define SBSS_SECTION_ASM_OP "\t.section\t.sbss,\"aw\""
	348
	349	/-------/
	350	/* PIC. */
	351	/-------/
	352
	353	#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? GP_REGNUM : INVALID_REGNUM)
	354
	355	#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
	356
	357	#define LEGITIMATE_PIC_OPERAND_P(X) \
	358	(!(nonpic_symbol_mentioned_p (X)))
	359
	360	/-------------/
	361	/* Assembler. */
	362	/-------------/
	363
	364	#define ASM_COMMENT_START "#"
	365
	366	#define ASM_APP_ON "#APP\n"
	367
	368	#define ASM_APP_OFF "#NO_APP\n"
	369
	370	#define ASM_OUTPUT_DEF(FILE,LABEL1,LABEL2) \
	371	do { \
	372	fputc ( '\t', FILE); \
	373	assemble_name (FILE, LABEL1); \
	374	fputs ( " = ", FILE); \
	375	assemble_name (FILE, LABEL2); \
	376	fputc ( '\n', FILE); \
	377	} while (0)
	378
	379	/* Override default implementation in elfos.h to support -G. */
	380	#undef ASM_OUTPUT_ALIGNED_LOCAL
	381	#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
	382	do { \
fa37ed29	383	if ((SIZE) <= (unsigned HOST_WIDE_INT) g_switch_value) \
aa4945c1 JB	384	switch_to_section (sbss_section); \
	385	else \
	386	switch_to_section (bss_section); \
	387	ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
	388	if (!flag_inhibit_size_directive) \
	389	ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE); \
	390	ASM_OUTPUT_ALIGN ((FILE), exact_log2((ALIGN) / BITS_PER_UNIT)); \
	391	ASM_OUTPUT_LABEL(FILE, NAME); \
	392	ASM_OUTPUT_SKIP((FILE), (SIZE) ? (SIZE) : 1); \
	393	} while (0)
	394
	395	/* Override default implementation in elfos.h to support -G. */
	396	#undef ASM_OUTPUT_ALIGNED_COMMON
	397	#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
	398	do \
	399	{ \
fa37ed29	400	if ((SIZE) <= (unsigned HOST_WIDE_INT) g_switch_value) \
aa4945c1 JB	401	{ \
	402	switch_to_section (sbss_section); \
	403	(*targetm.asm_out.globalize_label) (FILE, NAME); \
	404	ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
	405	if (!flag_inhibit_size_directive) \
	406	ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE); \
	407	ASM_OUTPUT_ALIGN ((FILE), exact_log2((ALIGN) / BITS_PER_UNIT)); \
	408	ASM_OUTPUT_LABEL(FILE, NAME); \
	409	ASM_OUTPUT_SKIP((FILE), (SIZE) ? (SIZE) : 1); \
	410	} \
	411	else \
	412	{ \
	413	switch_to_section (bss_section); \
	414	fprintf ((FILE), "%s", COMMON_ASM_OP); \
	415	assemble_name ((FILE), (NAME)); \
16998094	416	fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
aa4945c1 JB	417	(SIZE), (ALIGN) / BITS_PER_UNIT); \
	418	} \
	419	} \
	420	while (0)
	421
	422	#define ASM_OUTPUT_LABEL(FILE, NAME) \
	423	do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
	424
	425	#define ASM_OUTPUT_LABELREF(FILE,NAME) \
	426	do { \
	427	const char *xname = (NAME); \
	428	if (xname[0] == '@') \
	429	xname += 1; \
	430	if (xname[0] == '*') \
	431	xname += 1; \
	432	fputs (xname, FILE); \
	433	} while (0)
	434
	435	#define ASM_OUTPUT_SYMBOL_REF(STREAM, SYMBOL) \
	436	do { \
	437	assemble_name (STREAM, XSTR (SYMBOL, 0)); \
	438	} while (0)
	439
	440	#define GLOBAL_ASM_OP "\t.global\t"
	441
	442	#define REGISTER_NAMES \
	443	{ \
	444	"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
	445	"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
	446	"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
	447	"r24", "r25", "gp", "fp", "sp", "ra", "ea", "ba"}
	448
	449	#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
	450	(((CHAR) == '&') \|\| ((CHAR) == '@') \|\| ((CHAR) == '*'))
	451
	452	#define PRINT_OPERAND(FILE, X, CODE) \
	453	lm32_print_operand (FILE, X, CODE)
	454
	455	#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
	456	lm32_print_operand_address (FILE, ADDR)
	457
	458	#ifndef LOCAL_LABEL_PREFIX
	459	#define LOCAL_LABEL_PREFIX "."
	460	#endif
	461
	462	#define ASM_OUTPUT_ALIGN(FILE,LOG) \
	463	do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", (1 << (LOG))); } while (0)
	464
	465	#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
	466	do { \
	467	char label[64]; \
	468	ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
	469	fprintf (FILE, "\n\t.word\t"); \
	470	assemble_name (FILE, label); \
	471	fprintf (FILE, "\n"); \
	472	} while (0)
	473
	474	#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
	475	do { \
	476	char label[64]; \
	477	fprintf (FILE, "\t.word\t("); \
	478	ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
	479	assemble_name (FILE, label); \
	480	fprintf (FILE, "-"); \
481	ASM_GENERATE_INTERNAL_LABEL (label, "L", REL); \
482	assemble_name (FILE, label); \
483	fprintf (FILE, ")\n"); \
484	} while (0)
485
486	/-------------/
487	/* Debugging. */
488	/-------------/
489
ca60bd93	490	#define DEBUGGER_REGNO(REGNO) (REGNO)
aa4945c1	491
aa4945c1 JB	492	#define DEFAULT_GDB_EXTENSIONS 1
	493
	494	/--------/
	495	/* Misc. */
	496	/--------/
	497
	498	#define CASE_VECTOR_MODE Pmode
	499
9e11bfef	500	#define WORD_REGISTER_OPERATIONS 1
aa4945c1 JB	501
	502	#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
	503
58f2ae18	504	#define SHORT_IMMEDIATES_SIGN_EXTEND 1
aa4945c1 JB	505
	506	#define MOVE_MAX UNITS_PER_WORD
	507	#define MAX_MOVE_MAX 4
	508
	509	#define SHIFT_COUNT_TRUNCATED 1
	510
aa4945c1 JB	511	#define Pmode SImode
	512
	513	#define FUNCTION_MODE SImode
	514
aa4945c1	515	#define STORE_FLAG_VALUE 1