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38b2d076 | 1 | ;; Machine Descriptions for R8C/M16C/M32C |
2f83c7d6 | 2 | ;; Copyright (C) 2005, 2007 |
38b2d076 DD |
3 | ;; Free Software Foundation, Inc. |
4 | ;; Contributed by Red Hat. | |
5 | ;; | |
6 | ;; This file is part of GCC. | |
7 | ;; | |
8 | ;; GCC is free software; you can redistribute it and/or modify it | |
9 | ;; under the terms of the GNU General Public License as published | |
2f83c7d6 | 10 | ;; by the Free Software Foundation; either version 3, or (at your |
38b2d076 DD |
11 | ;; option) any later version. |
12 | ;; | |
13 | ;; GCC is distributed in the hope that it will be useful, but WITHOUT | |
14 | ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
15 | ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
16 | ;; License for more details. | |
17 | ;; | |
18 | ;; You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
19 | ;; along with GCC; see the file COPYING3. If not see |
20 | ;; <http://www.gnu.org/licenses/>. | |
38b2d076 DD |
21 | |
22 | (define_constants | |
23 | [(R0_REGNO 0) | |
24 | (R2_REGNO 1) | |
25 | (R1_REGNO 2) | |
26 | (R3_REGNO 3) | |
27 | ||
28 | (A0_REGNO 4) | |
29 | (A1_REGNO 5) | |
30 | (SB_REGNO 6) | |
31 | (FB_REGNO 7) | |
32 | ||
33 | (SP_REGNO 8) | |
34 | (PC_REGNO 9) | |
35 | (FLG_REGNO 10) | |
36 | (MEM0_REGNO 12) | |
37 | (MEM7_REGNO 19) | |
38 | ]) | |
39 | ||
40 | (define_constants | |
41 | [(UNS_PROLOGUE_END 1) | |
42 | (UNS_EPILOGUE_START 2) | |
43 | (UNS_EH_EPILOGUE 3) | |
44 | (UNS_PUSHM 4) | |
45 | (UNS_POPM 5) | |
07127a0a DD |
46 | (UNS_SMOVF 6) |
47 | (UNS_SSTR 7) | |
48 | (UNS_SCMPU 8) | |
49 | (UNS_SMOVU 9) | |
38b2d076 DD |
50 | ]) |
51 | ||
07127a0a DD |
52 | ;; n = no change, x = clobbered. The first 16 values are chosen such |
53 | ;; that the enum has one bit set for each flag. | |
54 | (define_attr "flags" "x,c,z,zc,s,sc,sz,szc,o,oc,oz,ozc,os,osc,osz,oszc,n" (const_string "n")) | |
55 | (define_asm_attributes [(set_attr "flags" "x")]) | |
56 | ||
57 | (define_mode_macro QHI [QI HI]) | |
58 | (define_mode_macro HPSI [(HI "TARGET_A16") (PSI "TARGET_A24")]) | |
59 | (define_mode_macro QHPSI [QI HI (PSI "TARGET_A24")]) | |
60 | (define_mode_macro QHSI [QI HI (SI "TARGET_A24")]) | |
61 | (define_mode_attr bwl [(QI "b") (HI "w") (PSI "l") (SI "l")]) | |
62 | ||
63 | (define_code_macro any_cond [eq ne gt ge lt le gtu geu ltu leu]) | |
64 | (define_code_macro eqne_cond [eq ne]) | |
65 | (define_code_macro gl_cond [gt ge lt le gtu geu ltu leu]) | |
66 | ||
67 | ||
68 | ||
38b2d076 DD |
69 | (define_insn "nop" |
70 | [(const_int 0)] | |
71 | "" | |
16659fcf DD |
72 | "nop" |
73 | [(set_attr "flags" "n")] | |
74 | ) | |
38b2d076 | 75 | |
07127a0a DD |
76 | (define_insn "no_insn" |
77 | [(const_int 1)] | |
78 | "" | |
16659fcf DD |
79 | "" |
80 | [(set_attr "flags" "n")] | |
81 | ) |