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1 | ;; Machine Descriptions for R8C/M16C/M32C |
2 | ;; Copyright (C) 2005 | |
3 | ;; Free Software Foundation, Inc. | |
4 | ;; Contributed by Red Hat. | |
5 | ;; | |
6 | ;; This file is part of GCC. | |
7 | ;; | |
8 | ;; GCC is free software; you can redistribute it and/or modify it | |
9 | ;; under the terms of the GNU General Public License as published | |
10 | ;; by the Free Software Foundation; either version 2, or (at your | |
11 | ;; option) any later version. | |
12 | ;; | |
13 | ;; GCC is distributed in the hope that it will be useful, but WITHOUT | |
14 | ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
15 | ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
16 | ;; License for more details. | |
17 | ;; | |
18 | ;; You should have received a copy of the GNU General Public License | |
19 | ;; along with GCC; see the file COPYING. If not, write to the Free | |
20 | ;; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA | |
21 | ;; 02110-1301, USA. | |
22 | ||
23 | ;; Predicates | |
24 | ||
25 | ; TRUE if the operand is a pseudo-register. | |
26 | (define_predicate "m32c_pseudo" | |
27 | (ior (and (match_code "reg") | |
28 | (match_test "REGNO(op) >= FIRST_PSEUDO_REGISTER")) | |
29 | (and (match_code "subreg") | |
30 | (and (match_test "GET_CODE (XEXP (op, 0)) == REG") | |
31 | (match_test "REGNO(XEXP (op,0)) >= FIRST_PSEUDO_REGISTER"))))) | |
32 | ||
33 | ||
34 | ; Returning true causes many predicates to NOT match. We allow | |
35 | ; subregs for type changing, but not for size changing. | |
36 | (define_predicate "m32c_wide_subreg" | |
37 | (and (match_code "subreg") | |
38 | (not (match_operand 0 "m32c_pseudo"))) | |
39 | { | |
40 | unsigned int sizeo = GET_MODE_SIZE (GET_MODE (op)); | |
41 | unsigned int sizei = GET_MODE_SIZE (GET_MODE (XEXP (op, 0))); | |
42 | sizeo = (sizeo + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
43 | sizei = (sizei + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
44 | return sizeo != sizei; | |
45 | }) | |
46 | ||
47 | ; TRUE for r0 through r3, or a pseudo that reload could put in r0 | |
48 | ; through r3 (likewise for the next couple too) | |
49 | (define_predicate "r0123_operand" | |
50 | (ior (match_operand 0 "m32c_pseudo" "") | |
51 | (and (match_code "reg") | |
52 | (match_test "REGNO(op) <= R3_REGNO")))) | |
53 | ||
54 | ; TRUE for r0 | |
55 | (define_predicate "m32c_r0_operand" | |
56 | (ior (match_operand 0 "m32c_pseudo" "") | |
57 | (and (match_code "reg") | |
58 | (match_test "REGNO(op) == R0_REGNO")))) | |
59 | ||
60 | ; TRUE for r1 | |
61 | (define_predicate "m32c_r1_operand" | |
62 | (ior (match_operand 0 "m32c_pseudo" "") | |
63 | (and (match_code "reg") | |
64 | (match_test "REGNO(op) == R1_REGNO")))) | |
65 | ||
66 | ; TRUE for r2 | |
67 | (define_predicate "m32c_r2_operand" | |
68 | (ior (match_operand 0 "m32c_pseudo" "") | |
69 | (and (match_code "reg") | |
70 | (match_test "REGNO(op) == R2_REGNO")))) | |
71 | ||
72 | ; TRUE for any general operand except r2. | |
73 | (define_predicate "m32c_notr2_operand" | |
74 | (and (match_operand 0 "general_operand") | |
75 | (ior (not (match_code "reg")) | |
76 | (match_test "REGNO(op) != R2_REGNO")))) | |
77 | ||
78 | ; TRUE for the stack pointer. | |
79 | (define_predicate "m32c_sp_operand" | |
80 | (ior (match_operand 0 "m32c_pseudo" "") | |
81 | (and (match_code "reg") | |
82 | (match_test "REGNO(op) == SP_REGNO")))) | |
83 | ||
84 | ; TRUE for control registers. | |
85 | (define_predicate "cr_operand" | |
86 | (match_code "reg") | |
87 | "return (REGNO (op) >= SB_REGNO | |
88 | && REGNO (op) <= FLG_REGNO);") | |
89 | ||
90 | ; TRUE for $a0 or $a1. | |
91 | (define_predicate "a_operand" | |
92 | (match_code "reg") | |
93 | "return (REGNO (op) == A0_REGNO | |
94 | || REGNO (op) == A1_REGNO);") | |
95 | ||
96 | ; TRUE for r0 through r3, or a0 or a1. | |
97 | (define_predicate "ra_operand" | |
98 | (and (and (match_operand 0 "register_operand" "") | |
99 | (not (match_operand 1 "cr_operand" ""))) | |
100 | (not (match_operand 2 "m32c_wide_subreg" "")))) | |
101 | ||
102 | ; Likewise, plus TRUE for memory references. | |
103 | (define_predicate "mra_operand" | |
104 | (and (and (match_operand 0 "nonimmediate_operand" "") | |
105 | (not (match_operand 1 "cr_operand" ""))) | |
106 | (not (match_operand 2 "m32c_wide_subreg" "")))) | |
107 | ||
108 | ; Likewise, plus TRUE for subregs. | |
109 | (define_predicate "mras_operand" | |
110 | (and (match_operand 0 "nonimmediate_operand" "") | |
111 | (not (match_operand 1 "cr_operand" "")))) | |
112 | ||
113 | ; TRUE for memory, r0..r3, a0..a1, or immediates. | |
114 | (define_predicate "mrai_operand" | |
115 | (and (and (match_operand 0 "general_operand" "") | |
116 | (not (match_operand 1 "cr_operand" ""))) | |
117 | (not (match_operand 2 "m32c_wide_subreg" "")))) | |
118 | ||
119 | ; Likewise, plus true for subregs. | |
120 | (define_predicate "mrasi_operand" | |
121 | (and (match_operand 0 "general_operand" "") | |
122 | (not (match_operand 1 "cr_operand" "")))) | |
123 | ||
124 | ; TRUE for r0..r3 or memory. | |
125 | (define_predicate "mr_operand" | |
126 | (and (match_operand 0 "mra_operand" "") | |
127 | (not (match_operand 1 "a_operand" "")))) | |
128 | ||
129 | ; TRUE for r1h. This complicated since r1h isn't a register GCC | |
130 | ; normally knows about. | |
131 | (define_predicate "r1h_operand" | |
132 | (match_code "zero_extract") | |
133 | { | |
134 | rtx reg = XEXP (op, 0); | |
135 | rtx size = XEXP (op, 1); | |
136 | rtx pos = XEXP (op, 2); | |
137 | return (GET_CODE (reg) == REG | |
138 | && REGNO (reg) == R1_REGNO | |
139 | && GET_CODE (size) == CONST_INT | |
140 | && INTVAL (size) == 8 | |
141 | && GET_CODE (pos) == CONST_INT | |
142 | && INTVAL (pos) == 8); | |
143 | }) | |
144 | ||
145 | ; TRUE if we can shift by this amount. Constant shift counts have a | |
146 | ; limited range. | |
147 | (define_predicate "shiftcount_operand" | |
148 | (ior (match_operand 0 "m32c_pseudo" "") | |
149 | (and (match_operand 2 "const_int_operand" "") | |
150 | (match_test "-8 <= INTVAL (op) && INTVAL (op) && INTVAL (op) <= 8")))) | |
151 | ||
152 | ; TRUE for r0..r3, a0..a1, or sp. | |
153 | (define_predicate "mra_or_sp_operand" | |
154 | (and (ior (match_operand 0 "mra_operand") | |
155 | (match_operand 1 "m32c_sp_operand")) | |
156 | (not (match_operand 2 "m32c_wide_subreg" "")))) | |
157 | ||
158 | ||
159 | ; TRUE for r2 or r3. | |
160 | (define_predicate "m32c_r2r3_operand" | |
161 | (ior (and (match_code "reg") | |
162 | (ior (match_test "REGNO(op) == R2_REGNO") | |
163 | (match_test "REGNO(op) == R3_REGNO"))) | |
164 | (and (match_code "subreg") | |
165 | (match_test "GET_CODE (XEXP (op, 0)) == REG && (REGNO (XEXP (op, 0)) == R2_REGNO || REGNO (XEXP (op, 0)) == R3_REGNO)")))) | |
166 | ||
167 | ; Likewise, plus TRUE for a0..a1. | |
168 | (define_predicate "m32c_r2r3a_operand" | |
169 | (ior (match_operand 0 "m32c_r2r3_operand" "") | |
170 | (match_operand 0 "a_operand" ""))) | |
171 | ||
172 | ; These two are only for movqi - no subreg limit | |
173 | (define_predicate "mra_qi_operand" | |
174 | (and (and (match_operand 0 "nonimmediate_operand" "") | |
175 | (not (match_operand 1 "cr_operand" ""))) | |
176 | (not (match_operand 1 "m32c_r2r3a_operand" "")))) | |
177 | ||
178 | (define_predicate "mrai_qi_operand" | |
179 | (and (and (match_operand 0 "general_operand" "") | |
180 | (not (match_operand 1 "cr_operand" ""))) | |
181 | (not (match_operand 1 "m32c_r2r3a_operand" "")))) | |
182 | ||
183 | ; TRUE for comparisons we support. | |
184 | (define_predicate "m32c_cmp_operator" | |
185 | (match_code "eq,ne,gt,gtu,lt,ltu,ge,geu,le,leu")) | |
186 | ||
187 | ; TRUE for mem0 | |
188 | (define_predicate "m32c_mem0_operand" | |
189 | (ior (match_operand 0 "m32c_pseudo" "") | |
190 | (and (match_code "reg") | |
191 | (match_test "REGNO(op) == MEM0_REGNO")))) | |
192 | ||
193 | ; TRUE for things the call patterns can return. | |
194 | (define_predicate "m32c_return_operand" | |
195 | (ior (match_operand 0 "m32c_r0_operand") | |
196 | (ior (match_operand 0 "m32c_mem0_operand") | |
197 | (match_code "parallel")))) | |
12ea2512 DD |
198 | |
199 | ; TRUE for constants we can multiply pointers by | |
200 | (define_predicate "m32c_psi_scale" | |
201 | (and (match_operand 0 "const_int_operand") | |
202 | (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"Ilb\")"))) |