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[thirdparty/gcc.git] / gcc / config / mips / 5000.md
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f10107a1 1;; VR5000 pipeline description.
9db9ab7e 2;; Copyright (C) 2004, 2005 Free Software Foundation, Inc.
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3;;
4;; This file is part of GCC.
5
6;; GCC is free software; you can redistribute it and/or modify it
7;; under the terms of the GNU General Public License as published
8;; by the Free Software Foundation; either version 2, or (at your
9;; option) any later version.
10
11;; GCC is distributed in the hope that it will be useful, but WITHOUT
12;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14;; License for more details.
15
16;; You should have received a copy of the GNU General Public License
17;; along with GCC; see the file COPYING. If not, write to the
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18;; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
19;; MA 02110-1301, USA.
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20
21
22;; This file overrides parts of generic.md. It is derived from the
23;; old define_function_unit description.
24
25(define_insn_reservation "r5k_load" 2
26 (and (eq_attr "cpu" "r5000")
00f9e1ca 27 (eq_attr "type" "load,fpload,fpidxload,mfc,mtc"))
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28 "alu")
29
30(define_insn_reservation "r5k_imul_si" 5
31 (and (eq_attr "cpu" "r5000")
95177e17 32 (and (eq_attr "type" "imul,imul3,imadd")
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33 (eq_attr "mode" "SI")))
34 "imuldiv*5")
35
36(define_insn_reservation "r5k_imul_di" 9
37 (and (eq_attr "cpu" "r5000")
95177e17 38 (and (eq_attr "type" "imul,imul3,imadd")
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39 (eq_attr "mode" "DI")))
40 "imuldiv*9")
41
42(define_insn_reservation "r5k_idiv_si" 36
43 (and (eq_attr "cpu" "r5000")
44 (and (eq_attr "type" "idiv")
45 (eq_attr "mode" "SI")))
46 "imuldiv*36")
47
48(define_insn_reservation "r5k_idiv_di" 68
49 (and (eq_attr "cpu" "r5000")
50 (and (eq_attr "type" "idiv")
51 (eq_attr "mode" "DI")))
52 "imuldiv*68")
53
54(define_insn_reservation "r5k_fmove" 1
55 (and (eq_attr "cpu" "r5000")
56 (eq_attr "type" "fcmp,fabs,fneg,fmove"))
57 "alu")
58
59(define_insn_reservation "r5k_fmul_single" 4
60 (and (eq_attr "cpu" "r5000")
61 (and (eq_attr "type" "fmul,fmadd")
62 (eq_attr "mode" "SF")))
63 "alu")
64
65(define_insn_reservation "r5k_fmul_double" 5
66 (and (eq_attr "cpu" "r5000")
67 (and (eq_attr "type" "fmul,fmadd")
68 (eq_attr "mode" "DF")))
69 "alu")
70
71(define_insn_reservation "r5k_fdiv_single" 21
72 (and (eq_attr "cpu" "r5000")
9ff6992e 73 (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt")
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74 (eq_attr "mode" "SF")))
75 "alu")
76
77(define_insn_reservation "r5k_fsqrt_double" 36
78 (and (eq_attr "cpu" "r5000")
79 (and (eq_attr "type" "fsqrt,frsqrt")
80 (eq_attr "mode" "DF")))
81 "alu")