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5fe25f47 | 1 | ;; DFA-based pipeline description for the RM7000. |
b862b3b3 | 2 | ;; Copyright (C) 2003, 2004 Free Software Foundation, Inc. |
5fe25f47 SC |
3 | ;; |
4 | ;; This file is part of GCC. | |
5 | ||
6 | ;; GCC is free software; you can redistribute it and/or modify it | |
7 | ;; under the terms of the GNU General Public License as published | |
8 | ;; by the Free Software Foundation; either version 2, or (at your | |
9 | ;; option) any later version. | |
10 | ||
11 | ;; GCC is distributed in the hope that it will be useful, but WITHOUT | |
12 | ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
13 | ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
14 | ;; License for more details. | |
15 | ||
16 | ;; You should have received a copy of the GNU General Public License | |
17 | ;; along with GCC; see the file COPYING. If not, write to the | |
18 | ;; Free Software Foundation, 59 Temple Place - Suite 330, Boston, | |
19 | ;; MA 02111-1307, USA. | |
20 | ||
21 | ;; ......................... | |
22 | ;; | |
23 | ;; The RM7000 is a dual-issue processor that can bundle instructions as: | |
24 | ;; {arith|load|store}{arith|imul|idiv|branch|float} | |
25 | ;; | |
26 | ;; Reference: | |
27 | ;; "RM7000 Family User Manual, PMC-2002296" | |
28 | ;; | |
29 | ;; ......................... | |
30 | ||
31 | ;; Use three automata to isolate long latency operations, reducing space. | |
32 | (define_automaton "rm7000_other, rm7000_fdiv, rm7000_idiv") | |
33 | ||
34 | ;; | |
35 | ;; Describe the resources. | |
36 | ;; | |
37 | ||
38 | ;; Global | |
39 | (define_cpu_unit "rm7_iss0,rm7_iss1" "rm7000_other") | |
40 | ||
41 | ;; Integer execution unit (M-Pipe). | |
42 | (define_cpu_unit "ixum_addsub_agen" "rm7000_other") | |
43 | ||
44 | ;; Integer execution unit (F-Pipe). | |
45 | (define_cpu_unit "ixuf_addsub" "rm7000_other") | |
46 | (define_cpu_unit "ixuf_branch" "rm7000_other") | |
47 | (define_cpu_unit "ixuf_mpydiv" "rm7000_other") | |
48 | (define_cpu_unit "ixuf_mpydiv_iter" "rm7000_idiv") | |
49 | ;; Floating-point unit (F-Pipe). | |
50 | (define_cpu_unit "fxuf_add" "rm7000_other") | |
51 | (define_cpu_unit "fxuf_mpy" "rm7000_other") | |
52 | (define_cpu_unit "fxuf_mpy_iter" "rm7000_fdiv") | |
53 | (define_cpu_unit "fxuf_divsqrt" "rm7000_other") | |
54 | (define_cpu_unit "fxuf_divsqrt_iter" "rm7000_fdiv") | |
55 | ||
56 | (exclusion_set "ixuf_addsub" | |
57 | "ixuf_branch,ixuf_mpydiv,fxuf_add,fxuf_mpy,fxuf_divsqrt") | |
58 | (exclusion_set "ixuf_branch" "ixuf_mpydiv,fxuf_add,fxuf_mpy,fxuf_divsqrt") | |
59 | (exclusion_set "ixuf_mpydiv" "fxuf_add,fxuf_mpy,fxuf_divsqrt") | |
60 | (exclusion_set "fxuf_add" "fxuf_mpy,fxuf_divsqrt") | |
61 | (exclusion_set "fxuf_mpy" "fxuf_divsqrt") | |
62 | ||
63 | ;; After branch any insn can not be issued. | |
64 | (absence_set "rm7_iss0,rm7_iss1" "ixuf_branch") | |
65 | ||
66 | ;; | |
67 | ;; Define reservations for unit name mnemonics or combinations. | |
68 | ;; | |
69 | ||
70 | (define_reservation "rm7_iss" "rm7_iss0|rm7_iss1") | |
71 | (define_reservation "rm7_single_dispatch" "rm7_iss0+rm7_iss1") | |
72 | ||
73 | (define_reservation "rm7_iaddsub" "rm7_iss+(ixum_addsub_agen|ixuf_addsub)") | |
74 | (define_reservation "rm7_imem" "rm7_iss+ixum_addsub_agen") | |
75 | (define_reservation "rm7_impydiv" "rm7_iss+ixuf_mpydiv") | |
76 | (define_reservation "rm7_impydiv_iter" "ixuf_mpydiv_iter") | |
77 | (define_reservation "rm7_branch" "rm7_iss+ixuf_branch") | |
78 | ||
79 | (define_reservation "rm7_fpadd" "rm7_iss+fxuf_add") | |
80 | (define_reservation "rm7_fpmpy" "rm7_iss+fxuf_mpy") | |
81 | (define_reservation "rm7_fpmpy_iter" "fxuf_mpy_iter") | |
82 | (define_reservation "rm7_fpdivsqr" "rm7_iss+fxuf_divsqrt") | |
83 | (define_reservation "rm7_fpdivsqr_iter" "fxuf_divsqrt_iter") | |
84 | ||
85 | ;; | |
86 | ;; Describe instruction reservations for integer operations. | |
87 | ;; | |
88 | ||
89 | (define_insn_reservation "rm7_int_other" 1 | |
90 | (and (eq_attr "cpu" "r7000") | |
c3840092 | 91 | (eq_attr "type" "arith,shift,slt,clz,const,condmove,nop,trap")) |
5fe25f47 SC |
92 | "rm7_iaddsub") |
93 | ||
94 | (define_insn_reservation "rm7_ld" 2 (and (eq_attr "cpu" "r7000") | |
1a478672 | 95 | (eq_attr "type" "load,fpload,fpidxload")) |
5fe25f47 SC |
96 | "rm7_imem") |
97 | ||
98 | (define_insn_reservation "rm7_st" 1 (and (eq_attr "cpu" "r7000") | |
1a478672 | 99 | (eq_attr "type" "store,fpstore,fpidxstore")) |
5fe25f47 SC |
100 | "rm7_imem") |
101 | ||
102 | (define_insn_reservation "rm7_idiv_si" 36 (and (eq_attr "cpu" "r7000") | |
103 | (and (eq_attr "type" "idiv") | |
104 | (eq_attr "mode" "SI"))) | |
105 | "rm7_impydiv+(rm7_impydiv_iter*36)") | |
106 | ||
107 | (define_insn_reservation "rm7_idiv_di" 68 (and (eq_attr "cpu" "r7000") | |
108 | (and (eq_attr "type" "idiv") | |
109 | (eq_attr "mode" "DI"))) | |
110 | "rm7_impydiv+(rm7_impydiv_iter*68)") | |
111 | ||
112 | (define_insn_reservation "rm7_impy_si_mult" 5 | |
113 | (and (eq_attr "cpu" "r7000") | |
114 | (and (eq_attr "type" "imul,imadd") | |
115 | (and (eq_attr "mode" "SI") | |
62d45923 | 116 | (match_operand 0 "hilo_operand")))) |
5fe25f47 SC |
117 | "rm7_impydiv+(rm7_impydiv_iter*3)") |
118 | ||
119 | ;; There are an additional 2 stall cycles. | |
120 | (define_insn_reservation "rm7_impy_si_mul" 2 | |
121 | (and (eq_attr "cpu" "r7000") | |
122 | (and (eq_attr "type" "imul,imadd") | |
123 | (and (eq_attr "mode" "SI") | |
62d45923 | 124 | (not (match_operand 0 "hilo_operand"))))) |
5fe25f47 SC |
125 | "rm7_impydiv") |
126 | ||
127 | (define_insn_reservation "rm7_impy_di" 9 (and (eq_attr "cpu" "r7000") | |
128 | (and (eq_attr "type" "imul") | |
129 | (eq_attr "mode" "DI"))) | |
130 | "rm7_impydiv+(rm7_impydiv_iter*8)") | |
131 | ||
132 | ;; Move to/from HI/LO. | |
133 | (define_insn_reservation "rm7_mthilo" 3 | |
134 | (and (eq_attr "cpu" "r7000") | |
c3840092 | 135 | (eq_attr "type" "mthilo")) |
5fe25f47 SC |
136 | "rm7_impydiv") |
137 | ||
138 | (define_insn_reservation "rm7_mfhilo" 1 | |
139 | (and (eq_attr "cpu" "r7000") | |
c3840092 | 140 | (eq_attr "type" "mfhilo")) |
5fe25f47 SC |
141 | "rm7_impydiv") |
142 | ||
143 | ;; Move to/from fp coprocessor. | |
144 | (define_insn_reservation "rm7_ixfer" 2 (and (eq_attr "cpu" "r7000") | |
145 | (eq_attr "type" "xfer")) | |
146 | "rm7_iaddsub") | |
147 | ||
148 | (define_insn_reservation "rm7_ibr" 3 (and (eq_attr "cpu" "r7000") | |
149 | (eq_attr "type" "branch,jump,call")) | |
150 | "rm7_branch") | |
151 | ||
152 | ;; | |
153 | ;; Describe instruction reservations for the floating-point operations. | |
154 | ;; | |
155 | (define_insn_reservation "rm7_fp_quick" 4 | |
156 | (and (eq_attr "cpu" "r7000") | |
c3840092 | 157 | (eq_attr "type" "fneg,fcmp,fabs,fmove")) |
5fe25f47 SC |
158 | "rm7_fpadd") |
159 | ||
160 | (define_insn_reservation "rm7_fp_other" 4 | |
161 | (and (eq_attr "cpu" "r7000") | |
162 | (eq_attr "type" "fadd")) | |
163 | "rm7_fpadd") | |
164 | ||
165 | (define_insn_reservation "rm7_fp_cvt" 4 | |
166 | (and (eq_attr "cpu" "r7000") | |
167 | (eq_attr "type" "fcvt")) | |
168 | "rm7_fpadd") | |
169 | ||
170 | (define_insn_reservation "rm7_fp_divsqrt_df" 36 | |
171 | (and (eq_attr "cpu" "r7000") | |
172 | (and (eq_attr "type" "fdiv,fsqrt") | |
173 | (eq_attr "mode" "DF"))) | |
174 | "rm7_fpdivsqr+(rm7_fpdivsqr_iter*36)") | |
175 | ||
176 | (define_insn_reservation "rm7_fp_divsqrt_sf" 21 | |
177 | (and (eq_attr "cpu" "r7000") | |
178 | (and (eq_attr "type" "fdiv,fsqrt") | |
179 | (eq_attr "mode" "SF"))) | |
180 | "rm7_fpdivsqr+(rm7_fpdivsqr_iter*21)") | |
181 | ||
182 | (define_insn_reservation "rm7_fp_rsqrt_df" 68 | |
183 | (and (eq_attr "cpu" "r7000") | |
184 | (and (eq_attr "type" "frsqrt") | |
185 | (eq_attr "mode" "DF"))) | |
186 | "rm7_fpdivsqr+(rm7_fpdivsqr_iter*68)") | |
187 | ||
188 | (define_insn_reservation "rm7_fp_rsqrt_sf" 38 | |
189 | (and (eq_attr "cpu" "r7000") | |
190 | (and (eq_attr "type" "frsqrt") | |
191 | (eq_attr "mode" "SF"))) | |
192 | "rm7_fpdivsqr+(rm7_fpdivsqr_iter*38)") | |
193 | ||
194 | (define_insn_reservation "rm7_fp_mpy_sf" 4 | |
195 | (and (eq_attr "cpu" "r7000") | |
196 | (and (eq_attr "type" "fmul,fmadd") | |
197 | (eq_attr "mode" "SF"))) | |
198 | "rm7_fpmpy+rm7_fpmpy_iter") | |
199 | ||
200 | (define_insn_reservation "rm7_fp_mpy_df" 5 | |
201 | (and (eq_attr "cpu" "r7000") | |
202 | (and (eq_attr "type" "fmul,fmadd") | |
203 | (eq_attr "mode" "DF"))) | |
204 | "rm7_fpmpy+(rm7_fpmpy_iter*2)") | |
205 | ||
206 | ;; Force single-dispatch for unknown or multi. | |
207 | (define_insn_reservation "rm7_unknown" 1 (and (eq_attr "cpu" "r7000") | |
208 | (eq_attr "type" "unknown,multi")) | |
209 | "rm7_single_dispatch") |