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587d2e9a | 1 | ;; DFA-based pipeline description for the RM9000. |
f1717362 | 2 | ;; Copyright (C) 2003-2016 Free Software Foundation, Inc. |
587d2e9a | 3 | ;; |
4 | ;; This file is part of GCC. | |
5 | ||
6 | ;; GCC is free software; you can redistribute it and/or modify it | |
7 | ;; under the terms of the GNU General Public License as published | |
038d1e19 | 8 | ;; by the Free Software Foundation; either version 3, or (at your |
587d2e9a | 9 | ;; option) any later version. |
10 | ||
11 | ;; GCC is distributed in the hope that it will be useful, but WITHOUT | |
12 | ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
13 | ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
14 | ;; License for more details. | |
15 | ||
16 | ;; You should have received a copy of the GNU General Public License | |
038d1e19 | 17 | ;; along with GCC; see the file COPYING3. If not see |
18 | ;; <http://www.gnu.org/licenses/>. | |
587d2e9a | 19 | |
20 | (define_automaton "rm9k_main, rm9k_imul, rm9k_fdiv") | |
21 | ||
22 | ;; These units are for insns that can issue in either pipe. We don't | |
23 | ;; want to use constructs like "rm9k_m | rm9k_f_int" since that would | |
24 | ;; needlessly make an insn prefer the M pipe. | |
25 | (define_cpu_unit "rm9k_any1" "rm9k_main") | |
26 | (define_cpu_unit "rm9k_any2" "rm9k_main") | |
27 | ||
28 | ;; F and M pipe units, for instructions that must be issued by a | |
29 | ;; particular pipe. Split the F pipe into two units so that integer | |
30 | ;; instructions can issue while the FPU is busy. We don't need to | |
31 | ;; split M because it is only ever reserved for a single cycle. | |
32 | (define_cpu_unit "rm9k_m" "rm9k_main") | |
33 | (define_cpu_unit "rm9k_f_int" "rm9k_main") | |
34 | (define_cpu_unit "rm9k_f_float" "rm9k_main") | |
35 | ||
36 | (exclusion_set "rm9k_f_int" "rm9k_f_float") | |
37 | ||
38 | ;; Multiply/divide units. | |
39 | (define_cpu_unit "rm9k_imul" "rm9k_imul") | |
40 | (define_cpu_unit "rm9k_fdiv" "rm9k_fdiv") | |
41 | ||
42 | (define_insn_reservation "rm9k_load" 3 | |
43 | (and (eq_attr "cpu" "r9000") | |
e9e582c8 | 44 | (eq_attr "type" "load,fpload,fpidxload")) |
587d2e9a | 45 | "rm9k_m") |
46 | ||
47 | (define_insn_reservation "rm9k_store" 1 | |
48 | (and (eq_attr "cpu" "r9000") | |
e9e582c8 | 49 | (eq_attr "type" "store,fpstore,fpidxstore")) |
587d2e9a | 50 | "rm9k_m") |
51 | ||
52 | (define_insn_reservation "rm9k_int" 1 | |
53 | (and (eq_attr "cpu" "r9000") | |
e91288e0 | 54 | (eq_attr "type" "arith,shift,signext,slt,clz,const,logical,move,nop,trap")) |
587d2e9a | 55 | "rm9k_any1 | rm9k_any2") |
56 | ||
57 | (define_insn_reservation "rm9k_int_cmove" 2 | |
58 | (and (eq_attr "cpu" "r9000") | |
59 | (and (eq_attr "type" "condmove") | |
60 | (eq_attr "mode" "SI,DI"))) | |
61 | "rm9k_any1 | rm9k_any2") | |
62 | ||
63 | ;; This applies to both 'mul' and 'mult'. | |
64 | (define_insn_reservation "rm9k_mulsi" 3 | |
65 | (and (eq_attr "cpu" "r9000") | |
9e3acd0d | 66 | (and (eq_attr "type" "imul,imul3,imadd") |
587d2e9a | 67 | (eq_attr "mode" "!DI"))) |
68 | "rm9k_f_int") | |
69 | ||
70 | (define_insn_reservation "rm9k_muldi" 7 | |
71 | (and (eq_attr "cpu" "r9000") | |
9e3acd0d | 72 | (and (eq_attr "type" "imul,imul3,imadd") |
587d2e9a | 73 | (eq_attr "mode" "DI"))) |
74 | "rm9k_f_int + rm9k_imul * 7") | |
75 | ||
76 | (define_insn_reservation "rm9k_divsi" 38 | |
77 | (and (eq_attr "cpu" "r9000") | |
78 | (and (eq_attr "type" "idiv") | |
79 | (eq_attr "mode" "!DI"))) | |
80 | "rm9k_f_int + rm9k_imul * 38") | |
81 | ||
82 | (define_insn_reservation "rm9k_divdi" 70 | |
83 | (and (eq_attr "cpu" "r9000") | |
84 | (and (eq_attr "type" "idiv") | |
85 | (eq_attr "mode" "DI"))) | |
86 | "rm9k_f_int + rm9k_imul * 70") | |
87 | ||
88 | (define_insn_reservation "rm9k_mfhilo" 1 | |
89 | (and (eq_attr "cpu" "r9000") | |
8ad8575f | 90 | (eq_attr "type" "mfhi,mflo")) |
587d2e9a | 91 | "rm9k_f_int") |
92 | ||
93 | (define_insn_reservation "rm9k_mthilo" 5 | |
94 | (and (eq_attr "cpu" "r9000") | |
8ad8575f | 95 | (eq_attr "type" "mthi,mtlo")) |
587d2e9a | 96 | "rm9k_f_int") |
97 | ||
98 | (define_insn_reservation "rm9k_xfer" 2 | |
99 | (and (eq_attr "cpu" "r9000") | |
f01296c3 | 100 | (eq_attr "type" "mfc,mtc")) |
587d2e9a | 101 | "rm9k_m") |
102 | ||
103 | (define_insn_reservation "rm9k_fquick" 2 | |
104 | (and (eq_attr "cpu" "r9000") | |
b5039c24 | 105 | (eq_attr "type" "fabs,fneg,fcmp,fmove")) |
587d2e9a | 106 | "rm9k_f_float") |
107 | ||
108 | (define_insn_reservation "rm9k_fcmove" 2 | |
109 | (and (eq_attr "cpu" "r9000") | |
110 | (and (eq_attr "type" "condmove") | |
111 | (eq_attr "mode" "SF,DF"))) | |
112 | "rm9k_m") | |
113 | ||
114 | (define_insn_reservation "rm9k_fadd" 6 | |
115 | (and (eq_attr "cpu" "r9000") | |
116 | (eq_attr "type" "fadd,fcvt")) | |
117 | "rm9k_f_float") | |
118 | ||
119 | (define_insn_reservation "rm9k_fmuls" 6 | |
120 | (and (eq_attr "cpu" "r9000") | |
121 | (and (eq_attr "type" "fmul,fmadd") | |
122 | (eq_attr "mode" "SF"))) | |
123 | "rm9k_f_float") | |
124 | ||
125 | (define_insn_reservation "rm9k_fmuld" 9 | |
126 | (and (eq_attr "cpu" "r9000") | |
127 | (and (eq_attr "type" "fmul,fmadd") | |
128 | (eq_attr "mode" "DF"))) | |
129 | "rm9k_f_float * 3") | |
130 | ||
131 | (define_insn_reservation "rm9k_fdivs" 22 | |
132 | (and (eq_attr "cpu" "r9000") | |
20b43878 | 133 | (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt") |
587d2e9a | 134 | (eq_attr "mode" "SF"))) |
135 | "rm9k_f_float + rm9k_fdiv * 22") | |
136 | ||
137 | (define_insn_reservation "rm9k_fdivd" 37 | |
138 | (and (eq_attr "cpu" "r9000") | |
20b43878 | 139 | (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt") |
587d2e9a | 140 | (eq_attr "mode" "DF"))) |
141 | "rm9k_f_float + rm9k_fdiv * 37") | |
142 | ||
143 | (define_insn_reservation "rm9k_branch" 2 | |
144 | (and (eq_attr "cpu" "r9000") | |
145 | (eq_attr "type" "branch,jump,call")) | |
146 | "rm9k_any1 | rm9k_any2") | |
147 | ||
148 | (define_insn_reservation "rm9k_unknown" 1 | |
149 | (and (eq_attr "cpu" "r9000") | |
408ae786 | 150 | (eq_attr "type" "unknown,multi,atomic,syncloop")) |
587d2e9a | 151 | "rm9k_m + rm9k_f_int + rm9k_any1 + rm9k_any2") |