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94134f42 | 1 | /* MIPS extra machine modes. |
99dee823 | 2 | Copyright (C) 2003-2021 Free Software Foundation, Inc. |
94134f42 ZW |
3 | |
4 | This file is part of GCC. | |
5 | ||
6 | GCC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
2f83c7d6 | 8 | the Free Software Foundation; either version 3, or (at your option) |
94134f42 ZW |
9 | any later version. |
10 | ||
11 | GCC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
94134f42 | 19 | |
ff3f3951 | 20 | FLOAT_MODE (TF, 16, ieee_quad_format); |
06a4ab70 CF |
21 | |
22 | /* Vector modes. */ | |
7dab511c RH |
23 | VECTOR_MODES (INT, 4); /* V4QI V2HI */ |
24 | VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */ | |
25 | VECTOR_MODES (FLOAT, 8); /* V4HF V2SF */ | |
26 | ||
6cf538da RS |
27 | /* For MIPS MSA 128 bits. */ |
28 | VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI */ | |
29 | VECTOR_MODES (FLOAT, 16); /* V4SF V2DF */ | |
30 | ||
7dab511c | 31 | /* Double-sized vector modes for vec_concat. */ |
6cf538da RS |
32 | VECTOR_MODE (INT, QI, 32); /* V32QI */ |
33 | VECTOR_MODE (INT, HI, 16); /* V16HI */ | |
34 | VECTOR_MODE (INT, SI, 8); /* V8SI */ | |
35 | VECTOR_MODE (INT, DI, 4); /* V4DI */ | |
36 | VECTOR_MODE (FLOAT, SF, 8); /* V8SF */ | |
37 | VECTOR_MODE (FLOAT, DF, 4); /* V4DF */ | |
06a4ab70 | 38 | |
9fc777ad CF |
39 | VECTOR_MODES (FRACT, 4); /* V4QQ V2HQ */ |
40 | VECTOR_MODES (UFRACT, 4); /* V4UQQ V2UHQ */ | |
41 | VECTOR_MODES (ACCUM, 4); /* V2HA */ | |
42 | VECTOR_MODES (UACCUM, 4); /* V2UHA */ | |
43 | ||
06a4ab70 CF |
44 | /* Paired single comparison instructions use 2 or 4 CC. */ |
45 | CC_MODE (CCV2); | |
46 | ADJUST_BYTESIZE (CCV2, 8); | |
47 | ADJUST_ALIGNMENT (CCV2, 8); | |
48 | ||
49 | CC_MODE (CCV4); | |
50 | ADJUST_BYTESIZE (CCV4, 16); | |
51 | ADJUST_ALIGNMENT (CCV4, 16); | |
118ea793 CF |
52 | |
53 | /* For MIPS DSP control registers. */ | |
54 | CC_MODE (CCDSP); | |
82f84ecb MF |
55 | |
56 | /* For floating point conditions in FP registers. */ | |
57 | CC_MODE (CCF); |