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bd9f1972 | 1 | /* Prototypes of target machine for GNU compiler. MIPS version. |
214be03f | 2 | Copyright (C) 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, |
df770e04 | 3 | 1999, 2001, 2002, 2003, 2004, 2005, 2007 Free Software Foundation, Inc. |
bd9f1972 KG |
4 | Contributed by A. Lichnewsky (lich@inria.inria.fr). |
5 | Changed by Michael Meissner (meissner@osf.org). | |
85f65093 | 6 | 64-bit r4000 support by Ian Lance Taylor (ian@cygnus.com) and |
bd9f1972 KG |
7 | Brendan Eich (brendan@microunity.com). |
8 | ||
7ec022b2 | 9 | This file is part of GCC. |
bd9f1972 | 10 | |
7ec022b2 | 11 | GCC is free software; you can redistribute it and/or modify |
bd9f1972 | 12 | it under the terms of the GNU General Public License as published by |
2f83c7d6 | 13 | the Free Software Foundation; either version 3, or (at your option) |
bd9f1972 KG |
14 | any later version. |
15 | ||
7ec022b2 | 16 | GCC is distributed in the hope that it will be useful, |
bd9f1972 KG |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
22 | along with GCC; see the file COPYING3. If not see |
23 | <http://www.gnu.org/licenses/>. */ | |
bd9f1972 | 24 | |
88657302 RH |
25 | #ifndef GCC_MIPS_PROTOS_H |
26 | #define GCC_MIPS_PROTOS_H | |
bd9f1972 | 27 | |
e245bd81 RS |
28 | /* Classifies a SYMBOL_REF, LABEL_REF or UNSPEC address. |
29 | ||
30 | SYMBOL_GENERAL | |
31 | Used when none of the below apply. | |
32 | ||
33 | SYMBOL_SMALL_DATA | |
34 | The symbol refers to something in a small data section. | |
35 | ||
36 | SYMBOL_CONSTANT_POOL | |
37 | The symbol refers to something in the mips16 constant pool. | |
38 | ||
08e7ceb3 RS |
39 | SYMBOL_GOT_PAGE_OFST |
40 | The symbol's value will be calculated by loading an address | |
41 | from the GOT and then applying a 16-bit offset. | |
e245bd81 | 42 | |
08e7ceb3 RS |
43 | SYMBOL_GOT_DISP |
44 | The symbol's value will be loaded directly from the GOT. | |
e245bd81 RS |
45 | |
46 | SYMBOL_GOTOFF_PAGE | |
08e7ceb3 RS |
47 | An UNSPEC wrapper around a SYMBOL_GOT_PAGE_OFST. It represents the |
48 | offset from _gp of the GOT entry. | |
e245bd81 | 49 | |
08e7ceb3 RS |
50 | SYMBOL_GOTOFF_DISP |
51 | An UNSPEC wrapper around a SYMBOL_GOT_DISP. It represents the | |
e245bd81 RS |
52 | the offset from _gp of the symbol's GOT entry. |
53 | ||
54 | SYMBOL_GOTOFF_CALL | |
08e7ceb3 | 55 | Like SYMBOL_GOTOFF_DISP, but used when calling a global function. |
e245bd81 RS |
56 | The GOT entry is allowed to point to a stub rather than to the |
57 | function itself. | |
58 | ||
59 | SYMBOL_GOTOFF_LOADGP | |
60 | An UNSPEC wrapper around a function's address. It represents the | |
61 | offset of _gp from the start of the function. | |
62 | ||
69229b81 DJ |
63 | SYMBOL_TLS |
64 | A thread-local symbol. | |
65 | ||
66 | SYMBOL_TLSGD | |
67 | SYMBOL_TLSLDM | |
68 | SYMBOL_DTPREL | |
69 | SYMBOL_GOTTPREL | |
70 | SYMBOL_TPREL | |
71 | UNSPEC wrappers around SYMBOL_TLS, corresponding to the | |
72 | thread-local storage relocation operators. | |
73 | ||
e245bd81 RS |
74 | SYMBOL_64_HIGH |
75 | For a 64-bit symbolic address X, this is the value of | |
76 | (%highest(X) << 16) + %higher(X). | |
77 | ||
78 | SYMBOL_64_MID | |
79 | For a 64-bit symbolic address X, this is the value of | |
80 | (%higher(X) << 16) + %hi(X). | |
81 | ||
82 | SYMBOL_64_LOW | |
83 | For a 64-bit symbolic address X, this is the value of | |
8cb6400c RS |
84 | (%hi(X) << 16) + %lo(X). |
85 | ||
86 | SYMBOL_HALF | |
87 | An UNSPEC wrapper around any kind of address. It represents the | |
88 | low 16 bits of that address. */ | |
e245bd81 RS |
89 | enum mips_symbol_type { |
90 | SYMBOL_GENERAL, | |
91 | SYMBOL_SMALL_DATA, | |
92 | SYMBOL_CONSTANT_POOL, | |
08e7ceb3 RS |
93 | SYMBOL_GOT_PAGE_OFST, |
94 | SYMBOL_GOT_DISP, | |
e245bd81 | 95 | SYMBOL_GOTOFF_PAGE, |
08e7ceb3 | 96 | SYMBOL_GOTOFF_DISP, |
e245bd81 RS |
97 | SYMBOL_GOTOFF_CALL, |
98 | SYMBOL_GOTOFF_LOADGP, | |
69229b81 DJ |
99 | SYMBOL_TLS, |
100 | SYMBOL_TLSGD, | |
101 | SYMBOL_TLSLDM, | |
102 | SYMBOL_DTPREL, | |
103 | SYMBOL_GOTTPREL, | |
104 | SYMBOL_TPREL, | |
e245bd81 RS |
105 | SYMBOL_64_HIGH, |
106 | SYMBOL_64_MID, | |
8cb6400c RS |
107 | SYMBOL_64_LOW, |
108 | SYMBOL_HALF | |
e245bd81 | 109 | }; |
8cb6400c | 110 | #define NUM_SYMBOL_TYPES (SYMBOL_HALF + 1) |
e245bd81 | 111 | |
d9870b7e RS |
112 | /* Identifiers a style of $gp initialization sequence. |
113 | ||
114 | LOADGP_NONE | |
115 | No initialization sequence is needed. | |
116 | ||
117 | LOADGP_OLDABI | |
118 | The o32 and o64 PIC sequence (the kind traditionally generated | |
119 | by .cpload). | |
120 | ||
121 | LOADGP_NEWABI | |
122 | The n32 and n64 PIC sequence (the kind traditionally generated | |
123 | by .cpsetup). | |
124 | ||
125 | LOADGP_ABSOLUTE | |
8cb6400c RS |
126 | The GNU absolute sequence, as generated by loadgp_absolute. |
127 | ||
128 | LOADGP_RTP | |
129 | The VxWorks RTP PIC sequence, as generated by loadgp_rtp. */ | |
d9870b7e RS |
130 | enum mips_loadgp_style { |
131 | LOADGP_NONE, | |
132 | LOADGP_OLDABI, | |
133 | LOADGP_NEWABI, | |
8cb6400c RS |
134 | LOADGP_ABSOLUTE, |
135 | LOADGP_RTP | |
d9870b7e RS |
136 | }; |
137 | ||
e1260576 RS |
138 | struct mips16e_save_restore_info; |
139 | ||
96a30b18 | 140 | extern bool mips_symbolic_constant_p (rtx, enum mips_symbol_type *); |
bcbc6b7f | 141 | extern int mips_regno_mode_ok_for_base_p (int, enum machine_mode, int); |
96a30b18 | 142 | extern bool mips_stack_address_p (rtx, enum machine_mode); |
b4966b1b RS |
143 | extern int mips_address_insns (rtx, enum machine_mode); |
144 | extern int mips_const_insns (rtx); | |
145 | extern int mips_fetch_insns (rtx); | |
46490403 | 146 | extern int mips_idiv_insns (void); |
50d32cf6 JW |
147 | extern int fp_register_operand (rtx, enum machine_mode); |
148 | extern int lo_operand (rtx, enum machine_mode); | |
b4966b1b | 149 | extern bool mips_legitimate_address_p (enum machine_mode, rtx, int); |
ea462dd0 | 150 | extern rtx mips_split_symbol (rtx, rtx); |
e245bd81 | 151 | extern rtx mips_unspec_address (rtx, enum mips_symbol_type); |
b4966b1b | 152 | extern bool mips_legitimize_address (rtx *, enum machine_mode); |
ea462dd0 | 153 | extern void mips_move_integer (rtx, rtx, unsigned HOST_WIDE_INT); |
b4966b1b | 154 | extern bool mips_legitimize_move (enum machine_mode, rtx, rtx); |
b4966b1b RS |
155 | |
156 | extern int m16_uimm3_b (rtx, enum machine_mode); | |
157 | extern int m16_simm4_1 (rtx, enum machine_mode); | |
158 | extern int m16_nsimm4_1 (rtx, enum machine_mode); | |
159 | extern int m16_simm5_1 (rtx, enum machine_mode); | |
160 | extern int m16_nsimm5_1 (rtx, enum machine_mode); | |
161 | extern int m16_uimm5_4 (rtx, enum machine_mode); | |
162 | extern int m16_nuimm5_4 (rtx, enum machine_mode); | |
163 | extern int m16_simm8_1 (rtx, enum machine_mode); | |
164 | extern int m16_nsimm8_1 (rtx, enum machine_mode); | |
165 | extern int m16_uimm8_1 (rtx, enum machine_mode); | |
166 | extern int m16_nuimm8_1 (rtx, enum machine_mode); | |
167 | extern int m16_uimm8_m1_1 (rtx, enum machine_mode); | |
168 | extern int m16_uimm8_4 (rtx, enum machine_mode); | |
169 | extern int m16_nuimm8_4 (rtx, enum machine_mode); | |
170 | extern int m16_simm8_8 (rtx, enum machine_mode); | |
171 | extern int m16_nsimm8_8 (rtx, enum machine_mode); | |
6b7d57c7 | 172 | |
b4966b1b RS |
173 | extern rtx mips_subword (rtx, int); |
174 | extern bool mips_split_64bit_move_p (rtx, rtx); | |
175 | extern void mips_split_64bit_move (rtx, rtx); | |
176 | extern const char *mips_output_move (rtx, rtx); | |
b73ce23b | 177 | extern void mips_restore_gp (void); |
6b7d57c7 | 178 | #ifdef RTX_CODE |
a012718f | 179 | extern bool mips_emit_scc (enum rtx_code, rtx); |
b4966b1b | 180 | extern void gen_conditional_branch (rtx *, enum rtx_code); |
ec4fc7ed | 181 | extern void mips_expand_vcondv2sf (rtx, rtx, rtx, enum rtx_code, rtx, rtx); |
6b7d57c7 | 182 | #endif |
b4966b1b RS |
183 | extern void gen_conditional_move (rtx *); |
184 | extern void mips_gen_conditional_trap (rtx *); | |
185 | extern void mips_expand_call (rtx, rtx, rtx, rtx, int); | |
186 | extern void mips_emit_fcc_reload (rtx, rtx, rtx); | |
187 | extern void mips_set_return_address (rtx, rtx); | |
188 | extern bool mips_expand_block_move (rtx, rtx, rtx); | |
df770e04 | 189 | extern void mips_expand_synci_loop (rtx, rtx); |
b4966b1b RS |
190 | |
191 | extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx); | |
192 | extern void function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, | |
193 | tree, int); | |
194 | extern struct rtx_def *function_arg (const CUMULATIVE_ARGS *, | |
195 | enum machine_mode, tree, int); | |
e64ca6c4 | 196 | extern int function_arg_boundary (enum machine_mode, tree); |
648bb159 RS |
197 | extern bool mips_pad_arg_upward (enum machine_mode, tree); |
198 | extern bool mips_pad_reg_upward (enum machine_mode, tree); | |
b4966b1b | 199 | extern void mips_va_start (tree, rtx); |
b4966b1b RS |
200 | |
201 | extern bool mips_expand_unaligned_load (rtx, rtx, unsigned int, int); | |
202 | extern bool mips_expand_unaligned_store (rtx, rtx, unsigned int, int); | |
9226543b | 203 | extern bool mips_mem_fits_mode_p (enum machine_mode mode, rtx x); |
b4966b1b RS |
204 | extern void override_options (void); |
205 | extern void mips_conditional_register_usage (void); | |
206 | extern void mips_order_regs_for_local_alloc (void); | |
207 | extern HOST_WIDE_INT mips_debugger_offset (rtx, HOST_WIDE_INT); | |
208 | ||
209 | extern void print_operand (FILE *, rtx, int); | |
210 | extern void print_operand_address (FILE *, rtx); | |
f8fdb503 | 211 | extern void mips_output_external (FILE *, tree, const char *); |
b4966b1b | 212 | extern void mips_output_filename (FILE *, const char *); |
584e5527 | 213 | extern void mips_output_ascii (FILE *, const char *, size_t, const char *); |
b4966b1b RS |
214 | extern void mips_output_aligned_bss (FILE *, tree, const char *, |
215 | unsigned HOST_WIDE_INT, int); | |
35f5add9 RS |
216 | extern void mips_output_aligned_decl_common (FILE *, tree, const char *, |
217 | unsigned HOST_WIDE_INT, | |
218 | unsigned int); | |
48b2e0a7 RS |
219 | extern void mips_declare_common_object (FILE *, const char *, |
220 | const char *, unsigned HOST_WIDE_INT, | |
221 | unsigned int, bool); | |
b4966b1b | 222 | extern void mips_declare_object (FILE *, const char *, const char *, |
99a3237a | 223 | const char *, ...) ATTRIBUTE_PRINTF_4; |
b4966b1b RS |
224 | extern void mips_declare_object_name (FILE *, const char *, tree); |
225 | extern void mips_finish_declare_object (FILE *, tree, int, int); | |
226 | ||
96a30b18 | 227 | extern bool mips_small_data_pattern_p (rtx); |
108b61d5 | 228 | extern rtx mips_rewrite_small_data (rtx); |
b4966b1b | 229 | extern HOST_WIDE_INT compute_frame_size (HOST_WIDE_INT); |
e88fb323 | 230 | extern HOST_WIDE_INT mips_initial_elimination_offset (int, int); |
b4966b1b | 231 | extern rtx mips_return_addr (int, rtx); |
d9870b7e | 232 | extern enum mips_loadgp_style mips_current_loadgp_style (void); |
b4966b1b RS |
233 | extern void mips_expand_prologue (void); |
234 | extern void mips_expand_epilogue (int); | |
235 | extern int mips_can_use_return_insn (void); | |
236 | extern struct rtx_def *mips_function_value (tree, tree, enum machine_mode); | |
b4966b1b RS |
237 | |
238 | extern bool mips_cannot_change_mode_class (enum machine_mode, | |
239 | enum machine_mode, enum reg_class); | |
a6008bd8 RS |
240 | extern bool mips_dangerous_for_la25_p (rtx); |
241 | extern enum reg_class mips_preferred_reload_class (rtx, enum reg_class); | |
b4966b1b RS |
242 | extern enum reg_class mips_secondary_reload_class (enum reg_class, |
243 | enum machine_mode, | |
244 | rtx, int); | |
245 | extern int mips_class_max_nregs (enum reg_class, enum machine_mode); | |
b4966b1b RS |
246 | extern int build_mips16_call_stub (rtx, rtx, rtx, int); |
247 | extern int mips_register_move_cost (enum machine_mode, enum reg_class, | |
248 | enum reg_class); | |
249 | ||
250 | extern int mips_adjust_insn_length (rtx, int); | |
251 | extern const char *mips_output_load_label (void); | |
a8c1d5f8 RS |
252 | extern const char *mips_output_conditional_branch (rtx, rtx *, const char *, |
253 | const char *); | |
254 | extern const char *mips_output_order_conditional_branch (rtx, rtx *, bool); | |
b4966b1b RS |
255 | extern const char *mips_output_division (const char *, rtx *); |
256 | extern unsigned int mips_hard_regno_nregs (int, enum machine_mode); | |
39ba1719 | 257 | extern bool mips_linked_madd_p (rtx, rtx); |
c81d6e2a | 258 | extern int mips_store_data_bypass_p (rtx, rtx); |
4767c570 | 259 | extern rtx mips_prefetch_cookie (rtx, rtx); |
b4966b1b | 260 | |
3c7404d3 | 261 | extern void irix_asm_output_align (FILE *, unsigned); |
b4966b1b RS |
262 | extern const char *current_section_name (void); |
263 | extern unsigned int current_section_flags (void); | |
05adfd82 | 264 | extern bool mips_use_ins_ext_p (rtx, rtx, rtx); |
bd9f1972 | 265 | |
e1260576 RS |
266 | extern const char *mips16e_output_save_restore (rtx, HOST_WIDE_INT); |
267 | extern bool mips16e_save_restore_pattern_p (rtx, HOST_WIDE_INT, | |
268 | struct mips16e_save_restore_info *); | |
269 | ||
88657302 | 270 | #endif /* ! GCC_MIPS_PROTOS_H */ |