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bd9f1972 | 1 | /* Prototypes of target machine for GNU compiler. MIPS version. |
214be03f | 2 | Copyright (C) 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, |
6773a41c | 3 | 1999, 2001, 2002, 2003 Free Software Foundation, Inc. |
bd9f1972 KG |
4 | Contributed by A. Lichnewsky (lich@inria.inria.fr). |
5 | Changed by Michael Meissner (meissner@osf.org). | |
6 | 64 bit r4000 support by Ian Lance Taylor (ian@cygnus.com) and | |
7 | Brendan Eich (brendan@microunity.com). | |
8 | ||
7ec022b2 | 9 | This file is part of GCC. |
bd9f1972 | 10 | |
7ec022b2 | 11 | GCC is free software; you can redistribute it and/or modify |
bd9f1972 KG |
12 | it under the terms of the GNU General Public License as published by |
13 | the Free Software Foundation; either version 2, or (at your option) | |
14 | any later version. | |
15 | ||
7ec022b2 | 16 | GCC is distributed in the hope that it will be useful, |
bd9f1972 KG |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
7ec022b2 | 22 | along with GCC; see the file COPYING. If not, write to |
bd9f1972 KG |
23 | the Free Software Foundation, 59 Temple Place - Suite 330, |
24 | Boston, MA 02111-1307, USA. */ | |
25 | ||
88657302 RH |
26 | #ifndef GCC_MIPS_PROTOS_H |
27 | #define GCC_MIPS_PROTOS_H | |
bd9f1972 | 28 | |
b4966b1b RS |
29 | extern int mips_reg_mode_ok_for_base_p (rtx, enum machine_mode, int); |
30 | extern int mips_address_insns (rtx, enum machine_mode); | |
31 | extern int mips_const_insns (rtx); | |
32 | extern int mips_fetch_insns (rtx); | |
33 | extern bool mips_global_pic_constant_p (rtx); | |
34 | extern bool mips_legitimate_address_p (enum machine_mode, rtx, int); | |
35 | extern bool mips_legitimize_address (rtx *, enum machine_mode); | |
36 | extern bool mips_legitimize_move (enum machine_mode, rtx, rtx); | |
37 | extern rtx mips_delegitimize_address (rtx); | |
38 | ||
39 | extern int m16_uimm3_b (rtx, enum machine_mode); | |
40 | extern int m16_simm4_1 (rtx, enum machine_mode); | |
41 | extern int m16_nsimm4_1 (rtx, enum machine_mode); | |
42 | extern int m16_simm5_1 (rtx, enum machine_mode); | |
43 | extern int m16_nsimm5_1 (rtx, enum machine_mode); | |
44 | extern int m16_uimm5_4 (rtx, enum machine_mode); | |
45 | extern int m16_nuimm5_4 (rtx, enum machine_mode); | |
46 | extern int m16_simm8_1 (rtx, enum machine_mode); | |
47 | extern int m16_nsimm8_1 (rtx, enum machine_mode); | |
48 | extern int m16_uimm8_1 (rtx, enum machine_mode); | |
49 | extern int m16_nuimm8_1 (rtx, enum machine_mode); | |
50 | extern int m16_uimm8_m1_1 (rtx, enum machine_mode); | |
51 | extern int m16_uimm8_4 (rtx, enum machine_mode); | |
52 | extern int m16_nuimm8_4 (rtx, enum machine_mode); | |
53 | extern int m16_simm8_8 (rtx, enum machine_mode); | |
54 | extern int m16_nsimm8_8 (rtx, enum machine_mode); | |
55 | extern int m16_usym8_4 (rtx, enum machine_mode); | |
56 | extern int m16_usym5_4 (rtx, enum machine_mode); | |
6b7d57c7 | 57 | |
b4966b1b RS |
58 | extern struct rtx_def *embedded_pic_fnaddr_reg (void); |
59 | extern struct rtx_def *embedded_pic_offset (rtx); | |
60 | extern rtx mips_subword (rtx, int); | |
61 | extern bool mips_split_64bit_move_p (rtx, rtx); | |
62 | extern void mips_split_64bit_move (rtx, rtx); | |
63 | extern const char *mips_output_move (rtx, rtx); | |
573850d4 | 64 | extern rtx mips_gp_save_slot (void); |
6b7d57c7 | 65 | #ifdef RTX_CODE |
b4966b1b RS |
66 | extern rtx gen_int_relational (enum rtx_code, rtx, rtx, rtx, int *); |
67 | extern void gen_conditional_branch (rtx *, enum rtx_code); | |
6b7d57c7 | 68 | #endif |
b4966b1b RS |
69 | extern void gen_conditional_move (rtx *); |
70 | extern void mips_gen_conditional_trap (rtx *); | |
71 | extern void mips_expand_call (rtx, rtx, rtx, rtx, int); | |
72 | extern void mips_emit_fcc_reload (rtx, rtx, rtx); | |
73 | extern void mips_set_return_address (rtx, rtx); | |
74 | extern bool mips_expand_block_move (rtx, rtx, rtx); | |
75 | ||
76 | extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx); | |
77 | extern void function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, | |
78 | tree, int); | |
79 | extern struct rtx_def *function_arg (const CUMULATIVE_ARGS *, | |
80 | enum machine_mode, tree, int); | |
81 | extern int function_arg_partial_nregs (const CUMULATIVE_ARGS *, | |
82 | enum machine_mode, tree, int); | |
648bb159 RS |
83 | extern bool mips_pad_arg_upward (enum machine_mode, tree); |
84 | extern bool mips_pad_reg_upward (enum machine_mode, tree); | |
b4966b1b RS |
85 | extern int mips_setup_incoming_varargs (const CUMULATIVE_ARGS *, |
86 | enum machine_mode, tree, int); | |
b4966b1b RS |
87 | extern void mips_va_start (tree, rtx); |
88 | extern struct rtx_def *mips_va_arg (tree, tree); | |
89 | ||
90 | extern bool mips_expand_unaligned_load (rtx, rtx, unsigned int, int); | |
91 | extern bool mips_expand_unaligned_store (rtx, rtx, unsigned int, int); | |
92 | extern void override_options (void); | |
93 | extern void mips_conditional_register_usage (void); | |
94 | extern void mips_order_regs_for_local_alloc (void); | |
95 | extern HOST_WIDE_INT mips_debugger_offset (rtx, HOST_WIDE_INT); | |
96 | ||
97 | extern void print_operand (FILE *, rtx, int); | |
98 | extern void print_operand_address (FILE *, rtx); | |
99 | extern int mips_output_external (FILE *, tree, const char *); | |
3c7404d3 RO |
100 | #if TARGET_IRIX |
101 | extern void irix_output_external_libcall (rtx); | |
b4966b1b RS |
102 | #endif |
103 | extern void mips_output_filename (FILE *, const char *); | |
104 | extern void mips_output_lineno (FILE *, int); | |
105 | extern void mips_output_ascii (FILE *, const char *, size_t); | |
106 | extern void mips_output_aligned_bss (FILE *, tree, const char *, | |
107 | unsigned HOST_WIDE_INT, int); | |
108 | extern void mips_declare_object (FILE *, const char *, const char *, | |
109 | const char *, int); | |
110 | extern void mips_declare_object_name (FILE *, const char *, tree); | |
111 | extern void mips_finish_declare_object (FILE *, tree, int, int); | |
112 | ||
113 | extern HOST_WIDE_INT compute_frame_size (HOST_WIDE_INT); | |
114 | extern int mips_initial_elimination_offset (int, int); | |
115 | extern rtx mips_return_addr (int, rtx); | |
116 | extern void mips_expand_prologue (void); | |
117 | extern void mips_expand_epilogue (int); | |
118 | extern int mips_can_use_return_insn (void); | |
119 | extern struct rtx_def *mips_function_value (tree, tree, enum machine_mode); | |
120 | extern int function_arg_pass_by_reference (const CUMULATIVE_ARGS *, | |
121 | enum machine_mode, tree, int); | |
122 | ||
123 | extern bool mips_cannot_change_mode_class (enum machine_mode, | |
124 | enum machine_mode, enum reg_class); | |
125 | extern enum reg_class mips_secondary_reload_class (enum reg_class, | |
126 | enum machine_mode, | |
127 | rtx, int); | |
128 | extern int mips_class_max_nregs (enum reg_class, enum machine_mode); | |
129 | extern bool mips_valid_pointer_mode (enum machine_mode); | |
b4966b1b RS |
130 | extern int build_mips16_call_stub (rtx, rtx, rtx, int); |
131 | extern int mips_register_move_cost (enum machine_mode, enum reg_class, | |
132 | enum reg_class); | |
133 | ||
134 | extern int mips_adjust_insn_length (rtx, int); | |
135 | extern const char *mips_output_load_label (void); | |
136 | extern const char *mips_output_conditional_branch (rtx, rtx *, int, int, | |
137 | int, int); | |
138 | extern const char *mips_output_division (const char *, rtx *); | |
139 | extern unsigned int mips_hard_regno_nregs (int, enum machine_mode); | |
140 | extern int mips_return_in_memory (tree); | |
141 | extern const char *mips_emit_prefetch (rtx *); | |
142 | ||
3c7404d3 | 143 | extern void irix_asm_output_align (FILE *, unsigned); |
b4966b1b RS |
144 | extern const char *current_section_name (void); |
145 | extern unsigned int current_section_flags (void); | |
bd9f1972 | 146 | |
88657302 | 147 | #endif /* ! GCC_MIPS_PROTOS_H */ |