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1; Options for the MIPS port of the compiler
2;
4da2ed2f 3; Copyright (C) 2005, 2007, 2008, 2010, 2011 Free Software Foundation, Inc.
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4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it under
8; the terms of the GNU General Public License as published by the Free
2f83c7d6 9; Software Foundation; either version 3, or (at your option) any later
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10; version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT
13; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15; License for more details.
16;
17; You should have received a copy of the GNU General Public License
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18; along with GCC; see the file COPYING3. If not see
19; <http://www.gnu.org/licenses/>.
3ad7bb65 20
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21EB
22Driver
23
24EL
25Driver
26
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27mabi=
28Target RejectNegative Joined
29-mabi=ABI Generate code that conforms to the given ABI
30
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31mabicalls
32Target Report Mask(ABICALLS)
d9870b7e 33Generate code that can be used in SVR4-style dynamic objects
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34
35mad
36Target Report Var(TARGET_MAD)
37Use PMC-style 'mad' instructions
38
d522e7a2 39march=
55bea00a 40Target RejectNegative Joined Var(mips_arch_string)
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41-march=ISA Generate code for the given ISA
42
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43mbranch-cost=
44Target RejectNegative Joined UInteger Var(mips_branch_cost)
45-mbranch-cost=COST Set the cost of branches to roughly COST instructions
46
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47mbranch-likely
48Target Report Mask(BRANCHLIKELY)
49Use Branch Likely instructions, overriding the architecture default
50
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51mflip-mips16
52Target Report Var(TARGET_FLIP_MIPS16)
53Switch on/off MIPS16 ASE on alternating functions for compiler testing
54
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55mcheck-zero-division
56Target Report Mask(CHECK_ZERO_DIV)
57Trap on integer divide by zero
58
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59mcode-readable=
60Target RejectNegative Joined
61-mcode-readable=SETTING Specify when instructions are allowed to access code
62
21c425ee 63mdivide-breaks
25e3d99d 64Target Report RejectNegative Mask(DIVIDE_BREAKS)
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65Use branch-and-break sequences to check for integer divide by zero
66
67mdivide-traps
25e3d99d 68Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
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69Use trap instructions to check for integer divide by zero
70
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71mdmx
72Target Report RejectNegative Var(TARGET_MDMX)
73Allow the use of MDMX instructions
74
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75mdouble-float
76Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
77Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
78
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79mdsp
80Target Report Mask(DSP)
81Use MIPS-DSP instructions
82
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83mdspr2
84Target Report Mask(DSPR2)
85Use MIPS-DSP REV 2 instructions
86
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87mdebug
88Target Var(TARGET_DEBUG_MODE) Undocumented
89
90mdebugd
91Target Var(TARGET_DEBUG_D_MODE) Undocumented
92
93meb
94Target Report RejectNegative Mask(BIG_ENDIAN)
95Use big-endian byte order
96
97mel
98Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
99Use little-endian byte order
100
101membedded-data
102Target Report Var(TARGET_EMBEDDED_DATA)
103Use ROM instead of RAM
104
105mexplicit-relocs
106Target Report Mask(EXPLICIT_RELOCS)
107Use NewABI-style %reloc() assembly operators
108
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109mextern-sdata
110Target Report Var(TARGET_EXTERN_SDATA) Init(1)
111Use -G for data that is not defined by the current object
112
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113mfix-r4000
114Target Report Mask(FIX_R4000)
115Work around certain R4000 errata
116
117mfix-r4400
118Target Report Mask(FIX_R4400)
119Work around certain R4400 errata
120
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121mfix-r10000
122Target Report Mask(FIX_R10000)
123Work around certain R10000 errata
124
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125mfix-sb1
126Target Report Var(TARGET_FIX_SB1)
127Work around errata for early SB-1 revision 2 cores
128
129mfix-vr4120
130Target Report Var(TARGET_FIX_VR4120)
131Work around certain VR4120 errata
132
133mfix-vr4130
134Target Report Var(TARGET_FIX_VR4130)
135Work around VR4130 mflo/mfhi errata
136
137mfix4300
138Target Report Var(TARGET_4300_MUL_FIX)
139Work around an early 4300 hardware bug
140
141mfp-exceptions
142Target Report Mask(FP_EXCEPTIONS)
143FP exceptions are enabled
144
145mfp32
146Target Report RejectNegative InverseMask(FLOAT64)
147Use 32-bit floating-point registers
148
149mfp64
150Target Report RejectNegative Mask(FLOAT64)
151Use 64-bit floating-point registers
152
d522e7a2 153mflush-func=
55bea00a 154Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
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155-mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines
156
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157mfused-madd
158Target Report Mask(FUSED_MADD)
159Generate floating-point multiply-add instructions
160
161mgp32
162Target Report RejectNegative InverseMask(64BIT)
163Use 32-bit general registers
164
165mgp64
166Target Report RejectNegative Mask(64BIT)
167Use 64-bit general registers
168
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169mgpopt
170Target Report Var(TARGET_GPOPT) Init(1)
171Use GP-relative addressing to access small data
172
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173mplt
174Target Report Var(TARGET_PLT)
175When generating -mabicalls code, allow executables to use PLTs and copy relocations
176
21c425ee 177mhard-float
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178Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
179Allow the use of hardware floating-point ABI and instructions
21c425ee 180
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181minterlink-mips16
182Target Report Var(TARGET_INTERLINK_MIPS16) Init(0)
183Generate code that can be safely linked with MIPS16 code.
184
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185mips
186Target RejectNegative Joined
187-mipsN Generate code for ISA level N
188
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189mips16
190Target Report RejectNegative Mask(MIPS16)
500fc425 191Generate MIPS16 code
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192
193mips3d
194Target Report RejectNegative Mask(MIPS3D)
195Use MIPS-3D instructions
196
66471b47 197mllsc
e9276c30 198Target Report Mask(LLSC)
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199Use ll, sc and sync instructions
200
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201mlocal-sdata
202Target Report Var(TARGET_LOCAL_SDATA) Init(1)
203Use -G for object-local data
204
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205mlong-calls
206Target Report Var(TARGET_LONG_CALLS)
207Use indirect calls
208
209mlong32
210Target Report RejectNegative InverseMask(LONG64, LONG32)
211Use a 32-bit long type
212
213mlong64
214Target Report RejectNegative Mask(LONG64)
215Use a 64-bit long type
216
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217mmcount-ra-address
218Target Report Var(TARGET_MCOUNT_RA_ADDRESS)
219Pass the address of the ra save location to _mcount in $12
220
21c425ee 221mmemcpy
cfa31150 222Target Report Mask(MEMCPY)
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223Don't optimize block moves
224
225mmips-tfile
226Target
227Use the mips-tfile postpass
228
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229mmt
230Target Report Var(TARGET_MT)
231Allow the use of MT instructions
232
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233mno-float
234Target Report RejectNegative Var(TARGET_NO_FLOAT) Condition(TARGET_SUPPORTS_NO_FLOAT)
235Prevent the use of all floating-point operations
236
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237mno-flush-func
238Target RejectNegative
239Do not use a cache-flushing function before calling stack trampolines
240
500fc425 241mno-mdmx
70be5dc7 242Target Report RejectNegative Var(TARGET_MDMX, 0)
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243Do not use MDMX instructions
244
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245mno-mips16
246Target Report RejectNegative InverseMask(MIPS16)
247Generate normal-mode code
248
249mno-mips3d
250Target Report RejectNegative InverseMask(MIPS3D)
251Do not use MIPS-3D instructions
252
253mpaired-single
254Target Report Mask(PAIRED_SINGLE_FLOAT)
255Use paired-single floating-point instructions
256
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257mr10k-cache-barrier=
258Target Joined RejectNegative
259-mr10k-cache-barrier=SETTING Specify when r10k cache barriers should be inserted
260
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261mrelax-pic-calls
262Target Report Mask(RELAX_PIC_CALLS)
263Try to allow the linker to turn PIC calls into direct calls
264
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265mshared
266Target Report Var(TARGET_SHARED) Init(1)
267When generating -mabicalls code, make the code suitable for use in shared libraries
268
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269msingle-float
270Target Report RejectNegative Mask(SINGLE_FLOAT)
271Restrict the use of hardware floating-point instructions to 32-bit operations
272
0aa222d1 273msmartmips
a166140f 274Target Report Mask(SMARTMIPS)
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275Use SmartMIPS instructions
276
21c425ee 277msoft-float
cc4ebe7d 278Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
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279Prevent the use of all hardware floating-point instructions
280
281msplit-addresses
282Target Report Mask(SPLIT_ADDRESSES)
283Optimize lui/addiu address loads
284
285msym32
286Target Report Var(TARGET_SYM32)
287Assume all symbols have 32-bit values
288
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289msynci
290Target Report Mask(SYNCI)
291Use synci instruction to invalidate i-cache
292
d522e7a2 293mtune=
55bea00a 294Target RejectNegative Joined Var(mips_tune_string)
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295-mtune=PROCESSOR Optimize the output for PROCESSOR
296
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297muninit-const-in-rodata
298Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
299Put uninitialized constants in ROM (needs -membedded-data)
300
301mvr4130-align
302Target Report Mask(VR4130_ALIGN)
303Perform VR4130-specific alignment optimizations
304
305mxgot
306Target Report Var(TARGET_XGOT)
307Lift restrictions on GOT size
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308
309noasmopt
310Driver