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basic-block.h (remove_predictions_associated_with_edge): Declare.
[thirdparty/gcc.git] / gcc / config / mips / mips.opt
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1; Options for the MIPS port of the compiler
2;
3; Copyright (C) 2005 Free Software Foundation, Inc.
4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it under
8; the terms of the GNU General Public License as published by the Free
9; Software Foundation; either version 2, or (at your option) any later
10; version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT
13; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15; License for more details.
16;
17; You should have received a copy of the GNU General Public License
18; along with GCC; see the file COPYING. If not, write to the Free
19; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20; 02111-1307, USA.
21
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22mabi=
23Target RejectNegative Joined
24-mabi=ABI Generate code that conforms to the given ABI
25
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26mabicalls
27Target Report Mask(ABICALLS)
28Use SVR4-style PIC
29
30mad
31Target Report Var(TARGET_MAD)
32Use PMC-style 'mad' instructions
33
d522e7a2 34march=
55bea00a 35Target RejectNegative Joined Var(mips_arch_string)
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36-march=ISA Generate code for the given ISA
37
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38mbranch-likely
39Target Report Mask(BRANCHLIKELY)
40Use Branch Likely instructions, overriding the architecture default
41
42mcheck-zero-division
43Target Report Mask(CHECK_ZERO_DIV)
44Trap on integer divide by zero
45
46mdivide-breaks
47Target Report Mask(DIVIDE_BREAKS)
48Use branch-and-break sequences to check for integer divide by zero
49
50mdivide-traps
51Target Report InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
52Use trap instructions to check for integer divide by zero
53
54mdouble-float
55Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
56Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
57
58mdebug
59Target Var(TARGET_DEBUG_MODE) Undocumented
60
61mdebugd
62Target Var(TARGET_DEBUG_D_MODE) Undocumented
63
64meb
65Target Report RejectNegative Mask(BIG_ENDIAN)
66Use big-endian byte order
67
68mel
69Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
70Use little-endian byte order
71
72membedded-data
73Target Report Var(TARGET_EMBEDDED_DATA)
74Use ROM instead of RAM
75
76mexplicit-relocs
77Target Report Mask(EXPLICIT_RELOCS)
78Use NewABI-style %reloc() assembly operators
79
80mfix-r4000
81Target Report Mask(FIX_R4000)
82Work around certain R4000 errata
83
84mfix-r4400
85Target Report Mask(FIX_R4400)
86Work around certain R4400 errata
87
88mfix-sb1
89Target Report Var(TARGET_FIX_SB1)
90Work around errata for early SB-1 revision 2 cores
91
92mfix-vr4120
93Target Report Var(TARGET_FIX_VR4120)
94Work around certain VR4120 errata
95
96mfix-vr4130
97Target Report Var(TARGET_FIX_VR4130)
98Work around VR4130 mflo/mfhi errata
99
100mfix4300
101Target Report Var(TARGET_4300_MUL_FIX)
102Work around an early 4300 hardware bug
103
104mfp-exceptions
105Target Report Mask(FP_EXCEPTIONS)
106FP exceptions are enabled
107
108mfp32
109Target Report RejectNegative InverseMask(FLOAT64)
110Use 32-bit floating-point registers
111
112mfp64
113Target Report RejectNegative Mask(FLOAT64)
114Use 64-bit floating-point registers
115
d522e7a2 116mflush-func=
55bea00a 117Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
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118-mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines
119
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120mfused-madd
121Target Report Mask(FUSED_MADD)
122Generate floating-point multiply-add instructions
123
124mgp32
125Target Report RejectNegative InverseMask(64BIT)
126Use 32-bit general registers
127
128mgp64
129Target Report RejectNegative Mask(64BIT)
130Use 64-bit general registers
131
132mhard-float
133Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
134Allow the use of hardware floating-point instructions
135
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136mips
137Target RejectNegative Joined
138-mipsN Generate code for ISA level N
139
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140mips16
141Target Report RejectNegative Mask(MIPS16)
142Generate mips16 code
143
144mips3d
145Target Report RejectNegative Mask(MIPS3D)
146Use MIPS-3D instructions
147
148mlong-calls
149Target Report Var(TARGET_LONG_CALLS)
150Use indirect calls
151
152mlong32
153Target Report RejectNegative InverseMask(LONG64, LONG32)
154Use a 32-bit long type
155
156mlong64
157Target Report RejectNegative Mask(LONG64)
158Use a 64-bit long type
159
160mmemcpy
161Target Report Var(TARGET_MEMCPY)
162Don't optimize block moves
163
164mmips-tfile
165Target
166Use the mips-tfile postpass
167
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168mno-flush-func
169Target RejectNegative
170Do not use a cache-flushing function before calling stack trampolines
171
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172mno-mips16
173Target Report RejectNegative InverseMask(MIPS16)
174Generate normal-mode code
175
176mno-mips3d
177Target Report RejectNegative InverseMask(MIPS3D)
178Do not use MIPS-3D instructions
179
180mpaired-single
181Target Report Mask(PAIRED_SINGLE_FLOAT)
182Use paired-single floating-point instructions
183
184msingle-float
185Target Report RejectNegative Mask(SINGLE_FLOAT)
186Restrict the use of hardware floating-point instructions to 32-bit operations
187
188msoft-float
189Target Report RejectNegative Mask(SOFT_FLOAT)
190Prevent the use of all hardware floating-point instructions
191
192msplit-addresses
193Target Report Mask(SPLIT_ADDRESSES)
194Optimize lui/addiu address loads
195
196msym32
197Target Report Var(TARGET_SYM32)
198Assume all symbols have 32-bit values
199
d522e7a2 200mtune=
55bea00a 201Target RejectNegative Joined Var(mips_tune_string)
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202-mtune=PROCESSOR Optimize the output for PROCESSOR
203
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204muninit-const-in-rodata
205Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
206Put uninitialized constants in ROM (needs -membedded-data)
207
208mvr4130-align
209Target Report Mask(VR4130_ALIGN)
210Perform VR4130-specific alignment optimizations
211
212mxgot
213Target Report Var(TARGET_XGOT)
214Lift restrictions on GOT size