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Commit | Line | Data |
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3ad7bb65 KH |
1 | ; Options for the MIPS port of the compiler |
2 | ; | |
d1e082c2 | 3 | ; Copyright (C) 2005-2013 Free Software Foundation, Inc. |
3ad7bb65 KH |
4 | ; |
5 | ; This file is part of GCC. | |
6 | ; | |
7 | ; GCC is free software; you can redistribute it and/or modify it under | |
8 | ; the terms of the GNU General Public License as published by the Free | |
2f83c7d6 | 9 | ; Software Foundation; either version 3, or (at your option) any later |
3ad7bb65 KH |
10 | ; version. |
11 | ; | |
12 | ; GCC is distributed in the hope that it will be useful, but WITHOUT | |
13 | ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 | ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 | ; License for more details. | |
16 | ; | |
17 | ; You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
18 | ; along with GCC; see the file COPYING3. If not see |
19 | ; <http://www.gnu.org/licenses/>. | |
3ad7bb65 | 20 | |
3af42a7b JM |
21 | HeaderInclude |
22 | config/mips/mips-opts.h | |
23 | ||
4da2ed2f JM |
24 | EB |
25 | Driver | |
26 | ||
27 | EL | |
28 | Driver | |
29 | ||
d522e7a2 | 30 | mabi= |
3af42a7b | 31 | Target RejectNegative Joined Enum(mips_abi) Var(mips_abi) Init(MIPS_ABI_DEFAULT) |
d522e7a2 RS |
32 | -mabi=ABI Generate code that conforms to the given ABI |
33 | ||
3af42a7b JM |
34 | Enum |
35 | Name(mips_abi) Type(int) | |
36 | Known MIPS ABIs (for use with the -mabi= option): | |
37 | ||
38 | EnumValue | |
39 | Enum(mips_abi) String(32) Value(ABI_32) | |
40 | ||
41 | EnumValue | |
42 | Enum(mips_abi) String(o64) Value(ABI_O64) | |
43 | ||
44 | EnumValue | |
45 | Enum(mips_abi) String(n32) Value(ABI_N32) | |
46 | ||
47 | EnumValue | |
48 | Enum(mips_abi) String(64) Value(ABI_64) | |
49 | ||
50 | EnumValue | |
51 | Enum(mips_abi) String(eabi) Value(ABI_EABI) | |
52 | ||
21c425ee RS |
53 | mabicalls |
54 | Target Report Mask(ABICALLS) | |
d9870b7e | 55 | Generate code that can be used in SVR4-style dynamic objects |
21c425ee | 56 | |
81826a7b | 57 | mmad |
21c425ee RS |
58 | Target Report Var(TARGET_MAD) |
59 | Use PMC-style 'mad' instructions | |
60 | ||
d522e7a2 | 61 | march= |
d371df6f | 62 | Target RejectNegative Joined Var(mips_arch_option) ToLower Enum(mips_arch_opt_value) |
d522e7a2 RS |
63 | -march=ISA Generate code for the given ISA |
64 | ||
a05bea76 RS |
65 | mbranch-cost= |
66 | Target RejectNegative Joined UInteger Var(mips_branch_cost) | |
67 | -mbranch-cost=COST Set the cost of branches to roughly COST instructions | |
68 | ||
21c425ee RS |
69 | mbranch-likely |
70 | Target Report Mask(BRANCHLIKELY) | |
71 | Use Branch Likely instructions, overriding the architecture default | |
72 | ||
f9e4a411 SL |
73 | mflip-mips16 |
74 | Target Report Var(TARGET_FLIP_MIPS16) | |
75 | Switch on/off MIPS16 ASE on alternating functions for compiler testing | |
76 | ||
21c425ee RS |
77 | mcheck-zero-division |
78 | Target Report Mask(CHECK_ZERO_DIV) | |
79 | Trap on integer divide by zero | |
80 | ||
704aab3e | 81 | mcode-readable= |
3af42a7b | 82 | Target RejectNegative Joined Enum(mips_code_readable_setting) Var(mips_code_readable) Init(CODE_READABLE_YES) |
704aab3e RS |
83 | -mcode-readable=SETTING Specify when instructions are allowed to access code |
84 | ||
3af42a7b JM |
85 | Enum |
86 | Name(mips_code_readable_setting) Type(enum mips_code_readable_setting) | |
87 | Valid arguments to -mcode-readable=: | |
88 | ||
89 | EnumValue | |
90 | Enum(mips_code_readable_setting) String(yes) Value(CODE_READABLE_YES) | |
91 | ||
92 | EnumValue | |
93 | Enum(mips_code_readable_setting) String(pcrel) Value(CODE_READABLE_PCREL) | |
94 | ||
95 | EnumValue | |
96 | Enum(mips_code_readable_setting) String(no) Value(CODE_READABLE_NO) | |
97 | ||
21c425ee | 98 | mdivide-breaks |
25e3d99d | 99 | Target Report RejectNegative Mask(DIVIDE_BREAKS) |
21c425ee RS |
100 | Use branch-and-break sequences to check for integer divide by zero |
101 | ||
102 | mdivide-traps | |
25e3d99d | 103 | Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS) |
21c425ee RS |
104 | Use trap instructions to check for integer divide by zero |
105 | ||
500fc425 TS |
106 | mdmx |
107 | Target Report RejectNegative Var(TARGET_MDMX) | |
108 | Allow the use of MDMX instructions | |
109 | ||
21c425ee RS |
110 | mdouble-float |
111 | Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT) | |
112 | Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations | |
113 | ||
118ea793 CF |
114 | mdsp |
115 | Target Report Mask(DSP) | |
116 | Use MIPS-DSP instructions | |
117 | ||
32041385 CF |
118 | mdspr2 |
119 | Target Report Mask(DSPR2) | |
120 | Use MIPS-DSP REV 2 instructions | |
121 | ||
21c425ee RS |
122 | mdebug |
123 | Target Var(TARGET_DEBUG_MODE) Undocumented | |
124 | ||
125 | mdebugd | |
126 | Target Var(TARGET_DEBUG_D_MODE) Undocumented | |
127 | ||
128 | meb | |
129 | Target Report RejectNegative Mask(BIG_ENDIAN) | |
130 | Use big-endian byte order | |
131 | ||
132 | mel | |
133 | Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN) | |
134 | Use little-endian byte order | |
135 | ||
136 | membedded-data | |
137 | Target Report Var(TARGET_EMBEDDED_DATA) | |
138 | Use ROM instead of RAM | |
139 | ||
140 | mexplicit-relocs | |
141 | Target Report Mask(EXPLICIT_RELOCS) | |
142 | Use NewABI-style %reloc() assembly operators | |
143 | ||
a318179e RS |
144 | mextern-sdata |
145 | Target Report Var(TARGET_EXTERN_SDATA) Init(1) | |
146 | Use -G for data that is not defined by the current object | |
147 | ||
0eda4033 CM |
148 | mfix-24k |
149 | Target Report Var(TARGET_FIX_24K) | |
150 | Work around certain 24K errata | |
151 | ||
21c425ee RS |
152 | mfix-r4000 |
153 | Target Report Mask(FIX_R4000) | |
154 | Work around certain R4000 errata | |
155 | ||
156 | mfix-r4400 | |
157 | Target Report Mask(FIX_R4400) | |
158 | Work around certain R4400 errata | |
159 | ||
ee9a72e5 JK |
160 | mfix-r10000 |
161 | Target Report Mask(FIX_R10000) | |
162 | Work around certain R10000 errata | |
163 | ||
21c425ee RS |
164 | mfix-sb1 |
165 | Target Report Var(TARGET_FIX_SB1) | |
166 | Work around errata for early SB-1 revision 2 cores | |
167 | ||
168 | mfix-vr4120 | |
169 | Target Report Var(TARGET_FIX_VR4120) | |
170 | Work around certain VR4120 errata | |
171 | ||
172 | mfix-vr4130 | |
173 | Target Report Var(TARGET_FIX_VR4130) | |
174 | Work around VR4130 mflo/mfhi errata | |
175 | ||
176 | mfix4300 | |
177 | Target Report Var(TARGET_4300_MUL_FIX) | |
178 | Work around an early 4300 hardware bug | |
179 | ||
180 | mfp-exceptions | |
181 | Target Report Mask(FP_EXCEPTIONS) | |
182 | FP exceptions are enabled | |
183 | ||
184 | mfp32 | |
185 | Target Report RejectNegative InverseMask(FLOAT64) | |
186 | Use 32-bit floating-point registers | |
187 | ||
188 | mfp64 | |
189 | Target Report RejectNegative Mask(FLOAT64) | |
190 | Use 64-bit floating-point registers | |
191 | ||
d522e7a2 | 192 | mflush-func= |
55bea00a | 193 | Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC) |
d522e7a2 RS |
194 | -mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines |
195 | ||
21c425ee RS |
196 | mfused-madd |
197 | Target Report Mask(FUSED_MADD) | |
198 | Generate floating-point multiply-add instructions | |
199 | ||
200 | mgp32 | |
201 | Target Report RejectNegative InverseMask(64BIT) | |
202 | Use 32-bit general registers | |
203 | ||
204 | mgp64 | |
205 | Target Report RejectNegative Mask(64BIT) | |
206 | Use 64-bit general registers | |
207 | ||
a318179e RS |
208 | mgpopt |
209 | Target Report Var(TARGET_GPOPT) Init(1) | |
210 | Use GP-relative addressing to access small data | |
211 | ||
e21d5757 DJ |
212 | mplt |
213 | Target Report Var(TARGET_PLT) | |
214 | When generating -mabicalls code, allow executables to use PLTs and copy relocations | |
215 | ||
21c425ee | 216 | mhard-float |
cc4ebe7d SL |
217 | Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI) |
218 | Allow the use of hardware floating-point ABI and instructions | |
21c425ee | 219 | |
6941b508 CM |
220 | minterlink-compressed |
221 | Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0) | |
222 | Generate code that is link-compatible with MIPS16 and microMIPS code. | |
223 | ||
1ec3b87b | 224 | minterlink-mips16 |
6941b508 CM |
225 | Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0) |
226 | An alias for minterlink-compressed provided for backward-compatibility. | |
1ec3b87b | 227 | |
d522e7a2 | 228 | mips |
d371df6f | 229 | Target RejectNegative Joined ToLower Enum(mips_mips_opt_value) Var(mips_isa_option) |
d522e7a2 RS |
230 | -mipsN Generate code for ISA level N |
231 | ||
21c425ee RS |
232 | mips16 |
233 | Target Report RejectNegative Mask(MIPS16) | |
500fc425 | 234 | Generate MIPS16 code |
21c425ee RS |
235 | |
236 | mips3d | |
237 | Target Report RejectNegative Mask(MIPS3D) | |
238 | Use MIPS-3D instructions | |
239 | ||
66471b47 | 240 | mllsc |
e9276c30 | 241 | Target Report Mask(LLSC) |
66471b47 DD |
242 | Use ll, sc and sync instructions |
243 | ||
a318179e RS |
244 | mlocal-sdata |
245 | Target Report Var(TARGET_LOCAL_SDATA) Init(1) | |
246 | Use -G for object-local data | |
247 | ||
21c425ee RS |
248 | mlong-calls |
249 | Target Report Var(TARGET_LONG_CALLS) | |
250 | Use indirect calls | |
251 | ||
252 | mlong32 | |
253 | Target Report RejectNegative InverseMask(LONG64, LONG32) | |
254 | Use a 32-bit long type | |
255 | ||
256 | mlong64 | |
257 | Target Report RejectNegative Mask(LONG64) | |
258 | Use a 64-bit long type | |
259 | ||
c376dbfb DD |
260 | mmcount-ra-address |
261 | Target Report Var(TARGET_MCOUNT_RA_ADDRESS) | |
262 | Pass the address of the ra save location to _mcount in $12 | |
263 | ||
21c425ee | 264 | mmemcpy |
cfa31150 | 265 | Target Report Mask(MEMCPY) |
21c425ee RS |
266 | Don't optimize block moves |
267 | ||
6941b508 CM |
268 | mmicromips |
269 | Target Report Mask(MICROMIPS) | |
270 | Use microMIPS instructions | |
271 | ||
500fc425 TS |
272 | mmt |
273 | Target Report Var(TARGET_MT) | |
274 | Allow the use of MT instructions | |
275 | ||
9f946bc1 RS |
276 | mno-float |
277 | Target Report RejectNegative Var(TARGET_NO_FLOAT) Condition(TARGET_SUPPORTS_NO_FLOAT) | |
278 | Prevent the use of all floating-point operations | |
279 | ||
5cb5a23f MR |
280 | mmcu |
281 | Target Report Var(TARGET_MCU) | |
282 | Use MCU instructions | |
283 | ||
d522e7a2 RS |
284 | mno-flush-func |
285 | Target RejectNegative | |
286 | Do not use a cache-flushing function before calling stack trampolines | |
287 | ||
500fc425 | 288 | mno-mdmx |
70be5dc7 | 289 | Target Report RejectNegative Var(TARGET_MDMX, 0) |
500fc425 TS |
290 | Do not use MDMX instructions |
291 | ||
21c425ee RS |
292 | mno-mips16 |
293 | Target Report RejectNegative InverseMask(MIPS16) | |
294 | Generate normal-mode code | |
295 | ||
296 | mno-mips3d | |
297 | Target Report RejectNegative InverseMask(MIPS3D) | |
298 | Do not use MIPS-3D instructions | |
299 | ||
300 | mpaired-single | |
301 | Target Report Mask(PAIRED_SINGLE_FLOAT) | |
302 | Use paired-single floating-point instructions | |
303 | ||
4d210b07 | 304 | mr10k-cache-barrier= |
3af42a7b | 305 | Target Joined RejectNegative Enum(mips_r10k_cache_barrier_setting) Var(mips_r10k_cache_barrier) Init(R10K_CACHE_BARRIER_NONE) |
4d210b07 RS |
306 | -mr10k-cache-barrier=SETTING Specify when r10k cache barriers should be inserted |
307 | ||
3af42a7b JM |
308 | Enum |
309 | Name(mips_r10k_cache_barrier_setting) Type(enum mips_r10k_cache_barrier_setting) | |
310 | Valid arguments to -mr10k-cache-barrier=: | |
311 | ||
312 | EnumValue | |
313 | Enum(mips_r10k_cache_barrier_setting) String(load-store) Value(R10K_CACHE_BARRIER_LOAD_STORE) | |
314 | ||
315 | EnumValue | |
316 | Enum(mips_r10k_cache_barrier_setting) String(store) Value(R10K_CACHE_BARRIER_STORE) | |
317 | ||
318 | EnumValue | |
319 | Enum(mips_r10k_cache_barrier_setting) String(none) Value(R10K_CACHE_BARRIER_NONE) | |
320 | ||
b53da244 AN |
321 | mrelax-pic-calls |
322 | Target Report Mask(RELAX_PIC_CALLS) | |
323 | Try to allow the linker to turn PIC calls into direct calls | |
324 | ||
d9870b7e RS |
325 | mshared |
326 | Target Report Var(TARGET_SHARED) Init(1) | |
327 | When generating -mabicalls code, make the code suitable for use in shared libraries | |
328 | ||
21c425ee RS |
329 | msingle-float |
330 | Target Report RejectNegative Mask(SINGLE_FLOAT) | |
331 | Restrict the use of hardware floating-point instructions to 32-bit operations | |
332 | ||
0aa222d1 | 333 | msmartmips |
a166140f | 334 | Target Report Mask(SMARTMIPS) |
0aa222d1 SL |
335 | Use SmartMIPS instructions |
336 | ||
21c425ee | 337 | msoft-float |
cc4ebe7d | 338 | Target Report RejectNegative Mask(SOFT_FLOAT_ABI) |
21c425ee RS |
339 | Prevent the use of all hardware floating-point instructions |
340 | ||
341 | msplit-addresses | |
342 | Target Report Mask(SPLIT_ADDRESSES) | |
343 | Optimize lui/addiu address loads | |
344 | ||
345 | msym32 | |
346 | Target Report Var(TARGET_SYM32) | |
347 | Assume all symbols have 32-bit values | |
348 | ||
b96c5923 DD |
349 | msynci |
350 | Target Report Mask(SYNCI) | |
351 | Use synci instruction to invalidate i-cache | |
352 | ||
d522e7a2 | 353 | mtune= |
d371df6f | 354 | Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value) |
d522e7a2 RS |
355 | -mtune=PROCESSOR Optimize the output for PROCESSOR |
356 | ||
21c425ee RS |
357 | muninit-const-in-rodata |
358 | Target Report Var(TARGET_UNINIT_CONST_IN_RODATA) | |
359 | Put uninitialized constants in ROM (needs -membedded-data) | |
360 | ||
361 | mvr4130-align | |
362 | Target Report Mask(VR4130_ALIGN) | |
363 | Perform VR4130-specific alignment optimizations | |
364 | ||
365 | mxgot | |
366 | Target Report Var(TARGET_XGOT) | |
367 | Lift restrictions on GOT size | |
4da2ed2f JM |
368 | |
369 | noasmopt | |
370 | Driver |