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mips16.S: Don't build for microMIPS.
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1; Options for the MIPS port of the compiler
2;
d1e082c2 3; Copyright (C) 2005-2013 Free Software Foundation, Inc.
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4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it under
8; the terms of the GNU General Public License as published by the Free
2f83c7d6 9; Software Foundation; either version 3, or (at your option) any later
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10; version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT
13; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15; License for more details.
16;
17; You should have received a copy of the GNU General Public License
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18; along with GCC; see the file COPYING3. If not see
19; <http://www.gnu.org/licenses/>.
3ad7bb65 20
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21HeaderInclude
22config/mips/mips-opts.h
23
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24EB
25Driver
26
27EL
28Driver
29
d522e7a2 30mabi=
3af42a7b 31Target RejectNegative Joined Enum(mips_abi) Var(mips_abi) Init(MIPS_ABI_DEFAULT)
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32-mabi=ABI Generate code that conforms to the given ABI
33
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34Enum
35Name(mips_abi) Type(int)
36Known MIPS ABIs (for use with the -mabi= option):
37
38EnumValue
39Enum(mips_abi) String(32) Value(ABI_32)
40
41EnumValue
42Enum(mips_abi) String(o64) Value(ABI_O64)
43
44EnumValue
45Enum(mips_abi) String(n32) Value(ABI_N32)
46
47EnumValue
48Enum(mips_abi) String(64) Value(ABI_64)
49
50EnumValue
51Enum(mips_abi) String(eabi) Value(ABI_EABI)
52
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53mabicalls
54Target Report Mask(ABICALLS)
d9870b7e 55Generate code that can be used in SVR4-style dynamic objects
21c425ee 56
81826a7b 57mmad
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58Target Report Var(TARGET_MAD)
59Use PMC-style 'mad' instructions
60
d522e7a2 61march=
d371df6f 62Target RejectNegative Joined Var(mips_arch_option) ToLower Enum(mips_arch_opt_value)
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63-march=ISA Generate code for the given ISA
64
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65mbranch-cost=
66Target RejectNegative Joined UInteger Var(mips_branch_cost)
67-mbranch-cost=COST Set the cost of branches to roughly COST instructions
68
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69mbranch-likely
70Target Report Mask(BRANCHLIKELY)
71Use Branch Likely instructions, overriding the architecture default
72
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73mflip-mips16
74Target Report Var(TARGET_FLIP_MIPS16)
75Switch on/off MIPS16 ASE on alternating functions for compiler testing
76
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77mcheck-zero-division
78Target Report Mask(CHECK_ZERO_DIV)
79Trap on integer divide by zero
80
704aab3e 81mcode-readable=
3af42a7b 82Target RejectNegative Joined Enum(mips_code_readable_setting) Var(mips_code_readable) Init(CODE_READABLE_YES)
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83-mcode-readable=SETTING Specify when instructions are allowed to access code
84
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85Enum
86Name(mips_code_readable_setting) Type(enum mips_code_readable_setting)
87Valid arguments to -mcode-readable=:
88
89EnumValue
90Enum(mips_code_readable_setting) String(yes) Value(CODE_READABLE_YES)
91
92EnumValue
93Enum(mips_code_readable_setting) String(pcrel) Value(CODE_READABLE_PCREL)
94
95EnumValue
96Enum(mips_code_readable_setting) String(no) Value(CODE_READABLE_NO)
97
21c425ee 98mdivide-breaks
25e3d99d 99Target Report RejectNegative Mask(DIVIDE_BREAKS)
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100Use branch-and-break sequences to check for integer divide by zero
101
102mdivide-traps
25e3d99d 103Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
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104Use trap instructions to check for integer divide by zero
105
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106mdmx
107Target Report RejectNegative Var(TARGET_MDMX)
108Allow the use of MDMX instructions
109
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110mdouble-float
111Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
112Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
113
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114mdsp
115Target Report Mask(DSP)
116Use MIPS-DSP instructions
117
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118mdspr2
119Target Report Mask(DSPR2)
120Use MIPS-DSP REV 2 instructions
121
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122mdebug
123Target Var(TARGET_DEBUG_MODE) Undocumented
124
125mdebugd
126Target Var(TARGET_DEBUG_D_MODE) Undocumented
127
128meb
129Target Report RejectNegative Mask(BIG_ENDIAN)
130Use big-endian byte order
131
132mel
133Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
134Use little-endian byte order
135
136membedded-data
137Target Report Var(TARGET_EMBEDDED_DATA)
138Use ROM instead of RAM
139
140mexplicit-relocs
141Target Report Mask(EXPLICIT_RELOCS)
142Use NewABI-style %reloc() assembly operators
143
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144mextern-sdata
145Target Report Var(TARGET_EXTERN_SDATA) Init(1)
146Use -G for data that is not defined by the current object
147
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148mfix-24k
149Target Report Var(TARGET_FIX_24K)
150Work around certain 24K errata
151
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152mfix-r4000
153Target Report Mask(FIX_R4000)
154Work around certain R4000 errata
155
156mfix-r4400
157Target Report Mask(FIX_R4400)
158Work around certain R4400 errata
159
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160mfix-r10000
161Target Report Mask(FIX_R10000)
162Work around certain R10000 errata
163
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164mfix-sb1
165Target Report Var(TARGET_FIX_SB1)
166Work around errata for early SB-1 revision 2 cores
167
168mfix-vr4120
169Target Report Var(TARGET_FIX_VR4120)
170Work around certain VR4120 errata
171
172mfix-vr4130
173Target Report Var(TARGET_FIX_VR4130)
174Work around VR4130 mflo/mfhi errata
175
176mfix4300
177Target Report Var(TARGET_4300_MUL_FIX)
178Work around an early 4300 hardware bug
179
180mfp-exceptions
181Target Report Mask(FP_EXCEPTIONS)
182FP exceptions are enabled
183
184mfp32
185Target Report RejectNegative InverseMask(FLOAT64)
186Use 32-bit floating-point registers
187
188mfp64
189Target Report RejectNegative Mask(FLOAT64)
190Use 64-bit floating-point registers
191
d522e7a2 192mflush-func=
55bea00a 193Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
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194-mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines
195
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196mfused-madd
197Target Report Mask(FUSED_MADD)
198Generate floating-point multiply-add instructions
199
200mgp32
201Target Report RejectNegative InverseMask(64BIT)
202Use 32-bit general registers
203
204mgp64
205Target Report RejectNegative Mask(64BIT)
206Use 64-bit general registers
207
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208mgpopt
209Target Report Var(TARGET_GPOPT) Init(1)
210Use GP-relative addressing to access small data
211
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212mplt
213Target Report Var(TARGET_PLT)
214When generating -mabicalls code, allow executables to use PLTs and copy relocations
215
21c425ee 216mhard-float
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217Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
218Allow the use of hardware floating-point ABI and instructions
21c425ee 219
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220minterlink-compressed
221Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0)
222Generate code that is link-compatible with MIPS16 and microMIPS code.
223
1ec3b87b 224minterlink-mips16
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225Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0)
226An alias for minterlink-compressed provided for backward-compatibility.
1ec3b87b 227
d522e7a2 228mips
d371df6f 229Target RejectNegative Joined ToLower Enum(mips_mips_opt_value) Var(mips_isa_option)
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230-mipsN Generate code for ISA level N
231
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232mips16
233Target Report RejectNegative Mask(MIPS16)
500fc425 234Generate MIPS16 code
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235
236mips3d
237Target Report RejectNegative Mask(MIPS3D)
238Use MIPS-3D instructions
239
66471b47 240mllsc
e9276c30 241Target Report Mask(LLSC)
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242Use ll, sc and sync instructions
243
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244mlocal-sdata
245Target Report Var(TARGET_LOCAL_SDATA) Init(1)
246Use -G for object-local data
247
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248mlong-calls
249Target Report Var(TARGET_LONG_CALLS)
250Use indirect calls
251
252mlong32
253Target Report RejectNegative InverseMask(LONG64, LONG32)
254Use a 32-bit long type
255
256mlong64
257Target Report RejectNegative Mask(LONG64)
258Use a 64-bit long type
259
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260mmcount-ra-address
261Target Report Var(TARGET_MCOUNT_RA_ADDRESS)
262Pass the address of the ra save location to _mcount in $12
263
21c425ee 264mmemcpy
cfa31150 265Target Report Mask(MEMCPY)
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266Don't optimize block moves
267
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268mmicromips
269Target Report Mask(MICROMIPS)
270Use microMIPS instructions
271
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272mmt
273Target Report Var(TARGET_MT)
274Allow the use of MT instructions
275
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276mno-float
277Target Report RejectNegative Var(TARGET_NO_FLOAT) Condition(TARGET_SUPPORTS_NO_FLOAT)
278Prevent the use of all floating-point operations
279
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280mmcu
281Target Report Var(TARGET_MCU)
282Use MCU instructions
283
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284mno-flush-func
285Target RejectNegative
286Do not use a cache-flushing function before calling stack trampolines
287
500fc425 288mno-mdmx
70be5dc7 289Target Report RejectNegative Var(TARGET_MDMX, 0)
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290Do not use MDMX instructions
291
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292mno-mips16
293Target Report RejectNegative InverseMask(MIPS16)
294Generate normal-mode code
295
296mno-mips3d
297Target Report RejectNegative InverseMask(MIPS3D)
298Do not use MIPS-3D instructions
299
300mpaired-single
301Target Report Mask(PAIRED_SINGLE_FLOAT)
302Use paired-single floating-point instructions
303
4d210b07 304mr10k-cache-barrier=
3af42a7b 305Target Joined RejectNegative Enum(mips_r10k_cache_barrier_setting) Var(mips_r10k_cache_barrier) Init(R10K_CACHE_BARRIER_NONE)
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306-mr10k-cache-barrier=SETTING Specify when r10k cache barriers should be inserted
307
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308Enum
309Name(mips_r10k_cache_barrier_setting) Type(enum mips_r10k_cache_barrier_setting)
310Valid arguments to -mr10k-cache-barrier=:
311
312EnumValue
313Enum(mips_r10k_cache_barrier_setting) String(load-store) Value(R10K_CACHE_BARRIER_LOAD_STORE)
314
315EnumValue
316Enum(mips_r10k_cache_barrier_setting) String(store) Value(R10K_CACHE_BARRIER_STORE)
317
318EnumValue
319Enum(mips_r10k_cache_barrier_setting) String(none) Value(R10K_CACHE_BARRIER_NONE)
320
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321mrelax-pic-calls
322Target Report Mask(RELAX_PIC_CALLS)
323Try to allow the linker to turn PIC calls into direct calls
324
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325mshared
326Target Report Var(TARGET_SHARED) Init(1)
327When generating -mabicalls code, make the code suitable for use in shared libraries
328
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329msingle-float
330Target Report RejectNegative Mask(SINGLE_FLOAT)
331Restrict the use of hardware floating-point instructions to 32-bit operations
332
0aa222d1 333msmartmips
a166140f 334Target Report Mask(SMARTMIPS)
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335Use SmartMIPS instructions
336
21c425ee 337msoft-float
cc4ebe7d 338Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
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339Prevent the use of all hardware floating-point instructions
340
341msplit-addresses
342Target Report Mask(SPLIT_ADDRESSES)
343Optimize lui/addiu address loads
344
345msym32
346Target Report Var(TARGET_SYM32)
347Assume all symbols have 32-bit values
348
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349msynci
350Target Report Mask(SYNCI)
351Use synci instruction to invalidate i-cache
352
d522e7a2 353mtune=
d371df6f 354Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value)
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355-mtune=PROCESSOR Optimize the output for PROCESSOR
356
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357muninit-const-in-rodata
358Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
359Put uninitialized constants in ROM (needs -membedded-data)
360
361mvr4130-align
362Target Report Mask(VR4130_ALIGN)
363Perform VR4130-specific alignment optimizations
364
365mxgot
366Target Report Var(TARGET_XGOT)
367Lift restrictions on GOT size
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368
369noasmopt
370Driver