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Commit | Line | Data |
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3ad7bb65 KH |
1 | ; Options for the MIPS port of the compiler |
2 | ; | |
90d04a44 JJ |
3 | ; Copyright (C) 2005, 2007, 2008, 2010, 2011, 2012 |
4 | ; Free Software Foundation, Inc. | |
3ad7bb65 KH |
5 | ; |
6 | ; This file is part of GCC. | |
7 | ; | |
8 | ; GCC is free software; you can redistribute it and/or modify it under | |
9 | ; the terms of the GNU General Public License as published by the Free | |
2f83c7d6 | 10 | ; Software Foundation; either version 3, or (at your option) any later |
3ad7bb65 KH |
11 | ; version. |
12 | ; | |
13 | ; GCC is distributed in the hope that it will be useful, but WITHOUT | |
14 | ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
15 | ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
16 | ; License for more details. | |
17 | ; | |
18 | ; You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
19 | ; along with GCC; see the file COPYING3. If not see |
20 | ; <http://www.gnu.org/licenses/>. | |
3ad7bb65 | 21 | |
3af42a7b JM |
22 | HeaderInclude |
23 | config/mips/mips-opts.h | |
24 | ||
4da2ed2f JM |
25 | EB |
26 | Driver | |
27 | ||
28 | EL | |
29 | Driver | |
30 | ||
d522e7a2 | 31 | mabi= |
3af42a7b | 32 | Target RejectNegative Joined Enum(mips_abi) Var(mips_abi) Init(MIPS_ABI_DEFAULT) |
d522e7a2 RS |
33 | -mabi=ABI Generate code that conforms to the given ABI |
34 | ||
3af42a7b JM |
35 | Enum |
36 | Name(mips_abi) Type(int) | |
37 | Known MIPS ABIs (for use with the -mabi= option): | |
38 | ||
39 | EnumValue | |
40 | Enum(mips_abi) String(32) Value(ABI_32) | |
41 | ||
42 | EnumValue | |
43 | Enum(mips_abi) String(o64) Value(ABI_O64) | |
44 | ||
45 | EnumValue | |
46 | Enum(mips_abi) String(n32) Value(ABI_N32) | |
47 | ||
48 | EnumValue | |
49 | Enum(mips_abi) String(64) Value(ABI_64) | |
50 | ||
51 | EnumValue | |
52 | Enum(mips_abi) String(eabi) Value(ABI_EABI) | |
53 | ||
21c425ee RS |
54 | mabicalls |
55 | Target Report Mask(ABICALLS) | |
d9870b7e | 56 | Generate code that can be used in SVR4-style dynamic objects |
21c425ee | 57 | |
81826a7b | 58 | mmad |
21c425ee RS |
59 | Target Report Var(TARGET_MAD) |
60 | Use PMC-style 'mad' instructions | |
61 | ||
d522e7a2 | 62 | march= |
d371df6f | 63 | Target RejectNegative Joined Var(mips_arch_option) ToLower Enum(mips_arch_opt_value) |
d522e7a2 RS |
64 | -march=ISA Generate code for the given ISA |
65 | ||
a05bea76 RS |
66 | mbranch-cost= |
67 | Target RejectNegative Joined UInteger Var(mips_branch_cost) | |
68 | -mbranch-cost=COST Set the cost of branches to roughly COST instructions | |
69 | ||
21c425ee RS |
70 | mbranch-likely |
71 | Target Report Mask(BRANCHLIKELY) | |
72 | Use Branch Likely instructions, overriding the architecture default | |
73 | ||
f9e4a411 SL |
74 | mflip-mips16 |
75 | Target Report Var(TARGET_FLIP_MIPS16) | |
76 | Switch on/off MIPS16 ASE on alternating functions for compiler testing | |
77 | ||
21c425ee RS |
78 | mcheck-zero-division |
79 | Target Report Mask(CHECK_ZERO_DIV) | |
80 | Trap on integer divide by zero | |
81 | ||
704aab3e | 82 | mcode-readable= |
3af42a7b | 83 | Target RejectNegative Joined Enum(mips_code_readable_setting) Var(mips_code_readable) Init(CODE_READABLE_YES) |
704aab3e RS |
84 | -mcode-readable=SETTING Specify when instructions are allowed to access code |
85 | ||
3af42a7b JM |
86 | Enum |
87 | Name(mips_code_readable_setting) Type(enum mips_code_readable_setting) | |
88 | Valid arguments to -mcode-readable=: | |
89 | ||
90 | EnumValue | |
91 | Enum(mips_code_readable_setting) String(yes) Value(CODE_READABLE_YES) | |
92 | ||
93 | EnumValue | |
94 | Enum(mips_code_readable_setting) String(pcrel) Value(CODE_READABLE_PCREL) | |
95 | ||
96 | EnumValue | |
97 | Enum(mips_code_readable_setting) String(no) Value(CODE_READABLE_NO) | |
98 | ||
21c425ee | 99 | mdivide-breaks |
25e3d99d | 100 | Target Report RejectNegative Mask(DIVIDE_BREAKS) |
21c425ee RS |
101 | Use branch-and-break sequences to check for integer divide by zero |
102 | ||
103 | mdivide-traps | |
25e3d99d | 104 | Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS) |
21c425ee RS |
105 | Use trap instructions to check for integer divide by zero |
106 | ||
500fc425 TS |
107 | mdmx |
108 | Target Report RejectNegative Var(TARGET_MDMX) | |
109 | Allow the use of MDMX instructions | |
110 | ||
21c425ee RS |
111 | mdouble-float |
112 | Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT) | |
113 | Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations | |
114 | ||
118ea793 CF |
115 | mdsp |
116 | Target Report Mask(DSP) | |
117 | Use MIPS-DSP instructions | |
118 | ||
32041385 CF |
119 | mdspr2 |
120 | Target Report Mask(DSPR2) | |
121 | Use MIPS-DSP REV 2 instructions | |
122 | ||
21c425ee RS |
123 | mdebug |
124 | Target Var(TARGET_DEBUG_MODE) Undocumented | |
125 | ||
126 | mdebugd | |
127 | Target Var(TARGET_DEBUG_D_MODE) Undocumented | |
128 | ||
129 | meb | |
130 | Target Report RejectNegative Mask(BIG_ENDIAN) | |
131 | Use big-endian byte order | |
132 | ||
133 | mel | |
134 | Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN) | |
135 | Use little-endian byte order | |
136 | ||
137 | membedded-data | |
138 | Target Report Var(TARGET_EMBEDDED_DATA) | |
139 | Use ROM instead of RAM | |
140 | ||
141 | mexplicit-relocs | |
142 | Target Report Mask(EXPLICIT_RELOCS) | |
143 | Use NewABI-style %reloc() assembly operators | |
144 | ||
a318179e RS |
145 | mextern-sdata |
146 | Target Report Var(TARGET_EXTERN_SDATA) Init(1) | |
147 | Use -G for data that is not defined by the current object | |
148 | ||
0eda4033 CM |
149 | mfix-24k |
150 | Target Report Var(TARGET_FIX_24K) | |
151 | Work around certain 24K errata | |
152 | ||
21c425ee RS |
153 | mfix-r4000 |
154 | Target Report Mask(FIX_R4000) | |
155 | Work around certain R4000 errata | |
156 | ||
157 | mfix-r4400 | |
158 | Target Report Mask(FIX_R4400) | |
159 | Work around certain R4400 errata | |
160 | ||
ee9a72e5 JK |
161 | mfix-r10000 |
162 | Target Report Mask(FIX_R10000) | |
163 | Work around certain R10000 errata | |
164 | ||
21c425ee RS |
165 | mfix-sb1 |
166 | Target Report Var(TARGET_FIX_SB1) | |
167 | Work around errata for early SB-1 revision 2 cores | |
168 | ||
169 | mfix-vr4120 | |
170 | Target Report Var(TARGET_FIX_VR4120) | |
171 | Work around certain VR4120 errata | |
172 | ||
173 | mfix-vr4130 | |
174 | Target Report Var(TARGET_FIX_VR4130) | |
175 | Work around VR4130 mflo/mfhi errata | |
176 | ||
177 | mfix4300 | |
178 | Target Report Var(TARGET_4300_MUL_FIX) | |
179 | Work around an early 4300 hardware bug | |
180 | ||
181 | mfp-exceptions | |
182 | Target Report Mask(FP_EXCEPTIONS) | |
183 | FP exceptions are enabled | |
184 | ||
185 | mfp32 | |
186 | Target Report RejectNegative InverseMask(FLOAT64) | |
187 | Use 32-bit floating-point registers | |
188 | ||
189 | mfp64 | |
190 | Target Report RejectNegative Mask(FLOAT64) | |
191 | Use 64-bit floating-point registers | |
192 | ||
d522e7a2 | 193 | mflush-func= |
55bea00a | 194 | Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC) |
d522e7a2 RS |
195 | -mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines |
196 | ||
21c425ee RS |
197 | mfused-madd |
198 | Target Report Mask(FUSED_MADD) | |
199 | Generate floating-point multiply-add instructions | |
200 | ||
201 | mgp32 | |
202 | Target Report RejectNegative InverseMask(64BIT) | |
203 | Use 32-bit general registers | |
204 | ||
205 | mgp64 | |
206 | Target Report RejectNegative Mask(64BIT) | |
207 | Use 64-bit general registers | |
208 | ||
a318179e RS |
209 | mgpopt |
210 | Target Report Var(TARGET_GPOPT) Init(1) | |
211 | Use GP-relative addressing to access small data | |
212 | ||
e21d5757 DJ |
213 | mplt |
214 | Target Report Var(TARGET_PLT) | |
215 | When generating -mabicalls code, allow executables to use PLTs and copy relocations | |
216 | ||
21c425ee | 217 | mhard-float |
cc4ebe7d SL |
218 | Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI) |
219 | Allow the use of hardware floating-point ABI and instructions | |
21c425ee | 220 | |
1ec3b87b RS |
221 | minterlink-mips16 |
222 | Target Report Var(TARGET_INTERLINK_MIPS16) Init(0) | |
223 | Generate code that can be safely linked with MIPS16 code. | |
224 | ||
d522e7a2 | 225 | mips |
d371df6f | 226 | Target RejectNegative Joined ToLower Enum(mips_mips_opt_value) Var(mips_isa_option) |
d522e7a2 RS |
227 | -mipsN Generate code for ISA level N |
228 | ||
21c425ee RS |
229 | mips16 |
230 | Target Report RejectNegative Mask(MIPS16) | |
500fc425 | 231 | Generate MIPS16 code |
21c425ee RS |
232 | |
233 | mips3d | |
234 | Target Report RejectNegative Mask(MIPS3D) | |
235 | Use MIPS-3D instructions | |
236 | ||
66471b47 | 237 | mllsc |
e9276c30 | 238 | Target Report Mask(LLSC) |
66471b47 DD |
239 | Use ll, sc and sync instructions |
240 | ||
a318179e RS |
241 | mlocal-sdata |
242 | Target Report Var(TARGET_LOCAL_SDATA) Init(1) | |
243 | Use -G for object-local data | |
244 | ||
21c425ee RS |
245 | mlong-calls |
246 | Target Report Var(TARGET_LONG_CALLS) | |
247 | Use indirect calls | |
248 | ||
249 | mlong32 | |
250 | Target Report RejectNegative InverseMask(LONG64, LONG32) | |
251 | Use a 32-bit long type | |
252 | ||
253 | mlong64 | |
254 | Target Report RejectNegative Mask(LONG64) | |
255 | Use a 64-bit long type | |
256 | ||
c376dbfb DD |
257 | mmcount-ra-address |
258 | Target Report Var(TARGET_MCOUNT_RA_ADDRESS) | |
259 | Pass the address of the ra save location to _mcount in $12 | |
260 | ||
21c425ee | 261 | mmemcpy |
cfa31150 | 262 | Target Report Mask(MEMCPY) |
21c425ee RS |
263 | Don't optimize block moves |
264 | ||
500fc425 TS |
265 | mmt |
266 | Target Report Var(TARGET_MT) | |
267 | Allow the use of MT instructions | |
268 | ||
9f946bc1 RS |
269 | mno-float |
270 | Target Report RejectNegative Var(TARGET_NO_FLOAT) Condition(TARGET_SUPPORTS_NO_FLOAT) | |
271 | Prevent the use of all floating-point operations | |
272 | ||
5cb5a23f MR |
273 | mmcu |
274 | Target Report Var(TARGET_MCU) | |
275 | Use MCU instructions | |
276 | ||
d522e7a2 RS |
277 | mno-flush-func |
278 | Target RejectNegative | |
279 | Do not use a cache-flushing function before calling stack trampolines | |
280 | ||
500fc425 | 281 | mno-mdmx |
70be5dc7 | 282 | Target Report RejectNegative Var(TARGET_MDMX, 0) |
500fc425 TS |
283 | Do not use MDMX instructions |
284 | ||
21c425ee RS |
285 | mno-mips16 |
286 | Target Report RejectNegative InverseMask(MIPS16) | |
287 | Generate normal-mode code | |
288 | ||
289 | mno-mips3d | |
290 | Target Report RejectNegative InverseMask(MIPS3D) | |
291 | Do not use MIPS-3D instructions | |
292 | ||
293 | mpaired-single | |
294 | Target Report Mask(PAIRED_SINGLE_FLOAT) | |
295 | Use paired-single floating-point instructions | |
296 | ||
4d210b07 | 297 | mr10k-cache-barrier= |
3af42a7b | 298 | Target Joined RejectNegative Enum(mips_r10k_cache_barrier_setting) Var(mips_r10k_cache_barrier) Init(R10K_CACHE_BARRIER_NONE) |
4d210b07 RS |
299 | -mr10k-cache-barrier=SETTING Specify when r10k cache barriers should be inserted |
300 | ||
3af42a7b JM |
301 | Enum |
302 | Name(mips_r10k_cache_barrier_setting) Type(enum mips_r10k_cache_barrier_setting) | |
303 | Valid arguments to -mr10k-cache-barrier=: | |
304 | ||
305 | EnumValue | |
306 | Enum(mips_r10k_cache_barrier_setting) String(load-store) Value(R10K_CACHE_BARRIER_LOAD_STORE) | |
307 | ||
308 | EnumValue | |
309 | Enum(mips_r10k_cache_barrier_setting) String(store) Value(R10K_CACHE_BARRIER_STORE) | |
310 | ||
311 | EnumValue | |
312 | Enum(mips_r10k_cache_barrier_setting) String(none) Value(R10K_CACHE_BARRIER_NONE) | |
313 | ||
b53da244 AN |
314 | mrelax-pic-calls |
315 | Target Report Mask(RELAX_PIC_CALLS) | |
316 | Try to allow the linker to turn PIC calls into direct calls | |
317 | ||
d9870b7e RS |
318 | mshared |
319 | Target Report Var(TARGET_SHARED) Init(1) | |
320 | When generating -mabicalls code, make the code suitable for use in shared libraries | |
321 | ||
21c425ee RS |
322 | msingle-float |
323 | Target Report RejectNegative Mask(SINGLE_FLOAT) | |
324 | Restrict the use of hardware floating-point instructions to 32-bit operations | |
325 | ||
0aa222d1 | 326 | msmartmips |
a166140f | 327 | Target Report Mask(SMARTMIPS) |
0aa222d1 SL |
328 | Use SmartMIPS instructions |
329 | ||
21c425ee | 330 | msoft-float |
cc4ebe7d | 331 | Target Report RejectNegative Mask(SOFT_FLOAT_ABI) |
21c425ee RS |
332 | Prevent the use of all hardware floating-point instructions |
333 | ||
334 | msplit-addresses | |
335 | Target Report Mask(SPLIT_ADDRESSES) | |
336 | Optimize lui/addiu address loads | |
337 | ||
338 | msym32 | |
339 | Target Report Var(TARGET_SYM32) | |
340 | Assume all symbols have 32-bit values | |
341 | ||
b96c5923 DD |
342 | msynci |
343 | Target Report Mask(SYNCI) | |
344 | Use synci instruction to invalidate i-cache | |
345 | ||
d522e7a2 | 346 | mtune= |
d371df6f | 347 | Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value) |
d522e7a2 RS |
348 | -mtune=PROCESSOR Optimize the output for PROCESSOR |
349 | ||
21c425ee RS |
350 | muninit-const-in-rodata |
351 | Target Report Var(TARGET_UNINIT_CONST_IN_RODATA) | |
352 | Put uninitialized constants in ROM (needs -membedded-data) | |
353 | ||
354 | mvr4130-align | |
355 | Target Report Mask(VR4130_ALIGN) | |
356 | Perform VR4130-specific alignment optimizations | |
357 | ||
358 | mxgot | |
359 | Target Report Var(TARGET_XGOT) | |
360 | Lift restrictions on GOT size | |
4da2ed2f JM |
361 | |
362 | noasmopt | |
363 | Driver |