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1; Options for the MIPS port of the compiler
2;
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3; Copyright (C) 2005, 2007, 2008, 2010, 2011, 2012
4; Free Software Foundation, Inc.
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5;
6; This file is part of GCC.
7;
8; GCC is free software; you can redistribute it and/or modify it under
9; the terms of the GNU General Public License as published by the Free
2f83c7d6 10; Software Foundation; either version 3, or (at your option) any later
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11; version.
12;
13; GCC is distributed in the hope that it will be useful, but WITHOUT
14; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16; License for more details.
17;
18; You should have received a copy of the GNU General Public License
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19; along with GCC; see the file COPYING3. If not see
20; <http://www.gnu.org/licenses/>.
3ad7bb65 21
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22HeaderInclude
23config/mips/mips-opts.h
24
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25EB
26Driver
27
28EL
29Driver
30
d522e7a2 31mabi=
3af42a7b 32Target RejectNegative Joined Enum(mips_abi) Var(mips_abi) Init(MIPS_ABI_DEFAULT)
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33-mabi=ABI Generate code that conforms to the given ABI
34
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35Enum
36Name(mips_abi) Type(int)
37Known MIPS ABIs (for use with the -mabi= option):
38
39EnumValue
40Enum(mips_abi) String(32) Value(ABI_32)
41
42EnumValue
43Enum(mips_abi) String(o64) Value(ABI_O64)
44
45EnumValue
46Enum(mips_abi) String(n32) Value(ABI_N32)
47
48EnumValue
49Enum(mips_abi) String(64) Value(ABI_64)
50
51EnumValue
52Enum(mips_abi) String(eabi) Value(ABI_EABI)
53
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54mabicalls
55Target Report Mask(ABICALLS)
d9870b7e 56Generate code that can be used in SVR4-style dynamic objects
21c425ee 57
81826a7b 58mmad
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59Target Report Var(TARGET_MAD)
60Use PMC-style 'mad' instructions
61
d522e7a2 62march=
d371df6f 63Target RejectNegative Joined Var(mips_arch_option) ToLower Enum(mips_arch_opt_value)
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64-march=ISA Generate code for the given ISA
65
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66mbranch-cost=
67Target RejectNegative Joined UInteger Var(mips_branch_cost)
68-mbranch-cost=COST Set the cost of branches to roughly COST instructions
69
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70mbranch-likely
71Target Report Mask(BRANCHLIKELY)
72Use Branch Likely instructions, overriding the architecture default
73
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74mflip-mips16
75Target Report Var(TARGET_FLIP_MIPS16)
76Switch on/off MIPS16 ASE on alternating functions for compiler testing
77
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78mcheck-zero-division
79Target Report Mask(CHECK_ZERO_DIV)
80Trap on integer divide by zero
81
704aab3e 82mcode-readable=
3af42a7b 83Target RejectNegative Joined Enum(mips_code_readable_setting) Var(mips_code_readable) Init(CODE_READABLE_YES)
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84-mcode-readable=SETTING Specify when instructions are allowed to access code
85
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86Enum
87Name(mips_code_readable_setting) Type(enum mips_code_readable_setting)
88Valid arguments to -mcode-readable=:
89
90EnumValue
91Enum(mips_code_readable_setting) String(yes) Value(CODE_READABLE_YES)
92
93EnumValue
94Enum(mips_code_readable_setting) String(pcrel) Value(CODE_READABLE_PCREL)
95
96EnumValue
97Enum(mips_code_readable_setting) String(no) Value(CODE_READABLE_NO)
98
21c425ee 99mdivide-breaks
25e3d99d 100Target Report RejectNegative Mask(DIVIDE_BREAKS)
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101Use branch-and-break sequences to check for integer divide by zero
102
103mdivide-traps
25e3d99d 104Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
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105Use trap instructions to check for integer divide by zero
106
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107mdmx
108Target Report RejectNegative Var(TARGET_MDMX)
109Allow the use of MDMX instructions
110
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111mdouble-float
112Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
113Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
114
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115mdsp
116Target Report Mask(DSP)
117Use MIPS-DSP instructions
118
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119mdspr2
120Target Report Mask(DSPR2)
121Use MIPS-DSP REV 2 instructions
122
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123mdebug
124Target Var(TARGET_DEBUG_MODE) Undocumented
125
126mdebugd
127Target Var(TARGET_DEBUG_D_MODE) Undocumented
128
129meb
130Target Report RejectNegative Mask(BIG_ENDIAN)
131Use big-endian byte order
132
133mel
134Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
135Use little-endian byte order
136
137membedded-data
138Target Report Var(TARGET_EMBEDDED_DATA)
139Use ROM instead of RAM
140
141mexplicit-relocs
142Target Report Mask(EXPLICIT_RELOCS)
143Use NewABI-style %reloc() assembly operators
144
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145mextern-sdata
146Target Report Var(TARGET_EXTERN_SDATA) Init(1)
147Use -G for data that is not defined by the current object
148
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149mfix-24k
150Target Report Var(TARGET_FIX_24K)
151Work around certain 24K errata
152
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153mfix-r4000
154Target Report Mask(FIX_R4000)
155Work around certain R4000 errata
156
157mfix-r4400
158Target Report Mask(FIX_R4400)
159Work around certain R4400 errata
160
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161mfix-r10000
162Target Report Mask(FIX_R10000)
163Work around certain R10000 errata
164
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165mfix-sb1
166Target Report Var(TARGET_FIX_SB1)
167Work around errata for early SB-1 revision 2 cores
168
169mfix-vr4120
170Target Report Var(TARGET_FIX_VR4120)
171Work around certain VR4120 errata
172
173mfix-vr4130
174Target Report Var(TARGET_FIX_VR4130)
175Work around VR4130 mflo/mfhi errata
176
177mfix4300
178Target Report Var(TARGET_4300_MUL_FIX)
179Work around an early 4300 hardware bug
180
181mfp-exceptions
182Target Report Mask(FP_EXCEPTIONS)
183FP exceptions are enabled
184
185mfp32
186Target Report RejectNegative InverseMask(FLOAT64)
187Use 32-bit floating-point registers
188
189mfp64
190Target Report RejectNegative Mask(FLOAT64)
191Use 64-bit floating-point registers
192
d522e7a2 193mflush-func=
55bea00a 194Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
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195-mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines
196
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197mfused-madd
198Target Report Mask(FUSED_MADD)
199Generate floating-point multiply-add instructions
200
201mgp32
202Target Report RejectNegative InverseMask(64BIT)
203Use 32-bit general registers
204
205mgp64
206Target Report RejectNegative Mask(64BIT)
207Use 64-bit general registers
208
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209mgpopt
210Target Report Var(TARGET_GPOPT) Init(1)
211Use GP-relative addressing to access small data
212
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213mplt
214Target Report Var(TARGET_PLT)
215When generating -mabicalls code, allow executables to use PLTs and copy relocations
216
21c425ee 217mhard-float
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218Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
219Allow the use of hardware floating-point ABI and instructions
21c425ee 220
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221minterlink-mips16
222Target Report Var(TARGET_INTERLINK_MIPS16) Init(0)
223Generate code that can be safely linked with MIPS16 code.
224
d522e7a2 225mips
d371df6f 226Target RejectNegative Joined ToLower Enum(mips_mips_opt_value) Var(mips_isa_option)
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227-mipsN Generate code for ISA level N
228
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229mips16
230Target Report RejectNegative Mask(MIPS16)
500fc425 231Generate MIPS16 code
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232
233mips3d
234Target Report RejectNegative Mask(MIPS3D)
235Use MIPS-3D instructions
236
66471b47 237mllsc
e9276c30 238Target Report Mask(LLSC)
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239Use ll, sc and sync instructions
240
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241mlocal-sdata
242Target Report Var(TARGET_LOCAL_SDATA) Init(1)
243Use -G for object-local data
244
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245mlong-calls
246Target Report Var(TARGET_LONG_CALLS)
247Use indirect calls
248
249mlong32
250Target Report RejectNegative InverseMask(LONG64, LONG32)
251Use a 32-bit long type
252
253mlong64
254Target Report RejectNegative Mask(LONG64)
255Use a 64-bit long type
256
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257mmcount-ra-address
258Target Report Var(TARGET_MCOUNT_RA_ADDRESS)
259Pass the address of the ra save location to _mcount in $12
260
21c425ee 261mmemcpy
cfa31150 262Target Report Mask(MEMCPY)
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263Don't optimize block moves
264
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265mmt
266Target Report Var(TARGET_MT)
267Allow the use of MT instructions
268
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269mno-float
270Target Report RejectNegative Var(TARGET_NO_FLOAT) Condition(TARGET_SUPPORTS_NO_FLOAT)
271Prevent the use of all floating-point operations
272
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273mmcu
274Target Report Var(TARGET_MCU)
275Use MCU instructions
276
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277mno-flush-func
278Target RejectNegative
279Do not use a cache-flushing function before calling stack trampolines
280
500fc425 281mno-mdmx
70be5dc7 282Target Report RejectNegative Var(TARGET_MDMX, 0)
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283Do not use MDMX instructions
284
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285mno-mips16
286Target Report RejectNegative InverseMask(MIPS16)
287Generate normal-mode code
288
289mno-mips3d
290Target Report RejectNegative InverseMask(MIPS3D)
291Do not use MIPS-3D instructions
292
293mpaired-single
294Target Report Mask(PAIRED_SINGLE_FLOAT)
295Use paired-single floating-point instructions
296
4d210b07 297mr10k-cache-barrier=
3af42a7b 298Target Joined RejectNegative Enum(mips_r10k_cache_barrier_setting) Var(mips_r10k_cache_barrier) Init(R10K_CACHE_BARRIER_NONE)
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299-mr10k-cache-barrier=SETTING Specify when r10k cache barriers should be inserted
300
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301Enum
302Name(mips_r10k_cache_barrier_setting) Type(enum mips_r10k_cache_barrier_setting)
303Valid arguments to -mr10k-cache-barrier=:
304
305EnumValue
306Enum(mips_r10k_cache_barrier_setting) String(load-store) Value(R10K_CACHE_BARRIER_LOAD_STORE)
307
308EnumValue
309Enum(mips_r10k_cache_barrier_setting) String(store) Value(R10K_CACHE_BARRIER_STORE)
310
311EnumValue
312Enum(mips_r10k_cache_barrier_setting) String(none) Value(R10K_CACHE_BARRIER_NONE)
313
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314mrelax-pic-calls
315Target Report Mask(RELAX_PIC_CALLS)
316Try to allow the linker to turn PIC calls into direct calls
317
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318mshared
319Target Report Var(TARGET_SHARED) Init(1)
320When generating -mabicalls code, make the code suitable for use in shared libraries
321
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322msingle-float
323Target Report RejectNegative Mask(SINGLE_FLOAT)
324Restrict the use of hardware floating-point instructions to 32-bit operations
325
0aa222d1 326msmartmips
a166140f 327Target Report Mask(SMARTMIPS)
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328Use SmartMIPS instructions
329
21c425ee 330msoft-float
cc4ebe7d 331Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
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332Prevent the use of all hardware floating-point instructions
333
334msplit-addresses
335Target Report Mask(SPLIT_ADDRESSES)
336Optimize lui/addiu address loads
337
338msym32
339Target Report Var(TARGET_SYM32)
340Assume all symbols have 32-bit values
341
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342msynci
343Target Report Mask(SYNCI)
344Use synci instruction to invalidate i-cache
345
d522e7a2 346mtune=
d371df6f 347Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value)
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348-mtune=PROCESSOR Optimize the output for PROCESSOR
349
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350muninit-const-in-rodata
351Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
352Put uninitialized constants in ROM (needs -membedded-data)
353
354mvr4130-align
355Target Report Mask(VR4130_ALIGN)
356Perform VR4130-specific alignment optimizations
357
358mxgot
359Target Report Var(TARGET_XGOT)
360Lift restrictions on GOT size
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361
362noasmopt
363Driver